A GPU power control method, electronic device, and storage medium

Abstract

This application provides a GPU power control method, electronic device, and storage medium, relating to the field of power control. It enables multiple power supplies of a GPU to be powered on or off according to a preset power-on sequence using an embedded controller (EC) built into the electronic device. The method includes: the EC receiving a GPU power enable signal; the GPU power enable signal instructing multiple target power supplies of the GPU to be powered on or off; the EC acquiring power management signals of the target power supplies in response to the GPU power enable signal; and the EC controlling the power state of the target power supplies based on the power management signals, so that multiple target power supplies are powered on or off according to a preset power-on sequence.

Description

Technical Field

[0001] The application relates to the field of power control, and more particularly to a GPU power control method, electronic device, and storage medium. Background Technology

[0002] With the rapid development of electronic device technology such as mobile phones, tablets, and laptops, and users' increasing demands for display quality, electronic devices all contain graphics cards (dedicated or integrated graphics cards) to ensure the display performance of these devices. In actual electronic devices, because the graphics processing unit (GPU) in the graphics card has multiple power supplies, the power-on and power-off of these multiple power supplies must meet strict timing requirements to ensure the normal operation of the GPU.

[0003] Therefore, ensuring the power-on and power-off sequence of multiple power supplies for the GPU is an urgent problem to be solved. Summary of the Invention

[0004] This application provides a GPU power control method, electronic device, and storage medium. It can utilize the embedded controller (EC) of the electronic device to control multiple power supplies of the GPU to power on or power off according to a preset power-on sequence. Compared with the existing scheme that uses multiple components to control the power-on and power-off sequence of multiple power supplies of the GPU, it is lower in cost and simpler.

[0005] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0006] In a first aspect, embodiments of this application provide a GPU power control method applied to an electronic device, which includes an embedded controller (EC). The method includes: the EC receiving a GPU power enable signal; the GPU power enable signal being used to instruct multiple target power supplies of the GPU to power on or power off; the EC, in response to the GPU power enable signal, acquiring power management signals of the target power supplies; and the EC controlling the power state of the target power supplies based on the power management signals of the target power supplies, so that the multiple target power supplies power on according to a preset power-on sequence or power off according to a preset power-off sequence.

[0007] Based on the technical solution provided in this application, the EC (Electronic Control Unit) inherent in the electronic device can be used to fully analyze multiple power management signals related to the GPU power state. This allows for the adjustment of the power enable signals used to control the power states of the multiple power supplies of the GPU, achieving the goal of powering on or off the multiple power supplies of the GPU according to a preset power-on sequence or a preset power-off sequence. Since the entire technical solution reuses the electronic device's own EC to control the power-on and power-off sequences of the multiple power supplies of the GPU, it is lower in cost and simpler than existing solutions that use multiple components to control the power-on and power-off sequences of the multiple power supplies of the GPU.

[0008] Furthermore, since the EC is a programmable device, its analysis of multiple power management signals and adjustment of the power enable signal based on the analysis results can be implemented through programming. This allows for easier debugging or adjustment should power-on / off timing errors or adjustments be made, resulting in more accurate GPU power-on / off timing and faster fault handling, thus improving the user experience.

[0009] In one possible implementation of the first aspect, the EC controls the power state of the target power supply, including: the EC controlling the target power supply to enter a power-on state or a power-off state. Specifically, the EC controlling the target power supply to power on includes: the EC sending an enable signal to the power supply chip of the target power supply to indicate that the target power supply is powered on, so that the power supply chip controls the target power supply to power on; the EC controlling the target power supply to power off includes: the EC sending an enable signal to the power supply chip of the target power supply to indicate that the target power supply is powered off, so that the power supply chip controls the target power supply to power off. In this way, the EC can control the target power supply to power on or off by sending an enable signal to the power supply chip of the target power supply.

[0010] In one possible implementation of the first aspect, when the target power supply is a first type of power supply, the power management signal of the target power supply includes a status indication signal of the first power supply; the first type of power supply is the first in the preset power-on sequence and the last in the preset power-off sequence; in the preset power-off sequence, the power-off sequence of the first power supply is the previous sequence of the power-off sequence of the first type of power supply; the status indication signal of the first power supply is used to indicate whether the first power supply has supplied power to the GPU or has not supplied power to the GPU.

[0011] When the target power supply is a first-class power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: controlling the first-class power supply to power on when the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on, or when the status indicator signal of the first power supply indicates that the first power supply has supplied power to the GPU; and controlling the first-class power supply to power off when the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off, and the status indicator signal of the first power supply indicates that the first power supply has not supplied power to the GPU.

[0012] Based on the above technical solution, when the status indication signal of the first power supply indicates that the first power supply has supplied power to the GPU, or when the GPU power enable signal indicates that multiple power supplies of the GPU are powered on, it can be determined that the GPU power supply is in the power-on process, or that the GPU power supply is in the power-off process and the first power supply is not powered off. Therefore, the EC can control the first type of power supply to power on or supply power to the GPU. When the status indication signal of the first power supply indicates that the first power supply is not supplying power to the GPU, and the GPU power enable signal indicates that multiple power supplies of the GPU are powered off, it can be determined that the GPU power supply is in the power-off process and the first power supply is powered off. Therefore, the EC can control the first type of power supply to power off or stop supplying power to the GPU. It is evident that this technical solution ensures that the first type of power supply is powered on and off according to the preset power-on sequence and the preset power-off sequence, guaranteeing the correctness of the power-on and power-off sequence of the first type of power supply. Furthermore, since the EC's control actions for the power-on and power-off of the first type of power supply are based on the same power management signal, the complexity of the entire GPU power control method is reduced.

[0013] In one possible implementation of the first aspect, when the target power supply is a second type of power supply, the power management signals of the target power supply include: a status indication signal of the preceding power supply and a sleep enable signal of the second type of power supply; the second type of power supply does not power down whether it enters a sleep state or not; in the preset power-on sequence, the power-on sequence of the preceding power supplies is the previous sequence of the power-on sequence of the target power supply; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the sleep enable signal of the second type of power supply is used to indicate whether the second type of power supply enters a sleep state or does not enter a sleep state.

[0014] When the target power supply is a Class II power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: controlling the Class II power supply to power on when the status indication signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, or the sleep enable signal of the Class II power supply indicates that the Class II power supply has entered a sleep state; and controlling the Class II power supply to power off when the status indication signal of the preceding power supply indicates that the preceding power supply has not supplied power to the GPU, and the sleep enable signal of the Class II power supply indicates that the Class II power supply has not entered a sleep state.

[0015] Based on the above technical solution, when the status indicator signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, or when the sleep enable signal of the second type of power supply indicates that the second type of power supply has entered a sleep state, it can be determined that the GPU power supply is in the power-on process and the preceding power supply has been powered on, or the GPU power supply is in the power-on process and the second type of power supply is about to enter a sleep state. Therefore, the EC can control the second type of power supply to power on or supply power to the GPU at this time. When the status indicator signal of the preceding power supply indicates that the preceding power supply has not supplied power to the GPU, and the sleep enable signal of the second type of power supply indicates that the second type of power supply will not enter a sleep state, it can be determined that the GPU power supply is in the power-off process and the preceding power supply has been powered off. Therefore, the EC can control the second type of power supply to power off or stop supplying power to the GPU at this time. It can be seen that through this technical solution, the second type of power supply can be powered on according to the power-on sequence of the second type of power supply in the preset power-on sequence, and powered off according to the power-off sequence of the second type of power supply in the preset power-off sequence, ensuring the correctness of the power-on and power-off sequence of the second type of power supply.

[0016] In one possible implementation of the first aspect, when the target power supply is a third type of power supply, the power management signal of the target power supply includes the enable signal of the preceding power supply; the third type of power supply is the first in the preset power-down sequence; in the preset power-up sequence, the power-up sequence of the preceding power supply is the one before the power-up sequence of the target power supply; the enable signal of the preceding power supply is used to indicate whether the preceding power supply is powered on or off.

[0017] When the target power supply is a Class III power supply, the EC controls the power state of the target power supply based on the power management signals of the target power supply, including: the EC controls the power state of the target power supply based on the power management signals of the target power supply and the GPU power enable signals.

[0018] Based on the above technical solution, since the third type of power supply needs to be powered down first, the power state of the target power supply can be controlled based on the GPU power enable signal. This ensures that when the EC receives the GPU power enable signal used to indicate the power down of multiple power supplies of the GPU, it can control the third type of power supply to power down in a timely manner, thus ensuring the correctness of the power down sequence of the third type of power supply.

[0019] In one possible implementation of the first aspect, when the target power supply is the first sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: a status indication signal of the preceding power supply; the first sub-power supply does not have a sleep enable signal and its correlation with the GPU temperature is less than a preset threshold; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU.

[0020] When the target power supply is the first sub-power supply, the EC controls the power state of the target power supply based on the power management signal and the GPU power enable signal of the target power supply, including: controlling the first sub-power supply to power on when the status indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on; and controlling the first sub-power supply to power off when the status indication signal of the preceding power supply is used to indicate that the preceding power supply has not supplied power to the GPU, or the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered off, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off.

[0021] Based on the above technical solution, when the enable signal of the preceding power supply corresponding to the first sub-power supply is used to indicate that the preceding power supply is powered on, and the status indicator signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, and the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered on, it can be determined that the GPU power-on process is underway and the preceding power supply is powered on. Therefore, the EC can control the first sub-power supply to power on or supply power to the GPU at this time. When the enable signal of the preceding power supply corresponding to the first sub-power supply is used to indicate that the preceding power supply is powered off, or the status indicator signal of the preceding power supply is used to indicate that the preceding power supply is not supplying power to the GPU, or the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered off, it can be determined that the GPU power-off process is underway. Therefore, the EC can control the first sub-power supply to power off or stop supplying power to the GPU at this time. It can be seen that through this technical solution, while ensuring that the first sub-power supply, which has little correlation with GPU temperature and does not have a sleep enable signal, is powered off first, the power-on order of the first sub-power supply in the preset power-on sequence is followed, ensuring the correctness of the power-on and power-off sequence of the first sub-power supply.

[0022] In one possible implementation of the first aspect, when the target power supply is the second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: an over-temperature indication signal and a hibernation enable signal for the second sub-power supply; the status indication signal of the preceding power supply of the second sub-power supply cannot be acquired by the EC; the over-temperature indication signal is used to indicate that the GPU temperature does not exceed or exceeds the preset temperature; the hibernation enable signal for the second sub-power supply is used to indicate that the second sub-power supply enters a hibernation state or does not enter a hibernation state.

[0023] When the target power supply is the second sub-power supply, the EC controls the power state of the target power supply based on the power management signal and the GPU power enable signal of the target power supply, including: controlling the second sub-power supply to power on when the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the over-temperature indicator signal is used to indicate that the GPU temperature does not exceed the preset temperature, the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply does not enter the sleep state, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on; and controlling the second sub-power supply to power off when the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered off, or the over-temperature indicator signal is used to indicate that the GPU temperature exceeds the preset temperature, or the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters the sleep state, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off.

[0024] Based on the above technical solution, for the second sub-power supply where the status indication signal of the preceding power supply cannot be obtained, if the over-temperature indication signal indicates that the GPU temperature is normal, the preceding power supply enable signal is used to indicate that the preceding power supply is powered on, the second sub-power supply's sleep enable signal indicates that the second sub-power supply does not enter sleep mode, and the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered on, it can be determined that the GPU power-on process is underway and the preceding power supply has been powered on. Therefore, the EC can control the second sub-power supply to power on or supply power to the GPU at this time. If the over-temperature indication signal indicates that the GPU temperature exceeds a preset temperature, or the preceding power supply enable signal is used to indicate that the preceding power supply is powered off, or the second sub-power supply's sleep enable signal indicates that the second sub-power supply enters sleep mode, or the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered off, it can be determined that the second sub-power supply needs to power off to enter sleep mode, or the second sub-power supply needs to power off to reduce the GPU temperature, or is in the GPU power-off process. Therefore, the EC can control the second sub-power supply to power off or stop supplying power to the GPU at this time. As can be seen, this technical solution ensures the correctness of the second sub-power supply's power-on sequence, based on the premise that the second sub-power supply, which is related to GPU temperature and has a hibernation enable signal, is powered down first. Furthermore, it can promptly power down the second sub-power supply in case of GPU overheating or when the GPU needs to enter hibernation mode, preventing GPU malfunctions due to overheating or unnecessary power consumption.

[0025] In one possible implementation of the first aspect, when the target power supply is a third sub-power supply other than the first and second sub-power supplies in the third type of power supply, the power management signals of the target power supply further include: a status indication signal of the preceding power supply, an over-temperature indication signal, and a sleep enable signal of the third sub-power supply; the first sub-power supply does not have a sleep enable signal, and its correlation with the GPU temperature is less than a preset threshold; the status indication signal of the preceding power supply of the second sub-power supply cannot be acquired by the EC; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the over-temperature indication signal is used to indicate whether the GPU temperature does not exceed a preset temperature or exceeds a preset temperature; the sleep enable signal of the third sub-power supply is used to indicate whether the third sub-power supply enters a sleep state or does not enter a sleep state.

[0026] When the target power supply is the third sub-power supply, the EC controls the power state of the target power supply based on the power management signals of the target power supply, including: controlling the third sub-power supply to power on when the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the status indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature, the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply does not enter a sleep state, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on; and controlling the third sub-power supply to power off when the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered off, or the status indication signal of the preceding power supply is used to indicate that the preceding power supply is not supplying power to the GPU, or the over-temperature indication signal is used to indicate that the GPU temperature exceeds a preset temperature, or the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters a sleep state, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off.

[0027] Based on the above technical solution, when the over-temperature indicator signal indicates that the GPU temperature is normal, and the preceding power supply enable signal indicates that the preceding power supply is powered on, and the preceding power supply status indicator signal indicates that the preceding power supply is supplying power to the GPU, and the third sub-power supply's sleep enable signal indicates that the third sub-power supply is not entering sleep mode, and the GPU power enable signal indicates that multiple power supplies to the GPU are powered on, it can be determined that the GPU power supply is in the power-on process and the preceding power supply is powered on. Therefore, the EC can control the third sub-power supply to power on or supply power to the GPU at this time. When the over-temperature indicator signal indicates that the GPU temperature exceeds a preset temperature, or the preceding power supply enable signal indicates that the preceding power supply is powered off, or the preceding power supply status indicator signal indicates that the preceding power supply is not supplying power to the GPU, or the third sub-power supply's sleep enable signal indicates that the third sub-power supply is entering sleep mode, or the GPU power enable signal indicates that multiple power supplies to the GPU are powered off, it can be determined that the third sub-power supply needs to power off to enter sleep mode, or the third sub-power supply needs to power off to reduce the GPU temperature, or is in the GPU power-off process. Therefore, the EC can control the third sub-power supply to power off or stop supplying power to the GPU at this time. As can be seen, this technical solution ensures the correctness of the power-on / off sequence of the third sub-power supply, which is related to GPU temperature and has a sleep enable signal, by ensuring that the third sub-power supply is powered down first, while following the preset power-on sequence. Furthermore, it can promptly power down the third sub-power supply in case of GPU overheating or when the GPU needs to enter sleep mode, preventing GPU malfunctions due to overheating or unnecessary power consumption.

[0028] In a second aspect, this application provides an electronic device including a display screen, a memory, an embedded controller EC, and one or more processors; wherein the memory stores computer program code, the computer program code including computer instructions, which, when executed by the EC, cause the electronic device to perform a GPU power control method as provided in the first aspect and any of its possible design embodiments.

[0029] Thirdly, this application provides an embedded controller, including a processing unit and a memory; wherein the memory is used to store one or more computer program codes, the computer program codes including computer instructions, and when the embedded controller executes the computer instructions, the embedded controller executes the GPU power control method provided by the first aspect and any of its possible design embodiments.

[0030] Fourthly, this application provides a computer-readable storage medium including computer instructions that, when executed on an electronic device, cause the electronic device to perform a GPU power control method as provided in the first aspect and any of its possible design embodiments.

[0031] Fifthly, this application provides a computer program product that, when run on an electronic device, causes the electronic device to execute the GPU power control method provided by the first aspect and any possible design thereof.

[0032] Understandably, the beneficial effects that the technical solutions provided in the second to fifth aspects described above can be achieved can be referred to the beneficial effects in the first aspect and any of its possible design methods, which will not be repeated here. Attached Figure Description

[0033] Figure 1 A schematic diagram illustrating the principle of the GPU power control method provided in this application embodiment;

[0034] Figure 2 A schematic diagram of the hardware architecture of an electronic device provided in an embodiment of this application;

[0035] Figure 3 A flowchart illustrating a GPU power control method provided in this application embodiment. Figure 1 ;

[0036] Figure 4 A flowchart illustrating a GPU power control method provided in this application embodiment. Figure 2 ;

[0037] Figure 5 A flowchart illustrating a GPU power control method provided in this application embodiment. Figure 3 ;

[0038] Figure 6 A flowchart illustrating a GPU power control method provided in this application embodiment. Figure 4 ;

[0039] Figure 7 This is a schematic diagram of a GPU power control device provided in an embodiment of this application. Detailed Implementation

[0040] The terminology used in the following embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” “the,” and “this” are intended to include the plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that “ / ” means “or,” for example, A / B can mean A or B; “and / or” in the text is merely a description of the relationship between related objects, indicating that three relationships can exist, for example, A and / or B can mean: A alone, A and B simultaneously, and B alone.

[0041] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application can be combined with other embodiments.

[0042] The terms "first" and "second" in the following embodiments of this application are for descriptive purposes only and should not be construed as implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature, and in the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0043] First, the terms used in the embodiments of this application are explained as follows:

[0044] Graphics Processing Unit (GPU): Also known as display core, display chip, video processor, etc., a GPU is a coprocessor used for processing images and graphics calculations. GPUs are widely used in electronic devices such as mobile phones, tablets, and laptops. GPUs are microprocessors specifically designed for parallel computing. Their architecture is centered around high-density computing units, typically featuring thousands of small stream processors (such as NVIDIA's Compute Unified Device Architecture (CUDA) cores or AMD's Stream Processors (SPs)). Compared to the central processing unit (CPU), GPUs achieve massively parallel task processing through their numerical advantage, such as simultaneously rendering millions of pixels or performing matrix operations in deep learning.

[0045] Embedded controller (EC): An EC is a low-power microcontroller (MCU) dedicated to system management, commonly found in mobile platforms such as laptops and servers. Its core characteristic is always-on connectivity; even when the host is in sleep or powered off, the EC can still monitor the hardware status and respond to wake-up commands (such as opening the lid to wake up, or using keyboard shortcuts). In this embodiment, the EC can also be used to communicate with the controllers (or power chips) of the GPU's various power supplies, thereby controlling the power-on and power-off sequence of the GPU's multiple power supplies.

[0046] Low level: Low level is a low voltage as opposed to high level, a term used in electronic engineering. In digital logic circuits, low level refers to the maximum input level allowed to ensure that the input of a logic gate is low. When the input level is lower than a preset low voltage, it is considered a low level. In digital logic circuits, low level can be represented by "0". The preset low voltage corresponding to low level may be different in different circuits.

[0047] High level (or high-level signal): High level refers to a high voltage as opposed to low level, a term used in electrical engineering. In digital logic circuits, it refers to the minimum input level allowed to ensure that the input of a logic gate is high. When the input level is higher than the preset high voltage, it is considered a high level. In digital logic circuits, a high level can be represented by "1". The preset high voltage corresponding to a high level may differ in different circuits.

[0048] AND gate: An AND gate is a commonly used logic gate, also known as an AND circuit. If an event occurs only when all conditions are met, this logical relationship is called an "AND" logic relationship. A circuit with an "AND" logic relationship is called an AND gate. An AND gate is the basic logic gate circuit that performs the "AND" operation. It has multiple inputs and one output. The output is high only when all inputs are simultaneously high (logic 1); otherwise, the output is low (logic 0).

[0049] OR gate: An OR gate is a type of commonly used logic gate, also known as an OR circuit. If an event occurs when at least one of several conditions is met, this relationship is called an "OR" logic relationship. A circuit with an "OR" logic relationship is called an OR gate. An OR gate is the basic logic gate circuit that performs the "OR" operation. It has multiple inputs and one output. The output is high when at least one input is high; the output is low only when all inputs are low.

[0050] Enable signal: An enable signal is a control signal in digital circuits that enables / disables a specific module or operation by being high (logic 1) or low (logic 0). Essentially, it's a dynamic resource allocation mechanism used to optimize system power consumption and performance.

[0051] Power-on: Power-on refers to the process of a device or system switching from a power-off state (no power input) to a power-on state (power input). In this embodiment, GPU power-on means that the GPU's power supply begins to supply power to the GPU.

[0052] Power off: Power off refers to the process of switching a device or system from a powered-on state to a powered-off state.

[0053] Input / Output (I / O) signals: I / O signals are electrical signals used in computer or industrial control systems to exchange data with external devices, covering two types of functions: input (such as sensor data) and output (such as actuator control).

[0054] In existing technologies, electronic devices such as mobile phones, tablets, and laptops typically include graphics cards (dedicated or integrated graphics) to improve the display performance of these devices. For hardware protection and energy efficiency optimization, the GPU within these graphics cards often has multiple power supplies. To ensure the GPU functions properly, the power-on and power-off of these multiple power supplies must adhere to strict timing requirements.

[0055] In related technical solutions, to ensure the power-on and power-off sequence of multiple power supplies in the GPU, corresponding timing control circuits are built using components such as capacitors, resistors, diodes, and logic gates. However, this technical solution is costly, prone to errors, and difficult to debug.

[0056] To address the aforementioned problems, this application provides a GPU power control method applied in electronic devices. In this technical solution, reference is made to... Figure 1 As shown, the embedded controller (EC) in an electronic device acquires power management signals related to the power state of the target power supply of the GPU when the GPU needs to operate or stop operating. The power state includes a power-on state and a power-off state. When a target power supply is powered on or supplies power to the GPU, it indicates that the target power supply is in the power-on state; when a target power supply is powered off or stops supplying power to the GPU, it indicates that the target power supply is in the power-off state. Subsequently, the EC can adjust the power enable signal among multiple power management signals based on the target power supply's power management signals to control the power state of the target power supply, so that multiple target power supplies of the GPU are powered on or off according to a preset power-on sequence or a preset power-off sequence.

[0057] As can be seen, the technical solution provided in this application utilizes the EC (Electronic Control Unit) inherent in the electronic device to fully analyze multiple power management signals related to the GPU power state, thereby adjusting the power enable signals used to control the power states of the multiple power supplies of the GPU. This achieves the purpose of enabling the multiple power supplies of the GPU to power on or power off according to a preset power-on sequence. Since the control of the power-on and power-off sequence of the multiple power supplies of the GPU in the entire technical solution reuses the EC inherent in the electronic device, it is lower in cost and simpler than the existing solution that uses multiple components to control the power-on and power-off sequence of the multiple power supplies of the GPU.

[0058] Furthermore, since the EC is a programmable device, its analysis of multiple power management signals and adjustment of the power enable signal based on the analysis results can be implemented through programming. This allows for easier debugging or adjustment should power-on / off timing errors or adjustments be made, resulting in more accurate GPU power-on / off timing and faster fault handling, thus improving the user experience.

[0059] The technical solutions provided in the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0060] The technical solutions provided in this application can be applied to electronic devices equipped with a graphics card (or GPU) and an EC (Embedded Controller). In some embodiments, the electronic device may be a mobile phone, tablet computer, handheld computer, personal computer (PC), ultra-mobile personal computer (UMPC), netbook, as well as cellular phone, personal digital assistant (PDA), augmented reality (AR) device, virtual reality (VR) device, artificial intelligence (AI) device, wearable device, in-vehicle device, smart home device and / or smart city device, etc. The embodiments of this application do not impose special limitations on the specific type of the electronic device.

[0061] For example, the electronic device in this application embodiment can be an electronic device with a heterogeneous SOC. In some embodiments, the electronic device can be a laptop, mobile phone, tablet computer, handheld computer, personal computer (PC), ultra-mobile personal computer (UMPC), netbook, as well as cellular phone, personal digital assistant (PDA), augmented reality (AR) device, virtual reality (VR) device, artificial intelligence (AI) device, wearable device, in-vehicle device, smart home device and / or smart city device, etc. The specific type of electronic device is not particularly limited in this application embodiment.

[0062] For example, taking a laptop computer as an electronic device, Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of this application is shown.

[0063] Reference Figure 2 As shown, the electronic device may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, a touchpad 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a display screen 193, and a camera 194, etc. The sensor module 180 may include a pressure sensor, a gyroscope sensor, a magnetic sensor, an accelerometer, a gravity sensor, a distance sensor, a proximity sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, etc.

[0064] The other components mentioned above, excluding the display screen 193 (such as the processor 110, external memory interface 120, internal memory 121, universal serial bus interface 130, charging management module 140, power management module 141, battery 142, antenna 1, touchpad 150, wireless communication module 160, audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, sensor module 180, buttons 190, motor 191, indicator 192, and camera 194), can all be mounted on the laptop's dock. The camera 194 can also be mounted on the bezel of the laptop's display screen 193.

[0065] The processor 110 may specifically include one or more processing units, such as an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a neural network processing unit (NPU), a controller, memory, a video codec, a digital signal processor (DSP), a baseband processor, etc. These different processing units may be independent devices or integrated into one or more processors.

[0066] A controller can be the nerve center and command center of an electronic device. Based on command opcodes and timing signals, the controller generates operation control signals to complete the control of command retrieval and execution.

[0067] In this embodiment, the controller in the electronic device may include an embedded controller (EC). The EC can communicate with the controllers (or power chips) of each power supply of the GPU to obtain all power management signals related to the power state of the GPU, and adjust the power enable signal based on the power management signals to control the power-on and power-off sequence of the multiple power supplies of the GPU. Specifically, the EC can be used to execute the GPU power control method provided in this embodiment.

[0068] The processor 110 may also include a memory for storing commands and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store commands or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the command or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0069] In some embodiments, the processor 110 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0070] The charging management module 140 receives charging input from a charger to charge the battery 142. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 receives charging input from the wired charger via a USB interface 130. In some wireless charging embodiments, the charging management module 140 receives wireless charging input via a receiving coil in the wireless charging chip of the electronic device.

[0071] While charging the battery 142, the charging management module 140 can also supply power to electronic devices through the power management module 141.

[0072] The power management module 141 connects the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, providing power to the processor 110, internal memory 121, display screen 193, camera 194, and wireless communication module 160, etc. The power management module 141 can also monitor parameters such as battery voltage, current, battery cycle count, and battery health status (leakage current, impedance). In some other embodiments, the power management module 141 may also be located within the processor 110. In some embodiments, the charging management module 140 and the power management module 141 may be located in the same device.

[0073] The external memory interface 120 can be used to connect to external non-volatile memory, thereby expanding the storage capacity of the electronic device. The external non-volatile memory communicates with the processor 110 through the external memory interface 120 to perform data storage functions. For example, music, video, and other files can be stored in the external non-volatile memory.

[0074] Internal memory 121 may include one or more random access memory (RAM) and one or more non-volatile memory (NVM). The RAM can be directly read and written by the processor 110 and can be used to store executable programs (e.g., machine commands) of the operating system or other running programs, as well as user and application data. The NVM can also store executable programs and user and application data, and can be pre-loaded into the RAM for direct read and write operations by the processor 110.

[0075] A touch sensor, also known as a "touch device," can be located on the display screen 193. The touch sensor and the display screen 193 together form a touchscreen, also called a "touchscreen." The touch sensor detects touch operations applied to or near it. The touch sensor can transmit the detected touch operation to the application processor to determine the type of touch event. Visual output related to the touch operation can be provided through the display screen 193. In other embodiments, the touch sensor may also be located on the surface of the electronic device, in a different position than the display screen 193.

[0076] Buttons 190 include a power button, volume buttons, etc. Buttons 190 can be mechanical buttons or touch-sensitive buttons. The electronic device can receive button input and generate key signal inputs related to user settings and function control of the electronic device.

[0077] The indicator 192 may be an indicator light, used to indicate charging status, power level changes, or to indicate messages, missed calls, notifications, etc. In some embodiments, the indicator 192 may be located near the USB port.

[0078] Motor 191 can generate vibration feedback. For example, touch operations applied to different applications (such as games, audio playback, etc.) can correspond to different vibration feedback effects. Touch operations applied to different areas of the display screen 193 can also correspond to different vibration feedback effects from motor 191. Different application scenarios (such as time reminders, alarm clocks, games, etc.) can also correspond to different vibration feedback effects. Touch vibration feedback effects can also be customized.

[0079] Camera 194 is used to capture still images or videos. An object is projected onto a photosensitive element by generating an optical image through the lens. The photosensitive element can be a charge-coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the light signal into an electrical signal, which is then passed to an ISP for conversion into a digital image signal. The ISP outputs the digital image signal to a DSP for processing. The DSP converts the digital image signal into image signals in standard RGB, YUV, or other formats. In some embodiments, the electronic device may include one or N cameras 194, where N is a positive integer greater than 1.

[0080] The electronic device implements display functions through a GPU, a display screen 193, and an application processor. The GPU is a microprocessor for image editing, connected to the display screen 193 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs, which execute program commands to generate or modify display information. In this embodiment, the GPU is also used in conjunction with the NPU to perform frame interpolation for video.

[0081] In some embodiments, taking an Nvidia GPU as an example, the GPU can be powered by the following power supplies: 1V2_POWER, 1V8_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER. Here, 1V2_POWER refers to a 1.2V voltage source, and 1V8_POWER refers to a 1.8V voltage source. Furthermore, each power supply can have a corresponding power chip to control the power supply and input / output related power management signals.

[0082] Because different components of the GPU (such as GPIO interfaces, peripheral component interconnect express (PCIe) interfaces, registers, and video memory) may require different voltages during normal operation, and the power-on / power-off sequence of these components is fixed based on hardware design requirements, the GPU's multiple power supplies must power on according to a preset power-on sequence when the GPU powers on, and power off according to a preset power-off sequence when the GPU powers off. The preset power-on sequence and preset power-off sequence are different.

[0083] In some embodiments, when the GPU needs to be powered on, the power-on sequence of these power supplies can be specified as: 1V2_POWER->1V8_POWER->MSVDD_POWER->NVVDD_POWER and PEXVDD_POWER->FBVDD_POWER.

[0084] In some embodiments, when the GPU needs to be powered down, the power-down sequence of these power supplies can be specified as: MSVDD_POWER, NVVDD_POWER and PEXVDD_POWER->FBVDD_POWER->1V2_POWER->1V8_POWER.

[0085] The ISP (Image Signal Processor) is used to process data fed back from the camera 194. For example, when taking a picture, the shutter is opened, and light is transmitted through the lens to the camera's photosensitive element. The light signal is converted into an electrical signal, and the camera's photosensitive element transmits the electrical signal to the ISP for processing, transforming it into an image visible to the naked eye. The ISP can also perform algorithmic optimization on image noise and brightness. The ISP can also optimize parameters such as exposure and color temperature of the shooting scene. In some embodiments, the ISP can be integrated into the camera 194. The camera 194 is used to capture still images or videos.

[0086] Digital signal processors (DSPs) are used to process digital signals. Besides digital image signals, they can also process other digital signals. For example, when an electronic device is selecting a frequency, a DSP can perform a Fourier transform on the frequency energy.

[0087] Video codecs are used to compress or decompress digital video. Electronic devices can support one or more video codecs. This allows the electronic device to play or record video in various encoded formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

[0088] Display screen 193 is used to display images, videos, etc. Display screen 193 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a Miniled LED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device may include one or N displays 193, where N is a positive integer greater than 1.

[0089] Antenna 1 is used to transmit and receive electromagnetic wave signals. Each antenna in an electronic device can be used to cover one or more communication frequency bands. Different antennas can also be reused to improve antenna utilization.

[0090] The wireless communication module 160 can provide solutions for wireless communication applications in electronic devices, including wireless local area networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), and infrared (IR) technologies. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via antenna 1, performs frequency modulation and filtering of the electromagnetic wave signals, and sends the processed signal to processor 110. The wireless communication module 160 can also receive signals to be transmitted from processor 110, perform frequency modulation and amplification, and convert them into electromagnetic waves for radiation via antenna 1.

[0091] In some embodiments, the antenna 1 of the electronic device is coupled to the wireless communication module 160, enabling the electronic device to communicate with networks and other devices via wireless communication technology. The wireless communication technology may include wireless local area networks (WLANs), Bluetooth, global navigation satellite systems (GNSS), frequency modulation (FM), short-range wireless communication (NRSM), infrared technology, etc.

[0092] It is understood that the interface connection relationships between the modules illustrated in the embodiments of the present invention are merely illustrative and do not constitute a limitation on the structure of the electronic device. In other embodiments of this application, the electronic device may also employ different interface connection methods or combinations of multiple interface connection methods as described in the above embodiments.

[0093] Of course, this is understandable. Figure 2 The illustration shown is merely an example of an electronic device in the form of a laptop computer. If the electronic device is in the form of a mobile phone, tablet, handheld computer, PC, PDA, wearable device (such as a smartwatch, smart bracelet), or other similar device, its structure may include more advanced features. Figure 2 The fewer structures shown can also include more than Figure 2 The structures shown are not limited here.

[0094] The technical solutions provided in the embodiments of this application can all be implemented in electronic devices with the above-described hardware architecture.

[0095] Based on the hardware architecture of the electronic device described in the above embodiments, the GPU power control method provided in this application embodiment will be described below with reference to the accompanying drawings.

[0096] In this embodiment, the purpose of the GPU power control method is to enable the electronic device to more easily control the power-on and power-off sequences of the GPU using the EC (Electronic Control Unit), thereby reducing the cost of GPU power-on and power-off sequence control in the electronic device. The process of controlling the multiple power-on sequences of the GPU can be referred to as the GPU power-on control flow, and the process of controlling the multiple power-off sequences of the GPU can be referred to as the GPU power-off control flow.

[0097] The GPU power control method provided in the embodiments of this application will be described below with reference to 3. Figure 3 This is a schematic diagram illustrating the flow of a GPU power control method provided in an embodiment of this application. This method can specifically be executed by an EC (Electronic Control Unit) in an electronic device. (Refer to...) Figure 3 As shown, taking a laptop computer as an example, and an Nvidia GPU as the GPU within the electronic device, assuming the Nvidia GPU has five power supplies: 1V2_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER, the GPU power control method can include S301-S320:

[0098] S301. When the electronic device is operating normally, the EC receives the GPU power enable signal.

[0099] In this embodiment, the normal operation of the electronic device specifically refers to the following: the system main power supply voltage / system total power supply / system voltage cabinet (VSYS) provides a stable power supply, and all functional modules of the electronic device can be used normally (or the system can be referred to as powered on). Here, "functional module can be used normally" means that the power supply to the functional module is stable and it can be used normally.

[0100] When an electronic device requires the GPU to work, the GPU power control method is specifically a GPU power-on control process. In the GPU power-on control process, the GPU power enable signal is used to instruct multiple power supplies of the GPU to power on, or to instruct multiple power supplies of the GPU to supply power to the GPU.

[0101] When an electronic device requires the GPU to stop working, the GPU power control method is specifically a GPU power-down control process. In the GPU power-down control process, the GPU power enable signal is used to instruct multiple power supplies of the GPU to power down, or to instruct multiple power supplies of the GPU to stop supplying power to the GPU.

[0102] In some embodiments, the GPU power enable signal can specifically be the GPU_PWREN signal. This GPU_PWREN signal can be a level signal generated and sent to the GPU in real time or periodically by the CPU in the electronic device during normal operation, based on the current usage requirements of the GPU. When the GPU_PWREN signal is high, it is used to instruct multiple power supplies of the GPU to power on, or to instruct multiple power supplies of the GPU to supply power to the GPU. When the GPU_PWREN signal is low, it is used to instruct multiple power supplies of the GPU to power off, or to instruct multiple power supplies of the GPU to stop supplying power to the GPU. The CPU can generate different GPU_PWREN signals according to actual needs; for example, it can generate a high-level GPU_PWREN signal when the GPU needs to work, and a low-level GPU_PWREN signal when the GPU needs to stop working.

[0103] For example, refer to Figure 4 As shown, when VSYS is powered on and the system is powered on, the CPU can send GPU_PWREN to the EC. This application does not impose specific restrictions on the timing of the generation and transmission of the GPU power enable signal; the specific timing depends on the actual requirements.

[0104] Based on the above description, if the GPU power enable signal is the GPU_PWREN signal, then the GPU_PWREN signal is a high-level signal during the GPU power-on control process; and the GPU_PWREN signal is a low-level signal during the GPU power-off control process.

[0105] After receiving the GPU power enable signal, the EC can start controlling the power-on or power-off of multiple power supplies of the GPU, so that the multiple power supplies of the GPU are powered on according to a preset power-on sequence or powered off according to a preset power-off sequence, i.e., executing S302-S319.

[0106] S302, EC determines whether the FBVDD status indicator signal indicates that FBVDD_POWER has supplied power to the GPU, or whether the GPU power enable signal indicates that multiple power supplies to the GPU are powered on.

[0107] The FBVDD status indicator signal is used to indicate whether FBVDD_POWER is supplying power to the GPU or not.

[0108] In some embodiments, the FBVDD status indication signal can be the FBVDD_PWRGD signal. The FBVDD_PWRGD is a level signal output by the power supply chip (integrated circuit, IC) of FBVDD_POWER.

[0109] For the FBVDD_POWER power supply chip, when it receives the FBVDD enable signal (i.e., a high-level FBVDD_POWER_EN) indicating that the FBVDD_POWER is powered on, the FBVDD_POWER power supply chip can output FBVDD power to the GPU, i.e., the FBVDD_POWER is powered on. Simultaneously, the FBVDD_POWER power supply chip can output a high-level FBVDD_PWRGD signal. The high-level FBVDD_PWRGD signal specifically indicates that the FBVDD_POWER is supplying power to the GPU. In other words, at this time, the FBVDD status indicator signal is used to indicate that the FBVDD_POWER is supplying power to the GPU.

[0110] When the FBVDD_POWER power chip receives the FBVDD enable signal (i.e., a low-level FBVDD_POWER_EN) indicating that the FBVDD_POWER is powered down, the FBVDD_POWER power chip stops outputting FBVDD power to the GPU, meaning the FBVDD_POWER is powered down. Simultaneously, the FBVDD_POWER power chip can output a low-level FBVDD_PWRGD signal. The low-level FBVDD_PWRGD signal specifically indicates that the FBVDD_POWER is not supplying power to the GPU. In other words, at this time, the FBVDD status indicator signal is used to indicate that the FBVDD_POWER is not supplying power to the GPU.

[0111] Based on the above description, in the GPU power-on control process, the EC only begins powering on each power supply of the GPU after receiving the GPU power enable signal indicating that multiple power supplies of the GPU are powered on. At this time, the FBVDD_POWER power chip has not yet received the enable signal indicating that FBVDD_POWER is powered on (i.e., not powered on), and FBVDD_POWER is still in a powered-off state. Therefore, the FBVDD status indicator signal is used to indicate that FBVDD_POWER is not supplying power to the GPU. If the FBVDD status indicator signal is the FBVDD_PWRGD signal, then the FBVDD_PWRGD signal is a low-level signal in the GPU power-on control process.

[0112] In the GPU power-down control process, the EC (Engineer Control Center) only begins powering down each power supply of the GPU after receiving the GPU power enable signals that indicate the power-down of multiple power supplies. At this time, the FBVDD_POWER power chip has not yet received the FBVDD enable signal indicating that FBVDD_POWER is powering down, and FBVDD_POWER is still in the powered-on state. Therefore, the FBVDD status indicator signal is used to indicate that FBVDD_POWER has supplied power to the GPU. If the FBVDD status indicator signal is the FBVDD_PWRGD signal, then the FBVDD_PWRGD signal is a high-level signal during the GPU power-down control process.

[0113] In some embodiments, the interface through which the FBVDD_POWER power chip outputs the FBVDD_PWRGD signal is connected to an input interface (e.g., a GPIO interface) of the EC. This allows the EC to obtain the FBVDD_PWRGD signal output by the FBVDD_POWER power chip at any time. In other words, the EC can obtain the FBVDD status indication signal at any time. Of course, in practice, the EC can obtain the FBVDD status indication signal in any other possible implementation.

[0114] The significance of S302's execution is as follows: In the GPU power-on control process, 1V2_POWER needs to be powered on first among the GPU's various power supplies. Therefore, after the EC receives the GPU power enable signal indicating the power-on of multiple GPU power supplies, it should first control 1V2_POWER to power on. However, in the GPU power-off control process, 1V2_POWER needs to power off after FBVDD_POWER powers off. Therefore, in the GPU power-off control process, after receiving the GPU_PWREN signal indicating the power-off of multiple GPU power supplies, the EC will not first control 1V2_POWER to power off.

[0115] Therefore, if the EC receives GPU power enable signals indicating the power-on of multiple GPU power supplies and directly controls the 1V2_POWER to power on, the actions performed by the EC after receiving the GPU_PWREN signal in the GPU power-on control process and the GPU power-off control process will differ significantly. This leads to higher complexity in the GPU power control method executed by the EC and more cumbersome programming. Therefore, to minimize the uniformity of actions performed by the EC in the GPU power-on and GPU power-off control processes and reduce the corresponding programming complexity, it is necessary to determine whether to control the 1V2_POWER to power on or off based on the FBVDD status indicator signal before controlling its power-on or power-off. Based on this, after receiving the GPU power enable signal, the EC can jointly determine whether to control the 1V2_POWER to power on or off based on the BVDD_POWER status indicator signal and the GPU power enable signal.

[0116] If the FBVDD status indicator signal is used to indicate that FBVDD_POWER has powered the GPU, or the GPU power enable signal is used to indicate that multiple GPU power supplies are powered on, it can be determined that the GPU is either in a power-on process or in a power-off process and FBVDD_POWER is not powered off. Therefore, the EC can output a 1V2 enable signal to indicate that 1V2_POWER is powered on, so that 1V2_POWER and 1V8_POWER are powered on or supply power to the GPU sequentially, i.e., executing S303. Furthermore, while executing S303, the EC can determine whether MSVDD_POWER, which should be powered on after 1V8_POWER, can be powered on, i.e., executing S305.

[0117] If the FBVDD status indicator signal indicates that FBVDD_POWER is not supplying power to the GPU, and the GPU power enable signal indicates that multiple GPU power supplies are powered down, then it can be determined that the GPU power-down process is underway and FBVDD_POWER has been powered down. Therefore, the EC can output a power-down signal for 1V2_POWER to indicate that 1V2_POWER is powered down, so that 1V2_POWER and 1V8_POWER are powered down or stop supplying power to the GPU in sequence, i.e., S304 is executed. In addition, while executing S304, since it can be determined that all power supplies of the GPU except 1V2_POWER and 1V8_POWER have been powered down, but the execution of S302 is necessarily the second execution in the GPU power-down process, in order to ensure the integrity of the entire GPU power control method and the consistency of the actions executed in the GPU power-on control process and the GPU power-down control process, the EC can determine whether MSVDD_POWER, which is the first power-down in the power-down sequence, can be powered down. To ensure consistency in the actions performed during the GPU power-on and power-off control processes, and since MSVDD_POWER only has two states—power-off and power-on—the operation of determining whether MSVDD_POWER, which is the first to power off in the power-off sequence, is powered off can be the same operation as the operation of determining whether MSVDD_POWER, which is powered on after 1V8_POWER in the power-on sequence, is powered on. That is, S305 is executed simultaneously with S304.

[0118] In some embodiments, if the FBVDD status indicator signal is the FBVDD_PWRGD signal and the GPU power enable signal is the GPU_PWREN signal, then refer to Figure 4 As shown, when the EC obtains the GPU_PWREN signal, the specific implementation of S302 can be as follows: the EC uses OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal. Specifically, the EC using OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal can mean that the EC uses the FBVDD_PWRGD signal and the GPU_PWREN signal as inputs to the OR gate logic, determines the output result of the OR gate logic, and this output result is the first result.

[0119] Then, based on the first result, the EC can output an enable signal for 1V2_POWER, i.e., a 1V2 enable signal. This 1V2 enable signal can be a 1V2_POWER_EN signal.

[0120] When the first result is high (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output a 1V2 enable signal to indicate that the 1V2_POWER is powered on, thus powering on the 1V2_POWER. When the first result is low (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC can output a 1V2 enable signal to indicate that the 1V2_POWER is powered off, thus powering off the 1V2_POWER.

[0121] The S303 and EC outputs are used to indicate the 1V2 enable signal for powering on the 1V2_POWER.

[0122] In some embodiments, the 1V2 enable signal used to indicate that 1V2_POWER is powered on can be a high-level 1V2_POWER_EN signal.

[0123] In this embodiment, the EC can specifically output a 1V2 enable signal to the 1V2_POWER power chip to indicate that the 1V2_POWER is powered on. When the 1V2_POWER is powered on, the 1V2_POWER power chip also outputs a 1V8 enable signal to the 1V8_POWER power chip to indicate that the 1V8_POWER is powered on, thus enabling the 1V8_POWER to power on or supply power to the GPU. In this way, after the EC outputs the 1V2 enable signal to indicate that the 1V2_POWER is powered on, the 1V2_POWER and 1V8_POWER can be powered on sequentially.

[0124] In some embodiments, the 1V8 enable signal used to indicate that 1V8_POWER is powered on can be a 1V2_POWER status indication signal used to indicate that 1V2_POWER is powering the GPU. Specifically, the 1V2_POWER status indication signal can be a high-level 1V2_PWRGD signal, where 1V2_PWRGD is the level signal output by the power supply chip of 1V2_POWER.

[0125] For the 1V2_POWER power supply chip, when it receives a 1V2 enable signal (i.e., the power-on signal, specifically a high-level 1V2_POWER_EN signal) indicating that the 1V2_POWER is powered on, the 1V2_POWER power supply chip can output 1V2 to supply power to the GPU, i.e., the 1V2_POWER is powered on. Simultaneously, the 1V2_POWER power supply chip can output a high-level 1V2_PWRGD signal. The high-level 1V2_PWRGD signal is specifically used to indicate that the 1V2_POWER is supplying power to the GPU, and also to indicate that the 1V8_POWER is powered on. That is, the 1V8 enable signal at this time is used to indicate that the 1V8_POWER is powered on, or to indicate that the 1V8_POWER is supplying power to the GPU.

[0126] In some embodiments, one output interface of the EC is connected to the interface of the 1V2_POWER power chip that inputs the enable signal, and the interface of the 1V2_POWER power chip that outputs the FBVDD_PWRGD signal is connected to the interface of the 1V8_POWER power chip that inputs the enable signal. This allows the EC to output a 1V2 enable signal to the 1V2_POWER power chip in real time, and the 1V2_POWER power chip to output a 1V2_PWRGD signal to the 1V8_POWER power chip at any time. Of course, in practice, the EC outputting the 1V2 enable signal and the 1V2_POWER power chip outputting the 1V2_PWRGD signal can be implemented in any other possible way.

[0127] In some embodiments, if the 1V2 enable signal used to indicate the power-on of 1V2_POWER is a high level 1V2_POWER_EN, and the 1V8 enable signal used to indicate the power-on of 1V8_POWER is a high level 1V2_PWRGD signal, then the specific implementation of S303 can be: EC outputs a high level 1V2_POWER_EN to power on 1V2_POWER, and the power supply chip of 1V2_POWER outputs a high level 1V2_PWRGD signal to power on 1V8_POWER. In some embodiments, since the power supply chip of 1V2_POWER outputs a low level 1V2_PWRGD signal when 1V2_POWER is not powered on (or powered off), the process of 1V2_POWER powering on and causing the power supply chip of 1V2_POWER to output a high level 1V2_PWRGD signal can be called pulling up the 1V2_PWRGD signal.

[0128] The S304 and EC outputs a 1V2 enable signal to indicate that 1V2_POWER is powered down, thus powering down 1V2_POWER.

[0129] In some embodiments, the 1V2 enable signal used to indicate that 1V2_POWER is powered down can be a low-level 1V2_POWER_EN signal.

[0130] In this embodiment, the EC can specifically output a 1V2 enable signal to the 1V2_POWER power chip to indicate that the 1V2_POWER is powered down. When the 1V2_POWER is powered down, the 1V2_POWER power chip will also output a 1V8 enable signal to the 1V8_POWER power chip to indicate that the 1V8_POWER is powered down, thus powering down the 1V8_POWER or stopping power supply to the GPU. In this way, after the EC outputs the 1V2 enable signal to indicate that the 1V2_POWER is powered down, the 1V2_POWER and 1V8_POWER can be powered down sequentially.

[0131] In some embodiments, the 1V8 enable signal used to indicate that 1V8_POWER is powered down can be a 1V2_POWER status indication signal used to indicate that 1V2_POWER is not powering the GPU. Specifically, the 1V2_POWER status indication signal used to indicate that 1V2_POWER is not powering the GPU can be a low-level 1V2_PWRGD signal.

[0132] For the 1V2_POWER power supply chip, when it receives the 1V2 enable signal (i.e., a low-level 1V2_POWER_EN) indicating that the 1V2_POWER is powered down, the 1V2_POWER power supply chip can stop outputting 1V2 power to the GPU, i.e., the 1V2_POWER is powered down. Simultaneously, the 1V2_POWER power supply chip can output a low-level 1V2_PWRGD signal. The low-level 1V2_PWRGD signal is specifically used to indicate that the 1V2_POWER is not supplying power to the GPU, and also to indicate that the 1V8_POWER is powered down. That is, the 1V8 enable signal at this time is used to indicate that the 1V8_POWER is powered down, or to indicate that the 1V8_POWER has stopped supplying power to the GPU.

[0133] In some embodiments, if the 1V2 enable signal used to indicate the power-down of 1V2_POWER is a low level 1V2_POWER_EN, and the 1V8 enable signal used to indicate the power-down of 1V8_POWER is a low level 1V2_PWRGD signal, then the specific implementation of S304 can be: EC outputs a low level 1V2_POWER_EN to power down 1V2_POWER, and the power supply chip of 1V2_POWER outputs a low level 1V2_PWRGD signal to power down 1V8_POWER. In some embodiments, since the power supply chip of 1V2_POWER outputs a high level 1V2_PWRGD signal when 1V2_POWER is not powered down (or powered on), the process of powering down 1V2_POWER causing the power supply chip of 1V2_POWER to output a low level 1V2_PWRGD signal can be referred to as pulling the 1V2_PWRGD signal low.

[0134] It should be noted that during a single execution of the GPU power control method, S303 and S304 will only be executed once, and will not be executed simultaneously. Which one is executed depends on the actual situation.

[0135] The S305 and EC indicators indicate that the GPU temperature is normal, the MSVDD sleep enable signal indicates that MSVDD_POWER does not enter sleep mode, the 1V2 enable signal indicates that 1V2_POWER is powered on, and the GPU power enable signal indicates that multiple power supplies of the GPU are powered on.

[0136] The over-temperature indicator signal is used to indicate that the GPU temperature is normal, or to indicate that the GPU temperature exceeds a preset temperature. The MSVDD sleep enable signal is used to indicate that MSVDD_POWER enters sleep mode, or to indicate that MSVDD_POWER does not enter sleep mode. In this embodiment, normal GPU temperature means that the GPU temperature does not exceed (or is less than or equal to) a preset temperature.

[0137] In some embodiments, the over-temperature indication signal can be an OVERT_N signal output by the GPU or a temperature sensor in the GPU, and the OVERT_N signal can be a level signal. When the GPU or a temperature sensor in the GPU detects that the GPU temperature does not exceed a preset temperature, the GPU or a temperature sensor in the GPU can output an over-temperature indication signal indicating that the GPU temperature is normal, and the over-temperature indication signal indicating that the GPU temperature is normal can be a high-level OVERT_N signal; when the GPU or a temperature sensor in the GPU detects that the GPU temperature exceeds a preset temperature, the GPU or a temperature sensor in the GPU can output an over-temperature indication signal indicating that the GPU temperature exceeds a preset temperature, and the over-temperature indication signal indicating that the GPU temperature exceeds a preset temperature can be a low-level OVERT_N signal.

[0138] When the over-temperature indicator signal indicates that the GPU temperature exceeds a preset temperature, if the GPU still needs to operate, all power supplies except for the essential 1V2_POWER, 1V8_POWER, and FBVDD_POWER, and the PEXVDD_POWER which has minimal impact on GPU temperature, must be powered down to reduce GPU temperature and avoid safety risks. When the over-temperature indicator signal indicates that the GPU temperature is normal, it does not affect the power-on / off process of the GPU's multiple power supplies. Therefore, in the GPU power-on control process, the decision on whether MSVDD_POWER can be powered on must be made in conjunction with the over-temperature indicator signal.

[0139] In some embodiments, the MSVDD sleep enable signal can be the MSVDD_GC6_EN signal output by the GPU, which can be a level signal.

[0140] When the GPU meets the sleep conditions, it will enter a sleep state or a low-power state. The sleep conditions may include any one or more of the following: the resource requirements of the rendering / computing tasks that need to be processed by the GPU are less than a preset threshold, the temperature sensor on the GPU detects an overheating risk, or the operating system instructs the GPU to enter a sleep state, etc.

[0141] Based on this, when the GPU meets the hibernation conditions and enters hibernation mode, it will output hibernation enable signals for MSVDD_POWER, NVVDD_POWER, and FBVDD_POWER to indicate that the corresponding power supply has entered hibernation mode. Specifically, the MSVDD hibernation enable signal indicating MSVDD_POWER to enter hibernation mode can be a low-level MSVDD_GC6_EN signal; the NVVDD hibernation enable signal indicating NVVDD_POWER to enter hibernation mode can be a low-level NVVDD_GC6_EN signal; and the FBVDD hibernation enable signal indicating FBVDD_POWER to enter hibernation mode can be a high-level FBVDD_GC6_EN signal.

[0142] When the GPU does not meet the hibernation conditions, it will output hibernation enable signals for MSVDD_POWER, NVVDD_POWER, and FBVDD_POWER to indicate that the corresponding power supply should not enter hibernation. Specifically, the MSVDD hibernation enable signal indicating that MSVDD_POWER should not enter hibernation can be a high-level MSVDD_GC6_EN signal; the NVVDD hibernation enable signal indicating that NVVDD_POWER should not enter hibernation can be a high-level NVVDD_GC6_EN signal; and the FBVDD hibernation enable signal indicating that FBVDD_POWER should not enter hibernation can be a low-level FBVDD_GC6_EN signal.

[0143] It should be noted that in practice, when a GPU needs to be powered down, it is usually not in a sleep state. That is to say, in the GPU power-down control process, the GPU will only output sleep enable signals to MSVDD_POWER, NVVDD_POWER, and FBVDD_POWER to indicate that the corresponding power supply will not enter a sleep state, and will not output sleep enable signals to MSVDD_POWER, NVVDD_POWER, and FBVDD_POWER to indicate that the corresponding power supply will enter a sleep state.

[0144] When MSVDD_POWER enters sleep mode, it needs to be powered down. When MSVDD_POWER is not in sleep mode, it can be powered on (during the GPU power-on process) or powered off (during the GPU power-off process). The same applies to NVVDD_POWER. When FBVDD_POWER enters sleep mode, to ensure the GPU can be woken up from sleep mode promptly and function normally, FBVDD_POWER, which supplies power to critical GPU components, remains powered on (it may slightly reduce its voltage). When FBVDD_POWER is not in sleep mode, it can be powered on (during the GPU power-on process) or powered off (during the GPU power-off process).

[0145] Therefore, in the GPU power-on control process, it is also necessary to determine whether MSVDD_POWER is powered on by combining the MSVDD sleep enable signal. Furthermore, because it is necessary to ensure that the power-on sequence of MSVDD_POWER is after 1V8_POWER, and 1V8_POWER is quickly associated with and starts up after 1V2_POWER powers on, it is also necessary to determine whether MSVDD_POWER is powered on by combining the 1V2 enable signal. To ensure the accuracy of the determination result, it is also possible to determine whether MSVDD_POWER is powered on by combining the GPU power enable signal.

[0146] Furthermore, in the GPU power-down control process, since MSVDD_POWER is the first power-down power supply in the GPU's power-down sequence, it's sufficient to determine whether MSVDD_POWER is powered down simply by considering the GPU power enable signal. Further, to ensure consistency of the EC operation in the GPU power-on and power-down control processes, the MSVDD sleep enable signal, over-temperature indicator signal, and 1V2 enable signal can also be used simultaneously to determine whether MSVDD_POWER is powered down in the GPU power-down control process. However, it's crucial that the MSVDD sleep enable signal, over-temperature indicator signal, and 1V2 enable signal do not affect the determination of whether MSVDD_POWER is powered down based on the GPU power enable signal.

[0147] If the over-temperature indicator signal indicates that the GPU temperature is normal, the MSVDD sleep enable signal indicates that MSVDD_POWER is not entering sleep mode, the 1V2 enable signal indicates that 1V2_POWER is powered on, and the GPU power enable signal is used to indicate the power-on of multiple GPU power supplies, then it can be determined that the GPU power-on process is underway and 1V2_POWER is powered on. Therefore, at this time, the EC can output the MSVDD enable signal to indicate that MSVDD_POWER is powered on, so that MSVDD_POWER is powered on or supplies power to the GPU, i.e., execute S306.

[0148] If the over-temperature indicator signal indicates that the GPU temperature exceeds a preset temperature, or the MSVDD sleep enable signal indicates that MSVDD_POWER enters sleep mode, or the 1V2 enable signal indicates that 1V2_POWER is powered down, or the GPU power enable signal is used to indicate that multiple GPU power supplies are powered down, it can be determined that MSVDD_POWER needs to be powered down to enter sleep mode, or MSVDD_POWER needs to be powered down to reduce GPU temperature, or is in the process of GPU power-down. Therefore, at this time, EC can output the MSVDD enable signal to indicate that MSVDD_POWER is powered down, so that MSVDD_POWER is powered down or stops supplying power to the GPU, i.e., S307 is executed.

[0149] In some embodiments, the interfaces of the GPU outputting the sleep enable signals corresponding to the three power supplies MSVDD_POWER, NVVDD_POWER, and FBVDD_POWER are connected to the EC, so that the EC can obtain the sleep enable signals corresponding to these three power supplies in real time. The interface of the GPU or the temperature sensor in the GPU outputting the over-temperature indication signal is connected to the EC, so that the EC can obtain the over-temperature indication signal in real time. Of course, in practice, the EC can obtain the sleep enable signals and over-temperature indication signals corresponding to these three power supplies in any other possible implementation.

[0150] In some embodiments, if the over-temperature indication signal is the OVERT_N signal, the MSVDD sleep enable signal is the MSVDD_GC6_EN signal, the 1V2 enable signal is the 1V2_POWER_EN signal, and the GPU power enable signal is the GPU_PWREN signal, then refer to Figure 4 As shown, the specific implementation of S305 can be as follows: The EC uses AND gate logic to determine the second result of the OVERT_N signal, MSVDD_GC6_EN signal, 1V2_POWER_EN signal, and GPU_PWREN signal. Specifically, the EC using AND gate logic to determine the second result of the OVERT_N signal, MSVDD_GC6_EN signal, 1V2_POWER_EN signal, and GPU_PWREN signal can mean that the EC uses the OVERT_N signal, MSVDD_GC6_EN signal, 1V2_POWER_EN signal, and GPU_PWREN signal as inputs to the AND gate logic, determines the output result of the AND gate logic, and this output result is the second result.

[0151] Then, EC can output the MSVDD_POWER enable signal based on the second result, which is the MSVDD enable signal. Specifically, the MSVDD enable signal can be the MSVDD_POWER_EN signal.

[0152] When the second result is high (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output an MSVDD enable signal to indicate that MSVDD_POWER is powered on, thereby powering on MSVDD_POWER. When the second result is low (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC can output an MSVDD enable signal to indicate that MSVDD_POWER is powered off, thereby powering off MSVDD_POWER.

[0153] S306, EC outputs an MSVDD enable signal to indicate that MSVDD_POWER is powered on, so that MSVDD_POWER is powered on.

[0154] In some embodiments, the MSVDD enable signal used to indicate that MSVDD_POWER is powered on can be a high-level MSVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output an MSVDD enable signal to the power supply chip of MSVDD_POWER to indicate that MSVDD_POWER is powered on.

[0155] In some embodiments, one output interface of the EC is connected to the interface of the MSVDD_POWER power chip input enable signal. This allows the EC to output the MSVDD enable signal to the MSVDD_POWER power chip in real time. Of course, in practice, the EC can output the MSVDD enable signal in any other possible implementation.

[0156] After S306 is executed, EC can further determine whether NVVDD_POWER and PEXVDD_POWER are powered on, i.e., execute S308 and S309. In the power-on sequence of the GPU's multiple power supplies, NVVDD_POWER and PEXVDD_POWER must be powered on after MSVDD_POWER. S308 specifically determines whether NVVDD_POWER is powered on, and S309 specifically determines whether PEXVDD_POWER is powered on.

[0157] In some embodiments, if the MSVDD enable signal used to indicate that MSVDD_POWER is powered on is a high level MSVDD_POWER_EN, then the specific implementation of S306 can be: EC outputs a high level MSVDD_POWER_EN to power on MSVDD_POWER.

[0158] S307 and EC output an MSVDD enable signal to indicate that MSVDD_POWER is powered down, so that MSVDD_POWER is powered down.

[0159] In some embodiments, the MSVDD enable signal used to indicate that MSVDD_POWER is powered down can be a low-level MSVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output an MSVDD enable signal to the power supply chip of MSVDD_POWER to indicate that MSVDD_POWER is powered down.

[0160] After S307 is executed, EC can further determine whether NVVDD_POWER and PEXVDD_POWER are powered down. In the power-down sequence of multiple GPU power supplies, NVVDD_POWER and PEXVDD_POWER need to be powered down simultaneously with MSVDD_POWER. To ensure consistency in the GPU power-on and power-off control flows, and since NVVDD_POWER and PEXVDD_POWER only have two states (power-on and power-off), the operation to determine whether NVVDD_POWER and PEXVDD_POWER are powered down is the same as the operation to determine whether they are powered on. That is, S308 and S309 are executed after S307. S308 specifically determines whether NVVDD_POWER is powered down, and S309 specifically determines whether PEXVDD_POWER is powered down.

[0161] In some embodiments, if the MSVDD enable signal used to indicate that MSVDD_POWER is powered down is a low level MSVDD_POWER_EN, then the specific implementation of S307 can be: EC outputs a low level MSVDD_POWER_EN to power down MSVDD_POWER.

[0162] It should be noted that during a single execution of the GPU power control method, S306 and S307 will only be executed once, and will not be executed simultaneously. Which one is executed depends on the actual situation.

[0163] The S308 and EC indicators indicate that the GPU temperature is normal, the MSVDD enable signal indicates that the MSVDD_POWER is powered on, the MSVDD status indicator indicates that the MSVDD_POWER is supplying power to the GPU, the NVVDD sleep enable signal indicates that the NVVDD_POWER is not entering sleep mode, and the GPU power enable signal indicates that multiple power supplies of the GPU are powered on.

[0164] The MSVDD status indicator signal is used to indicate whether MSVDD_POWER is supplying power to the GPU or not.

[0165] In the GPU power-on control process, NVVDD_POWER needs to be powered on immediately after MSVDD_POWER. To ensure the correct power-on sequence for NVVDD_POWER, it's necessary to use the MSVDD status indicator signal, which reflects whether MSVDD_POWER has supplied power to the GPU, to determine if NVVDD_POWER is powered on. Furthermore, for more accurate results, the MSVDD enable signal can also be used to determine if NVVDD_POWER is powered on.

[0166] In the GPU power-down control process, since NVVDD_POWER is the power supply that powers down first, along with MSVDD_POWER, in the GPU power-down sequence, it's possible to determine whether NVVDD_POWER is powered down simply by considering the GPU power enable signal. Furthermore, to ensure consistency of the EC operation in the GPU power-on and power-down control processes, the MSVDD enable signal and MSVDD status indicator signal can also be used to determine whether NVVDD_POWER is powered down in the GPU power-down control process.

[0167] In some embodiments, the MSVDD status indication signal can be the MSVDD_PWRGD signal. MSVDD_PWRGD is the level signal output by the power supply chip of MSVDD_POWER.

[0168] For the MSVDD_POWER power supply chip, when it receives the MSVDD enable signal (i.e., a high-level MSVDD_POWER_EN) indicating that the MSVDD_POWER is powered on, the MSVDD_POWER power supply chip can output MSVDD for the GPU to use, that is, the MSVDD_POWER is powered on. Simultaneously, the MSVDD_POWER power supply chip can output a high-level MSVDD_PWRGD signal. The high-level MSVDD_PWRGD signal specifically indicates that the MSVDD_POWER has supplied power to the GPU. In other words, at this time, the MSVDD status indicator signal is used to indicate that the MSVDD_POWER has supplied power to the GPU.

[0169] In some embodiments, since the MSVDD_POWER power chip outputs a low-level MSVDD_POWER signal when MSVDD_POWER is not powered on (or powered off), the process of the MSVDD_POWER power chip outputting a high-level MSVDD_PWRGD signal when MSVDD_POWER is powered on can be referred to as pulling the MSVDD_PWRGD signal high. For example, when the EC outputs a high-level MSVDD_POWER_EN, the MSVDD_PWRGD signal will be pulled high.

[0170] When the MSVDD_POWER power chip receives the MSVDD enable signal (i.e., a low-level MSVDD_POWER_EN) indicating that the MSVDD_POWER is powered down, the MSVDD_POWER power chip stops outputting MSVDD power to the GPU, meaning the MSVDD_POWER is powered down. Simultaneously, the MSVDD_POWER power chip can output a low-level MSVDD_PWRGD signal. The low-level MSVDD_PWRGD signal specifically indicates that the MSVDD_POWER is not supplying power to the GPU. In other words, at this time, the MSVDD status indicator signal is used to indicate that the MSVDD_POWER is not supplying power to the GPU.

[0171] In some embodiments, since the power supply chip of MSVDD_POWER outputs a high-level MSVDD_PWRGD signal when MSVDD_POWER is not powered down (or powered on), the process of MSVDD_POWER powering down and causing the power supply chip of MSVDD_POWER to output a low-level MSVDD_PWRGD signal can be referred to as pulling the MSVDD_PWRGD signal low. For example, when EC outputs a low-level MSVDD_POWER_EN, the MSVDD_PWRGD signal will be pulled low.

[0172] Based on the above description, in the GPU power-on control process, when S309 is executed, MSVDD_POWER is in a powered-on state. Therefore, the MSVDD status indicator signal is used to indicate that MSVDD_POWER has supplied power to the GPU. If the MSVDD status indicator signal is the MSVDD_PWRGD signal, then in the GPU power-on control process, when S309 is executed, the MSVDD_PWRGD signal is a high-level signal.

[0173] In the GPU power-down control process, when S309 is executed, MSVDD_POWER is in a power-down state, so the MSVDD status indicator signal is used to indicate that MSVDD_POWER is not supplying power to the GPU. If the MSVDD status indicator signal is the MSVDD_PWRGD signal, then in the GPU power-on control process, when S309 is executed, the MSVDD_PWRGD signal is a low-level signal.

[0174] The reason for determining whether NVVDD_POWER is powered on based on the over-temperature indication signal can be found in the relevant description of S305 in the aforementioned embodiment, and will not be repeated here.

[0175] In some embodiments, the NVVDD sleep enable signal can be the NVVDD_GC6_EN signal output by the GPU, which can be a level signal. The relevant concepts of the NVVDD sleep enable signal can be found in the description following S305 in the foregoing embodiments.

[0176] Since NVVDD_POWER needs to be powered down when it is instructed to enter sleep mode, and can be powered on or off when it is not in sleep mode, the GPU power-on control process also needs to consider the NVVDD sleep enable signal to determine whether NVVDD_POWER is powered on. To ensure the accuracy of the determination, the GPU power enable signal can also be used to determine whether MSVDD_POWER is powered on.

[0177] Furthermore, in the GPU power-down control process, since NVVDD_POWER and MSVDD_POWER are the first power-down power supplies in the GPU's power-down sequence, it's sufficient to determine whether NVVDD_POWER is powered down simply by combining the GPU power enable signal. Further, to ensure consistency of the EC operation in the GPU power-on and power-down control processes, the NVVDD sleep enable signal, over-temperature indicator signal, MSVDD enable signal, and MSVDD status indicator signal can also be used simultaneously to determine whether MSVDD_POWER is powered down in the GPU power-down control process. However, the NVVDD sleep enable signal, over-temperature indicator signal, MSVDD enable signal, and MSVDD status indicator signal must not affect the GPU power enable signal's determination of whether MSVDD_POWER is powered down.

[0178] In some embodiments, the interface through which the MSVDD_POWER power chip outputs the MSVDD_PWRGD signal is connected to an input interface (e.g., a GPIO interface) of the EC. This allows the EC to obtain the MSVDD_PWRGD signal output by the MSVDD_POWER power chip at any time. In other words, the EC can obtain the MSVDD status indication signal at any time. Of course, in practice, the EC can obtain the MSVDD status indication signal in any other possible implementation.

[0179] If the over-temperature indicator signal indicates that the GPU temperature is normal, the MSVDD enable signal indicates that MSVDD_POWER is powered on, the MSVDD status indicator signal indicates that MSVDD_POWER is supplying power to the GPU, the NVVDD sleep enable signal indicates that NVVDD_POWER is not entering sleep mode, and the GPU power enable signal indicates that multiple GPU power supplies are powered on, then it can be determined that the GPU power-on process is underway and MSVDD_POWER is powered on. Therefore, at this time, EC can output the NVVDD enable signal to indicate that NVVDD_POWER is powered on, so that NVVDD_POWER is powered on or supplies power to the GPU, i.e., S310 is executed.

[0180] If the over-temperature indicator signal indicates that the GPU temperature exceeds a preset temperature, or the MSVDD enable signal is used to indicate that the MSVDD_POWER is powered down, or the MSVDD status indicator signal is used to indicate that the MSVDD_POWER is not supplying power to the GPU, or the NVVDD sleep enable signal indicates that the NVVDD_POWER is entering sleep mode, or the GPU power enable signal is used to indicate that multiple GPU power supplies are powered down, it can be determined that the NVVDD_POWER needs to be powered down to enter sleep mode, or the NVVDD_POWER needs to be powered down to reduce the GPU temperature, or it is in the process of powering down the GPU. Therefore, the EC can output an NVVDD enable signal to indicate that the NVVDD_POWER is powered down, so that the NVVDD_POWER is powered down or stops supplying power to the GPU, i.e., execute S311.

[0181] In some embodiments, if the over-temperature indicator signal is OVERT_N, the NVVDD sleep enable signal is NVVDD_GC6_EN, the MSVDD enable signal is MSVDD_POWER_EN, the MSVDD status indicator signal is MSVDD_PWRGD, and the GPU power enable signal is GPU_PWREN, then refer to... Figure 4As shown, the specific implementation of S308 can be as follows: The EC uses AND gate logic to determine the third result of the OVERT_N signal, NVVDD_GC6_EN signal, MSVDD_POWER_EN signal, MSVDD_PWRGD signal, and GPU_PWREN signal. Specifically, the EC using AND gate logic to determine the third result of the OVERT_N signal, NVVDD_GC6_EN signal, MSVDD_POWER_EN signal, MSVDD_PWRGD signal, and GPU_PWREN signal can mean that the EC uses these signals as inputs to the AND gate logic and determines the output result, which is the third result.

[0182] Then, the EC can output the NVVDD_POWER enable signal based on the third result, which is the NVVDD enable signal. Specifically, the NVVDD enable signal can be the NVVDD_POWER_EN signal.

[0183] When the third result is high (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output an NVVDD enable signal to indicate that NVVDD_POWER is powered on, thus powering on NVVDD_POWER. When the third result is low (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC can output an NVVDD enable signal to indicate that NVVDD_POWER is powered off, thus powering off NVVDD_POWER.

[0184] S309 and EC determine whether the MSVDD enable signal is used to indicate that MSVDD_POWER is powered on, and whether the MSVDD status indicator signal is used to indicate that MSVDD_POWER has supplied power to the GPU, and whether the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered on.

[0185] The concepts of MSVDD enable signal, MSVDD status indicator signal and GPU power enable signal can be referred to the relevant descriptions after S308 in the aforementioned embodiments, and will not be repeated here.

[0186] The reason for determining whether PEXVDD_POWER is powered on (or off) in S309 by combining the MSVDD enable signal, MSVDD status indicator signal, and GPU power enable signal can be found in the content after S308 in the aforementioned embodiment, which explains the reason for determining whether NVVDD_POWER is powered on (or off) by combining the MSVDD enable signal, MSVDD status indicator signal, and GPU power enable signal. It will not be repeated here.

[0187] It should be noted that since PEXVDD_POWER has a negligible impact on GPU temperature during operation, the over-temperature indicator signal does not need to be considered when determining whether PEXVDD_POWER is powered on. Furthermore, because GPU hardware design does not trigger a sleep enable signal for PEXVDD_POWER when the GPU enters sleep mode, a PEXVDD sleep enable signal does not exist.

[0188] If the MSVDD enable signal is used to indicate that MSVDD_POWER is powered on, the MSVDD status indicator signal is used to indicate that MSVDD_POWER is supplying power to the GPU, and the GPU power enable signal is used to indicate that multiple GPU power supplies are powered on, then it can be determined that the GPU power-on process is underway and MSVDD_POWER is powered on. Therefore, at this time, EC can output a PEXVDD enable signal to indicate that PEXVDD_POWER is powered on, so that PEXVDD_POWER is powered on or supplies power to the GPU, i.e., S312 is executed.

[0189] If the MSVDD enable signal is used to indicate that MSVDD_POWER is powered down, or the MSVDD status indicator signal is used to indicate that MSVDD_POWER is not supplying power to the GPU, or the GPU power enable signal is used to indicate that multiple GPU power supplies are powered down, it can be determined that the GPU power-down process is underway. Therefore, at this time, EC can output a PEXVDD enable signal to indicate that PEXVDD_POWER is powered down, so that PEXVDD_POWER is powered down or stops supplying power to the GPU, i.e., S313 is executed.

[0190] In some embodiments, if the MSVDD enable signal is the MSVDD_POWER_EN signal, the MSVDD status indicator signal is the MSVDD_PWRGD signal, and the GPU power enable signal is the GPU_PWREN signal, then refer to Figure 4 As shown, the specific implementation of S309 can be as follows: The EC uses AND gate logic to determine the fourth result of the MSVDD_POWER_EN, MSVDD_PWRGD, and GPU_PWREN signals. Specifically, the EC using AND gate logic to determine the fourth result of the MSVDD_POWER_EN, MSVDD_PWRGD, and GPU_PWREN signals can mean that the EC uses the MSVDD_POWER_EN, MSVDD_PWRGD, and GPU_PWREN signals as inputs to the AND gate logic, and determines the output result of the AND gate logic; this output result is the fourth result.

[0191] Afterwards, the EC can output the PEXVDD_POWER enable signal based on the fourth result, which is the PEXVDD enable signal. Specifically, this PEXVDD enable signal can be the PEXVDD_POWER_EN signal.

[0192] When the fourth result is high (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output a PEXVDD enable signal to indicate that PEXVDD_POWER is powered on, thus powering on PEXVDD_POWER. When the fourth result is low (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC can output a PEXVDD enable signal to indicate that PEXVDD_POWER is powered off, thus powering off PEXVDD_POWER.

[0193] S310 and EC output an NVVDD enable signal to indicate that NVVDD_POWER is powered on, so that NVVDD_POWER is powered on.

[0194] In some embodiments, the NVVDD enable signal used to indicate that the NVVDD_POWER is powered on can be a high-level NVVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output an NVVDD enable signal to the power supply chip of the NVVDD_POWER to indicate that the NVVDD_POWER is powered on.

[0195] In some embodiments, one output interface of the EC is connected to the interface of the NVVDD_POWER power chip input enable signal. This allows the EC to output an NVVDD enable signal to the NVVDD_POWER power chip in real time. Of course, in practice, the EC can output the NVVDD enable signal in any other possible manner.

[0196] After S310 is executed, EC can further determine whether FBVDD_POWER is powered on, i.e., execute S314. Among the power-on sequence of the GPU's multiple power supplies, FBVDD_POWER needs to be powered on after NVVDD_POWER and PEXVDD_POWER.

[0197] In some embodiments, if the NVVDD enable signal used to indicate that NVVDD_POWER is powered on is a high level NVVDD_POWER_EN, then the specific implementation of S310 can be: EC outputs a high level NVVDD_POWER_EN to power on NVVDD_POWER.

[0198] S311, EC outputs an NVVDD enable signal to indicate that NVVDD_POWER is powered down, so that NVVDD_POWER is powered down.

[0199] In some embodiments, the NVVDD enable signal used to indicate that NVVDD_POWER is powered down can be a low-level NVVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output an NVVDD enable signal to the power supply chip of NVVDD_POWER to indicate that NVVDD_POWER is powered down.

[0200] After S311 is executed, EC can further determine whether FBVDD_POWER is powered on. In the power-down sequence of the GPU's multiple power supplies, FBVDD_POWER needs to be powered on after NVVDD_POWER and PEXVDD_POWER. To ensure consistency in the GPU power-on and power-off control flows, and since FBVDD_POWER only has two states (power-on and power-off), the operation to determine whether FBVDD_POWER is powered on is the same as the operation to determine whether FBVDD_POWER is powered on. That is, S314 is executed after S311.

[0201] In some embodiments, if the NVVDD enable signal used to indicate that NVVDD_POWER is powered down is a low level NVVDD_POWER_EN, then the specific implementation of S311 can be: EC outputs a low level NVVDD_POWER_EN to power down NVVDD_POWER.

[0202] It should be noted that during a single execution of the GPU power control method, S310 and S311 will only be executed once, and will not be executed simultaneously. Which one is executed depends on the actual situation.

[0203] S312, EC outputs a PEXVDD enable signal to indicate that PEXVDD_POWER is powered on, so that PEXVDD_POWER is powered on.

[0204] In some embodiments, the PEXVDD enable signal used to indicate that PEXVDD_POWER is powered on can be a high-level PEXVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output a PEXVDD enable signal to the power supply chip of PEXVDD_POWER to indicate that PEXVDD_POWER is powered on.

[0205] In some embodiments, one output interface of the EC is connected to the interface of the PEXVDD_POWER power chip input enable signal. This allows the EC to output a PEXVDD enable signal to the PEXVDD_POWER power chip in real time. Of course, in practice, the EC can output the PEXVDD enable signal in any other possible implementation.

[0206] After S312 is executed, EC can further determine whether FBVDD_POWER is powered on, i.e., execute S314. Among the power-on sequence of the GPU's multiple power supplies, FBVDD_POWER needs to be powered on after NVVDD_POWER and PEXVDD_POWER.

[0207] In some embodiments, if the PEXVDD enable signal used to indicate that PEXVDD_POWER is powered on is a high level PEXVDD_POWER_EN, then the specific implementation of S312 can be: EC outputs a high level PEXVDD_POWER_EN to power on PEXVDD_POWER.

[0208] S313, EC outputs a PEXVDD enable signal to indicate that PEXVDD_POWER is powered down, so that PEXVDD_POWER is powered down.

[0209] In some embodiments, the PEXVDD enable signal used to indicate that PEXVDD_POWER is powered down can be a low-level PEXVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output a PEXVDD enable signal to the power supply chip of PEXVDD_POWER to indicate that PEXVDD_POWER is powered down.

[0210] After S313 is executed, EC can further determine whether FBVDD_POWER is powered on. In the power-down sequence of the GPU's multiple power supplies, FBVDD_POWER needs to be powered on after NVVDD_POWER and PEXVDD_POWER. To ensure consistency in the GPU power-on and power-off control flows, and since FBVDD_POWER only has two states (power-on and power-off), the operation to determine whether FBVDD_POWER is powered on is the same as the operation to determine whether FBVDD_POWER is powered on. That is, S314 is executed after S313.

[0211] In some embodiments, if the PEXVDD enable signal used to indicate that PEXVDD_POWER is powered down is a low level PEXVDD_POWER_EN, then the specific implementation of S313 can be: EC outputs a low level PEXVDD_POWER_EN to power down PEXVDD_POWER.

[0212] It should be noted that during a single execution of the GPU power control method, S312 and S313 will only be executed once, and will not be executed simultaneously. Which one is executed depends on the actual situation.

[0213] S314, EC determines whether the NVVDD status indicator signal indicates that NVVDD_POWER has powered the GPU, or the PEXVDD status indicator signal indicates that PEXVDD_POWER has powered the GPU, or the FBVDD sleep enable signal indicates that FBVDD_POWER has entered sleep state.

[0214] The NVVDD status indicator signal is used to indicate whether NVVDD_POWER is supplying power to the GPU or not. The PEXVDD status indicator signal is used to indicate whether PEXVDD_POWER is supplying power to the GPU or not.

[0215] In the GPU power-on control process, FBVDD_POWER needs to power on immediately after NVVDD_POWER and PEXVDD_POWER. To ensure the correct power-on sequence of FBVDD_POWER, it's necessary to combine the NVVDD status indicator signal (which reflects whether NVVDD_POWER has been supplying power to the GPU) and the PEXVDD status indicator signal (which reflects whether PEXVDD_POWER has been supplying power to the GPU) to determine whether NVVDD_POWER is powered on. Furthermore, since NVVDD_POWER and PEXVDD_POWER power on at different speeds, when combining both signals to determine whether FBVDD_POWER is powered on, only the status indicator signal of one of them needs to satisfy the prerequisite for FBVDD_POWER power-on.

[0216] In the GPU power-down control process, since FBVDD_POWER is the power-down power supply that follows PEXVDD_POWER and NVVDD_POWER in the GPU's power-down sequence, it is also necessary to combine the NVVDD and PEXVDD status indicator signals to determine whether NVVDD_POWER is powered down. Furthermore, since both NVVDD_POWER and PEXVDD_POWER power down very quickly, when combining these two signals to determine whether FBVDD_POWER is powered down, both status indicator signals must meet the prerequisites for FBVDD_POWER to power down before considering powering down FBVDD_POWER.

[0217] In some embodiments, the NVVDD status indication signal can be the NVVDD_PWRGD signal. NVVDD_PWRGD is the level signal output by the power supply chip of NVVDD_POWER.

[0218] For the NVVDD_POWER power supply chip, when it receives the NVVDD enable signal (i.e., a high-level NVVDD_POWER_EN) indicating that the NVVDD_POWER is powered on, the NVVDD_POWER power supply chip can output NVVDD power to the GPU, i.e., the NVVDD_POWER is powered on. Simultaneously, the NVVDD_POWER power supply chip can output a high-level NVVDD_PWRGD signal. The high-level NVVDD_PWRGD signal specifically indicates that the NVVDD_POWER is supplying power to the GPU. In other words, at this time, the NVVDD status indicator signal is used to indicate that the NVVDD_POWER is supplying power to the GPU.

[0219] In some embodiments, since the NVVDD_POWER power chip outputs a low-level NVVDD_POWER signal when the NVVDD_POWER is not powered on (or powered off), the process of the NVVDD_POWER power chip outputting a high-level NVVDD_PWRGD signal when the NVVDD_POWER is powered on can be referred to as pulling the NVVDD_PWRGD signal high. For example, when the EC outputs a high-level NVVDD_POWER_EN, the NVVDD_PWRGD signal will be pulled high.

[0220] When the NVVDD_POWER power chip receives the NVVDD enable signal (i.e., a low-level NVVDD_POWER_EN) indicating that the NVVDD_POWER is powered down, the NVVDD_POWER power chip stops outputting NVVDD power to the GPU, meaning the NVVDD_POWER is powered down. Simultaneously, the NVVDD_POWER power chip can output a low-level NVVDD_PWRGD signal. The low-level NVVDD_PWRGD signal specifically indicates that the NVVDD_POWER is not supplying power to the GPU. In other words, at this time, the NVVDD status indicator signal is used to indicate that the NVVDD_POWER is not supplying power to the GPU.

[0221] In some embodiments, since the NVVDD_POWER power chip outputs a high-level NVVDD_PWRGD signal when the NVVDD_POWER is not powered down (or powered on), the process of the NVVDD_POWER power chip outputting a low-level NVVDD_PWRGD signal when the NVVDD_POWER is powered down can be referred to as pulling the NVVDD_PWRGD signal low. For example, when the EC outputs a low-level NVVDD_POWER_EN, the NVVDD_PWRGD signal will be pulled low.

[0222] Based on the above description, in the GPU power-on control process, when S314 is executed, NVVDD_POWER is in a powered-on state. Therefore, the NVVDD status indicator signal is used to indicate that NVVDD_POWER has supplied power to the GPU. If the NVVDD status indicator signal is the NVVDD_PWRGD signal, then in the GPU power-on control process, when S314 is executed, the NVVDD_PWRGD signal is a high-level signal.

[0223] In the GPU power-down control process, when S314 is executed, the NVVDD_POWER power chip is in a power-down state, so the NVVDD status indicator signal is used to indicate that NVVDD_POWER is not supplying power to the GPU. If the NVVDD status indicator signal is the NVVDD_PWRGD signal, then in the GPU power-on control process, when S314 is executed, the NVVDD_PWRGD signal is a low-level signal.

[0224] In some embodiments, the PEXVDD status indication signal can be the PEXVDD_PWRGD signal. PEXVDD_PWRGD is the level signal output by the PEXVDD_POWER power supply chip.

[0225] For the PEXVDD_POWER power supply chip, when it receives the PEXVDD enable signal (i.e., a high-level PEXVDD_POWER_EN) indicating that the PEXVDD_POWER is powered on, the power supply chip can output PEXVDD power to the GPU, meaning the PEXVDD_POWER is powered on. Simultaneously, the power supply chip can output a high-level PEXVDD_PWRGD signal. This high-level PEXVDD_PWRGD signal specifically indicates that the PEXVDD_POWER is supplying power to the GPU. In other words, at this time, the PEXVDD status indicator signal is used to indicate that the PEXVDD_POWER is supplying power to the GPU.

[0226] In some embodiments, since the PEXVDD_POWER power chip outputs a low-level PEXVDD_POWER signal when PEXVDD_POWER is not powered on (or powered off), the process of PEXVDD_POWER powering on and causing the PEXVDD_POWER power chip to output a high-level PEXVDD_PWRGD signal can be referred to as pulling the PEXVDD_PWRGD signal high. For example, when the EC outputs a high-level PEXVDD_POWER_EN, the PEXVDD_PWRGD signal will be pulled high.

[0227] When the PEXVDD_POWER power chip receives the PEXVDD enable signal (i.e., a low-level PEXVDD_POWER_EN) indicating that the PEXVDD_POWER is powered down, the PEXVDD_POWER power chip stops outputting PEXVDD power to the GPU, meaning the PEXVDD_POWER is powered down. Simultaneously, the PEXVDD_POWER power chip can output a low-level PEXVDD_PWRGD signal. This low-level PEXVDD_PWRGD signal specifically indicates that the PEXVDD_POWER is not supplying power to the GPU. In other words, at this time, the PEXVDD status indicator signal is used to indicate that the PEXVDD_POWER is not supplying power to the GPU.

[0228] In some embodiments, since the PEXVDD_POWER power chip outputs a high-level PEXVDD_PWRGD signal when PEXVDD_POWER is not powered down (or powered on), the process of PEXVDD_POWER powering down and causing the PEXVDD_POWER power chip to output a low-level PEXVDD_PWRGD signal can be referred to as pulling the PEXVDD_PWRGD signal low. For example, when the EC outputs a low-level PEXVDD_POWER_EN, the PEXVDD_PWRGD signal will be pulled low.

[0229] Based on the above description, in the GPU power-on control process, when S314 is executed, PEXVDD_POWER is in a powered-on state. Therefore, the PEXVDD status indicator signal is used to indicate that PEXVDD_POWER has supplied power to the GPU. If the PEXVDD status indicator signal is the PEXVDD_PWRGD signal, then in the GPU power-on control process, when S314 is executed, the PEXVDD_PWRGD signal is a high-level signal.

[0230] In the GPU power-down control process, when S314 is executed, the PEXVDD_POWER power chip is in a power-down state, so the PEXVDD status indicator signal is used to indicate that PEXVDD_POWER is not supplying power to the GPU. If the PEXVDD status indicator signal is the PEXVDD_PWRGD signal, then in the GPU power-on control process, when S314 is executed, the PEXVDD_PWRGD signal is a low-level signal.

[0231] The FBVDD sleep enable signal can be the FBVDD_GC6_EN signal output by the GPU, which can be a level signal. Referring to the description of the GPU entering sleep mode after S305 in the previous embodiment, it can be seen that FBVDD_POWER does not need to be powered down when it enters sleep mode. When FBVDD_POWER is not in sleep mode, it can be powered on or off. Therefore, in the GPU power-on control process, to ensure that FBVDD_POWER is still powered on when indicated to enter sleep mode, it is necessary to determine whether FBVDD_POWER is powered on using an OR relationship with the FBVDD sleep enable signal. That is, when determining whether FBVDD_POWER is powered on by combining the NVVDD status indicator signal, PEXVDD status indicator signal, and FBVDD sleep enable signal, only one of these three signals needs to satisfy the FBVDD_POWER power-on prerequisite.

[0232] In the GPU power-down control process, when determining whether FBVDD_POWER should be powered down by combining the NVVDD status indicator signal, the PEXVDD status indicator signal, and the FBVDD sleep enable signal, the FBVDD sleep enable signal is used to indicate that FBVDD_POWER should not enter sleep mode under normal circumstances when the GPU needs to be powered down. However, to prevent potential GPU power-down failures caused by the FBVDD sleep enable signal indicating that FBVDD_POWER should enter sleep mode when the GPU needs to be powered down, it is also necessary to ensure that the FBVDD sleep enable signal meets the power-down requirements of FBVDD_POWER (i.e., the FBVDD sleep enable signal indicates that FBVDD_POWER should not enter sleep mode).

[0233] If the NVVDD status indicator signal indicates that NVVDD_POWER is powering the GPU, or the PEXVDD status indicator signal indicates that PEXVDD_POWER is powering the GPU, or the FBVDD sleep enable signal indicates that FBVDD_POWER is entering sleep mode, it can be determined that the GPU is currently in the power-on process and either PEXVDD_POWER or NVVDD_POWER is powered on, or the GPU is currently in the power-on process and FBVDD_POWER is about to enter sleep mode. Therefore, the EC can output an FBVDD enable signal to indicate that FBVDD_POWER is powered on, thus enabling FBVDD_POWER to power on or supply power to the GPU, i.e., executing S315.

[0234] If the NVVDD status indicator signal indicates that NVVDD_POWER is not supplying power to the GPU, and the PEXVDD status indicator signal indicates that PEXVDD_POWER is not supplying power to the GPU, and the FBVDD sleep enable signal indicates that FBVDD_POWER is not entering sleep mode, then it can be determined that the GPU is currently in the power-down process and that both PEXVDD_POWER and NVVDD_POWER have been powered down. Therefore, at this time, EC can output an FBVDD enable signal to indicate that FBVDD_POWER is powered down, so that FBVDD_POWER is powered down or stops supplying power to the GPU, i.e., S316 is executed.

[0235] In some embodiments, if the FBVDD sleep enable signal is the FBVDD_GC6_EN signal, the NVVDD status indicator signal is the NVVDD_PWRGD signal, and the PEXVDD status indicator signal is the PEXVDD_PWRGD signal, then refer to Figure 4As shown, the specific implementation of S314 can be as follows: The EC uses OR gate logic to determine the fifth result of the FBVDD_GC6_EN, NVVDD_PWRGD, and PEXVDD_PWRGD signals. Specifically, the EC using OR gate logic to determine the fifth result of the FBVDD_GC6_EN, NVVDD_PWRGD, and PEXVDD_PWRGD signals can mean that the EC uses these signals as inputs to the OR gate logic and determines the output result, which is the fifth result.

[0236] Afterwards, the EC can output the FBVDD_POWER enable signal based on the fifth result, which is the FBVDD enable signal. Specifically, this FBVDD enable signal can be the FBVDD_POWER_EN signal.

[0237] When the fifth result is high (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output an FBVDD enable signal to indicate that FBVDD_POWER is powered on, thus powering on FBVDD_POWER. When the fifth result is low (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC can output an FBVDD enable signal to indicate that FBVDD_POWER is powered off, thus powering off FBVDD_POWER.

[0238] S315, EC outputs an FBVDD enable signal to power on FBVDD_POWER.

[0239] In some embodiments, the FBVDD enable signal used to indicate that the FBVDD_POWER is powered on can be a high-level FBVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output an FBVDD enable signal to the power supply chip of the FBVDD_POWER to indicate that the FBVDD_POWER is powered on.

[0240] In some embodiments, one output interface of the EC is connected to the interface of the FBVDD_POWER power chip input enable signal. This allows the EC to output an FBVDD enable signal to the FBVDD_POWER power chip in real time. Of course, in practice, the EC can output the FBVDD enable signal in any other possible implementation.

[0241] After S315 is executed, EC can further determine whether all power supplies of the GPU have been powered on, i.e., execute S317.

[0242] In some embodiments, if the FBVDD enable signal used to indicate that FBVDD_POWER is powered on is a high level FBVDD_POWER_EN, then the specific implementation of S315 can be: EC outputs a high level FBVDD_POWER_EN to power on FBVDD_POWER.

[0243] S316, EC outputs an FBVDD enable signal to power down FBVDD_POWER.

[0244] In some embodiments, the FBVDD enable signal used to indicate that the FBVDD_POWER is powered down can be a low-level FBVDD_POWER_EN signal. Specifically, in this embodiment, the EC can output an FBVDD enable signal to the power supply chip of the FBVDD_POWER to indicate that the FBVDD_POWER is powered down.

[0245] After S316 is executed, EC can further determine whether all power supplies of the GPU have been powered down, i.e., execute S318.

[0246] In some embodiments, if the FBVDD enable signal used to indicate that FBVDD_POWER is powered down is a low level FBVDD_POWER_EN, then the specific implementation of S316 can be: EC outputs a low level FBVDD_POWER_EN to power down FBVDD_POWER.

[0247] It should be noted that during a single execution of the GPU power control method, S315 and S316 will only be executed once, and will not be executed simultaneously. Which one is executed depends on the actual situation.

[0248] S317, EC determines whether the MSVDD status indicator signal indicates that MSVDD_POWER has supplied power to the GPU, and the PEXVDD status indicator signal indicates that PEXVDD_POWER has supplied power to the GPU, and the NVVDD status indicator signal indicates that NVVDD_POWER has supplied power to the GPU, and the FBVDD status indicator signal indicates that FBVDD_POWER has supplied power to the GPU.

[0249] The FBVDD status indicator signal is used to indicate whether FBVDD_POWER is supplying power to the GPU or not.

[0250] In some embodiments, since the FBVDD_POWER power chip outputs a low-level FBVDD_POWER signal when the FBVDD_POWER is not powered on (or powered off), the process of the FBVDD_POWER power chip outputting a high-level FBVDD_PWRGD signal when the FBVDD_POWER is powered on can be referred to as pulling the FBVDD_PWRGD signal high. For example, when the EC outputs a high-level FBVDD_POWER_EN, the FBVDD_PWRGD signal will be pulled high.

[0251] In some embodiments, since the FBVDD_POWER power chip outputs a high-level FBVDD_PWRGD signal when the FBVDD_POWER is not powered down (or powered on), the process of the FBVDD_POWER power chip outputting a low-level FBVDD_PWRGD signal when the FBVDD_POWER is powered down can be referred to as pulling the FBVDD_PWRGD signal low. For example, when the EC outputs a low-level FBVDD_POWER_EN, the FBVDD_PWRGD signal will be pulled low.

[0252] If the MSVDD status indicator signal indicates that MSVDD_POWER is supplying power to the GPU, the PEXVDD status indicator signal indicates that PEXVDD_POWER is supplying power to the GPU, the NVVDD status indicator signal indicates that NVVDD_POWER is supplying power to the GPU, and the FBVDD status indicator signal indicates that FBVDD_POWER is supplying power to the GPU, then it can be determined that all power supplies to the GPU are powered on. At this point, the EC can output GPU power status indicator signals to indicate that all GPU power supplies are powered on, i.e., execute S319. In this way, all other devices in the electronic device that need to know whether all GPU power supplies are powered on (such as the CPU) can know in a timely manner that all GPU power supplies are powered on, and the electronic device can then use the GPU normally.

[0253] If the MSVDD status indicator signal is used to indicate that MSVDD_POWER is not supplying power to the GPU, or the PEXVDD status indicator signal is used to indicate that PEXVDD_POWER is not supplying power to the GPU, or the NVVDD status indicator signal is used to indicate that NVVDD_POWER is not supplying power to the GPU, or the FBVDD status indicator signal is used to indicate that FBVDD_POWER is not supplying power to the GPU, it can be determined that all power supplies of the GPU have not been fully powered on. At this time, the power-on process of each power supply of the GPU can be executed in a loop, that is, the GPU power control method is restarted from S301 or S302 (the figure takes restarting from 301 as an example).

[0254] In some embodiments, if the MSVDD status indicator signal is MSVDD_PWRGD, the NVVDD status indicator signal is NVVDD_PWRGD, the PEXVDD status indicator signal is PEXVDD_PWRGD, and the FBVDD status indicator signal is FBVDD_PWRGD, then refer to Figure 4 As shown, the specific implementation of S317 can be as follows: The EC uses AND gate logic to determine the sixth result of the MSVDD_PWRGD, NVVDD_PWRGD, PEXVDD_PWRGD, and FBVDD_PWRGD signals. Specifically, the EC using AND gate logic to determine the sixth result of the MSVDD_PWRGD, NVVDD_PWRGD, PEXVDD_PWRGD, and FBVDD_PWRGD signals can mean that the EC uses these signals as inputs to the AND gate logic and determines the output result, which is the sixth result.

[0255] After obtaining the sixth result, the EC can output a GPU power status indicator signal based on the sixth result. This GPU power status indicator signal can be the GPU_PWREN signal.

[0256] When the sixth result is high (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output a GPU power status indication signal to indicate that the GPU power supplies are powered on. When the sixth result is low (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC reacquires the GPU_PWREN signal, or uses OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal.

[0257] S318 and EC determine whether the MSVDD status indicator signal indicates that MSVDD_POWER is not supplying power to the GPU, and the PEXVDD status indicator signal indicates that PEXVDD_POWER is not supplying power to the GPU, and the NVVDD status indicator signal indicates that NVVDD_POWER is not supplying power to the GPU, and the FBVDD status indicator signal indicates that FBVDD_POWER is not supplying power to the GPU.

[0258] When it is determined that the MSVDD status indicator signal indicates that MSVDD_POWER is not supplying power to the GPU, the PEXVDD status indicator signal indicates that PEXVDD_POWER is not supplying power to the GPU, the NVVDD status indicator signal indicates that NVVDD_POWER is not supplying power to the GPU, and the FBVDD status indicator signal indicates that FBVDD_POWER is not supplying power to the GPU, it can be concluded that all power supplies to the GPU are currently powered down. At this time, the EC can output GPU power status indicator signals to indicate that all power supplies to the GPU are powered down, i.e., execute S320. In this way, all other devices in the electronic device that need to know whether all power supplies to the GPU are powered down (such as the CPU) can know in a timely manner that all power supplies to the GPU are powered down, and the electronic device can then normally stop using the GPU.

[0259] When it is determined that the MSVDD status indicator signal is used to indicate that MSVDD_POWER has powered the GPU, or the PEXVDD status indicator signal is used to indicate that PEXVDD_POWER has powered the GPU, or the NVVDD status indicator signal is used to indicate that NVVDD_POWER has powered the GPU, or the FBVDD status indicator signal is used to indicate that FBVDD_POWER has powered the GPU, it can be concluded that not all power supplies of the GPU are currently powered down. At this time, the power-down process of each power supply of the GPU can be executed in a loop, that is, the GPU power control method is restarted from S301 or S302 (the figure takes restarting from 301 as an example).

[0260] In some embodiments, if the MSVDD status indicator signal is the MSVDD_PWRGD signal, the NVVDD status indicator signal is the NVVDD_PWRGD signal, the PEXVDD status indicator signal is the PEXVDD_PWRGD signal, and the FBVDD status indicator signal is the FBVDD_PWRGD signal, then the specific implementation of S318 can be: EC uses OR gate logic to determine the seventh result of the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal, and the FBVDD_PWRGD signal. Specifically, the seventh result of EC using OR gate logic to judge the MSVDD_PWRGD, NVVDD_PWRGD, PEXVDD_PWRGD, and FBVDD_PWRGD signals can be defined as follows: EC uses the MSVDD_PWRGD, NVVDD_PWRGD, PEXVDD_PWRGD, and FBVDD_PWRGD signals as inputs to the OR gate logic to determine the output result of the AND gate logic, which is the seventh result.

[0261] After obtaining the seventh result, the EC can output a GPU power status indicator signal based on the seventh result. This GPU power status indicator signal can be the GPU_PWREN signal.

[0262] When the seventh result is low (or logic "1"), referring to the relevant descriptions in the foregoing embodiments, the EC can output a GPU power status indication signal to indicate that the GPU power supplies are powered down. When the seventh result is high (or logic "0"), referring to the relevant descriptions in the foregoing embodiments, the EC reacquires the GPU_PWREN signal, or uses OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal.

[0263] It should be noted that during a single execution of the GPU power control method, S317 and S318 will only be executed once, and will not be executed simultaneously. Which one is executed depends on the actual situation.

[0264] Furthermore, if no other device needs to know the power-down results of the GPU's various power supplies when the electronic device requires the GPU to be powered down, then step S318 can be omitted. The presence or absence of step S318 depends on actual needs, and this application does not impose specific restrictions on it. If step S318 is omitted, then S317 is executed after S316.

[0265] S319 and EC output GPU power status indication signals indicating that all GPU power supplies are powered on.

[0266] In some embodiments, the GPU power status indication signal used to indicate that the GPU power supplies are powered on can be a high-level GPU_PWRGD signal, which is a level signal. In this embodiment, S319 can be specifically implemented as follows: EC outputs a high-level GPU_PWRGD signal.

[0267] In some embodiments, the EC may specifically send a GPU power status indication signal output to the first target device to indicate that the GPU's power supplies are powered on. The first target device may be a device in an electronic device that needs to know whether the GPU's power supplies are powered on, such as a CPU.

[0268] The S320 and EC output GPU power status indication signals that indicate that all power supplies to the GPU are off.

[0269] In some embodiments, the GPU power status indication signal used to indicate that the GPU power supplies are powered down can be a low-level GPU_PWRGD signal, which is a level signal. In this embodiment, the specific implementation of S320 can be: the EC outputs a low-level GPU_PWRGD signal.

[0270] In some embodiments, the EC may specifically send a GPU power status indication signal output to the second target device to indicate that the GPU's power supplies are powered down. The second target device may be a device in an electronic device that needs to know whether the GPU's power supplies are powered down, such as a CPU.

[0271] It should be noted that under normal operating conditions, the GPU power enable signal, FBVDD status indicator signal, over-temperature indicator signal, MSVDD sleep enable signal, MSVDD status indicator signal, NVVDD sleep enable signal, NVVDD status indicator signal, PEXVDD status indicator signal, and FBVDD sleep enable signal can be received by the EC in real time. That is, the EC can receive these signals simultaneously, rather than receiving them in a time-division manner. However, the received signals differ under different circumstances. For example, when the GPU needs to be powered down, the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered down; when the GPU needs to be powered on, the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered on. The same applies to the other signals; the differences under different circumstances can be referred to the relevant identifiers in the aforementioned embodiments. Furthermore, the 1V2 enable signal, MSVDD enable signal, NVVDD enable signal, PEXVDD enable signal, and FBVDD enable signal are also output by the EC in real time. That is, the EC can output these signals simultaneously, rather than outputting them in a time-division manner. In other words, the EC can acquire all the aforementioned power management signals related to the GPU's power-on and power-off in real time.

[0272] Based on this, in some embodiments, when the technical solution provided in the above embodiments is executed, S302, S305, S308, S309, S314, and S317 (or S318) can be executed simultaneously each time. Each execution can change the enable signal and corresponding status indication signal output by the EC for a certain power supply, thereby powering on or off a certain power supply. By executing the above technical solution multiple times, multiple power supplies of the GPU can be powered on / off according to a preset power-on / off sequence.

[0273] Based on the above description and the technical solutions provided in S301-S320, when the GPU needs to be powered on but does not need to enter a sleep state, after the EC receives the GPU power enable signal instructing multiple power supplies to power on, the power-on sequence of the multiple power supplies is controlled by the EC as follows: 1V2_POWER->1V8_POWER->MSVDD_POWER->NVVDD_POWER and PEXVDD_POWER->FBVDD_POWER. When the GPU needs to be powered on but needs to enter a sleep state, MSVDD_POWER, NVVDD_POWER, and PEXVDD_POWER will not be powered on, and the power-on sequence of the remaining power supplies will be: 1V2_POWER->1V8_POWER->FBVDD_POWER.

[0274] When the GPU needs to be powered down, after receiving the GPU power enable signal indicating that multiple power supplies of the GPU should be powered down, the EC will execute the entire scheme for the first time, which will power down MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER of the GPU. Among them, MSVDD_POWER, NVVDD_POWER, and PEXVDD_POWER will be powered down simultaneously, followed by FBVDD_POWER. After executing the entire scheme for the second time, 1V2_POWER and 1V8_POWER will be powered down sequentially.

[0275] As can be seen, when the GPU needs to be powered on or off, the technical solution provided in this application can successfully control multiple power supplies of the GPU to power on / off according to a preset power-on / off sequence by utilizing the EC built into the electronic device. Compared with the existing solution that uses multiple components to control the power-on / off sequence of multiple power supplies of the GPU, it is lower in cost and simpler.

[0276] In summary, based on the technical solution provided in this application, the EC (Electronic Control Unit) inherent in the electronic device can be used to fully analyze multiple power management signals related to the GPU power state. This allows for the adjustment of the power enable signals used to control the power states of the multiple power supplies of the GPU, achieving the goal of powering on or off the multiple power supplies of the GPU according to a preset power-on sequence or a preset power-off sequence. Since the entire technical solution reuses the electronic device's own EC to control the power-on and power-off sequences of the multiple power supplies of the GPU, it is lower in cost and simpler than existing solutions that use multiple components to control the power-on and power-off sequences of the multiple power supplies of the GPU.

[0277] Furthermore, since the EC is a programmable device, its analysis of multiple power management signals and adjustment of the power enable signal based on the analysis results can be implemented through programming. This allows for easier debugging or adjustment should power-on / off timing errors or adjustments be made, resulting in more accurate GPU power-on / off timing and faster fault handling, thus improving the user experience.

[0278] The following examples illustrate the following: GPU power enable signal is GPU_PWREN; FBVDD status indicator signal is FBVDD_PWRGD; over-temperature indicator signal is OVERT_N; MSVDD sleep enable signal is MSVDD_GC6_EN; MSVDD status indicator signal is MSVDD_PWRGD; NVVDD sleep enable signal is NVVDD_GC6_EN; NVVDD status indicator signal is NVVDD_PWRGD; PEXVDD status indicator signal is PEXVDD_PWRGD; FBVDD sleep enable signal is FBVDD_GC6_EN; 1V2 enable signal is 1V2_POWER_EN; MSVDD enable signal is MSVDD_POWER_EN; NVVDD enable signal is NVVDD_POWER_EN; PEXVDD enable signal is PEXVDD_POWER_EN; and FBVDD enable signal is FBVDD_POWER_EN. Figure 5 As shown, in this application, as Figure 3 This section describes a specific implementation of the GPU power control method shown. (Refer to...) Figure 5 As shown, the specific implementation process of this GPU power control method may include:

[0279] S501. When the electronic device's VSYS is powered on and the system is powered on, the EC receives the GPU_PWREN signal.

[0280] The relevant definitions and descriptions of "the electronic device's VSYS is powered on, and the system is powered on" can be found in the relevant statements following S301 in the aforementioned embodiments, and will not be repeated here.

[0281] A high-level GPU_PWREN signal is used to indicate that multiple power supplies of the GPU are powered on; a low-level GPU_PWREN signal is used to indicate that multiple power supplies of the GPU are powered off. When the electronic device needs the GPU to work, the GPU_PWREN signal is high, and the GPU power control method is specifically the GPU power-on control procedure; when the electronic device needs the GPU to stop working, the GPU_PWREN signal is low, and the GPU power control method is specifically the GPU power-off control procedure.

[0282] The relevant concepts of the GPU_PWREN signal can be referred to the relevant descriptions after S301 in the aforementioned embodiments, and will not be repeated here.

[0283] S502 and EC use OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal.

[0284] If the first result is high (or logic "1"), the EC can output 1V2_POWER_EN, which is a high level indicating that 1V2_POWER is powered on, thus powering on 1V2_POWER, i.e., executing S503; if the first result is low (or logic "0"), the EC can output 1V2_POWER_EN, which is a low level indicating that 1V2_POWER is powered off, thus powering off 1V2_POWER, i.e., executing S504.

[0285] S505 is executed concurrently with S503 and S504. The specific reasons can be found in the relevant statements after S302 in the previous embodiments regarding the execution of S305 when S303 or S304 is executed, which will not be repeated here.

[0286] The definitions of the FBVDD_PWRGD and GPU_PWREN signals can be found in the descriptions following S302 in the aforementioned embodiments, and will not be repeated here.

[0287] The specific implementation and related definitions of S502 can be found in the relevant descriptions following S302 in the aforementioned embodiments, and will not be repeated here.

[0288] S503 and EC output a high-level 1V2_POWER_EN signal to power on 1V2_POWER, which in turn pulls up the 1V2_PWRGD signal to power on 1V8_POWER.

[0289] Specifically, pulling the 1V2_PWRGD signal high means adjusting the previously low-level 1V2_PWRGD signal output by the EC to a high-level 1V2_PWRGD signal.

[0290] The specific implementation of S503 can be referred to the relevant description after S303 in the aforementioned embodiments, and will not be repeated here.

[0291] S504 and EC output a low level 1V2_POWER_EN to power down 1V2_POWER, which in turn pulls down the 1V2_PWRGD signal to power down 1V8_POWER.

[0292] Specifically, pulling the 1V2_PWRGD signal low means adjusting the previously high-level 1V2_PWRGD signal output by the EC to a low-level 1V2_PWRGD signal.

[0293] The specific implementation of S504 can be referred to the relevant description after S304 in the aforementioned embodiments, and will not be repeated here.

[0294] S505 and EC use AND gate logic to determine the second result of the OVERT_N signal, MSVDD_GC6_EN signal, 1V2_POWER_EN signal and GPU_PWREN signal.

[0295] If the second result is high, the EC can output a high-level MSVDD_POWER_EN signal to indicate that MSVDD_POWER is powered on, i.e., execute S506; if the second result is low, the EC can output a low-level MSVDD_POWER_EN signal to indicate that MSVDD_POWER is powered off, i.e., execute S507.

[0296] The specific implementation of S505 can be referred to the relevant description after S305 in the aforementioned embodiments, and will not be repeated here.

[0297] S506 and EC output a high-level MSVDD_POWER_EN signal to power on MSVDD_POWER and pull up the MSVDD_PWRGD signal.

[0298] Specifically, "pulling the MSVDD_PWRGD signal high" refers to adjusting the previously low-level MSVDD_PWRGD signal output by the EC to a high-level MSVDD_PWRGD signal. The relevant definition for pulling the MSVDD_PWRGD signal high can be found in the description following S308 in the aforementioned embodiments, and will not be elaborated upon here.

[0299] The specific implementation of S506 can be referred to the relevant description after S306 in the aforementioned embodiments, and will not be repeated here.

[0300] S506 is followed by S508 and S509. For specific reasons, please refer to the relevant description after S306 in the aforementioned embodiments.

[0301] S507 and EC output a low-level MSVDD_POWER_EN signal to power down MSVDD_POWER and pull the MSVDD_PWRGD signal low.

[0302] Specifically, pulling the MSVDD_PWRGD signal low means adjusting the previously high-level MSVDD_PWRGD signal output by the EC to a low-level MSVDD_PWRGD signal. The relevant definition for pulling the MSVDD_PWRGD signal low can be found in the description following S308 in the aforementioned embodiments, and will not be elaborated upon here.

[0303] The specific implementation of S507 can be referred to the relevant description after S307 in the aforementioned embodiments, and will not be repeated here.

[0304] S507 is followed by S508 and S509. For specific reasons, please refer to the relevant description after S307 in the aforementioned embodiments.

[0305] S508 and EC use AND gate logic to determine the third result of the OVERT_N signal, NVVDD_GC6_EN signal, MSVDD_POWER_EN signal, MSVDD_PWRGD signal and GPU_PWREN signal.

[0306] If the third result is high, the EC can output a high-level NVVDD_POWER_EN signal to indicate that NVVDD_POWER is powered on, i.e., execute S510; if the third result is low, the EC can output a low-level NVVDD_POWER_EN signal to indicate that NVVDD_POWER is powered off, i.e., execute S511.

[0307] The specific implementation of S508 can be referred to the relevant descriptions after S308 in the aforementioned embodiments, and will not be repeated here.

[0308] S509 and EC use AND gate logic to determine the fourth result of the MSVDD_POWER_EN, MSVDD_PWRGD, and GPU_PWREN signals.

[0309] When the fourth result is high, the EC can output a high-level PEXVDD_POWER_EN signal to indicate that PEXVDD_POWER is powered on, i.e., execute S512; when the fourth result is low, the EC can output a low-level PEXVDD_POWER_EN signal to indicate that PEXVDD_POWER is powered off, i.e., execute S513.

[0310] The specific implementation of S509 can be referred to the relevant descriptions after S309 in the aforementioned embodiments, and will not be repeated here.

[0311] S510 and EC output a high-level NVVDD_POWER_EN signal to power on NVVDD_POWER and pull up the NVVDD_PWRGD signal.

[0312] Specifically, "pulling the NVVDD_PWRGD signal high" refers to adjusting the previously low-level NVVDD_PWRGD signal output by the EC to a high-level NVVDD_PWRGD signal. The relevant definition of pulling the NVVDD_PWRGD signal high can be found in the description following S314 in the aforementioned embodiments, and will not be elaborated upon here.

[0313] The specific implementation of S510 can be referred to the relevant description after S310 in the aforementioned embodiments, and will not be repeated here.

[0314] S514 is executed after S510. For specific reasons, please refer to the relevant description after S310 in the aforementioned embodiment.

[0315] S511 and EC output a low-level NVVDD_POWER_EN signal to power down NVVDD_POWER and pull the NVVDD_PWRGD signal low.

[0316] Specifically, pulling the NVVDD_PWRGD signal low means adjusting the previously high-level NVVDD_PWRGD signal output by the EC to a low-level NVVDD_PWRGD signal. The relevant definition for pulling the NVVDD_PWRGD signal low can be found in the description following S314 in the aforementioned embodiments, and will not be elaborated upon here.

[0317] The specific implementation of S511 can be referred to the relevant description after S311 in the aforementioned embodiments, and will not be repeated here.

[0318] S514 is executed after S511. For specific reasons, please refer to the relevant description after S311 in the aforementioned embodiment.

[0319] S512 and EC output a high-level PEXVDD_POWER_EN signal to power on PEXVDD_POWER and pull up the PEXVDD_PWRGD signal.

[0320] Specifically, "pulling up the PEXVDD_PWRGD signal" means adjusting the previously low-level PEXVDD_PWRGD signal output by the EC to a high-level PEXVDD_PWRGD signal. The relevant definition for pulling up the PEXVDD_PWRGD signal can be found in the description following S314 in the aforementioned embodiments, and will not be elaborated upon here.

[0321] The specific implementation of S512 can be referred to the relevant description after S312 in the aforementioned embodiments, and will not be repeated here.

[0322] S514 is executed after S512. For specific reasons, please refer to the relevant description after S312 in the aforementioned embodiment.

[0323] S513 and EC output a low-level PEXVDD_POWER_EN signal to power down PEXVDD_POWER and pull down the PEXVDD_PWRGD signal.

[0324] Specifically, pulling the PEXVDD_PWRGD signal low means adjusting the previously high-level PEXVDD_PWRGD signal output by the EC to a low-level PEXVDD_PWRGD signal. The relevant definition for pulling the PEXVDD_PWRGD signal low can be found in the description following S314 in the aforementioned embodiments, and will not be elaborated upon here.

[0325] The specific implementation of S513 can be referred to the relevant description after S313 in the aforementioned embodiments, and will not be repeated here.

[0326] S514 is executed after S513. For specific reasons, please refer to the relevant description after S313 in the previous embodiment.

[0327] S514, EC uses OR gate logic to determine the fifth result of the FBVDD_GC6_EN signal, NVVDD_PWRGD signal, and PEXVDD_PWRGD signal.

[0328] When the fifth result is high, the EC can output a high-level FBVDD_POWER_EN signal to indicate that FBVDD_POWER is powered on, i.e., execute S515; when the fifth result is low, the EC can output a low-level FBVDD_POWER_EN signal to indicate that FBVDD_POWER is powered off, i.e., execute S516.

[0329] The specific implementation of S514 can be referred to the relevant description after S314 in the aforementioned embodiments, and will not be repeated here.

[0330] The S515 and EC output a high-level FBVDD_POWER_EN signal to power on FBVDD_POWER and pull up the FBVDD_PWRGD signal.

[0331] Specifically, "pulling the FBVDD_PWRGD signal high" refers to adjusting the previously low-level FBVDD_PWRGD signal output by the EC to a high-level FBVDD_PWRGD signal. The relevant definition for pulling the FBVDD_PWRGD signal high can be found in the description following S317 in the aforementioned embodiments, and will not be elaborated upon here.

[0332] The specific implementation of S515 can be referred to the relevant description after S315 in the aforementioned embodiments, and will not be repeated here.

[0333] S517 is executed after S515. For specific reasons, please refer to the relevant description after S315 in the aforementioned embodiment.

[0334] S516 and EC output a low-level FBVDD_POWER_EN signal to power down FBVDD_POWER and pull the FBVDD_PWRGD signal low.

[0335] Specifically, pulling the FBVDD_PWRGD signal low means adjusting the previously high-level FBVDD_PWRGD signal output by the EC to a low-level FBVDD_PWRGD signal. The relevant definition for pulling the FBVDD_PWRGD signal low can be found in the description following S317 in the aforementioned embodiments, and will not be elaborated upon here.

[0336] The specific implementation of S516 can be referred to the relevant description after S316 in the aforementioned embodiments, and will not be repeated here.

[0337] S517 is executed after S516. For specific reasons, please refer to the relevant description after S316 in the aforementioned embodiment.

[0338] S517, EC uses AND gate logic to determine the sixth result of the MSVDD_PWRGD signal, NVVDD_PWRGD signal, PEXVDD_PWRGD signal, and FBVDD_PWRGD signal.

[0339] If the sixth result is high, the EC can output a high-level GPU_PWRGD signal to indicate that the GPU power supplies are powered on, i.e., execute S519; if the sixth result is low, the EC can re-execute the GPU_PWREN signal, or use OR gate logic to judge the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal, i.e., re-execute S301 or S302.

[0340] The specific implementation of S517 can be referred to the relevant description after S317 in the aforementioned embodiments, and will not be repeated here.

[0341] S518, EC uses OR gate logic to determine the seventh result of the MSVDD_PWRGD signal, NVVDD_PWRGD signal, PEXVDD_PWRGD signal and FBVDD_PWRGD signal.

[0342] When the seventh result is low, the EC can output a low-level GPU_PWRGD signal to indicate that the power supplies of the GPU have been powered down, i.e., execute S520; when the seventh result is high, the EC can re-execute the GPU_PWREN signal, or use OR gate logic to judge the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal, i.e., re-execute S301 or S302.

[0343] The specific implementation of S518 can be referred to the relevant description after S318 in the aforementioned embodiments, and will not be repeated here.

[0344] S519 and EC output a high-level GPU_PWREN signal.

[0345] The specific implementation of S519 can be referred to the relevant description after S319 in the aforementioned embodiments, and will not be repeated here.

[0346] S520 and EC output a low-level GPU_PWREN signal.

[0347] The specific implementation of S520 can be referred to the relevant description after S320 in the aforementioned embodiments, and will not be repeated here.

[0348] It should be noted that, under normal operating conditions of the electronic device, the GPU_PWREN, FBVDD_PWRGD, OVERT_N, MSVDD_GC6_EN, NVVDD_GC6_EN, PEXVDD_PWRGD, and FBVDD_GC6_EN signals can be received by the EC in real time; that is, the EC can receive these signals simultaneously, rather than receiving them in a time-division multiplexing manner. However, the received signals differ under different circumstances. For example, when the GPU needs to be powered down, the GPU_PWREN signal is used to indicate that multiple power supplies of the GPU are powered down; when the GPU needs to be powered on, the GPU_PWREN signal is used to indicate that multiple power supplies of the GPU are powered on. The other signals are similar; the differences between different circumstances can be referred to the relevant identifiers in the foregoing embodiments. In addition, the 1V2_POWER_EN, MSVDD_POWER_EN, NVVDD_POWER_EN, PEXVDD_POWER_EN, and FBVDD_POWER_EN signals are also output by the EC in real time, meaning that the EC can output these signals simultaneously, rather than in a time-division multiplexing manner.

[0349] Based on this, in some embodiments, when the technical solution provided in the above embodiments is executed, S502, S505, S508, S509, S514, and S517 (or S518) can be executed simultaneously each time. Each execution can change the enable signal and corresponding status indication signal output by the EC for a certain power supply, thereby powering on or off a certain power supply. By executing the above technical solution multiple times, multiple power supplies of the GPU can be powered on / off according to a preset power-on / off sequence.

[0350] In some embodiments, the EC can receive or transmit 1.8V IO (Input / Output) signals. Therefore, the GPU_PWREN, FBVDD_PWRGD, OVERT_N, MSVDD_GC6_EN, NVVDD_GC6_EN, FBVDD_GC6_EN, 1V2_POWER_EN, MSVDD_POWER_EN, NVVDD_POWER_EN, PEXVDD_POWER_EN, and FBVDD_POWER_EN signals mentioned above are all 1.8V IO signals.

[0351] Based on the above implementation, when the GPU needs to be powered on but does not need to enter a sleep state, the EC receives the GPU_PWREN signal instructing multiple power supplies of the GPU to power on. The power-on sequence of these power supplies is then controlled by the EC as follows: 1V2_POWER->1V8_POWER->MSVDD_POWER->NVVDD_POWER and PEXVDD_POWER->FBVDD_POWER. When the GPU needs to be powered on but needs to enter a sleep state, MSVDD_POWER, NVVDD_POWER, and PEXVDD_POWER are not powered on, and the power-on sequence of the remaining power supplies is: 1V2_POWER->1V8_POWER->FBVDD_POWER. When the GPU needs to be powered down, after the EC receives the GPU_PWREN signal instructing multiple power supplies of the GPU to power down, the first execution of the entire scheme can power down MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER of the GPU, with MSVDD_POWER, NVVDD_POWER, and PEXVDD_POWER powering down simultaneously, followed by FBVDD_POWER. The second execution of the entire scheme can then power down 1V2_POWER and 1V8_POWER sequentially. Because this technical solution reuses the EC of the electronic device itself to control the power-on and power-off sequence of multiple power supplies of the GPU, it is more cost-effective and simpler than existing schemes that use multiple components to control the power-on and power-off sequence of multiple power supplies of the GPU.

[0352] To facilitate understanding, the following will be combined with... Figure 6 The thread identifier allocation method provided in the embodiments of this application will be described. For example... Figure 6 As shown, the method may include S601-S603:

[0353] S601 and EC receive the GPU power enable signal.

[0354] Among them, the GPU power enable signal is used to indicate that multiple target power supplies of the GPU are powered on or powered off.

[0355] In some embodiments, the multiple target power supplies may include: 1V2_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER.

[0356] The specific implementation of S601 can be referred to the relevant descriptions of S301 and S501 in the aforementioned embodiments, and will not be repeated here.

[0357] S602 and EC respond to the GPU power enable signal and acquire the power management signal of the target power supply.

[0358] In this embodiment, the power management signal of the target power supply can be any signal related to the power-on / power-off of the target power supply. For example, if multiple target power supplies may include: 1V2_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER, then the power management signals of these target power supplies may include: GPU_PWREN signal, FBVDD_PWRGD signal, OVERT_N signal, MSVDD_GC6_EN signal, MSVDD_PWRGD signal, NVVDD_GC6_EN signal, NVVDD_PWRGD signal, PEXVDD_PWRGD signal, FBVDD_GC6_EN signal, 1V2_POWER_EN signal, MSVDD_POWER_EN signal, NVVDD_POWER_EN signal, PEXVDD_POWER_EN signal, and FBVDD_POWER_EN signal. The correspondence between these power management signals and the target power supply can be referred to the relevant descriptions in S301-S320 or S501-S520 in the aforementioned embodiments, and will not be repeated here.

[0359] The GPU_PWREN, FBVDD_PWRGD, OVERT_N, MSVDD_GC6_EN, MSVDD_PWRGD, NVVDD_GC6_EN, NVVDD_PWRGD, PEXVDD_PWRGD, and FBVDD_GC6_EN signals are received by the EC, meaning the EC acquires these power management signals through reception. The 1V2_POWER_EN, MSVDD_POWER_EN, NVVDD_POWER_EN, PEXVDD_POWER_EN, and FBVDD_POWER_EN signals are output by the EC, so the EC or these signals can be directly obtained during output.

[0360] Of course, in practice, the power management signal can be acquired in any other possible way, and this application does not impose any specific restrictions on it.

[0361] S603 and EC control the power state of the target power supply based on the power management signal of the target power supply, so that multiple target power supplies are powered on or powered off according to a preset power-on sequence.

[0362] In some embodiments, the EC controls the power state of the target power supply, specifically by controlling the target power supply to enter the power-on state when it is powered on or to enter the power-off state when it is powered off.

[0363] In some embodiments, the EC controlling the power-on of the target power supply can specifically involve the EC sending an enable signal to the power supply chip of the target power supply to instruct the power supply chip to control the power-on of the target power supply. In this way, the EC can control the power-on of the target power supply by sending an enable signal to the power supply chip.

[0364] In some embodiments, the EC controlling the target power supply to power down can specifically involve the EC sending an enable signal to the power supply chip of the target power supply to instruct the target power supply to power down, thereby enabling the power supply chip of the target power supply to control the target power supply to power down. In this way, the EC can achieve the purpose of controlling the target power supply to power down by sending an enable signal to the power supply chip of the target power supply.

[0365] The specific implementation of EC control of the target power supply to power on or off can be referred to the relevant descriptions in S301-S320 or S501-S520 in the aforementioned embodiments, and will not be repeated here.

[0366] Based on the technical solutions corresponding to S601-S603 described above, the EC (Electronic Control Unit) inherent in the electronic device can be used to fully analyze multiple power management signals related to the GPU power state. This allows for the adjustment of the power enable signals used to control the power states of the multiple power supplies of the GPU, achieving the goal of powering on or off the multiple power supplies of the GPU according to a preset power-on sequence or a preset power-off sequence. Since the entire technical solution reuses the electronic device's own EC to control the power-on and power-off sequences of the multiple power supplies of the GPU, it is lower in cost and simpler than existing solutions that use multiple components to control the power-on and power-off sequences of the multiple power supplies of the GPU.

[0367] Furthermore, since the EC is a programmable device, its analysis of multiple power management signals and adjustment of the power enable signal based on the analysis results can be implemented through programming. This allows for easier debugging or adjustment should power-on / off timing errors or adjustments be made, resulting in more accurate GPU power-on / off timing and faster fault handling, thus improving the user experience.

[0368] In some embodiments, if the target power supply is a first type of power supply, the power management signal of the target power supply includes a status indication signal of the first power supply; the first type of power supply is the first in the preset power-on sequence and the last in the preset power-off sequence; in the preset power-off sequence, the power-off sequence of the first power supply is the previous sequence of the power-off sequence of the first type of power supply; the status indication signal of the first power supply is used to indicate whether the first power supply has supplied power to the GPU or has not supplied power to the GPU.

[0369] When the target power source is a Class I power source, the EC controls the power state of the target power source based on the power management signals of the target power source, including:

[0370] When the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on, or when the status indicator signal of the first power supply indicates that the first power supply has supplied power to the GPU, the first type of power supply is controlled to be powered on; when the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off, and when the status indicator signal of the first power supply indicates that the first power supply has not supplied power to the GPU, the first type of power supply is controlled to be powered off.

[0371] In the GPU power-on control process, which controls the power-on of each power supply of the GPU, the first type of power supply needs to be powered on first. Therefore, after the EC receives the GPU power enable signal indicating that multiple power supplies of the GPU are powered on, it should control the first type of power supply to power on first. However, in the GPU power-off control process, which controls the power-off of each power supply of the GPU, the first type of power supply needs to power off after the first power supply powers off. Therefore, in the GPU power-off control process, after receiving the GPU_PWREN signal indicating that multiple power supplies of the GPU are powered off, the EC should not control the first type of power supply to power off first. Instead, it should control the first type of power supply to power off only after confirming that the first power supply is powered off. Therefore, if the EC directly controls the first type of power supply to power on after receiving the GPU power enable signal indicating that multiple power supplies of the GPU are powered on, the actions performed by the EC after receiving the GPU power enable signal in the GPU power-on control process and the GPU power-off control process will differ significantly. This will result in a higher complexity of the GPU power control method executed by the EC and more cumbersome related programming. Therefore, in order to minimize the uniformity of actions performed by the EC in the GPU power-on and power-off control processes and reduce the corresponding programming complexity, it is necessary to combine the status indication signal of the first power supply before controlling the first type of power supply to determine whether to control the first type of power supply to power on or power off.

[0372] For example, the first type of power supply can be 1V2_POWER, the first power supply corresponding to 1V2_POWER can be FBVDD_POWER, and the status indication signal of FBVDD_POWER can be the FBVDD_PWRGD signal. The relevant definition of the FBVDD_PWRGD signal can be referred to the relevant description after S302 in the previous embodiment, and will not be repeated here.

[0373] Based on the above technical solution, when the status indication signal of the first power supply indicates that the first power supply has supplied power to the GPU, or when the GPU power enable signal indicates that multiple power supplies of the GPU are powered on, it can be determined that the GPU power supply is in the power-on process, or that the GPU power supply is in the power-off process and the first power supply is not powered off. Therefore, the EC can control the first type of power supply to power on or supply power to the GPU. When the status indication signal of the first power supply indicates that the first power supply is not supplying power to the GPU, and the GPU power enable signal indicates that multiple power supplies of the GPU are powered off, it can be determined that the GPU power supply is in the power-off process and the first power supply is powered off. Therefore, the EC can control the first type of power supply to power off or stop supplying power to the GPU. It is evident that this technical solution ensures that the first type of power supply is powered on and off according to the preset power-on sequence and the preset power-off sequence, guaranteeing the correctness of the power-on and power-off sequence of the first type of power supply. Furthermore, since the EC's control actions for the power-on and power-off of the first type of power supply are based on the same power management signal, the complexity of the entire GPU power control method is reduced.

[0374] In some embodiments, when the target power supply is a second type of power supply, the power management signals of the target power supply include: a status indication signal of the preceding power supply and a sleep enable signal of the second type of power supply; the second type of power supply does not power down whether it enters a sleep state or not; in the preset power-on sequence, the power-on order of the preceding power supplies is the order preceding the power-on order of the target power supply; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the sleep enable signal of the second type of power supply is used to indicate whether the second type of power supply enters a sleep state or does not enter a sleep state.

[0375] When the target power supply is a Class II power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: controlling the Class II power supply to power on when the status indication signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, or when the sleep enable signal of the Class II power supply indicates that the Class II power supply has entered the sleep state.

[0376] If the status indicator signal of the preceding power supply indicates that the preceding power supply is not supplying power to the GPU, and the sleep enable signal of the second type of power supply indicates that the second type of power supply is not entering sleep mode, control the second type of power supply to power down.

[0377] In the GPU power-on control process, the second type of power supply needs to be powered on immediately after its corresponding preceding power supply. In order to ensure that the power-on sequence of the second type of power supply is correct, it is necessary to combine the status indication signal of the preceding power supply that can reflect whether the preceding power supply has supplied power to the GPU to determine whether the second type of power supply should be powered on.

[0378] Furthermore, since the second-class power supply does not need to be powered down when it enters sleep mode, and can be powered on or off when it is not in sleep mode, the GPU power-on control process requires combining the second-class power supply's sleep enable signal with an OR condition to determine whether it is powered on. Specifically, when determining whether the second-class power supply is powered on by combining the status indicator signal of its preceding power supply and the sleep enable signal, only one of these signals needs to satisfy the power-on prerequisite. In the GPU power-off control process, when determining whether the second-class power supply is powered off by combining the status indicator signal of its preceding power supply and the sleep enable signal, since the GPU generally does not enter sleep mode when it needs to be powered off, the sleep enable signal of the second-class power supply is used to indicate that it should not enter sleep mode. To prevent GPU power-down failures caused by the sleep enable signal of the second power supply indicating that the second power supply should enter a sleep state when the GPU needs to be powered down, it is also necessary to ensure that the sleep enable signal of the second power supply meets the power-down requirements of the second power supply (i.e., the sleep enable signal of the second power supply indicates that the second power supply does not enter a sleep state).

[0379] For example, the second type of power supply can be FBVDD_POWER, and the preceding power supply corresponding to FBVDD_POWER can be NVVVDD_POWER or PEXVVDD_POWER. The status indication signal of NVVDD_POWER can be the NVVDD_PWRGD signal. The status indication signal of PEXVDD_POWER can be the PEXVDD_PWRGD signal. The relevant definitions of the NVVDD_PWRGD signal and the PEXVDD_PWRGD signal can be referred to the relevant descriptions after S314 in the aforementioned embodiments, and will not be repeated here.

[0380] Based on the above technical solution, when the status indicator signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, or when the sleep enable signal of the second type of power supply indicates that the second type of power supply has entered a sleep state, it can be determined that the GPU power supply is in the power-on process and the preceding power supply has been powered on, or the GPU power supply is in the power-on process and the second type of power supply is about to enter a sleep state. Therefore, the EC can control the second type of power supply to power on or supply power to the GPU at this time. When the status indicator signal of the preceding power supply indicates that the preceding power supply has not supplied power to the GPU, and the sleep enable signal of the second type of power supply indicates that the second type of power supply will not enter a sleep state, it can be determined that the GPU power supply is in the power-off process and the preceding power supply has been powered off. Therefore, the EC can control the second type of power supply to power off or stop supplying power to the GPU at this time. It can be seen that through this technical solution, the second type of power supply can be powered on according to the power-on sequence of the second type of power supply in the preset power-on sequence, and powered off according to the power-off sequence of the second type of power supply in the preset power-off sequence, ensuring the correctness of the power-on and power-off sequence of the second type of power supply.

[0381] In some embodiments, when the target power supply is a third type of power supply, the power management signal of the target power supply includes the enable signal of the preceding power supply; the third type of power supply is the first to power down in the preset power down sequence; in the preset power up sequence, the power up sequence of the preceding power supply is the one preceding the power up sequence of the target power supply; the enable signal of the preceding power supply is used to indicate whether the preceding power supply is powered on or off; when the target power supply is a third type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power enable signal.

[0382] For example, the third type of power supply may include MSVDD_POWER, PEXVDD_POWER, and NVVDD_POWER. The preceding power supply for MSVDD_POWER is 1V2_POWER, and its enable signal can be 1V2_POWER_EN. The preceding power supply for PEXVDD_POWER is MSVDD_POWER, and its enable signal can be MSVDD_POWER_EN. The preceding power supply for NVVDD_POWER is MSVDD_POWER, and its enable signal can be MSVDD_POWER_EN. The definitions of the 1V2_POWER_EN and MSVDD_POWER_EN signals can be found in the descriptions in S305, S308, and S309 of the aforementioned embodiments, and will not be repeated here. Based on the above technical solution, since the third type of power supply needs to be powered down first, the power state of the target power supply can be controlled based on the GPU power enable signal. This ensures that when the EC receives the GPU power enable signal used to indicate the power down of multiple power supplies of the GPU, it can control the third type of power supply to power down in a timely manner, thus ensuring the correctness of the power down sequence of the third type of power supply.

[0383] In some embodiments, when the target power supply is the first sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: a status indication signal of the preceding power supply; the first sub-power supply does not have a sleep enable signal and its correlation with the GPU temperature is less than a preset threshold; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU.

[0384] When the target power supply is the first sub-power supply, the EC controls the power state of the target power supply based on the power management signal and the GPU power enable signal of the target power supply, including: controlling the first sub-power supply to power on when the status indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on; and controlling the first sub-power supply to power off when the status indication signal of the preceding power supply is used to indicate that the preceding power supply has not supplied power to the GPU, or the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered off, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off.

[0385] For example, the first sub-power source can be PEXVDD_POWER. The relevant definition of PEXVDD_POWER can be referred to the relevant descriptions in S309, S312 and S313 in the foregoing embodiments, and will not be repeated here.

[0386] Based on the above technical solution, when the enable signal of the preceding power supply corresponding to the first sub-power supply is used to indicate that the preceding power supply is powered on, and the status indicator signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, and the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered on, it can be determined that the GPU power-on process is underway and the preceding power supply is powered on. Therefore, the EC can control the first sub-power supply to power on or supply power to the GPU at this time. When the enable signal of the preceding power supply corresponding to the first sub-power supply is used to indicate that the preceding power supply is powered off, or the status indicator signal of the preceding power supply is used to indicate that the preceding power supply is not supplying power to the GPU, or the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered off, it can be determined that the GPU power-off process is underway. Therefore, the EC can control the first sub-power supply to power off or stop supplying power to the GPU at this time. It can be seen that through this technical solution, while ensuring that the first sub-power supply, which has little correlation with GPU temperature and does not have a sleep enable signal, is powered off first, the power-on order of the first sub-power supply in the preset power-on sequence is followed, ensuring the correctness of the power-on and power-off sequence of the first sub-power supply.

[0387] In some embodiments, when the target power supply is the second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: an over-temperature indication signal and a hibernation enable signal for the second sub-power supply; the status indication signal of the preceding power supply of the second sub-power supply cannot be acquired by the EC; the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature or exceeds a preset temperature; the hibernation enable signal for the second sub-power supply is used to indicate that the second sub-power supply enters a hibernation state or does not enter a hibernation state.

[0388] When the target power supply is the second sub-power supply, the EC controls the power state of the target power supply based on the target power supply's power management signals and the GPU power enable signals, including:

[0389] When the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed the preset temperature, the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply does not enter the sleep state, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on, the second sub-power supply is controlled to be powered on.

[0390] When the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered down, or the over-temperature indicator signal is used to indicate that the GPU temperature exceeds the preset temperature, or the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters sleep mode, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered down, the second sub-power supply is controlled to be powered down.

[0391] For example, the second sub-power source can be MSVDD_POWER. The relevant definition of MSVDD_POWER can be referred to the relevant descriptions in S305, S306 and S307 of the foregoing embodiments, and will not be repeated here.

[0392] Based on the above technical solution, for the second sub-power supply where the status indication signal of the preceding power supply cannot be obtained, if the over-temperature indication signal indicates that the GPU temperature is normal, the preceding power supply enable signal is used to indicate that the preceding power supply is powered on, the second sub-power supply's sleep enable signal indicates that the second sub-power supply does not enter sleep mode, and the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered on, it can be determined that the GPU power-on process is underway and the preceding power supply has been powered on. Therefore, the EC can control the second sub-power supply to power on or supply power to the GPU at this time. If the over-temperature indication signal indicates that the GPU temperature exceeds a preset temperature, or the preceding power supply enable signal is used to indicate that the preceding power supply is powered off, or the second sub-power supply's sleep enable signal indicates that the second sub-power supply enters sleep mode, or the GPU power enable signal is used to indicate that multiple power supplies of the GPU are powered off, it can be determined that the second sub-power supply needs to power off to enter sleep mode, or the second sub-power supply needs to power off to reduce the GPU temperature, or is in the GPU power-off process. Therefore, the EC can control the second sub-power supply to power off or stop supplying power to the GPU at this time. As can be seen, this technical solution ensures the correctness of the second sub-power supply's power-on sequence, based on the premise that the second sub-power supply, which is related to GPU temperature and has a hibernation enable signal, is powered down first. Furthermore, it can promptly power down the second sub-power supply in case of GPU overheating or when the GPU needs to enter hibernation mode, preventing GPU malfunctions due to overheating or unnecessary power consumption.

[0393] In some embodiments, when the target power supply is a third sub-power supply other than the first and second sub-power supplies in the third type of power supply, the power management signals of the target power supply further include: a status indication signal of the preceding power supply, an over-temperature indication signal, and a sleep enable signal of the third sub-power supply; the first sub-power supply does not have a sleep enable signal, and its correlation with the GPU temperature is less than a preset threshold; the status indication signal of the preceding power supply of the second sub-power supply cannot be acquired by the EC; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the over-temperature indication signal is used to indicate whether the GPU temperature does not exceed a preset temperature or exceeds a preset temperature; the sleep enable signal of the third sub-power supply is used to indicate whether the third sub-power supply enters a sleep state or does not enter a sleep state.

[0394] When the target power supply is the third sub-power supply, the EC controls the power state of the target power supply based on the power management signals of the target power supply, including: controlling the third sub-power supply to power on when the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the status indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature, the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply does not enter a sleep state, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on; and controlling the third sub-power supply to power off when the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered off, or the status indication signal of the preceding power supply is used to indicate that the preceding power supply is not supplying power to the GPU, or the over-temperature indication signal is used to indicate that the GPU temperature exceeds a preset temperature, or the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters a sleep state, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered off.

[0395] For example, the third sub-power source can be NVVDD_POWER. The relevant definition of NVVDD_POWER can be referred to the relevant descriptions in S308, S310 and S311 of the foregoing embodiments, and will not be repeated here.

[0396] Based on the above technical solution, when the over-temperature indicator signal indicates that the GPU temperature is normal, and the preceding power supply enable signal indicates that the preceding power supply is powered on, and the preceding power supply status indicator signal indicates that the preceding power supply is supplying power to the GPU, and the third sub-power supply's sleep enable signal indicates that the third sub-power supply is not entering sleep mode, and the GPU power enable signal indicates that multiple power supplies to the GPU are powered on, it can be determined that the GPU power supply is in the power-on process and the preceding power supply is powered on. Therefore, the EC can control the third sub-power supply to power on or supply power to the GPU at this time. When the over-temperature indicator signal indicates that the GPU temperature exceeds a preset temperature, or the preceding power supply enable signal indicates that the preceding power supply is powered off, or the preceding power supply status indicator signal indicates that the preceding power supply is not supplying power to the GPU, or the third sub-power supply's sleep enable signal indicates that the third sub-power supply is entering sleep mode, or the GPU power enable signal indicates that multiple power supplies to the GPU are powered off, it can be determined that the third sub-power supply needs to power off to enter sleep mode, or the third sub-power supply needs to power off to reduce the GPU temperature, or is in the GPU power-off process. Therefore, the EC can control the third sub-power supply to power off or stop supplying power to the GPU at this time. As can be seen, this technical solution ensures the correctness of the power-on / off sequence of the third sub-power supply, which is related to GPU temperature and has a sleep enable signal, by ensuring that the third sub-power supply is powered down first, while following the preset power-on sequence. Furthermore, it can promptly power down the third sub-power supply in case of GPU overheating or when the GPU needs to enter sleep mode, preventing GPU malfunctions due to overheating or unnecessary power consumption.

[0397] In some embodiments, the EC can also determine whether all target power supplies of the GPU have completed power-on or power-off based on the status indication signals of all target power supplies except for the target power supply for which a status indication signal cannot be obtained (e.g., 1V2_POWER). If it is determined that all target power supplies of the GPU have completed power-on, the EC can output a GPU power status indication signal indicating that each target power supply of the GPU has been powered on. If it is determined that all target power supplies of the GPU have completed power-off, the EC can output a GPU power status indication signal indicating that each target power supply of the GPU has been powered off.

[0398] The specific implementation and effects of the above technical solution can be referred to the relevant descriptions in S317-S320 of the foregoing embodiments, which will not be repeated here.

[0399] It is understood that, in order to achieve the aforementioned functions, the electronic device includes corresponding hardware structures and / or software modules for performing each function. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, the embodiments of the present invention can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in a hardware-driven or software-driven manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of the embodiments of this application.

[0400] This application embodiment can divide the above-described electronic device into functional modules based on the method example described above. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware or as software functional modules. It should be noted that the module division in this embodiment is illustrative and only represents one logical functional division; in actual implementation, there may be other division methods.

[0401] When dividing each function into modules according to its corresponding function, refer to Figure 7 As shown in the figure, this application embodiment also provides a GPU power control device applied to an EC in an electronic device. The GPU power control device may include: a receiving module 701, an acquisition module 702, and a control module 703.

[0402] The receiving module 701 is used to receive a GPU power enable signal; the GPU power enable signal is used to instruct multiple target power supplies of the GPU to power on or to instruct multiple target power supplies of the GPU to power off; the acquiring module 702 is used to acquire the power management signal of the target power supply in response to the GPU power enable signal received by the receiving module 701; the control module 703 is used to control the power state of the target power supply based on the power management signal of the target power supply acquired by the acquiring module 702, so that multiple target power supplies are powered on according to a preset power-on sequence or powered off according to a preset power-off sequence.

[0403] Furthermore, the cooperation between the receiving module 701, the acquiring module 702, and the control module 703 can also realize all the process steps of the GPU power control method provided in the aforementioned embodiments.

[0404] Regarding the GPU power control device in the above embodiments, the specific methods by which each module performs its operations have been described in detail in the embodiments of the GPU power control method described above, and will not be elaborated here. The related beneficial effects can also be referred to the related beneficial effects of the aforementioned GPU power control method, and will not be repeated here.

[0405] This application also provides an electronic device, which includes a display screen, a memory, an embedded controller (EC), and one or more processors. The memory stores computer program code, which includes computer instructions. When the EC executes the computer instructions, the electronic device performs the GPU power control method provided in the foregoing embodiments. The specific structure of this electronic device can be found in [reference needed]. Figure 2 The structure of the electronic device shown is illustrated.

[0406] This application also provides a computer-readable storage medium including computer instructions that, when executed on an electronic device, cause the electronic device to perform the GPU power control method provided in the foregoing embodiments.

[0407] This application also provides an embedded controller, which includes a processing unit and a memory; wherein the memory is used to store one or more computer program codes, the computer program codes including computer instructions, and when the embedded controller executes the computer instructions, the processor executes the GPU power control method provided in the foregoing embodiments.

[0408] This application also provides a computer program product containing executable instructions that, when run on an electronic device, cause the electronic device to perform the GPU power control method provided in the foregoing embodiments.

[0409] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0410] In the several embodiments provided in this application, it should be understood that the disclosed apparatus / device and method can be implemented in other ways. For example, the apparatus / device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0411] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0412] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0413] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially or in other words, the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0414] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A GPU power control method, characterized in that, Applied to an electronic device, the electronic device including an embedded controller EC, the method includes: The EC receives a GPU power enable signal; the GPU power enable signal is used to instruct multiple target power supplies of the GPU to power on or to instruct multiple target power supplies of the GPU to power off; wherein, the target power supply includes a third type of power supply, and the third type of power supply is the first to power off in the preset power-off sequence; the third type of power supply includes a first sub-power supply, the first sub-power supply does not have a sleep enable signal, and its correlation with GPU temperature is less than a preset threshold. The EC responds to the GPU power enable signal and acquires the power management signal of the target power supply. When the target power supply is the third type of power supply, the power management signal of the target power supply includes: the enable signal of the preceding power supply; wherein, in the preset power-on sequence, the power-on order of the preceding power supplies is the order preceding the power-on order of the target power supply, and the enable signal of the preceding power supply is used to indicate whether the preceding power supply is powered on or off; when the target power supply is the first sub-power supply, the power management signal of the target power supply further includes: the status indication signal of the preceding power supply, which is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU. The EC controls the power state of the target power supply based on the power management signal of the target power supply, so that the multiple target power supplies are powered on or powered off according to the preset power-on sequence or the preset power-off sequence. Specifically, when the target power supply is the first sub-power supply, the status indication signal of the preceding power supply indicates that the preceding power supply is supplying power to the GPU, the enable signal of the preceding power supply indicates that the preceding power supply is powered on, and the GPU power enable signal indicates that the multiple target power supplies of the GPU are powered on, the first sub-power supply is controlled to power on. When the status indication signal of the preceding power supply indicates that the preceding power supply is not supplying power to the GPU, or the enable signal of the preceding power supply indicates that the preceding power supply is powered off, or the GPU power enable signal indicates that the multiple target power supplies of the GPU are powered off, the first sub-power supply is controlled to power off.

2. The method according to claim 1, characterized in that, The EC controls the power state of the target power supply based on the power management signal of the target power supply, including: The EC controls the target power supply to enter the power-on state when it is powered on or to enter the power-off state when it is powered off.

3. The method according to claim 2, characterized in that, The EC controls the target power supply to power on, including: the EC sending an enable signal to the power chip of the target power supply to indicate that the target power supply is powered on, so that the power chip of the target power supply controls the target power supply to power on. The EC controls the target power supply to power down, including: the EC sending an enable signal to the power chip of the target power supply to indicate that the target power supply is powered down, so that the power chip of the target power supply controls the target power supply to power down.

4. The method according to any one of claims 1-3, characterized in that, When the target power supply is a first type of power supply, the power management signal of the target power supply includes a status indication signal of the first power supply; the first type of power supply is the first in the preset power-on sequence and the last in the preset power-off sequence; in the preset power-off sequence, the power-off sequence of the first power supply is the previous power-off sequence of the first type of power supply; the status indication signal of the first power supply is used to indicate whether the first power supply has supplied power to the GPU or has not supplied power to the GPU. When the target power supply is the first type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: When the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on, or when the status indicator signal of the first power supply indicates that the first power supply has supplied power to the GPU, the first type of power supply is controlled to be powered on. When the GPU power enable signal indicates that multiple target power supplies of the GPU are powered down, and the status indication signal of the first power supply indicates that the first power supply is not supplying power to the GPU, the first type of power supply is controlled to be powered down.

5. The method according to any one of claims 1-3, characterized in that, When the target power supply is a second type of power supply, the power management signals of the target power supply include: a status indication signal of the preceding power supply and a sleep enable signal of the second type of power supply; the second type of power supply does not power down whether it enters a sleep state or not; in the preset power-on sequence, the power-on order of the preceding power supplies is the order preceding the power-on order of the target power supply; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the sleep enable signal of the second type of power supply is used to indicate whether the second type of power supply enters a sleep state or does not enter a sleep state; When the target power supply is the second type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: When the status indication signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, or when the sleep enable signal of the second type of power supply indicates that the second type of power supply has entered a sleep state, control the second type of power supply to power on. When the status indication signal of the preceding power supply indicates that the preceding power supply is not supplying power to the GPU, and the sleep enable signal of the second type of power supply indicates that the second type of power supply is not entering a sleep state, the second type of power supply is controlled to power down.

6. The method according to claim 1, characterized in that, When the target power supply is the second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: an over-temperature indication signal and a sleep enable signal for the second sub-power supply; the status indication signal of the preceding power supply of the second sub-power supply cannot be acquired by the EC; the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature or exceeds the preset temperature; the sleep enable signal for the second sub-power supply is used to indicate that the second sub-power supply enters a sleep state or does not enter a sleep state. When the target power supply is the second sub-power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power enable signal, including: When the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature, the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply does not enter a sleep state, and the GPU power supply enable signal indicates that multiple target power supplies of the GPU are powered on, the second sub-power supply is controlled to be powered on. When the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered down, or the over-temperature indication signal is used to indicate that the GPU temperature exceeds a preset temperature, or the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters a sleep state, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered down, the second sub-power supply is controlled to be powered down.

7. The method according to claim 1, characterized in that, When the target power supply is a third sub-power supply other than the first and second sub-power supplies in the third type of power supply, the power management signals of the target power supply further include: a status indication signal of the preceding power supply, an over-temperature indication signal, and a sleep enable signal of the third sub-power supply; the first sub-power supply does not have a sleep enable signal, and its correlation with the GPU temperature is less than a preset threshold; the status indication signal of the preceding power supply of the second sub-power supply cannot be acquired by the EC; the status indication signal of the preceding power supply is used to indicate whether the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the over-temperature indication signal is used to indicate whether the GPU temperature does not exceed a preset temperature or exceeds the preset temperature; the sleep enable signal of the third sub-power supply is used to indicate whether the third sub-power supply enters a sleep state or does not enter a sleep state. When the target power source is the third sub-power source, the EC controls the power state of the target power source based on the power management signal of the target power source, including: When the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the status indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature, the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply does not enter a sleep state, and the GPU power enable signal indicates that multiple target power supplies of the GPU are powered on, the third sub-power supply is controlled to be powered on. When the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered down, or the status indication signal of the preceding power supply is used to indicate that the preceding power supply is not supplying power to the GPU, or the over-temperature indication signal is used to indicate that the GPU temperature exceeds a preset temperature, or the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters a sleep state, or the GPU power enable signal indicates that multiple target power supplies of the GPU are powered down, the third sub-power supply is controlled to be powered down.

8. An electronic device, characterized in that, include: The electronic device comprises a display screen, a memory, an embedded controller (EC), and one or more processors; wherein the memory stores computer program code, the computer program code including computer instructions, which, when executed by the EC, cause the electronic device to perform the GPU power control method as described in any one of claims 1-7.

9. An embedded controller, characterized in that, It includes a processing unit and a memory; wherein the memory is used to store one or more computer program codes, the computer program codes including computer instructions, and when the embedded controller executes the computer instructions, the embedded controller performs the GPU power control method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, Includes computer instructions that, when executed on an electronic device, cause the electronic device to perform the GPU power control method as described in any one of claims 1-7.

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