A low-ripple closed-loop negative voltage charge pump circuit

Abstract

This invention discloses a low-ripple closed-loop negative voltage charge pump circuit in the field of analog integrated circuit technology. It includes a charge pump closed-loop modulation circuit, the output of which is connected to the low-ripple negative voltage charge pump circuit. The low-ripple negative voltage charge pump circuit receives a positive power supply voltage input and outputs a negative power supply voltage. The low-ripple negative voltage charge pump circuit includes a charge pump module. The first terminal of the charge pump module is connected to the first terminal of the positive power supply filter capacitor and the output terminal of the charge pump closed-loop modulation circuit. The charge pump module outputs an output signal through the first terminal. This invention reduces the impact of switching noise on the system by fixing the switching frequency of the low-ripple closed-loop negative voltage charge pump circuit, eliminating the need for repeated start-stop or changing of the charge pump switching frequency. Simultaneously, by adjusting the positive power supply magnitude through a negative feedback loop closed-loop adjustment and dynamically compensating for the charge pump's positive power supply voltage, it reduces the output voltage deviation of traditional charge pumps under high current.

Description

Technical Field

[0001] This invention relates to the field of analog integrated circuit technology, specifically a low-ripple closed-loop negative voltage charge pump circuit. Background Technology

[0002] Negative power rails play an irreplaceable core role in electronic systems. For example, negative voltage turn-off is required in half-bridge / full-bridge topologies to reduce the risk of parasitic turn-on of power devices, while precision electronic systems require negative power rails to provide symmetrical power supply to expand the signal processing range and eliminate DC bias errors.

[0003] Traditional negative power rails are primarily generated using inductor-based switching power supply circuits or capacitor-based charge pump circuits. Switching power supplies achieve voltage inversion through magnetic components, and while they can support large output currents, their inherent characteristics, such as large size, difficulty in integration, and high electromagnetic interference, significantly limit their application in highly integrated and precision systems. Charge pumps, on the other hand, pump charge from the input side to the output simply by switching the charging and discharging path of a flying capacitor. They offer advantages such as small system size, ease of integration, and low electromagnetic interference, making them ideal for systems with low output current, high integration, and noise sensitivity.

[0004] Existing negative pressure charge pumps are limited by their open-loop architecture, resulting in drawbacks such as large chip area, high switching noise, and numerous peripheral circuits. This makes them unsuitable for use in highly integrated and noise-sensitive systems, limiting their application scenarios. Furthermore, existing negative pressure charge pumps require repeated start-stop or changes in the charge pump switching frequency, which increases the adverse effects of switching noise on the system and makes it difficult to provide a stable electrical signal. Summary of the Invention

[0005] The purpose of this invention is to provide a low-ripple closed-loop negative voltage charge pump circuit, by fixing the switching frequency of the low-ripple closed-loop negative voltage charge pump circuit to a certain value. It eliminates the need for repeated start-stop or changes in charge pump switching frequency, reducing the impact of switching noise on the system. It can provide large output current, stable DC voltage, and low output ripple, making it suitable for use in highly integrated and noise-sensitive systems.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A low-ripple closed-loop negative voltage charge pump circuit includes a charge pump closed-loop modulation circuit. The output terminal of the charge pump closed-loop modulation circuit is connected to the low-ripple negative voltage charge pump circuit, which receives a positive power supply voltage input and outputs a negative power supply voltage. The low-ripple negative voltage charge pump circuit includes a charge pump module, the first terminal of which is connected to a positive power supply filter capacitor. The first terminal and the output terminal of the charge pump closed-loop modulation circuit are connected. The charge pump module outputs the output signal through the first terminal. Positive power supply filter capacitor The second terminal is grounded, and the second terminal of the charge pump module is connected to the first flying capacitor. The first terminal, the first flying capacitor The second terminal is connected to the third terminal of the charge pump module, and the fourth terminal of the charge pump module is connected to the second flying capacitor. The first terminal, the second flying capacitor The second terminal is connected to the fifth terminal of the charge pump module, and the sixth terminal of the charge pump module is connected to the charge pump closed-loop modulation circuit and the negative power supply filter capacitor. With load resistance First terminal, second input signal Negative power supply filter capacitor The second end is connected to the load resistor. The second terminal, load resistor The second terminal is grounded, wherein the second input signal It is the expected negative power supply voltage; the first flying capacitor Second Flying Capacitor The output of the low-ripple negative voltage charge pump circuit is alternately charged to reduce output ripple.

[0008] As a further aspect of the present invention: the charge pump closed-loop modulation circuit includes a first operational amplifier OP1, the non-inverting input terminal of the first operational amplifier OP1 being connected to a first input signal. The non-inverting input of the third operational amplifier OP3 and the inverting input of the first operational amplifier OP1 are connected to the first resistor. The second terminal and the second resistor The first terminal, the first resistor The first terminal is connected to the output terminal of the first operational amplifier OP1 and the third resistor. The first terminal and the fifth resistor The second terminal, the third resistor The second end is connected to the fourth resistor The first terminal, the inverting input terminal of the third operational amplifier OP3, is connected to the output terminal of the third operational amplifier OP3 and the sixth resistor. The second terminal, the sixth resistor The first end is connected to the seventh resistor. The second terminal is connected to the inverting input terminal of the error amplifier EA, and the non-inverting input terminal of the error amplifier EA is connected to the feedback voltage. The output of error amplifier EA is connected to the non-inverting input of the second operational amplifier OP2, and the inverting input of the second operational amplifier OP2 is connected to a common-mode voltage. The seventh resistor The first terminal is grounded, and the output terminal of the second operational amplifier OP2 is connected to the fifth resistor. The first terminal is connected to the non-inverting input terminal of voltage follower OP4, and the non-inverting input terminal of voltage follower OP4 is connected to the fourth voltage. The inverting input of voltage follower OP4 is shorted to its output to form the first negative feedback structure. The output of voltage follower OP4 is connected to the positive power supply filter capacitor. At the first end, the first negative feedback structure is used for the output signal Provide current and enable the output signal Follow the fourth voltage The fourth resistor changes with the change. The second end is connected to the sixth end of the charge pump module.

[0009] As a further aspect of the present invention: the first resistor Second resistor The sixth resistor The seventh resistor Third resistor Fourth resistor All are proportional resistors; the first resistor Second resistor Used when the first input signal When the input is applied to the non-inverting input terminal of the first operational amplifier OP1, an absolute voltage is generated at the output terminal of the first operational amplifier OP1. Absolute voltage The voltage value is the absolute value of the expected negative power supply voltage.

[0010] As a further aspect of the present invention: the sixth resistor and the seventh resistor Used when the first input signal When the input is applied to the non-inverting input of the third operational amplifier OP3, an inverting input voltage is generated at the inverting input of the error amplifier EA. The third resistor and the fourth resistor Used to proportionally adjust the second input signal Voltage divider, and the voltage-divided second input signal With absolute voltage The operation generates feedback voltage Feedback voltage The non-inverting input voltage of the error amplifier EA; the error amplifier EA is based on the inverting input voltage. and feedback voltage Output error signal voltage To the non-inverting input of the second operational amplifier OP2.

[0011] As a further aspect of the present invention: the second operational amplifier OP2 is used to provide or extract current at the output terminal to adjust the output voltage. .

[0012] As a further aspect of the present invention: Flow through the load resistor The current is the charge pump load current. ;

[0013] When the charge pump load current When the value is zero and the charge pump closed-loop modulation circuit enters steady state, the value of the feedback voltage is equal to the value of the inverting input voltage, which can be expressed as: At this time, the voltage output by the error amplifier EA is the common-mode voltage. The second operational amplifier OP2 neither supplies nor draws current, therefore negative power supply This is the expected value.

[0014] As a further aspect of the present invention: when the charge pump load current When increased, the second input signal Absolute value of voltage Reduce, feedback voltage Increase and make the error signal voltage Increase, when the error signal voltage When the voltage increases, the output current of the second operational amplifier OP2 causes the output voltage to rise. Increase and output signal Increase compensation due to charge pump load current The voltage loss increases when the charge pump load current increases. After reaching steady state, the second input signal The charge pump module is used to stabilize the second input signal by avoiding repeated start-stop or changes in the charge pump switching frequency during the overall closed-loop modulation process. Voltage; when the charge pump load current When the signal decreases, the second input signal Absolute value of voltage The increase is compensated by the closed-loop modulation circuit due to the charge pump load current. After the voltage drops and excess voltage reaches a steady state, the second input signal... The value is restored to the expected value, completing the closed-loop feedback.

[0015] As a further aspect of the present invention: the charge pump module includes an oscillator circuit OSC, the first terminal of which is connected to a first switch. Second switch First end, second switch The first terminal is grounded, the first switch The second end is connected to the first flying capacitor. First end, second switch The second end is connected to the first flying capacitor. The second terminal, the first flying capacitor The first end is connected to the fifth switch. The first end, the fifth switch The second terminal is grounded, and the first flying capacitor The second end is connected to the sixth switch. The first end, the sixth switch The second end is connected to the second input signal First switch The first terminal is connected to the positive power supply filter capacitor. Second flying capacitor The first end is connected to the seventh switch. The first terminal and the output signal The seventh switch The second end is connected to the third switch First end, third switch The second terminal is grounded, and the second flying capacitor The second end is connected to the eighth switch. The first end, the eighth switch The first terminal is grounded, the eighth switch The second end is connected to the fourth switch The first end, the fourth switch The second end is connected to the second input signal The first terminal of the oscillator circuit OSC is the second terminal of the charge pump module, which is connected to the fifth terminal of the charge pump module. The second terminal of the oscillator circuit OSC is the third terminal of the charge pump module, which is connected to the fourth terminal of the charge pump module. The input of the low-ripple negative voltage charge pump circuit is a positive power supply voltage. The output of the low-ripple negative voltage charge pump circuit is a negative power supply. .

[0016] As a further aspect of the present invention: when the first terminal of the oscillator circuit OSC is connected to a high level... Furthermore, the second terminal of the oscillator circuit OSC is connected to a low level. At that time, the first switch Second switch Third switch and the fourth switch Close, fifth switch Sixth switch Seventh Switch and the eighth switch Turn off, at this time, the first flying capacitor During the charging phase, the second non-capacitor During the discharge phase, the voltage is negative. Provide the required charge.

[0017] As a further aspect of the present invention: when the first terminal of the oscillator circuit OSC is connected to a low level... Furthermore, the second terminal of the oscillator circuit OSC is connected to a high level. At that time, the first switch Second switch Third switch and the fourth switch Off, fifth switch Sixth switch Seventh Switch and the eighth switch Closed, at this time, the first flying capacitor During the discharge phase, the second non-capacitor During the charging phase, the power supply voltage is negative. Provide the required charge; the first and second terminals of the oscillator circuit OSC are alternately connected to a high or low level.

[0018] Compared with the prior art, the beneficial effects of the present invention are:

[0019] 1. This invention uses a fixed low-ripple closed-loop negative voltage charge pump circuit with a switching frequency of [missing value]. It eliminates the need for repeated start-stop or changes in the charge pump switching frequency, reducing the impact of switching noise on the system. At the same time, it adjusts the positive power supply through a closed-loop negative feedback loop, dynamically compensating for the positive power supply voltage of the charge pump, thus reducing the output voltage deviation of traditional charge pumps under high current.

[0020] 2. In this invention, by alternately supplying charge to the DC power supply through two flying capacitors, the output ripple of the traditional charge pump can be reduced by more than an order of magnitude. This enables the overall circuit to provide a large output current, stable DC voltage, and low output ripple under low switching frequency and low flying capacitor capacitance, thus allowing it to be used in highly integrated and noise-sensitive systems.

[0021] 3. In this invention, by designing a flying capacitor in conjunction with alternating high and low levels of the input OSC, the charge pump circuit can be continuously powered. Closed-loop modulation can be completed without repeated start-stop or changes in the charge pump switching frequency. Especially under a fixed operating frequency, by dynamically compensating the positive power supply voltage of the charge pump, the output voltage deviation of the traditional charge pump under high current is reduced. At the same time, by alternately and continuously providing charge to the output, the output ripple of the traditional charge pump can be reduced by more than an order of magnitude. This allows the charge pump circuit to provide a large output current, stable DC voltage, and low output ripple circuit under low switching frequency and low flying capacitor value. On the other hand, it can achieve accurate calculation of circuit parameters. It has the advantages of simple structure, easy implementation, and portability to similar architectures. It is suitable for integration with high-performance analog circuits such as high-performance bridge drive circuits with integrated negative voltage shutdown function and high-performance digital-to-analog / analog-to-digital converter circuits with integrated dual-rail power supply. Attached Figure Description

[0022] Figure 1 A schematic diagram of the existing negative pressure charge pump architecture and working principle;

[0023] Figure 2 This is a schematic diagram of the low-ripple closed-loop negative voltage charge pump circuit of the present invention;

[0024] Figure 3 This is a schematic diagram of the low-ripple negative voltage charge pump circuit of the present invention;

[0025] Figure 4 This is the circuit diagram of the operational amplifier OP1 of the present invention;

[0026] Figure 5 This is the circuit diagram of the operational amplifier OP2 of the present invention;

[0027] Figure 6 This is the circuit diagram of the operational amplifier OP3 of the present invention;

[0028] Figure 7 This is the circuit diagram of the follower OP4 of the present invention;

[0029] Figure 8 This is the circuit diagram of the error amplifier EA of the present invention;

[0030] Figure 9 This is a schematic diagram illustrating the alternating power supply principle of the low-ripple negative voltage charge pump of the present invention. Detailed Implementation

[0031] It should be noted that the existing negative pressure charge pump architecture diagram is as follows: Figure 1 As shown, OSC is an oscillator circuit that provides a two-phase clock. and , and The phase difference between them is 180 degrees. Positive power supply This is the positive power supply filter capacitor. For flying capacitors, These are the first switch, second switch, third switch, and fourth switch, used for switching. The charging and discharging path, It is a negative power source. This is the negative power supply filter capacitor. This is the equivalent load resistance.

[0032] Analyze the steady-state circuit of a traditional charge pump, assuming the charge pump switching frequency is... The switching cycle is ,switch The average on-resistance is The average input current is The average load current is The duty cycle during the charging phase is... The average charging current is During the charging cycle Average charge during charging and during the charging cycle voltage at both ends As shown in equation (1-1)

[0033]

[0034] The duty cycle during the discharge phase is The average discharge current is During the discharge cycle Average charge of discharge and during the discharge cycle voltage at both ends As shown in equation (1-2)

[0035]

[0036] At steady state, the total change in charge per cycle of the charge pump is zero, which gives us...

[0037]

[0038] Assuming the duty cycle during the charging phase The average load current is defined as the change in charge on the capacitor in each cycle divided by the cycle time. Combining equations (1-3), we can obtain...

[0039]

[0040] Simplifying and rearranging, we can obtain

[0041]

[0042] From the analysis of equation (1-5), we can see that when When the voltage is zero, the output of a traditional negative pressure charge pump is the negative value of the positive power supply. By setting the magnitude of the positive power supply, the desired negative power supply can be obtained. .

[0043] Limited by the open-loop architecture, when When it is not zero, Deviated from expectations. Reduced. ,Increase and Helps reduce right The influence of DC level, however lower higher and This will lead to an increase in chip area, switching noise, and peripheral circuitry, making it unsuitable for use in highly integrated, noise-sensitive systems. , , , For example, we can get the following at this time. Deviation from expectations This significantly reduces the negative voltage power supply value, affecting the overall system function.

[0044] Analysis of charging phase The voltage across the two ends can be obtained The output ripple is:

[0045]

[0046] Analysis of equation (1-6) shows that the negative power source Output ripple and Proportional to, with and Inversely proportional. Take , , For example, we can obtain At this time, the negative power supply Not only did the negative pressure value deviate significantly from expectations, but it was also accompanied by large output ripple, which had a great impact on the downstream system.

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0048] Example:

[0049] Please see Figures 2-3 In this embodiment of the invention, a low-ripple closed-loop negative voltage charge pump circuit includes a charge pump closed-loop modulation circuit. The output terminal of the charge pump closed-loop modulation circuit is connected to the low-ripple negative voltage charge pump circuit. The low-ripple negative voltage charge pump circuit is used to receive a positive power supply voltage input and output a negative power supply voltage. The charge pump closed-loop modulation circuit includes a first operational amplifier OP1, and the non-inverting input terminal of the first operational amplifier OP1 is connected to a first input signal. The non-inverting input of the third operational amplifier OP3 and the inverting input of the first operational amplifier OP1 are connected to the first resistor. The second terminal and the second resistor The first terminal, the first resistor The first terminal is connected to the output terminal of the first operational amplifier OP1 and the third resistor. The first terminal and the fifth resistor The second terminal, the third resistor The second end is connected to the fourth resistor The first terminal, the inverting input terminal of the third operational amplifier OP3, is connected to the output terminal of the third operational amplifier OP3 and the sixth resistor. The second terminal, the sixth resistor The first end is connected to the seventh resistor. The second terminal is connected to the inverting input terminal of the error amplifier EA, and the non-inverting input terminal of the error amplifier EA is connected to the feedback voltage. The output of error amplifier EA is connected to the non-inverting input of the second operational amplifier OP2, and the inverting input of the second operational amplifier OP2 is connected to a common-mode voltage. The seventh resistor The first terminal is grounded, and the output terminal of the second operational amplifier OP2 is connected to the fifth resistor. The first terminal is connected to the non-inverting input terminal of voltage follower OP4, and the non-inverting input terminal of voltage follower OP4 is connected to the fourth voltage. The inverting input of voltage follower OP4 is shorted to its output to form the first negative feedback structure. The output of voltage follower OP4 is connected to the positive power supply filter capacitor. The first end, the first negative feedback structure, is used to control the output signal. Provide current and enable the output signal Follow the fourth voltage The fourth resistor changes with the change. The second end is connected to the sixth end of the charge pump module.

[0050] In this embodiment, as Figure 4As shown, the first operational amplifier OP1 includes a first low-voltage PMOS transistor P11, a second low-voltage PMOS transistor P12, a third low-voltage PMOS transistor P13, and a fourth low-voltage PMOS transistor P14. The sources of the first low-voltage PMOS transistor P11 and the second low-voltage PMOS transistor P12 are both connected to the low power supply voltage VCCL. The drain of the first low-voltage PMOS transistor P11 is connected to the sources of the third low-voltage PMOS transistor P13 and the fourth low-voltage PMOS transistor P14. The gate of the first low-voltage PMOS transistor P11 is connected to the voltage signal VBP and the second low-voltage PMOS transistor P14. The gate of P12 and the gate of the third low-voltage PMOS transistor P13 are connected to the input signal INN. The drain of the third low-voltage PMOS transistor P13 is connected to the drain and gate of the first low-voltage NMOS transistor N11. The sources of the first low-voltage NMOS transistor N11, the second low-voltage NMOS transistor N12, the first high-voltage NMOS transistor HN11, the second high-voltage NMOS transistor HN12, and the third high-voltage NMOS transistor HN13 are all grounded. The gate of the fourth low-voltage PMOS transistor P14 is connected to the electrical signal INP. The drain of transistor 14 is connected to the drain of the second high-voltage NMOS transistor HN12, the gate of the third high-voltage NMOS transistor HN13, and the first terminal of the first capacitor C11. The source of the first high-voltage NMOS transistor HN11 is connected to the drain of the second low-voltage PMOS transistor P12 and the gate of the first high-voltage NMOS transistor HN11. The gate of the first high-voltage NMOS transistor HN11 is connected to the gate of the second high-voltage NMOS transistor HN12. The drain of the second high-voltage NMOS transistor HN12 is connected to the drain of the first high-voltage PMOS transistor HP11. The gates of the first high-voltage PMOS transistor HP11 and the second high-voltage PMOS transistor HP12, and the sources of the first high-voltage PMOS transistor HP11 and the second high-voltage PMOS transistor HP12 are all connected to the high power supply voltage VCCH. The drain of the second high-voltage PMOS transistor HP12 is connected to the output terminal, the second terminal of the first capacitor C11, and the drain of the third high-voltage NMOS transistor HN13. The first capacitor C11 is a compensation capacitor. The input stage of the first operational amplifier OP1 is powered by the low power supply voltage VCCL, and the output stage of the first operational amplifier OP1 is powered by the high power supply voltage VCCH.

[0051] In this embodiment, as Figure 5As shown, the second operational amplifier OP2 includes a first low-voltage PMOS transistor P21, a second low-voltage PMOS transistor P22, a third low-voltage PMOS transistor P23, and a fourth low-voltage PMOS transistor P24. The sources of the first low-voltage PMOS transistor P21 and the second low-voltage PMOS transistor P22 are both connected to the low power supply voltage VCCL. The drain of the first low-voltage PMOS transistor P21 is connected to the sources of the third low-voltage PMOS transistor P23 and the fourth low-voltage PMOS transistor P24. The gate of the first low-voltage PMOS transistor P21 is connected to the voltage signal VBP. The gates of the second low-voltage PMOS transistor P22 and the third low-voltage PMOS transistor P23 are connected to the input signal INN. The drain of the third low-voltage PMOS transistor P23 is connected to the drain and gate of the first low-voltage NMOS transistor N21. The sources of the first low-voltage NMOS transistor N21, the second low-voltage NMOS transistor N22, the first high-voltage NMOS transistor HN21, the second high-voltage NMOS transistor HN22, and the third high-voltage NMOS transistor HN13 are all grounded. The gate of the fourth low-voltage PMOS transistor P24 is connected to the input signal INN. Connect the electrical signal INP. The drain of the fourth low-voltage PMOS transistor P24 is connected to the drain of the second high-voltage NMOS transistor HN22 and the gate of the third high-voltage NMOS transistor HN13. The source of the first high-voltage NMOS transistor HN21 is connected to the drain of the second low-voltage PMOS transistor P22 and the gate of the first high-voltage NMOS transistor HN21. The gate of the first high-voltage NMOS transistor HN21 is connected to the gate of the second high-voltage NMOS transistor HN22. The drain of the second high-voltage NMOS transistor HN22 is connected to the drain of the first high-voltage PMOS transistor HP21, the gate of the first high-voltage PMOS transistor HP21, and the gate of the second high-voltage PMOS transistor HP22. The sources of both the first high-voltage PMOS transistor HP21 and the second high-voltage PMOS transistor HP22 are connected to the high power supply voltage VCCH. The drain of the second high-voltage PMOS transistor HP22 is connected to the output terminal and the drain of the third high-voltage NMOS transistor HN13. The input stage of the second operational amplifier OP2 is powered by the low power supply voltage VCCL, and the output stage of the second operational amplifier OP2 is powered by the high power supply voltage VCCH.

[0052] In this embodiment, as Figure 6As shown, the third operational amplifier OP3 includes a first low-voltage PMOS transistor P31, a second low-voltage PMOS transistor P32, a third low-voltage PMOS transistor P33, and a fourth low-voltage PMOS transistor P34. The sources of the first low-voltage PMOS transistor P31 and the second low-voltage PMOS transistor P32 are both connected to the low power supply voltage VCCL. The drain of the first low-voltage PMOS transistor P31 is connected to the sources of the third low-voltage PMOS transistor P33 and the fourth low-voltage PMOS transistor P34. The gate of the first low-voltage PMOS transistor P31 is connected to the voltage signal VBP and the gate of the second low-voltage PMOS transistor P32. The gate of the third low-voltage PMOS transistor P33 is connected to the input signal INN. The third low-voltage PMOS transistor P34... The drain of 3 is connected to the drain and gate of the first low-voltage NMOS transistor N31. The sources of the first low-voltage NMOS transistor N31 and the second low-voltage NMOS transistor N32 are both grounded. The gate of the fourth low-voltage PMOS transistor P34 is connected to the electrical signal INP. The drain of the fourth low-voltage PMOS transistor P34 is connected to the drain of the second high-voltage NMOS transistor HN32, the gate of the third high-voltage NMOS transistor HN33, and the first terminal of the third capacitor C31. The second terminal of the third capacitor C31 is connected to the drain of the third low-voltage NMOS transistor N33. The third capacitor C31 is a compensation capacitor. The input stage of the third operational amplifier OP3 is powered by a low power supply voltage VCCL.

[0053] In this embodiment, as Figure 7 As shown, the voltage follower OP4 includes a first high-voltage PMOS transistor HP41, a second high-voltage PMOS transistor HP42, and a third high-voltage PMOS transistor HP43. The source of the first high-voltage PMOS transistor HP41 is connected to the high power supply voltage VCCH. The drain of the first high-voltage PMOS transistor HP41 is connected to the source of the second high-voltage PMOS transistor HP42 and the third high-voltage PMOS transistor HP43. The gate of the first high-voltage PMOS transistor HP41 is connected to the voltage signal VBP. The gate of the third high-voltage PMOS transistor HP43 is connected to the input signal INN. The drain of the third high-voltage PMOS transistor HP43 is connected to the drain of the second high-voltage NMOS transistor HN42 and the gate of the third high-voltage NMOS transistor HN43. The sources of the first high-voltage NMOS transistor HN41 and the second high-voltage NMOS transistor HN42 are both grounded. The source of the third high-voltage NMOS transistor HN43 is connected to the output OUT and the first terminal of resistor R41. The second terminal of resistor R41 is grounded.

[0054] In this embodiment, as Figure 8As shown, the error amplifier EA includes a first low-voltage PMOS transistor P51, a second low-voltage PMOS transistor P52, a third low-voltage PMOS transistor P53, a fourth low-voltage PMOS transistor P54, a fifth low-voltage PMOS transistor P55, a sixth low-voltage PMOS transistor P56, a seventh low-voltage PMOS transistor P57, and an eighth low-voltage PMOS transistor P58. The sources of the first low-voltage PMOS transistor P51, the second low-voltage PMOS transistor P52, the seventh low-voltage PMOS transistor P57, and the eighth low-voltage PMOS transistor P58 are all connected to a low power supply voltage VCCL. The gate of the first low-voltage PMOS transistor P51 is connected to the electrical signal VBP1 and the gate of the second low-voltage PMOS transistor P52. The drains of the first low-voltage PMOS transistor P51 and the second low-voltage PMOS transistor P52 are respectively connected across the two ends of resistor R51. The two ends of resistor R51 are respectively connected to the third low-voltage PMOS transistor P53 and the fourth low-voltage PMOS transistor P58. The source of low-voltage PMOS transistor P54 and the gate of the third low-voltage PMOS transistor P53 are connected to the electrical signal INP. The gate of the fourth low-voltage PMOS transistor P54 is connected to the electrical signal INN. The drain of the first low-voltage PMOS transistor P51 is connected to the gate of the third low-voltage PMOS transistor P53 and the gate of the sixth low-voltage NMOS transistor N56. The gate of the first low-voltage PMOS transistor P51 is connected to the electrical signal VBN1 and the gates of the second low-voltage PMOS transistor P52, the seventh low-voltage NMOS transistor N57, and the eighth low-voltage NMOS transistor N58. The drain of the seventh low-voltage NMOS transistor N57 is connected to the drain of the fifth low-voltage PMOS transistor P55. The source of the third low-voltage PMOS transistor P53 is connected to the drain of the first low-voltage NMOS transistor N51 and the gates of the third low-voltage NMOS transistor N53 and the sixth low-voltage NMOS transistor N56. The error amplifier EA is powered by a low supply voltage VCCL.

[0055] The error amplifier EA consists of low-voltage PMOS transistors P51~P58, low-voltage NMOS transistors N51~N58, and source resistor R51; EA is powered by a low power supply voltage VCCL.

[0056] like Figures 2-3 As shown, the low-ripple negative voltage charge pump circuit includes a charge pump module, the first terminal of which is connected to the positive power supply filter capacitor. The first terminal and the output terminal of the charge pump closed-loop modulation circuit are connected. The charge pump module outputs the output signal through the first terminal. Positive power supply filter capacitor The second terminal is grounded, and the second terminal of the charge pump module is connected to the first flying capacitor. The first terminal, the first flying capacitor The second terminal is connected to the third terminal of the charge pump module, and the fourth terminal of the charge pump module is connected to the second flying capacitor. The first terminal, the second flying capacitor The second terminal is connected to the fifth terminal of the charge pump module, and the sixth terminal of the charge pump module is connected to the charge pump closed-loop modulation circuit and the negative power supply filter capacitor. With load resistance First terminal, second input signal Negative power supply filter capacitor The second end is connected to the load resistor. The second terminal, load resistor The second terminal is grounded, where the second input signal It is the expected negative power supply voltage; the first flying capacitor Second Flying Capacitor Alternately supply charge to the output of the low-ripple negative voltage charge pump circuit to reduce output ripple.

[0057] Preferably, the first resistor Second resistor The sixth resistor The seventh resistor Third resistor Fourth resistor All are proportional resistors;

[0058] First resistor Second resistor Used when the first input signal When the input is applied to the non-inverting input terminal of the first operational amplifier OP1, an absolute voltage is generated at the output terminal of the first operational amplifier OP1. ;

[0059] Absolute voltage The voltage value is the absolute value of the expected negative power supply voltage.

[0060] Preferably, the sixth resistor and the seventh resistor Used when the first input signal When the input is applied to the non-inverting input of the third operational amplifier OP3, an inverting input voltage is generated at the inverting input of the error amplifier EA. ;

[0061] Third resistor and the fourth resistor Used to proportionally adjust the second input signal Voltage divider, and the voltage-divided second input signal With absolute voltage The operation generates feedback voltage ;

[0062] Feedback voltage This is the non-inverting input voltage of the error amplifier EA;

[0063] Error amplifier EA is based on inverting input voltage and feedback voltage Output error signal voltage To the non-inverting input of the second operational amplifier OP2.

[0064] Preferably, the second operational amplifier OP2 is used to provide or extract current at the output terminal to adjust the output voltage. .

[0065] Preferably, the current flows through the load resistor The current is the charge pump load current. ;

[0066] When the charge pump load current When the value is zero and the charge pump closed-loop modulation circuit enters steady state, the value of the feedback voltage is equal to the value of the inverting input voltage, which can be expressed as: At this time, the voltage output by the error amplifier EA is the common-mode voltage. The second operational amplifier OP2 neither supplies nor draws current, therefore negative power supply This is the expected value.

[0067] Preferably, when the charge pump load current When increased, the second input signal Absolute value of voltage Reduce, feedback voltage Increase and make the error signal voltage Increase, when the error signal voltage When the voltage increases, the output current of the second operational amplifier OP2 causes the output voltage to rise. Increase and output signal Increase compensation due to charge pump load current The voltage loss increases when the charge pump load current increases. After reaching steady state, the second input signal Restored to the expected value;

[0068] The charge pump module is used to stabilize the second input signal by avoiding repeated start-stop or changes in the charge pump switching frequency during the overall closed-loop modulation process. Voltage; when the charge pump load current When the signal decreases, the second input signal Absolute value of voltage The increase is compensated by the closed-loop modulation circuit due to the charge pump load current. After the voltage drops and excess voltage reaches a steady state, the second input signal... The value is restored to the expected value, completing the closed-loop feedback.

[0069] Preferred, such as Figure 2, Figure 3 and Figure 9 As shown, the charge pump module includes an oscillator circuit OSC, and the first terminal of the oscillator circuit OSC is connected to a first switch. Second switch First end, second switch The first terminal is grounded, the first switch The second end is connected to the first flying capacitor. First end, second switch The second end is connected to the first flying capacitor. The second terminal, the first flying capacitor The first end is connected to the fifth switch. The first end, the fifth switch The second terminal is grounded, and the first flying capacitor The second end is connected to the sixth switch. The first end, the sixth switch The second end is connected to the second input signal First switch The first terminal is connected to the positive power supply filter capacitor. ;

[0070] Second capacitor The first end is connected to the seventh switch. The first terminal and the output signal The seventh switch The second end is connected to the third switch First end, third switch The second terminal is grounded, and the second flying capacitor The second end is connected to the eighth switch. The first end, the eighth switch The first terminal is grounded, the eighth switch The second end is connected to the fourth switch The first end, the fourth switch The second end is connected to the second input signal The first terminal of the oscillator circuit OSC is the second terminal of the charge pump module, the second terminal of the charge pump module is connected to the fifth terminal of the charge pump module, the second terminal of the oscillator circuit OSC is the third terminal of the charge pump module, and the third terminal of the charge pump module is connected to the fourth terminal of the charge pump module.

[0071] The input to the low-ripple negative voltage charge pump circuit is a positive power supply voltage. The output of the low-ripple negative voltage charge pump circuit is a negative power supply. .

[0072] Preferably, when the first terminal of the oscillator circuit OSC is connected to a high level... Furthermore, the second terminal of the oscillator circuit OSC is connected to a low level. At that time, the first switch Second switch Third switch and the fourth switch Close, fifth switch Sixth switch Seventh Switch and the eighth switch Turn off, at this time, the first flying capacitor During the charging phase, the second non-capacitor During the discharge phase, the voltage is negative. Provide the required charge.

[0073] Preferably, when the first terminal of the oscillator circuit OSC is connected to a low level... Furthermore, the second terminal of the oscillator circuit OSC is connected to a high level. At that time, the first switch Second switch Third switch and the fourth switch Off, fifth switch Sixth switch Seventh Switch and the eighth switch Closed, at this time, the first flying capacitor During the discharge phase, the second non-capacitor During the charging phase, the power supply voltage is negative. Provide the required charge; the first and second terminals of the oscillator circuit OSC are alternately connected to a high or low level.

[0074] The working principle of the charge pump closed-loop modulation circuit is:

[0075] The input signal of OP1 is The output signal is At this point, the proportional resistor is the first resistor. Second resistor First input signal To set the voltage, this setting voltage can be generated by the chip's internal reference circuitry, DAC, or an external voltage source; For the expected negative voltage power supply The absolute value, by setting The voltage can be set to the desired negative voltage power supply. As shown in equation (2-1)

[0076]

[0077] by As a reference, through the proportional resistor and Sampling is performed to obtain the loop feedback voltage. As the non-inverting input of the error amplifier, it is shown in equation (2-2).

[0078]

[0079] OP3 input signal is The output signal is The proportional resistor is and ; For the inverting input of the error amplifier, we can obtain the following from equation (2-3):

[0080]

[0081] When the loop reaches steady state, = , = By combining equations (2-1), (2-2), and (2-3), we can obtain...

[0082]

[0083] Design resistor , Equation (2-4) must be satisfied, and the reasonableness of the voltage and power consumption current of each node must be considered. In the preferred embodiment, To reduce the power consumption of the OP1 output node, and at the same time design This allows for the use of smaller To set the negative power supply In the embodiments, it is expected that Then set That's all; it can be done. and Will Set to positive or negative voltage.

[0084] In this embodiment, it is preferred For positive voltage, design To reduce right Power consumption, while design ,avoid If the voltage is too low, exceeding the input voltage range of the differential pair of the error amplifier EA, in steady state... Complete the resistor After design, the result can be obtained according to equation (2-4). and The preferred ratio in the embodiments is... To reduce OP3 power consumption, while designing The reference voltage of the error amplifier is equal to the feedback voltage in steady state, that is... .

[0085] When the charge pump load changes, the negative power supply voltage The corresponding changes occur, at this time Change, change the output of the error amplifier ; The non-inverting input of OP2 is The inverting input is the common-mode voltage. ;

[0086] When the load current increases Decrease Increase the risk of deviating from steady state , Increase This causes OP2 to output current to the outside. A pressure drop occurs on top. and Superimposed And increase the positive power supply of the charge pump through follower OP4. Thus increase This restores the negative power supply voltage to the expected value;

[0087] Similarly, when the load current decreases, OP2 draws current from the output node. Reduce and lower the positive power supply of the charge pump via follower OP4. Thus reducing This restores the negative power supply voltage to the expected value;

[0088] design To obtain a wider input range, in this example VCCL=5V, that is... The OP2 output current range is designed to be ±100uA. , can be obtained This means the loop can dynamically compensate for ±2.5V negative power supply caused by load changes. The changes; in the design, VCCH must be greater than the maximum power supply of the subsystem, with a certain margin. The maximum power supply of the subsystem is... In this embodiment, the VCCH is designed to be 15V.

[0089] The low-ripple negative voltage charge pump consists of an oscillator OSC and a switch. Positive power supply filter capacitor Negative power supply filter capacitor Flying capacitor , Load resistance composition;

[0090] The working principle of the charge pump closed-loop modulation circuit is explained in detail below:

[0091] Assume the charge pump switching frequency is The switching cycle is , ,switch The average on-resistance is The average input current is The average load current is . The duty cycle during the charging phase is The average charging current is The duty cycle during the discharge phase is The average discharge current is ,but Average charge during a charging cycle capacitor voltage Average charge during the discharge cycle capacitor voltage As shown in equation (2-5)

[0092]

[0093] In steady state, the total change in charge per cycle of the charge pump is zero. Assuming a duty cycle of D = 0.5 during the charging phase, the average load current is defined as the change in charge on the capacitor per cycle divided by the cycle time. Since there are two flying capacitors... , Since the load is alternately charged, twice the change in charge needs to be calculated when defining the average load current. Substituting this into equation (2-5) and simplifying, we can obtain...

[0094]

[0095] Equations (2-7) represent the large-signal model of the low-ripple negative-voltage charge pump designed in this invention; Equations (1-5) represent the large-signal model of a traditional negative-voltage charge pump. A comparison shows that the low-ripple negative-voltage charge pump designed in this invention is affected by the load current... The impact is relatively small and can be compensated for by the aforementioned closed-loop control. The impact caused;

[0096]

[0097]

[0098] analyze Output ripple is considered because a flying capacitor supplies charge to the output at every moment. Therefore, the contribution of the flying capacitor to the output node must be taken into account. Let the output current of the flying capacitor be... The voltage across the flying capacitor is The equations for the nodal currents of the output column can be obtained.

[0099]

[0100] Simplifying and solving equation (2-8) yields...

[0101]

[0102]

[0103] In equations (2-9) and (2-10), C is a constant term generated by the integrator circuit; within a single cycle from 0 to T, time, Start supplying charge to the output, at this time It is in the charging stage, and the charging current has reached its maximum value; time, The charge supply is about to end, and at the same time It is in the discharge phase, and the discharge current has reached its maximum value; therefore time, The current crosses zero, meaning there is no current from... There is no charge replenishment and no charge output at this time. Similarly time The current will also cross zero; Substituting the particular solution into equation (2-10) and simplifying, we get:

[0104]

[0105] Substituting equation (2-11) into equation (2-8), we get:

[0106]

[0107] Equation (2-13) represents the output ripple of the low-ripple negative voltage charge pump designed in this invention; Equation (1-6) represents the output ripple of a conventional negative voltage charge pump. A comparison shows that the low-ripple negative voltage charge pump designed in this invention has two flying capacitors that alternately supply power; therefore, in the ripple formula... The contribution factor is reduced to half that of a traditional charge pump, and the switching impedance is also reduced. The contribution will further reduce the output ripple;

[0108]

[0109]

[0110] Pick , , , For example, substituting into equation (2-13) yields... Compared with traditional charge pumps This significantly reduces output ripple.

[0111] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A low-ripple closed-loop negative voltage charge pump circuit, characterized in that, include: A charge pump closed-loop modulation circuit is provided, the output of which is connected to a low-ripple negative voltage charge pump circuit. The low-ripple negative voltage charge pump circuit receives a positive power supply voltage input and outputs a negative power supply voltage. The charge pump closed-loop modulation circuit includes a first operational amplifier OP1, the non-inverting input of which is connected to a first input signal. The non-inverting input of the third operational amplifier OP3 and the inverting input of the first operational amplifier OP1 are connected to the first resistor. The second terminal and the second resistor The first terminal, the first resistor The first terminal is connected to the output terminal of the first operational amplifier OP1 and the third resistor. The first terminal and the fifth resistor The second terminal, the third resistor The second end is connected to the fourth resistor The first terminal, the inverting input terminal of the third operational amplifier OP3, is connected to the output terminal of the third operational amplifier OP3 and the sixth resistor. The second terminal, the sixth resistor The first end is connected to the seventh resistor. The second terminal is connected to the inverting input terminal of the error amplifier EA, and the non-inverting input terminal of the error amplifier EA is connected to the feedback voltage. The output of error amplifier EA is connected to the non-inverting input of the second operational amplifier OP2, and the inverting input of the second operational amplifier OP2 is connected to a common-mode voltage. The seventh resistor The first terminal is grounded, and the output terminal of the second operational amplifier OP2 is connected to the fifth resistor. The first terminal is connected to the non-inverting input terminal of voltage follower OP4, and the non-inverting input terminal of voltage follower OP4 is connected to the fourth voltage. The inverting input of voltage follower OP4 is shorted to its output to form the first negative feedback structure. The output of voltage follower OP4 is connected to the positive power supply filter capacitor. At the first end, the first negative feedback structure is used for the output signal Provide current and enable the output signal Follow the fourth voltage The fourth resistor changes with the change. The second end is connected to the sixth end of the charge pump module; The low-ripple negative voltage charge pump circuit includes a charge pump module, the first end of which is connected to a positive power supply filter capacitor. The first terminal and the output terminal of the charge pump closed-loop modulation circuit are connected. The charge pump module outputs the output signal through the first terminal. Positive power supply filter capacitor The second terminal is grounded, and the second terminal of the charge pump module is connected to the first flying capacitor. The first terminal, the first flying capacitor The second terminal is connected to the third terminal of the charge pump module, and the fourth terminal of the charge pump module is connected to the second flying capacitor. The first terminal, the second flying capacitor The second terminal is connected to the fifth terminal of the charge pump module, and the sixth terminal of the charge pump module is connected to the charge pump closed-loop modulation circuit and the negative power supply filter capacitor. With load resistance First terminal, second input signal Negative power supply filter capacitor The second end is connected to the load resistor. The second terminal, load resistor The second terminal is grounded, wherein the second input signal It is the expected negative power supply voltage; First flying capacitor Second Flying Capacitor The output of the low-ripple negative voltage charge pump circuit is alternately charged to reduce output ripple.

2. The low-ripple closed-loop negative voltage charge pump circuit according to claim 1, characterized in that: The first resistor Second resistor The sixth resistor The seventh resistor Third resistor Fourth resistor All are proportional resistors; The first resistor Second resistor Used when the first input signal When the input is applied to the non-inverting input terminal of the first operational amplifier OP1, an absolute voltage is generated at the output terminal of the first operational amplifier OP1. ; Absolute voltage The voltage value is the absolute value of the expected negative power supply voltage.

3. The low-ripple closed-loop negative voltage charge pump circuit according to claim 2, characterized in that: The sixth resistor and the seventh resistor Used when the first input signal When the input is applied to the non-inverting input of the third operational amplifier OP3, an inverting input voltage is generated at the inverting input of the error amplifier EA. ; The third resistor and the fourth resistor Used to proportionally adjust the second input signal Voltage divider, and the voltage-divided second input signal With absolute voltage The operation generates feedback voltage ; Feedback voltage This is the non-inverting input voltage of the error amplifier EA; The error amplifier EA is based on the inverting input voltage. and feedback voltage Output error signal voltage To the non-inverting input of the second operational amplifier OP2.

4. The low-ripple closed-loop negative voltage charge pump circuit according to claim 3, characterized in that: The second operational amplifier OP2 is used to provide or extract current at the output terminal to adjust the output voltage. .

5. The low-ripple closed-loop negative voltage charge pump circuit according to claim 4, characterized in that: Flow through load resistor The current is the charge pump load current. ; When the charge pump load current When the voltage is zero and the charge pump closed-loop modulation circuit enters steady state, the feedback voltage is equal to the inverting input voltage. At this time, the voltage output by the error amplifier EA is the common-mode voltage. .

6. The low-ripple closed-loop negative voltage charge pump circuit according to claim 5, characterized in that: When the charge pump load current When increased, the second input signal Absolute value of voltage Reduce, feedback voltage Increase and make the error signal voltage Increase, when the error signal voltage When the voltage increases, the output current of the second operational amplifier OP2 causes the output voltage to rise. Increase and output signal Increase compensation due to charge pump load current The voltage loss increases when the charge pump load current increases. After reaching steady state, the second input signal Restored to the expected value; The charge pump module is used to stabilize the second input signal by avoiding repeated start-stop or changes in the charge pump switching frequency during the overall closed-loop modulation process. Voltage; When the charge pump load current When the signal decreases, the second input signal Absolute value of voltage The increase is compensated by the closed-loop modulation circuit due to the charge pump load current. After the voltage drops and excess voltage reaches a steady state, the second input signal... The value is restored to the expected value, completing the closed-loop feedback.

7. The low-ripple closed-loop negative voltage charge pump circuit according to claim 6, characterized in that: The charge pump module includes an oscillator circuit OSC, the first terminal of which is connected to a first switch. Second switch First end, second switch The first terminal is grounded, the first switch The second end is connected to the first flying capacitor. First end, second switch The second end is connected to the first flying capacitor. The second terminal, the first flying capacitor The first end is connected to the fifth switch. The first end, the fifth switch The second terminal is grounded, and the first flying capacitor The second end is connected to the sixth switch. The first end, the sixth switch The second end is connected to the second input signal. First switch The first terminal is connected to the positive power supply filter capacitor. ; Second capacitor The first end is connected to the seventh switch. The first terminal and the output signal The seventh switch The second end is connected to the third switch First end, third switch The second terminal is grounded, and the second flying capacitor The second end is connected to the eighth switch. The first end, the eighth switch The first terminal is grounded, the eighth switch The second end is connected to the fourth switch The first end, the fourth switch The second end is connected to the second input signal. .

8. The low-ripple closed-loop negative voltage charge pump circuit according to claim 7, characterized in that: When the first terminal of the oscillator circuit OSC is connected to a high level Furthermore, the second terminal of the oscillator circuit OSC is connected to a low level. At that time, the first switch Second switch Third switch and the fourth switch Close, fifth switch Sixth Switch Seventh Switch and the eighth switch Turn off, at this time, the first flying capacitor During the charging phase, the second non-capacitor During the discharge phase, the voltage is negative. Provide the required charge.

9. The low-ripple closed-loop negative voltage charge pump circuit according to claim 8, characterized in that: When the first terminal of the oscillator circuit OSC is connected to a low level Furthermore, the second terminal of the oscillator circuit OSC is connected to a high level. At that time, the first switch Second switch Third switch and the fourth switch Off, fifth switch Sixth Switch Seventh Switch and the eighth switch Closed, at this time, the first flying capacitor During the discharge phase, the second non-capacitor During the charging phase, the power supply voltage is negative. Provide the required charge; the first and second terminals of the oscillator circuit OSC are alternately connected to a high or low level.

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