Current balance driving control device and method for duplex-winding redundant motor

Abstract

The invention relates to a current balance driving control device for a duplex-winding redundant motor. The current balance driving control device comprises a switching unit, a processor A, a processor B, a driving module A, a driving module B, a winding A and a winding B, the switching unit switches PWM instructions from the processor A and the processor B and sends the PWM instructions to the driving module A and the driving module B for working; the switching unit is responsible for communication of fault indication in a channel between the processor A and the processor B, and switching between a one-control-two mode and a one-control-one mode is carried out according to the communication. The invention further discloses a current balance driving control method of the duplex-winding redundant motor, current balance of the duplex-winding redundant motor can be achieved, and extra loss and efficiency reduction caused by local overheating are avoided. The double-winding motor is driven during normal work, and the effect of current balanced distribution is achieved; when the driving module is abnormal, additional safety is provided. Extra complex algorithms are not needed, and long-term reliable work is achieved.

Description

Technical Field

[0001] This invention relates to the field of motor drive control, and specifically to a current balancing drive control device and method for a dual-winding redundant motor. Background Technology

[0002] Dual-winding redundant motors offer advantages such as small size and high reliability, and feature both full-power and half-power operating modes. Since the two windings can serve as backups for each other, they provide additional safety redundancy when used appropriately. For the drive control device of a dual-winding redundant motor, the main failure modes include winding or driver failure and processor circuit failure. By designing a reasonable redundancy scheme, the possibility of the control device being affected by failures can be effectively reduced.

[0003] The patent with patent number CN104850036A proposes a dual-redundant electric servo control system and method. This invention achieves fault isolation and channel selection switching by utilizing a rotating wheel system. However, this patent uses two sets of motors to achieve dual redundancy, but it does not actually involve a dual-winding redundant motor.

[0004] The patent with patent number CN105207542A proposes a redundant control system and control method for a dual-winding brushless DC motor. It uses a dual-winding brushless DC motor to realize a redundant control system, but it only involves the case where a single set of windings works alone. It does not involve the technology of two sets of windings working simultaneously and current balancing, and fails to effectively utilize the half-power working mode of the dual-winding motor.

[0005] The patent with patent number CN103279128A proposes a sliding control method and drive device for a dual-redundant brushless DC motor electric servo. It adopts a sliding control method to balance the current of the two sets of windings of the motor and solve the force conflict problem. However, it does not involve fault isolation, and the controller does not involve redundant design, which is not conducive to the safety of practical applications. The algorithm is also relatively complex. Summary of the Invention

[0006] The purpose of this invention is to provide a current balancing drive control device and method for a dual-winding redundant motor. During normal operation, it drives the dual-winding motor to achieve balanced current distribution, resulting in even heat distribution across the windings, reducing localized overheating, lowering additional losses, and fully utilizing the half-power operating mode of the dual-winding redundant motor for better efficiency. In case of a drive module malfunction, it can switch to the full-power operating mode of the dual-winding redundant motor, providing additional safety. No complex algorithms are required, ensuring long-term reliable operation.

[0007] To achieve the above objectives, the present invention provides the following technical solution:

[0008] A dual-winding redundant motor current balancing drive control device includes: a switching unit, processor A, processor B, drive module A, drive module B, winding A, and winding B;

[0009] Processor A and Processor B are connected to the switching unit and exchange fault indications within the channel;

[0010] Processor A sends PWM instruction A to the switching unit, and processor B sends PWM instruction B to the switching unit;

[0011] The switching unit sends a switching PWM command A to the drive module A, and the switching unit sends a switching PWM command B to the drive module B.

[0012] Driver module A feeds back current measurement signal A and drive fault indication A to processor A, and driver module B sends current measurement signal B and drive fault indication B to processor B;

[0013] Drive module A is connected to winding A, and drive module B is connected to winding B.

[0014] The present invention also provides a current balancing drive control method for a dual-winding redundant motor based on the device described herein, comprising the following sequential steps:

[0015] In the first step, processor A and processor B respectively measure the current measurement signals from driver module A and driver module B, and processor A and processor B respectively implement the current loop closed-loop control algorithm;

[0016] In the second step, correspondingly, processor A and processor B respectively detect whether a fault has occurred from driver module A and driver module B.

[0017] The third step is for processor A and processor B to perform periodic self-tests. One processor is selected from those that have never failed, and its output PWM instructions are used to control drive module A and drive module B in the future.

[0018] The fourth step is to implement either a one-to-two current balancing mode or a one-to-one safety redundancy mode, depending on the situation:

[0019] If neither drive module A nor drive module B fails, the selected processor that has not failed will use its output PWM instruction to implement closed-loop control for drive module A or drive module B that is directly connected to the selected processor; the other drive module, namely drive module B or drive module A, receives the same PWM instruction and follows it. At this time, it is a current-balanced one-to-two control mode.

[0020] If at least one driver module fails, control of the failed driver module A or driver module B is stopped. In this case, if only one driver module does not fail and the processor directly connected to that driver module also does not fail, this is a safe and redundant one-to-one control mode.

[0021] Preferably, processor A and processor B are ARM processors.

[0022] The in-channel fault indicators of processor A and processor B are used to indicate the processor fault status and the driver fault status.

[0023] Processor fault states include two types: normal and fault; driver fault states also include two types: normal and fault.

[0024] Preferably, the switching unit uses an FPGA to receive fault indications within the channel from processor A and processor B respectively, and forwards them to processor B and processor A respectively.

[0025] The switching unit receives PWM instruction A from processor A and PWM instruction B from processor B, respectively, and identifies in-channel fault indications from processor A and processor B, respectively. Depending on the specific circumstances, it sends switching PWM instruction A to driver module A and switching PWM instruction B to driver module B.

[0026] The switching unit operates according to the specific circumstances of the identified processor fault state as follows:

[0027] The switching unit identifies a normal state of processor fault status from processor A or processor B, and accordingly selects PWM instruction A from processor A or PWM instruction B from processor B, with the selection result being one of the two.

[0028] The switching unit operates according to the specific circumstances of the identified driver fault state as follows:

[0029] The switching unit recognizes that the driver fault states from processor A and processor B are both normal, copies the result selected from PWM instruction A and PWM instruction B, and outputs them as switching PWM instruction A and switching PWM instruction B.

[0030] The switching unit identifies a fault condition from processor A or processor B, and accordingly stops outputting switching PWM instruction A or switching PWM instruction B.

[0031] Compared with existing technologies, the advantages of this invention are: during normal operation, it drives a dual-winding motor to achieve balanced current distribution, resulting in even heat distribution in the windings, reducing local overheating, lowering additional losses, and fully utilizing the half-power operating mode of the dual-winding redundant motor for better efficiency; in case of a drive module malfunction, it can switch to the full-power operating mode of the dual-winding redundant motor, providing additional safety. No additional complex algorithms are required, ensuring long-term reliable operation. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the structure of the dual-winding redundant motor current balancing drive control device disclosed in this invention.

[0033] Figure 2 This is a flowchart of the current balancing drive control method for a dual-winding redundant motor disclosed in this invention.

[0034] Figure 3 This is a schematic diagram of the composition of drive module A or drive module B in one embodiment of the present invention.

[0035] Explanation of reference numerals in the attached diagram: 1. Adapter unit; 2. Processor A; 3. Processor B; 4. Drive module A; 5. Drive module B; 6. Winding A; 7. Winding B. Detailed Implementation

[0036] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. The described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0037] Please see Figure 1 In an embodiment of the present invention, a dual-winding redundant motor current balancing drive control device includes: a switching unit 1, a processor A2, a processor B3, a drive module A4, a drive module B5, a winding A6, and a winding B7.

[0038] Processors A2 and B3 are connected to adapter unit 1 and exchange fault indications within the channel;

[0039] Processor A2 sends PWM instruction A to adapter unit 1, and processor B3 sends PWM instruction B to adapter unit 1;

[0040] The adapter unit 1 sends an adapter PWM command A to the drive module A4, and the adapter unit 1 sends an adapter PWM command B to the drive module B5;

[0041] Drive module A4 feeds back current measurement signal A and drive fault indication A to processor A2, and drive module B5 sends current measurement signal B and drive fault indication B to processor B3;

[0042] Drive module A4 is connected to winding A6, and drive module B5 is connected to winding B7.

[0043] Please see Figure 2 Based on the device described in this invention, a current balancing drive control method for a dual-winding redundant motor includes the following steps:

[0044] In the first step, processors A2 and B3 respectively measure the current measurement signals from drive module A4 and drive module B5, and processors A2 and B3 respectively implement the current loop closed-loop control algorithm.

[0045] In the second step, correspondingly, processor A2 and processor B3 respectively detect whether a fault has occurred from driver module A4 and driver module B5;

[0046] The third step involves processors A2 and B3 performing periodic self-tests, selecting one processor from those that have never failed, and using its output PWM instructions to subsequently control drive modules A4 and B5.

[0047] The fourth step is to implement either a one-to-two current balancing mode or a one-to-one safety redundancy mode, depending on the situation:

[0048] If neither drive module A4 nor drive module B5 fails, the selected processor that has not failed will use its output PWM instruction to implement closed-loop control for drive module A4 or drive module B5 that is directly connected to the selected processor; the other drive module, namely drive module B5 or drive module A4, receives the same PWM instruction and follows it. At this time, it is a current-balanced one-to-two control mode.

[0049] If at least one driver module fails, control of the failed driver module A4 or driver module B5 is stopped. In this case, if only one driver module does not fail and the processor directly connected to that driver module also does not fail, this is a safe and redundant one-to-one control mode.

[0050] Please see Figure 3In one embodiment of the present invention, the drive module A4 or drive module B5 comprises: a front-end drive stage chip DRV8304 and a three-phase two-level inverter; the drive module A4 or drive module B5 feeds back a current measurement signal A or a current measurement signal B to the processor A2 or processor B3 through the analog voltage output of the front-end drive stage chip DRV8304; the drive module A4 or drive module B5 feeds back a drive fault indication A or a drive fault indication B to the processor A2 or processor B3 through the SPI communication line of the front-end drive stage chip DRV8304.

[0051] In one embodiment of the present invention, processor A2 and processor B3 are ARM processors; the in-channel fault indication of processor A2 and processor B3 is implemented using the high and low levels of two GPIO output pins from processor A2 and processor B3 respectively, to indicate the processor fault state and the driver fault state.

[0052] Processor fault states include two types: normal and fault; driver fault states also include two types: normal and fault.

[0053] In one embodiment of the present invention, the switching unit 1 is an FPGA, which receives in-channel fault indications from processor A2 and processor B3 respectively, and forwards them to processor B3 and processor A2 respectively; and uses GPIO input pins from processor A2 and processor B3 respectively to receive in-channel fault indications from the FPGA.

[0054] The switching unit 1 receives PWM instruction A from processor A2 and PWM instruction B from processor B3, respectively, and identifies in-channel fault indications from processor A2 and processor B3, respectively. Depending on the specific situation, it sends switching PWM instruction A to drive module A4 and switching PWM instruction B to drive module B5.

[0055] In one embodiment of the present invention, the switching unit 1 operates according to the specific circumstances of the identified processor fault state as follows:

[0056] When the switching unit 1 identifies a normal state of processor fault status from processor A2 or processor B3, it selects PWM instruction A from processor A2 or PWM instruction B from processor B3 accordingly. The selection result can be either one or the other based on the preset priority.

[0057] The switching unit 1 operates according to the specific circumstances of the identified driver fault state as follows:

[0058] The switching unit 1 recognizes that the driver fault states from processor A2 and processor B3 are both normal. It copies the result selected from PWM instruction A and PWM instruction B and outputs it as switching PWM instruction A and switching PWM instruction B.

[0059] When the switching unit 1 detects a driver fault state from processor A2 or processor B3, it stops outputting the switching PWM instruction A or switching PWM instruction B accordingly.

[0060] In one embodiment of the present invention, one of the ARM processors selected from processor A2 or processor B3 whose processor fault state is normal obtains the driver fault state from another ARM processor through the function of the switching unit 1, and implements either a one-to-two current balancing mode or a one-to-one safety redundancy mode depending on the situation:

[0061] If the fault state of the driver from another ARM processor is normal, the current loop control is implemented through the PID algorithm, so that the dual-winding redundant motor works in half-power mode. At this time, it is a one-control-two mode with current balance.

[0062] If the driver from another ARM processor is in a fault state, the current loop control is implemented through the PID algorithm to make the dual-winding redundant motor work in full-power mode. At this time, it is a safe and redundant one-to-one control mode.

[0063] Finally, it should be noted that the present invention is not limited to the above embodiments. Based on the technical solutions disclosed in the present invention, those skilled in the art can make some simple modifications, equivalent changes and alterations to some of the technical features without creative effort, all of which fall within the scope of the technical solutions of the present invention.

Claims

1. A current-balanced drive control device for a dual-winding redundant motor, characterized in that, It includes a transition unit (1), processor A (2), processor B (3), drive module A (4), drive module B (5), winding A (6), and winding B (7); Processor A (2) and processor B (3) are connected to the switching unit (1) and exchange fault indications within the channel; Processor A (2) sends PWM instruction A to the switching unit (1), and processor B (3) sends PWM instruction B to the switching unit (1); The switching unit (1) sends a switching PWM instruction A to the drive module A (4), and the switching unit (1) sends a switching PWM instruction B to the drive module B (5); Drive module A (4) feeds back current measurement signal A and drive fault indication A to processor A (2), and drive module B (5) sends current measurement signal B and drive fault indication B to processor B (3); Drive module A (4) is connected to winding A (6), and drive module B (5) is connected to winding B (7).

2. A current-balanced drive control method for a dual-winding redundant motor based on the device of claim 1, the method comprising the following sequential steps: In the first step, processor A(2) and processor B(3) respectively measure the current measurement signals from drive module A(4) and drive module B(5), and implement the current loop closed-loop control algorithm by processor A(2) and processor B(3) respectively. In the second step, correspondingly, processor A(2) and processor B(3) obtain indications of whether a fault has occurred from driver module A(4) and driver module B(5), respectively; The third step is that processor A (2) and processor B (3) perform periodic self-tests respectively, select one processor from the processors that have never failed, and use its output PWM instructions to control drive module A (4) and drive module B (5) in the future. The fourth step is to implement either a one-to-two current balancing mode or a one-to-one safety redundancy mode, depending on the situation: If neither drive module A (4) nor drive module B (5) fails, the selected processor that has not failed will use its output PWM instruction to implement closed-loop control for drive module A (4) or drive module B (5) that is directly connected to the selected processor; the other drive module, namely drive module B (5) or drive module A (4), receives the same PWM instruction and follows it. At this time, it is a current-balanced one-to-two control mode. If at least one driver module fails, control of the failed driver module A(4) or driver module B(5) is stopped. In this case, if only one driver module does not fail and the processor directly connected to that driver module does not fail, it is a safe and redundant one-to-one control mode.

3. The dual-winding redundant motor current balancing drive control device as described in claim 1, characterized in that, The in-channel fault indicators of processor A (2) and processor B (3) are used to indicate the processor fault status and the driver fault status; Processor fault states include two types: normal and fault; driver fault states also include two types: normal and fault. The switching unit (1) receives fault indications in the channel from processor A (2) and processor B (3) respectively, and forwards them to processor B (3) and processor A (2) respectively.

4. The dual-winding redundant motor current balancing drive control device as described in claim 1, characterized in that, The switching unit (1) receives PWM instruction A from processor A (2) and PWM instruction B from processor B (3) respectively, and identifies channel fault indications from processor A (2) and processor B (3) respectively. It then sends switching PWM instruction A to drive module A (4) and switching PWM instruction B to drive module B (5) according to the specific circumstances.

5. The dual-winding redundant motor current balancing drive control device as described in claim 4, characterized in that, The switching unit (1) operates according to the specific circumstances of the identified processor fault state as follows: The switching unit (1) identifies a normal state of processor fault status from processor A (2) or processor B (3), and accordingly selects PWM instruction A from processor A (2) or PWM instruction B from processor B (3), with the selection result being one of the two.

6. The dual-winding redundant motor current balancing drive control device as described in claim 4, characterized in that, The switching unit (1) operates according to the specific circumstances of the identified driver fault state as follows: The switching unit (1) recognizes that the driver fault states from processor A (2) and processor B (3) are both normal. It copies the result selected from PWM instruction A and PWM instruction B and outputs it as switching PWM instruction A and switching PWM instruction B. The switching unit (1) identifies a fault condition of a driver fault state from processor A (2) or processor B (3), and accordingly stops outputting switching PWM instruction A or switching PWM instruction B.

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