Multilayer ceramic capacitor

Abstract

The laminated ceramic capacitor includes: a laminated body including an active portion, a dielectric layer, and an internal electrode layer laminated together; and a first covering part and a second covering part which are respectively arranged at two ends of the active part in the lamination direction. The laminated body is provided with a first surface, a second surface, a first end surface, a second end surface, a first side surface and a second side surface; and an external electrode. The first coated portion includes a first dummy electrode and a second dummy electrode, and the second coated portion includes a third dummy electrode and a fourth dummy electrode. The first dummy electrode and the third dummy electrode are exposed at the first end surface, the second dummy electrode and the fourth dummy electrode are exposed at the second end surface, and at least one of the first to fourth dummy electrodes is thicker than the internal electrode layer.

Description

Technical Field

[0001] This disclosure relates to multilayer ceramic capacitors. Background Technology

[0002] For example, patent document 1 describes the prior art of stacked ceramic capacitors.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2014-212298 Summary of the Invention

[0006] The multilayer ceramic capacitor disclosed herein includes: A generally rectangular parallelepiped-shaped laminate includes: an active portion, a dielectric layer and an internal electrode layer stacked alternately; and a first covered portion and a second covered portion, respectively located at both ends of the active portion in the stacking direction of the dielectric layer and the internal electrode layer; the laminate has a first face and a second face facing each other in the stacking direction, a first end face and a second end face facing each other, and a first side face and a second side face facing each other. A first external electrode is disposed from the first end face onto the first surface and the second surface; and A second external electrode is disposed from the second end face onto the first face and the second face; The first external electrode and the second external electrode are connected to different internal electrode layers of the internal electrode layer. The first coated portion has: a first dielectric portion; and a first virtual electrode and a second virtual electrode, respectively located at both ends of the first dielectric portion in a first direction orthogonal to the first end face; The second coating portion has: a second dielectric portion; and a third dummy electrode and a fourth dummy electrode, respectively located at both ends of the second dielectric portion in the first direction; The first virtual electrode and the third virtual electrode are exposed on the first end face, and the second virtual electrode and the fourth virtual electrode are exposed on the second end face. At least one of the first virtual electrode, the second virtual electrode, the third virtual electrode, and the fourth virtual electrode is thicker than the inner electrode layer. Attached Figure Description

[0007] The purpose, features, and advantages of this disclosure become more apparent from the following detailed description and accompanying drawings.

[0008] Figure 1 This is a perspective view showing the multilayer ceramic capacitor of this embodiment.

[0009] Figure 2 It means Figure 1 A three-dimensional view of the stacked ceramic capacitor.

[0010] Figure 3 From Figure 1 The sectional view observed from the cut surface line III-III.

[0011] Figure 4 From Figure 3 A sectional view taken when observing the cut surface IV-IV.

[0012] Figure 5 This is a cross-sectional view showing the multilayer ceramic capacitor of this embodiment.

[0013] Figure 6 This is a cross-sectional view showing another example of a multilayer ceramic capacitor according to this embodiment.

[0014] Figure 7 This is a cross-sectional view showing another example of a multilayer ceramic capacitor according to this embodiment.

[0015] Figure 8 This is a cross-sectional view showing another example of a multilayer ceramic capacitor according to this embodiment.

[0016] Figure 9 This is a three-dimensional diagram illustrating an example of the manufacturing process of a master laminate.

[0017] Figure 10 This is a three-dimensional diagram representing an example of a parent laminate.

[0018] Figure 11 This is a perspective view showing an example of a laminate obtained by cutting the parent laminate.

[0019] Figure 12 This is a perspective view illustrating another example of the manufacturing process of a master laminate.

[0020] Figure 13 This is a three-dimensional diagram representing another example of a parent laminate.

[0021] Figure 14 This is a perspective view showing another example of a laminate obtained by cutting the parent laminate.

[0022] Figure 15 This is a perspective view showing another embodiment of a multilayer ceramic capacitor.

[0023] Figure 16 It means Figure 15 A three-dimensional view of the stacked ceramic capacitor.

[0024] Figure 17 From Figure 15 A sectional view taken when observing the cut surface lines XVII-XVII.

[0025] Figure 18A From Figure 17 A cross-sectional view taken when observing the cut surface XVIIIA-XVIIIA.

[0026] Figure 18B From Figure 17 A sectional view taken when observing the cut surface line XVIIIB-XVIIIB.

[0027] Figure 19 This is a perspective view of a multilayer ceramic capacitor according to yet another embodiment.

[0028] Figure 20 It means Figure 19 A three-dimensional view of the stacked ceramic capacitor.

[0029] Figure 21 From Figure 19 A sectional view taken when observing the cut surface line XII-XXI.

[0030] Figure 22A From Figure 21 A sectional view taken when observing the cut surface line XIIA-XXIIA.

[0031] Figure 22B From Figure 21 A sectional view taken when observing the cut surface line XIIIB-XXIIB.

[0032] Figure 23 This is a perspective view of a multilayer ceramic capacitor according to yet another embodiment.

[0033] Figure 24 It means Figure 23 A three-dimensional view of the stacked ceramic capacitor.

[0034] Figure 25 From Figure 23 A cross-sectional view taken at XXV-XXV along the cut surface.

[0035] Figure 26A From Figure 25 A sectional view taken when observing the cut surface line XXVIA-XXVIA.

[0036] Figure 26B From Figure 25 A sectional view taken when observing the cut surface line XXVIB-XXVIB.

[0037] Figure 26C From Figure 25 A sectional view taken when observing the cut surface line XXVIC-XXVIC.

[0038] Figure 26D From Figure 25 A sectional view taken when observing the cut surface line XXVID-XXVID.

[0039] Figure 27 This is a cross-sectional view showing another embodiment of a multilayer ceramic capacitor.

[0040] Figure 28 This is a cross-sectional view showing another embodiment of a multilayer ceramic capacitor.

[0041] Figure 29 This is a perspective view of a stack of ceramic capacitors according to yet another embodiment. Detailed Implementation

[0042] A multilayer ceramic capacitor is configured to include: a multilayer body, a dielectric layer, and an internal electrode layer alternately stacked; and an external electrode formed on the surface of the multilayer body and connected to the internal electrode layer. By using the external electrode as a coating, the multilayer ceramic capacitor can be miniaturized. However, due to the weak adhesion between the multilayer body and the coating, the coating sometimes peels off. Patent Document 1 discloses that, in order to improve the adhesion between the multilayer body and the coating, a plurality of virtual electrode layers bonded to the coating are provided on the multilayer body.

[0043] In the manufacturing process of existing multilayer ceramic capacitors, a step of tumbling the multilayer after firing the unfired multilayer is performed to fully expose the internal electrode layers on the surface of the multilayer. In the multilayer ceramic capacitor described in Patent Document 1, because multiple dissimilar material interfaces between the dielectric layer and the dummy electrode layer exist at the corners of the multilayer, excessive abrasive forces applied to the corners and collision forces with other multilayers can sometimes cause interlayer delamination between the dielectric layer and the dummy electrode layer. As a result, the reliability of the multilayer ceramic capacitor can sometimes deteriorate.

[0044] Hereinafter, embodiments of the multilayer ceramic capacitor of this disclosure will be described with reference to the accompanying drawings. The drawings used in the following description are schematic, and the dimensions shown in the drawings may not correspond to actual dimensions. The multilayer ceramic electronic component of the embodiments can be positioned either upwards or downwards; however, for convenience, an orthogonal coordinate system xyz is defined in some of the drawings in this specification. In the following description, the positive side of the z-axis is referred to as upwards, and terms such as upper surface or lower surface are sometimes used. The x-axis is also referred to as the first direction or length direction. The y-axis is also referred to as the second direction or width direction. The z-axis is also referred to as the third direction, height direction, or stacking direction.

[0045] Figure 1 This is a perspective view showing the multilayer ceramic capacitor of this embodiment. Figure 2 It means Figure 1 A three-dimensional view of the stacked ceramic capacitor. Figure 3 From Figure 1 The sectional view observed from the cut surface line III-III. Figure 4 From Figure 3 A sectional view taken when viewed along section line IV-IV. Furthermore, in Figure 2 In order to facilitate illustration, the exposed parts of the surface of the internal electrode layer and the stacked bodies in the first to fourth virtual electrodes are represented by shading.

[0046] like Figure 1 As shown, the multilayer ceramic capacitor 1 of this embodiment includes a laminate 2, a first external electrode 10a, and a second external electrode 10b. Hereinafter, the first external electrode 10a and the second external electrode 10b will sometimes be collectively referred to as external electrodes 10a and 10b.

[0047] like Figure 2 As shown, the laminate 2 is generally rectangular. The laminate 2 has a first face 7a and a second face 7b facing each other, a first end face 8a and a second end face 8b facing each other, and a first side face 9a and a second side face 9b facing each other. The first end face 8a and the second end face 8b can be perpendicular to a first direction (x-axis). The first side face 9a and the second side face 9b can be perpendicular to a second direction (y-axis). The first face 7a and the second face 7b can be perpendicular to a third direction (z-axis). Hereinafter, the first face 7a and the second face 7b will be collectively referred to as main faces 7a and 7b, the first end face 8a and the second end face 8b will be collectively referred to as end faces 8a and 8b, and the first side face 9a and the second side face 9b will be collectively referred to as side faces 9a and 9b.

[0048] The laminate 2 includes an active portion 3, a first coated portion 61, and a second coated portion 62. For example... Figure 3 As shown, the active portion 3 is composed of alternating layers of dielectric layer 4 and internal electrode layer 5. The dielectric layer 4 and internal electrode layer 5 are stacked in the third direction (z-axis). The active portion 3 forms the capacitance. Figure 3 In the diagram, double-dotted lines are used to represent the boundaries between the active part 3 and the first covered part 61 and the second covered part 62, but the actual boundaries are not clearly shown.

[0049] The dielectric layer 4 is made of a dielectric material. For example, the dielectric layer 4 may be made of a ceramic material whose main components are barium titanate (BaTiO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), or barium zirconate (BaZrO3). The dielectric layer 4 may have a thickness of, for example, 0.1 μm or more and 10 μm or less. Furthermore, in this specification, "main component" refers to the component that contains the highest proportion in the material or component of interest.

[0050] The internal electrode layer 5 is made of a conductive material. For example, the internal electrode layer 5 can be made of a metallic material whose main components are metals such as Ni (nickel), Cu (copper), Sn (tin), Pt (platinum), Pd (palladium), Ag (silver), Au (gold), or their alloys. The internal electrode layer 5 can have a thickness of, for example, less than 1.5 μm. In this case, internal defects caused by internal stress during the firing of the laminate 2 or when voltage is applied can be suppressed, thereby improving the reliability of the multilayer ceramic capacitor 1.

[0051] The internal electrode layer 5 includes a first internal electrode layer 5a and a second internal electrode layer 5b with different polarities. The active part 3 is formed by alternating layers of the first internal electrode layer 5a and the second internal electrode layer 5b separated by a dielectric layer 4.

[0052] like Figure 4 As shown, the first internal electrode layer 5a has a capacity forming portion 5aa and a lead-out portion 5ab. The lead-out portion 5ab is exposed on the first end face 8a and the side faces 9a, 9b. The lead-out portion 5ab can also be said to constitute a part of the first end face 8a and the side faces 9a, 9b. Figure 4 As shown, the second internal electrode layer 5b has a capacity forming portion 5ba and a lead-out portion 5bb. The lead-out portion 5bb is exposed on the second end face 8b and the side faces 9a and 9b. The lead-out portion 5bb can be said to constitute part of the second end face 8b and the side faces 9a and 9b. The capacity forming portion 5aa and the capacity forming portion 5ba overlap each other when viewed from above (i.e., when viewed from a third direction).

[0053] like Figure 3 As shown, the first coating portion 61 and the second coating portion 62 are located at both ends of the active portion 3 in the third direction (z-axis). Hereinafter, the first coating portion 61 and the second coating portion 62 will sometimes be collectively referred to as coating portions 61 and 62.

[0054] The first coating portion 61 includes a first virtual electrode 61a, a second virtual electrode 61b, and a first dielectric portion 61c. The first virtual electrode 61a and the second virtual electrode 61b are respectively located at both ends of the first dielectric portion 61c in the first direction (x-axis).

[0055] like Figure 3 As shown, the first virtual electrode 61a is exposed on the first end face 8a. The first virtual electrode 61a can also be said to constitute a part of the first end face 8a. When viewed from above, the first virtual electrode 61a can have the same shape as the lead-out portion 5ab of the first internal electrode layer 5a, or it can have a different shape. The first virtual electrode 61a can be longer or shorter than the lead-out portion 5ab in the first direction (x-axis). Figure 3As shown, the second virtual electrode 61b is exposed on the second end face 8b. The second virtual electrode 61b can also be said to form part of the second end face 8b. When viewed from above, the second virtual electrode 61b can have the same shape as the lead-out portion 5bb of the second internal electrode layer 5b, or it can have a different shape. The second virtual electrode 61b is longer than or shorter than the lead-out portion 5bb in the first direction.

[0056] The first dielectric portion 61c is made of a dielectric material and electrically insulates the first virtual electrode 61a and the second virtual electrode 61b. The first dielectric portion 61c may be made of a ceramic material constituting the dielectric layer 4.

[0057] The second coating portion 62 includes a third virtual electrode 62a, a fourth virtual electrode 62b, and a second dielectric portion 62c. The third virtual electrode 62a and the fourth virtual electrode 62b are located at opposite ends of the second dielectric portion 62c in the first direction (X-axis). Hereinafter, the first dielectric portion 61c and the second dielectric portion 62c will be collectively referred to as dielectric portions 61c and 62c.

[0058] like Figure 2 , 3 As shown, the third virtual electrode 62a is exposed on the first end face 8a. The third virtual electrode 62a can also be considered as part of the first end face 8a. When viewed from above, the third virtual electrode 62a can have the same shape as the lead-out portion 5ab of the first internal electrode layer 5a, or it can have a different shape. The third virtual electrode 62a can be longer or shorter than the lead-out portion 5ab in the first direction (x-axis). Figure 3 As shown, the fourth virtual electrode 62b is exposed on the second end face 8b. The fourth virtual electrode 62b can also be considered as part of the second end face 8b. When viewed from above, the fourth virtual electrode 62b can have the same shape as the lead-out portion 5bb of the second inner electrode layer 5b, or it can have a different shape. In the first direction, the fourth virtual electrode 62b can be longer or shorter than the lead-out portion 5bb.

[0059] The second dielectric section 62c is made of a dielectric material and electrically insulates the third virtual electrode 62a and the fourth virtual electrode 62b. The second dielectric section 62c may be made of a ceramic material constituting the dielectric layer 4.

[0060] Hereinafter, the first virtual electrode 61a, the second virtual electrode 61b, the third virtual electrode 62a and the fourth virtual electrode 62b will sometimes be collectively referred to as virtual electrodes 61a to 62b.

[0061] like Figure 2 , 3As shown, the thickness of at least one of the virtual electrodes 61a-62b in the third direction (z-axis) is greater than that of one inner electrode layer 5. The thickness of the virtual electrodes 61a-62b can be more than 3 times, more than 5 times, or more than 10 times the thickness of one inner electrode layer 5. The virtual electrodes 61a-62b can be approximately the same size as each other. Unless otherwise specified below, Figure 2 , 3 As shown, the thickness of all virtual electrodes 61a to 62b in the third direction is greater than that of the inner electrode layer 5.

[0062] The first external electrode 10a is disposed from the first end face 8a to the positions of the first surface 7a, the second surface 7b, the first side surface 9a, and the second side surface 9b. The first external electrode 10a is connected to the portion of the lead-out portion 5ab exposed on the surface of the laminate 2. The first external electrode 10a can completely cover the exposed portion of the lead-out portion 5ab. In this case, the first internal electrode layer 5a and the first external electrode 10a can be well electrically connected, and the active part 3 can be protected from the influence of the external environment (e.g., moisture). The first external electrode 10a is connected to the portions of the first virtual electrode 61a and the third virtual electrode 62a exposed on the surface of the laminate 2. The first external electrode 10a can completely cover the exposed portions of the first virtual electrode 61a and the third virtual electrode 62a. In this case, the contact area between the laminate 2 and the first external electrode 10a can be increased, and the bonding strength between the laminate 2 and the first external electrode 10a can be improved.

[0063] The second external electrode 10b is disposed from the second end face 8b to the positions of the first face 7a, the second face 7b, the first side face 9a, and the second side face 9b. The second external electrode 10b is connected to the portion of the lead-out portion 5bb exposed on the surface of the laminate 2. The second external electrode 10b can completely cover the exposed portion of the lead-out portion 5bb. In this case, the second internal electrode layer 5b and the second external electrode 10b can be electrically connected well, and the active part 3 can be protected from the influence of the external environment (e.g., moisture). The second external electrode 10b is connected to the portions of the second virtual electrode 61b and the fourth virtual electrode 62b exposed on the surface of the laminate 2. The second external electrode 10b can completely cover the exposed portions of the second virtual electrode 61b and the fourth virtual electrode 62b. In this case, the contact area between the laminate 2 and the second external electrode 10b can be increased, and the bonding strength between the laminate 2 and the second external electrode 10b can be improved.

[0064] like Figure 3 , 4As shown, the external electrodes 10a and 10b can be configured to include a first layer 11 in contact with the surface of the laminate 2 and a second layer 12 covering the first layer 11. The first layer 11 is also referred to as the base layer. The second layer 12 is also referred to as the outer layer. By forming the external electrodes 10a and 10b into a multilayer structure, the bonding strength between the base layer 11 and the laminate 2 can be improved, and the wettability of the conductive bonding material (e.g., solder) on the outer layer 12 can be improved. As a result, the reliability of the multilayer ceramic capacitor 1 can be improved, and the reliability of the mounting structure containing the multilayer ceramic capacitor 1 can be improved.

[0065] The substrate 11 can be made of a metallic material, for example, with metals such as Ni, Cu, Sn, Pt, Pd, Ag, and Au, or alloys thereof as its main components. The substrate 11 can be formed using thin-film formation techniques such as plating, sputtering, and vapor deposition. In this case, since the volume of the substrate 11 can be reduced, the multilayer ceramic capacitor 1 can be miniaturized, or the effective volume contributing to capacitance can be increased. The technique for forming the substrate 11 is not limited to thin-film formation techniques. The substrate 11 can also be formed using thick-film formation techniques such as dip-coating, screen printing, and gravure printing. Figure 3 , 4 As shown, the base layer 11 can completely cover the exposed portions of leads 5ab, 5bb and virtual electrodes 61a to 62b.

[0066] The outer layer 12 can be, for example, made of a metallic material whose main components are metals such as Ni, Cu, Sn, Pt, Pd, Ag, Au, or their alloys. The outer layer 12 can be formed using thin film formation techniques such as electroless plating or electrolytic plating. Figure 3 , 4 As shown, the outer layer 12 can completely cover the surface of the base layer 11. The outer layer 12 can extend beyond the end of the stack 2 in the base layer 11 towards the center of the stack 2. In other words, the inner end 10t of the stack 2 of the outer electrodes 10a and 10b can be formed solely by the outer layer 12.

[0067] In this embodiment, the multilayer ceramic capacitor 1 is configured such that virtual electrodes 61a-62b, which are thicker than the inner electrode layer 5, are exposed at end faces 8a and 8b, and the outer electrodes 10a and 10b are connected to the exposed portions of the virtual electrodes 61a-62b. This improves the bonding strength between the multilayer 2 and the outer electrodes 10a and 10b, thereby enhancing the reliability of the multilayer ceramic capacitor 1.

[0068] In existing multilayer ceramic capacitors, the coated portions (corresponding to coated portions 61 and 62) include virtual electrode portions formed by alternating layers of dielectric layers and virtual electrode layers. Compared with existing multilayer ceramic capacitors, the multilayer ceramic capacitor 1 of this embodiment has fewer interfaces of dissimilar materials in the coated portions 61 and 62, thus reducing the occurrence of interlayer delamination in the coated portions 61 and 62 during (tumble) grinding of the laminate 2. Therefore, the reliability of the multilayer ceramic capacitor 1 can be improved.

[0069] Furthermore, according to the multilayer ceramic capacitor 1, the exposed area of ​​the virtual electrodes 61a to 62b in the end faces 8a and 8b can be increased without increasing the number of dissimilar material interfaces in the covered portions 61 and 62. Therefore, the reliability of the multilayer ceramic capacitor 1 can be effectively improved.

[0070] The first virtual electrode 61a and the second virtual electrode 61b can be further exposed on the first surface 7a, and the third virtual electrode 62a and the fourth virtual electrode 62b can be further exposed on the second surface 7b. In other words, the first virtual electrode 61a and the second virtual electrode 61b can form part of the first surface 7a, and the third virtual electrode 62a and the fourth virtual electrode 62b can form part of the second surface 7b. Since the first external electrode 10a is located from the first end surface 8a to the main surfaces 7a and 7b, and the second external electrode 10b is located from the second end surface 8b to the main surfaces 7a and 7b, the contact area between the virtual electrodes 61a and 62b and the external electrodes 10a and 10b can be increased by exposing the virtual electrodes 61a and 62b on the main surfaces 7a and 7b. As a result, the bonding strength between the laminate 2 and the external electrodes 10a and 10b can be further improved, and the reliability of the laminated ceramic capacitor 1 can be further improved.

[0071] The upper surfaces of the first virtual electrode 61a and the second virtual electrode 61b can be coplanar with the upper surface of the first dielectric portion 61c, and the lower surfaces of the third virtual electrode 62a and the fourth virtual electrode 62b can be coplanar with the lower surface of the second dielectric portion 62c. In this case, during the manufacturing process of the multilayer ceramic capacitor 1, the thickness of the external electrodes 10a and 10b on the main surfaces 7a and 7b can be easily and precisely controlled, thus facilitating the manufacture of the multilayer ceramic capacitor 1 according to the designed dimensions.

[0072] The upper surfaces of the first virtual electrode 61a and the second virtual electrode 61b may also protrude slightly upward from the upper surface of the first dielectric portion 61c, and the lower surfaces of the third virtual electrode 62a and the fourth virtual electrode 62b may also protrude slightly downward from the lower surface of the second dielectric portion 62c. In this case, by forming the external electrodes 10a and 10b to bypass the ends of the stacked body 2 that are located around the center side of the virtual electrodes 61a to 62b, the contact area between the stacked body 2 and the external electrodes 10a and 10b is increased, making it less likely for the stacked body 2 and the external electrodes 10a and 10b to peel off. As a result, the reliability of the multilayer ceramic capacitor 1 can be improved.

[0073] The virtual electrodes 61a-62b can be further exposed on the first side surface 9a and the second side surface 9b. In other words, the virtual electrodes 61a-62b can also form part of the first side surface 9a and the second side surface 9b. The first external electrode 10a is located from the first end face 8a to the side surfaces 9a and 9b, and the second external electrode 10b is located from the second end face 8b to the side surfaces 9a and 9b. Therefore, by exposing the virtual electrodes 61a-62b on the side surfaces 9a and 9b, the contact area between the virtual electrodes 61a-62b and the external electrodes 10a and 10b can be increased. As a result, the bonding strength between the laminate 2 and the external electrodes 10a and 10b can be further improved, and the reliability of the laminated ceramic capacitor 1 can be further improved.

[0074] The sides of the first virtual electrode 61a and the second virtual electrode 61b can be coplanar with the side of the first dielectric portion 61c, and the sides of the third virtual electrode 62a and the fourth virtual electrode 62b can be coplanar with the side of the second dielectric portion 62c. In this case, during the manufacturing process of the multilayer ceramic capacitor 1, since the thickness of the external electrodes 10a and 10b on the sides 9a and 9b can be easily and with high precision controlled, it is easy to manufacture the multilayer ceramic capacitor 1 according to the design dimensions.

[0075] The sides of the first virtual electrode 61a and the second virtual electrode 61b can protrude slightly in the second direction (y-axis) from the side of the first dielectric portion 61c, and the sides of the third virtual electrode 62a and the fourth virtual electrode 62b can also protrude slightly in the second direction from the side of the second dielectric portion 62c. In other words, the side of the first dielectric portion 61c can be recessed from the side of the first virtual electrode 61a and the second virtual electrode 61b, and the side of the second dielectric portion 62c can also be recessed from the side of the third virtual electrode 62a and the fourth virtual electrode 62b. In this case, by forming the external electrodes 10a and 10b to bypass the ends of the stacked body 2 that are around the central side of the virtual electrodes 61a to 62b, the contact area between the stacked body 2 and the external electrodes 10a and 10b is increased, and the stacked body 2 is less likely to peel off from the external electrodes 10a and 10b. As a result, the reliability of the stacked ceramic capacitor 1 can be improved.

[0076] In this embodiment, the multilayer ceramic capacitor 1 only needs to have at least one of the virtual electrodes 61a to 62b being thicker than the inner electrode layer 5. For example... Figure 5 As shown, the multilayer ceramic capacitor 1 can have a structure where the first dummy electrode 61a is thicker than the inner electrode layer 5, and the second dummy electrode 61b, third dummy electrode 62a, and fourth dummy electrode 62b have the same or thinner thicknesses than the inner electrode layer 5. Compared with existing multilayer ceramic capacitors, the multilayer ceramic capacitor 1 can reduce the number of dissimilar material interfaces in the coated portions 61 and 62, thus reducing the occurrence of interlayer delamination in the coated portions 61 and 62 during tumbling of the laminate 2. Therefore, the reliability of the multilayer ceramic capacitor 1 can be improved.

[0077] The laminate 2 may have an auxiliary electrode portion 61ba located inside (below) the second virtual electrode 61b in the third direction (z-axis), and formed by alternating layers of dielectric layer 65 and electrode layer 66. In this case, the first virtual electrode 61a and the second virtual electrode 61b can be provided without forming a step on the first surface 7a of the laminate 2. The electrode layer 66 may be exposed on the second end face 8b and the side faces 9a, 9b. In this case, the bonding strength between the laminate 2 and the second external electrode 10b can be improved. The electrode layer 66 may have the same shape as the second virtual electrode 61b or a different shape when viewed from above.

[0078] The laminate 2 may have an auxiliary electrode portion 62aa located inside (above) the third virtual electrode 62a in the third direction (z-axis) and an auxiliary electrode portion 62ba located inside (above) the fourth virtual electrode 62b in the third direction. Like the auxiliary electrode portion 61ba, the auxiliary electrode portions 62aa and 62ba may be configured to be formed by alternating layers of dielectric layer 65 and electrode layer 66. The electrode layer 66 of the auxiliary electrode portion 62aa may be exposed on the first end face 8a and sides 9a, 9b, and the electrode layer 66 of the auxiliary electrode portion 62ba may be exposed on the second end face 8b and sides 9a, 9b. In this case, the bonding strength between the laminate 2 and the external electrodes 10a, 10b can be improved. The electrode layer 66 of the auxiliary electrode portion 62aa may have the same shape as the third virtual electrode 62a when viewed from above, or it may have a different shape. When viewed from above, the electrode layer 66 of the auxiliary electrode section 62ba can have the same shape as the fourth virtual electrode 62b, or it can have a different shape from the fourth virtual electrode 62b.

[0079] The stacked ceramic capacitor 1 can be a structure in which the thickness of two of the virtual electrodes 61a to 62b is greater than that of the inner electrode layer 5, or it can be a structure in which the thickness of three of the virtual electrodes 61a to 62b is greater than that of the inner electrode layer 5.

[0080] Next, another example of the multilayer ceramic capacitor of this embodiment will be described. Figures 6-8 This is a cross-sectional view showing another example of a multilayer ceramic capacitor according to this embodiment. Figures 6-8 The sectional view shown is Figure 3 The sectional view shown corresponds to this.

[0081] like Figure 6 As shown, virtual electrodes 61a to 62b can be constructed by stacking a plurality of virtual electrode layers 63. The plurality of virtual electrode layers 63 can be stacked in a third direction (z-axis). In this case, by stacking thin virtual electrode layers 63, thick virtual electrodes 61a to 62b can be formed. By making the thickness of the virtual electrode layers 63 thin, the dimensions of the virtual electrode layers 63 can be controlled with high precision. Therefore, compared to forming a single virtual electrode 61a to 62b, the dimensions of the virtual electrodes 61a to 62b can be controlled with high precision. As a result, even when the stacked ceramic capacitor 1 is small, virtual electrodes 61a to 62b of the designed dimensions can be formed, improving the reliability of the stacked ceramic capacitor 1. Furthermore, in Figure 6 In the diagram, double-dotted lines represent the boundaries between the virtual electrode layers 63, but the actual boundaries are not clearly shown. This is for... Figure 7 , 8 The same applies.

[0082] The thickness of the virtual electrode layer 63 can be approximately the same as the thickness of the inner electrode layer 5. Details will be described later. In the manufacturing process of the multilayer ceramic capacitor 1, the active portion 3 of the unfired laminate 2 is produced using ceramic slurry and conductive paste by printing methods such as screen printing and gravure printing. Therefore, when the thickness of the virtual electrode layer 63 is approximately the same as the thickness of the inner electrode layer 5, the virtual electrode layer 63 can be printed using the same printing method used in printing the inner electrode layer 5. As a result, virtual electrodes 61a to 62b according to the designed dimensions can be formed efficiently.

[0083] When the virtual electrodes 61a to 62b are configured with a structure in which a plurality of virtual electrode layers 63 are stacked, the first dielectric portion 61c and the second dielectric portion 62c can be configured with a structure in which a plurality of dielectric layers 64 are stacked. The thickness of the dielectric layer 64 can be approximately the same as the thickness of the virtual electrode layer 63. In this case, the dielectric layer 64 can be printed using the same printing method used in printing the virtual electrode layer 63. As a result, the covered portions 61 and 62 according to the designed dimensions can be formed effectively. Furthermore, in Figure 6 In the diagram, double-dotted lines represent the boundaries between dielectric layers 64, but the actual boundaries are not clearly visible. This is for... Figure 7 The same applies to 8.

[0084] The virtual electrode layer 63 may include a common material 63a made of a dielectric material. In this case, since the bonding strength between the virtual electrode layers 63 can be improved, interlayer delamination in the virtual electrodes 61a to 62b can be suppressed. The virtual electrode layer 63 may include a common material made of a ceramic material constituting the dielectric layer 4 and the dielectric layer 64. In this case, the bonding strength between the virtual electrode layers 63 can be improved, and the bonding strength between the virtual electrodes 61a to 62b and the active portion 3 can be improved. Furthermore, the bonding strength between the first virtual electrode 61a and the second virtual electrode 61b and the first dielectric portion 61c can be improved, and the bonding strength between the third virtual electrode 62a and the fourth virtual electrode 62b and the first dielectric portion 61c can be improved. As a result, delamination in the laminate 2 can be suppressed, and the reliability of the laminated ceramic capacitor 1 can be improved.

[0085] The interface 61d between at least one of the first virtual electrode 61a and the second virtual electrode 61b and the first dielectric portion 61c may have an uneven structure. The multilayer ceramic capacitor 1 is used on an external substrate, for example, by soldering (reflow soldering). However, when the multilayer ceramic capacitor 1 is mounted on the external substrate, due to the shrinkage of the external electrodes 10a and 10b during cooling after heating, cracks are easily generated in the region (hereinafter also referred to as the "opposing region") 2f near the inner ends 10t of the external electrodes 10a and 10b on the first surface 7a of the laminate 2. Because the interface 61d of the first coating portion 61 has an uneven structure, even assuming cracks generate from the opposing region 2f in the first coating portion 61, the extension of cracks to the active portion 3 can be suppressed. As a result, the moisture resistance of the multilayer ceramic capacitor 1 can be improved, and its reliability can be enhanced.

[0086] When the first virtual electrode 61a and the second virtual electrode 61b are composed of a plurality of virtual electrode layers 63, such as Figure 7 As shown, the uneven structure of interface 61d can be formed by the regular or irregular variation in the position of the ends of the first dielectric portion 61c side of the plurality of virtual electrode layers 63 in the first direction (x-axis). When the first virtual electrode 61a and the second virtual electrode 61b are single, the uneven structure of interface 61d can be formed, for example, in the parent laminate (see reference ). Figure 9 , 12 In the manufacturing process of the first virtual electrode 61a and the second virtual electrode 61b, an uneven surface is formed at the interface between the electrode pattern that becomes the first virtual electrode 61a and the dielectric pattern that becomes the first dielectric part 61c.

[0087] At least one of the third virtual electrode 62a and the fourth virtual electrode 62b may have an uneven interface 62d with the second dielectric portion 62c. The effect of the uneven interface 62d is the same as that of the uneven interface 61d, and the method for setting the interface 62d to an uneven structure is the same as the method for setting the interface 61d to an uneven structure, therefore detailed description is omitted.

[0088] like Figure 3 , 6 As shown in Figure 8, the lower surfaces of the first virtual electrode 61a and the second virtual electrode 61b can contact the upper surface of the active part 3. The laminate 2 can have a structure where the interfaces 61e between the first virtual electrode 61a and the second virtual electrode 61b and the active part 3 have an uneven structure. In this case, the active part 3 is not easily separated from the first virtual electrode 61a and the second virtual electrode 61b, thereby improving the reliability of the laminated ceramic capacitor 1.

[0089] The lower surfaces of the first dummy electrode 61a and the second dummy electrode 61b may not contact the upper surface of the active portion 3. The first coating portion 61 may include a sandwich (not shown) located between the active portion 3 and the first dummy electrode 61a, and between the active portion 3 and the second dummy electrode 61b. The sandwich may be made of the dielectric material constituting the first dielectric portion 61c. The first coating portion 61 may have a structure in which the interfaces of the first dummy electrode 61a and the second dummy electrode 61b with the sandwich have an uneven structure. In this case, peeling in the first coating portion 61 can be suppressed, and the reliability of the multilayer ceramic capacitor 1 can be improved.

[0090] The upper surfaces of the third virtual electrode 62a and the fourth virtual electrode 62b can contact the lower surface of the active part 3. The laminate 2 can have a structure in which the interface 62e between the third virtual electrode 62a and the fourth virtual electrode 62b and the active part 3 has an uneven structure. In this case, the active part 3 is not easily separated from the third virtual electrode 62a and the fourth virtual electrode 62b, thereby improving the reliability of the laminated ceramic capacitor 1.

[0091] The upper surfaces of the third virtual electrode 62a and the fourth virtual electrode 62b can contact the lower surface of the active portion 3. The second coating portion 62 may include a second interlayer (not shown) located between the active portion 3 and the third virtual electrode 62a, and between the active portion 3 and the fourth virtual electrode 62b. The interlayer may be made of the dielectric material constituting the second dielectric portion 62c. The second coating portion 62 may have a structure in which the interfaces of the third virtual electrode 62a and the fourth virtual electrode 62b with the second interlayer have an uneven structure. In this case, peeling in the second coating portion 62 can be suppressed, and the reliability of the multilayer ceramic capacitor 1 can be improved.

[0092] Next, an example of a method for manufacturing the multilayer ceramic capacitor 1 (hereinafter also referred to as the "first manufacturing method") will be described. Figure 9 This is a perspective view illustrating an example of the manufacturing process of a parent laminate. Figure 10 This is a three-dimensional diagram representing an example of a parent laminate. Figure 11 This is a perspective view showing an example of a laminate obtained by cutting the parent laminate.

[0093] First, as the material for dielectric layer 4, a raw material powder with BaTiO3, CaTiO3, SrTiO3, BaZrO3, or mixtures thereof as the main components is prepared. Next, an organic carrier is mixed into the prepared raw material powder to prepare a ceramic slurry. The organic carrier used in the preparation of the ceramic slurry can be, for example, a substance obtained by dissolving a resin such as butyraldehyde resin in a solvent mixed with ethanol and toluene. Next, using the prepared ceramic slurry, a ceramic green sheet (hereinafter also referred to as "green sheet") 13 for dielectric layer 4 is formed by sheet forming methods such as doctor blade coating or cutting coating. The average thickness of the green sheet 13 can be, for example, about 0.5 to 10 μm. The above-mentioned ceramic slurry can be used in dielectric sections 61c and 62c.

[0094] Next, as the material for the inner electrode layer 5, a conductive paste is prepared by mixing an organic carrier with a powder whose main components are metals such as Ni, Cu, Sn, Pt, Pd, Ag, and Au, or their alloys. The organic carrier used in the preparation of the conductive paste can be, for example, a substance obtained by dissolving a resin such as ethyl cellulose in a solvent mixed with a dihydroterpineol-based solvent and a butyl cellosolve. The dispersant can be, for example, oleic acid or polyethylene glycol. The above-described conductive paste can be used for virtual electrodes 61a to 62b.

[0095] Next, using conductive paste, a patterned sheet 15 with an electrode pattern 14 printed on it to form the internal electrode layer 5 is formed on the main surface of the raw sheet 13 (see reference). Figure 9 The electrode pattern 14 can be printed using printing methods such as screen printing or gravure printing.

[0096] Next, a preliminary temporary laminate, a precursor to the master laminate, is fabricated. First, using ceramic paste and conductive paste, a first cover sheet 17, which forms the covered portions 61 and 62, is formed on the support sheet 16 by printing methods such as screen printing and gravure printing. The first cover sheet 17 is composed of electrode patterns 18 that form virtual electrodes 61a to 62b and dielectric patterns 19 that form dielectric portions 61c and 62c. The first cover sheet 17 can be formed by multiple printing operations or by a single printing operation. Figure 9 This illustrates a case where the first cover sheet 17 is formed using multiple printing processes, specifically, the virtual electrodes 61a to 62b are constructed by stacking a plurality of virtual electrode layers 63, and the dielectric portions 61c and 62c are constructed by stacking a plurality of dielectric layers 64. Figure 9 In the diagram, electrode patterns 14 and 18 are represented by additional shading.

[0097] Next, as Figure 9As shown, a predetermined number of patterned sheets 15 are stacked on a first cover sheet 17, and a temporary laminate is created by forming a second cover sheet 20 on top of it. The second cover sheet 20 can be formed in the same manner as the first cover sheet 17. Then, by applying pressure to the temporary laminate in the lamination direction, a final product is obtained. Figure 10 The parent laminate 21 is shown. In Figure 10 In the diagram, the exposed portions of electrode patterns 14 and 18 on the surface of the parent laminate 21 are represented by shading. Pressurization of the temporary laminate can be performed, for example, using a hydrostatic pressing device. Next, a plurality of such temporary laminates are fabricated by cutting the parent laminate 21 along the virtual dividing line 22. Figure 11 The unfired laminate 2 is shown. The cutting of the parent laminate 21 can be performed, for example, using an extrusion cutter, a cutting saw, or the like. Since the unfired laminate 2 has the same structure as the fired laminate 2, the terms internal electrode layer 5, main surfaces 7a, 7b, end surfaces 8a, 8b, and side surfaces 9a, 9b, as well as the reference numerals, will be used hereinafter for the unfired laminate 2. Figure 11 In the diagram, the exposed portions of the internal electrode layer 5 and the virtual electrodes 61a to 62b on the surface of the laminate 2 are represented by additional shading.

[0098] Next, the unfired laminate 2 is degreased under atmospheric, inert, or reducing gas conditions. The degreasing process can be carried out at atmospheric pressure or under reduced pressure.

[0099] Next, the degreased laminate 2 is fired in a reducing atmosphere gas. The atmosphere gas can be, for example, a mixture of hydrogen (H2) and nitrogen (N2). The firing temperature can be, for example, around 1100–1300°C. The fired laminate 2 can then be subjected to a re-oxidation treatment in an oxidizing atmosphere gas.

[0100] Next, the fired laminate 2 is subjected to tumbling grinding to fully expose the internal electrode layer 5 on the end faces 8a and 8b and the side faces 9a and 9b. Furthermore, by removing burrs from the surface of the laminate 2, a smooth finish is obtained. Figure 2 The laminate 2 is shown. By forming external electrodes 10a and 10b on the obtained laminate 2, a multilayer ceramic capacitor 1 can be manufactured. The external electrodes 10a and 10b can also be formed by coating the unfired laminate 2 with a conductive paste that serves as the external electrodes 10a and 10b, and then firing the laminate 2 and the external electrodes 10a and 10b simultaneously.

[0101] Next, another example of the manufacturing method of the multilayer ceramic capacitor 1 (hereinafter also referred to as the "second manufacturing method") will be described. The difference between the second manufacturing method and the first manufacturing method is that green wafers 13 are arranged in the uppermost and lowermost layers of the parent multilayer. Since everything else is the same as the first manufacturing method, detailed descriptions of the same processes are omitted. Figure 12 This is a perspective view illustrating another example of the fabrication process of a master laminate. Figure 13 This is a three-dimensional diagram representing another example of a parent laminate. Figure 14 This is a perspective view showing another example of a laminate obtained by cutting a parent laminate. Figure 12 In the diagram, electrode patterns 14 and 18 are represented by additional shading. Figure 13 In the diagram, the exposed portions of electrode patterns 14 and 18 on the surface of the parent laminate are represented by shading. Figure 14 In the diagram, the exposed portions of the internal electrode layer 5 and the virtual electrodes 61a to 62b on the surface of the laminate are represented by additional shading.

[0102] In the second manufacturing method, such as Figure 12 As shown, a green sheet 13 is placed on the support sheet 16, and a first cover sheet 17 is formed on it. Then, a predetermined number of patterned sheets 15 are stacked on the first cover sheet 17 to form a second cover sheet 20. A temporary laminate is created by placing a green sheet 13 on it. The second cover sheet 20 can be formed in the same way as the first cover sheet 17. By applying pressure to the temporary laminate in the lamination direction, a... Figure 13 The parent laminate 23 is shown. The parent laminate 23 has the same structure as the parent laminate 21, except that the green sheet 13 is located at the top and bottom layers in the lamination direction. Next, a plurality of [missing information] are produced by cutting the parent laminate 23 along the virtual dividing line 24. Figure 14 The unfired laminate 2A is shown. Laminate 2A differs from the aforementioned laminate 2, except for a portion of the green sheet 13 ( Figure 14 The reference numeral 13' in the figure is located outside the uppermost and lowermost layers in the stacking direction and has the same structure as the laminate 2. The laminate 2A can also be said to consist of the laminate 2 and a part of the green sheet 13.

[0103] Next, the unfired laminate 2A undergoes a degreasing treatment. This degreasing treatment can be the same as that in the first manufacturing method. Then, the degreased laminate 2A is fired. Furthermore, the firing environment gas and firing temperature can be the same as those in the first manufacturing method.

[0104] Next, the fired laminate 2A is subjected to tumbling grinding to remove a portion of the dielectric layer formed by the fired green sheet 13, so that the internal electrode layer 5 and the virtual electrodes 61a-62b are fully exposed on the surface of the laminate 2, and burrs on the surface of the laminate 2 are removed, thereby obtaining... Figure 2 The laminate 2 is shown. By forming external electrodes 10a and 10b on the obtained laminate 2, a multilayer ceramic capacitor 1 can be manufactured.

[0105] In the second manufacturing method, the electrode patterns 18, which become dummy electrodes 61a to 62b, contact the support sheet 16 via the green sheet 13, rather than directly contacting the support sheet 16. Therefore, when the laminate 2A obtained by cutting the parent laminate 23 is peeled off from the support sheet 16, it is possible to suppress the retention of a portion of the electrode patterns 18 on the support sheet 16 (hereinafter also referred to as "electrode corrosion"). As a result, poor formation of the dummy electrodes 61a to 62b due to electrode corrosion can be suppressed, thereby improving the reliability of the multilayer ceramic capacitor 1.

[0106] Furthermore, in order to suppress electrode corrosion of the support sheet 16, although it is not necessary to arrange the green sheet 13 on the second cover sheet 20, by arranging the green sheet 13 on the second cover sheet 20, the unfired laminate 2A becomes a substantially symmetrical structure. Therefore, when the fired laminate 2A is tumble-polished, the upper and lower parts of the laminate 2A are polished uniformly, and the tumble-polished laminate 2A (i.e., Figure 2 The stack 2 shown becomes a substantially symmetrical structure. As a result, it is possible to suppress the deviation of the bonding strength between the stack 2 and the external electrodes 10a and 10b, thereby improving the reliability of the stacked ceramic capacitor 1.

[0107] Hereinafter, another embodiment of the multilayer ceramic capacitor of the present disclosure will be described.

[0108] Figure 15 , 16 17, 18A and 18B relate to another embodiment of a multilayer ceramic capacitor. Figure 15 This is a perspective view showing another embodiment of a multilayer ceramic capacitor. Figure 16 It means Figure 15 A three-dimensional view of the laminated structure of a multilayer ceramic capacitor. Figure 17 From Figure 15 A sectional view taken when observing the cut surface XVII-XVII. Figure 18A From Figure 17 A sectional view taken when observing the cut surface XVIIIA-XVIIIA. Figure 18B From Figure 17 A sectional view taken when observing the cut surface lines XVIIIB-XVIIIB. Furthermore, Figure 18AIt shows in Figure 17 The end face after being cut at the cut line XVIIIA-XVIIIA.

[0109] The difference between the stacked ceramic capacitor 1A in this embodiment and the stacked ceramic capacitor 1 lies in the structure of the internal electrode layer 5 and the external electrodes 10a and 10b. Since the other structures are the same, detailed descriptions of the same structures are omitted.

[0110] In a multilayer ceramic capacitor 1A, such as Figure 16 , 17 As shown in Figure 18A, the lead-out portion 5ab of the first internal electrode layer 5a is exposed on the first end face 8a and the side faces 9a and 9b, and the lead-out portion 5bb of the second internal electrode layer 5b is exposed on the second end face 8b and the side faces 9a and 9b. Figure 16 , 17 As shown in Figure 18B, the first virtual electrode 61a is exposed on the first surface 7a, the first end surface 8a, and the sides 9a and 9b, and the second virtual electrode 61b is exposed on the first surface 7a, the second end surface 8b, and the sides 9a and 9b. Additionally, the third virtual electrode 62a is exposed on the second surface 7b, the first end surface 8a, and the sides 9a and 9b, and the fourth virtual electrode 62b is exposed on the second surface 7b, the second end surface 8b, and the sides 9a and 9b.

[0111] like Figure 15 , 17 As shown in Figures 18A and 18B, the first external electrode 10a is located from the first end face 8a to the main faces 7a and 7b and the side faces 9a and 9b, and the second external electrode 10b is located from the second end face 8b to the main faces 7a and 7b and the side faces 9a and 9b. The first external electrode 10a covers the portion of the first virtual electrode 61a exposed on the first face 7a and covers the portion of the third virtual electrode 62a exposed on the second face 7b. The first external electrode 10a covers the portions of the first virtual electrode 61a, the third virtual electrode 62a, and the lead-out portion 5ab of the first internal electrode layer 5a exposed on the first end face 8a and the side faces 9a and 9b. The second external electrode 10b covers the portion of the second virtual electrode 61b exposed on the first face 7a and covers the portion of the fourth virtual electrode 62b exposed on the second face 7b. The second external electrode 10b covers the exposed portions of the second virtual electrode 61b, the fourth virtual electrode 62b, and the lead-out portion 5bb of the second internal electrode layer 5b on the second end face 8b and the sides 9a and 9b.

[0112] like Figure 16 , 18AAs shown in Figure 18B, the length of the exposed portion of lead-out portion 5ab in the first direction (x-axis) is shorter than the exposed portions of the first virtual electrode 61a and the third virtual electrode 62a in the same direction. The end of the second end face 8b of the exposed portion of lead-out portion 5ab in the same direction is closer to the first end face 8a than the ends of the exposed portions of the first virtual electrode 61a and the third virtual electrode 62a in the same direction. The length of the exposed portion of lead-out portion 5bb in the first direction (x-axis) is shorter than the exposed portions of the second virtual electrode 61b and the fourth virtual electrode 62b in the same direction. The end of the exposed portion of lead-out portion 5bb in the same direction is closer to the second end face 8b than the ends of the exposed portions of the second virtual electrode 61b and the fourth virtual electrode 62b in the same direction. Figure 15 As shown, the external electrodes 10a and 10b have a “ko” shape when viewed from the second direction (y-axis).

[0113] The multilayer ceramic capacitor 1A has virtual electrodes 61a to 62b that are thicker than the inner electrode layer 5. Therefore, compared with the multilayer ceramic capacitors of the prior art, the number of dissimilar material interfaces in the coated portions 61 and 62 can be reduced. As a result, the occurrence of interlayer delamination in the coated portions 61 and 62 during tumbling of the laminate 2 can be reduced, and the reliability of the multilayer ceramic capacitor 1A can be improved.

[0114] The portions of the external electrodes 10a and 10b located on the main surfaces 7a and 7b can be formed solely by the outer layer 12. In this case, the portions of the external electrodes 10a and 10b located on the main surfaces 7a and 7b can be made thinner, resulting in a thinner multilayer ceramic capacitor 1A.

[0115] In the multilayer ceramic capacitor 1A, the sides 9a and 9b, which have lower solder wettability compared to the surfaces of the external electrodes 10a and 10b, are largely exposed. Therefore, when the multilayer ceramic capacitor 1A is soldered and mounted to the external substrate, solder is less likely to adhere to the sides 9a and 9b. As a result, even when the multilayer ceramic capacitor 1A is made thinner, the possibility of short circuits between the first external electrode 10a and the second external electrode 10b due to solder adhering to the sides 9a and 9b can be reduced.

[0116] like Figure 16 , 17 As shown, the multilayer ceramic capacitor 1A can be a structure in which the thickness of all virtual electrodes 61a-62b is greater than that of the inner electrode layer 5, or it can be as follows: Figure 5 The stacked ceramic capacitor 1 shown has a structure in which at least one of the virtual electrodes 61a to 62b has a thickness greater than that of the inner electrode layer 5.

[0117] Figure 19 , 20 21, 22A, and 22B relate to another embodiment of a multilayer ceramic capacitor. Figure 19 This is a perspective view showing yet another embodiment of a multilayer ceramic capacitor. Figure 20 It means Figure 19 A three-dimensional view of the laminated structure of a multilayer ceramic capacitor. Figure 21 From Figure 19 A cross-sectional view taken when observing the cut surface line XIX-XIX. Figure 22A From Figure 21 Cross-sectional view observed along the cut surface lines XIIA-XXIIA. Figure 22B From Figure 21 A sectional view taken when observing the cut surfaces XIIIB-XXIIB. Furthermore, Figure 22A It shows in Figure 21 The end face after being cut at the cut line XIIA-XXIIA.

[0118] The stacked ceramic capacitor 1B of this embodiment differs from the stacked ceramic capacitor 1 in the structure of the internal electrode layer 5, the virtual electrodes 61a to 62b, and the external electrodes 10a and 10b, but the other structures are the same. Therefore, detailed descriptions of the same structures are omitted.

[0119] In the multilayer ceramic capacitor 1B, such as Figure 20 , 22A As shown, the lead-out portion 5ab of the first internal electrode layer 5a is exposed only on the first end face 8a, and not on the sides 9a and 9b. Similarly, the lead-out portion 5bb of the second internal electrode layer 5b is exposed only on the second end face 8b, and not on the sides 9a and 9b. Figure 20 As shown in Figure 21, the first virtual electrode 61a is exposed on the first surface 7a, the first end surface 8a, and the sides 9a and 9b; the second virtual electrode 61b is exposed on the first surface 7a, the second end surface 8b, and the sides 9a and 9b; the third virtual electrode 62a is exposed on the second surface 7b, the first end surface 8a, and the sides 9a and 9b; and the fourth virtual electrode 62b is exposed on the second surface 7b, the second end surface 8b, and the sides 9a and 9b.

[0120] like Figure 19 , 21 As shown in Figure 22B, the first external electrode 10a is located from the first end face 8a to the main faces 7a, 7b and the side faces 9a, 9b, and the second external electrode 10b is located from the second end face 8b to the main faces 7a, 7b and the side faces 9a, 9b. Figure 21 , 22BAs shown, the first external electrode 10a covers the portion of the first virtual electrode 61a exposed on the first surface 7a and sides 9a, 9b, and covers the portion of the third virtual electrode 62a exposed on the second surface 7b and sides 9a, 9b. The second external electrode 10b covers the portion of the second virtual electrode 61b exposed on the first surface 7a and sides 9a, 9b, and covers the portion of the fourth virtual electrode 62b exposed on the second surface 7b and sides 9a, 9b. Figure 19 As shown, the external electrodes 10a and 10b have a “ko” shape when viewed from the second direction (y-axis).

[0121] Because the multilayer ceramic capacitor 1B has virtual electrodes 61a to 62b that are thicker than the inner electrode layer 5, the number of dissimilar material interfaces in the coated portions 61 and 62 can be reduced compared to existing multilayer ceramic capacitors. As a result, interlayer delamination in the coated portions 61 and 62 can be reduced during tumbling of the laminate 2, thereby improving the reliability of the multilayer ceramic capacitor 1B.

[0122] The portions of the external electrodes 10a and 10b located on the main surfaces 7a and 7b can be formed solely by the outer layer 12. In this case, the portions of the external electrodes 10a and 10b located on the main surfaces 7a and 7b can be made thinner, resulting in a thinner multilayer ceramic capacitor 1B.

[0123] In the multilayer ceramic capacitor 1B, the sides 9a and 9b, which have lower solder wettability compared to the surfaces of the external electrodes 10a and 10b, are largely exposed. Therefore, when the multilayer ceramic capacitor 1B is soldered and mounted to the external substrate, solder is less likely to adhere to the sides 9a and 9b. As a result, even when the multilayer ceramic capacitor 1B is made thinner, the possibility of short circuits between the first external electrode 10a and the second external electrode 10b due to solder adhering to the sides 9a and 9b can be reduced.

[0124] like Figure 20 As shown in Figure 21, the multilayer ceramic capacitor 1B can be a structure in which the thickness of all virtual electrodes 61a-62b is greater than that of the inner electrode layer 5, or it can be as follows: Figure 5 The stacked ceramic capacitor 1 shown has a structure in which at least one of the virtual electrodes 61a to 62b has a thickness greater than that of the inner electrode layer 5.

[0125] Figure 23 , 24 25, 26A, 26B, 26C, and 26D relate to another embodiment of the multilayer ceramic capacitor. Figure 23 This is a perspective view showing yet another embodiment of a multilayer ceramic capacitor. Figure 24 It means Figure 23 A three-dimensional view of the laminated structure of a multilayer ceramic capacitor. Figure 25 From Figure 23 A cross-sectional view taken at XXV-XXV along the cut surface. Figure 26A From Figure 25 A sectional view observed when viewing the cut surface line XXVIA-XXVIA. Figure 26B From Figure 25 A sectional view taken during observation of the cut surface line XXVIB-XXVIB. Figure 26C From Figure 25 A sectional view of the cut surface line XXVIC-XXVIC during observation. Figure 26D From Figure 25 A sectional view taken when observing the cut surface line XXVID-XXVID. Figure 24 In this design, shadows are added to the exposed portions of the internal electrode layer and the virtual electrode on the surface of the laminate to represent them.

[0126] like Figure 23 As shown, the multilayer ceramic capacitor 1C of this embodiment includes a laminate 25, a first external electrode 26a, a second external electrode 26b, a third external electrode 26c, and a fourth external electrode 26d. Hereinafter, the first external electrode 26a, the second external electrode 26b, the third external electrode 26c, and the fourth external electrode 26d are sometimes collectively referred to as external electrodes 26a to 26d.

[0127] like Figure 24 As shown, the laminate 25 is generally rectangular. The laminate 25 has a first face 27a and a second face 27b facing each other, a first end face 28a and a second end face 28b facing each other, and a first side face 29a and a second side face 29b facing each other. The first end face 28a and the second end face 28b may be perpendicular to a first direction (x-axis). The first side face 29a and the second side face 29b may be perpendicular to a second direction (y-axis). The first face 27a and the second face 27b may be perpendicular to a third direction (z-axis). The first face 27a and the second face 27b may be generally square when viewed from above.

[0128] like Figure 25 As shown, the laminate 25 includes an active portion 30, a first coated portion 33, and a second coated portion 34. The active portion 30 is formed by alternating layers of a dielectric layer 31 and an internal electrode layer 32. The dielectric layer 31 and the internal electrode layer 32 are stacked in the third direction (z-axis). The active portion 30 forms a capacitance. Figure 25 In the diagram, double-dotted lines are used to indicate the boundaries between the active part 30 and the first and second covered parts, but the actual boundaries are not clearly shown. Hereinafter, the first covered part 33 and the second covered part 34 will sometimes be collectively referred to as covered parts 33 and 34.

[0129] The dielectric layer 31 can be made of, for example, a ceramic material with BaTiO3, CaTiO3, SrTiO3, BaZrO3, etc. as its main components. The internal electrode layer 32 can be made of, for example, a metallic material with Ni, Cu, Sn, Pt, Pd, Ag, Au, etc., or their alloys as its main components.

[0130] The internal electrode layer 32 includes a first internal electrode layer 32a and a second internal electrode layer 32b with opposite polarities. The active portion 30 is formed by alternating layers of the first internal electrode layer 32a and the second internal electrode layer 32b separated by a dielectric layer 31. Figure 24 , 25 An example of an active part 30 having two internal electrode layers 32 is shown, but the active part 30 may have more internal electrode layers 32 than two.

[0131] like Figure 26B As shown, the first internal electrode layer 32a has a capacity forming portion 32aa, a first lead-out portion 32ab, and a second lead-out portion 32ac. The first lead-out portion 32ab is exposed on the first end face 28a and the second side face 29b. The second lead-out portion 32ac is exposed on the second end face 28b and the first side face 29a. Figure 26B As shown, the first lead-out portion 32ab and the second lead-out portion 32ac are located at the two corners on the diagonal of the laminate 25 when viewed from above.

[0132] like Figure 26C As shown, the second internal electrode layer 32b has a capacity forming portion 32ba, a third lead-out portion 32bb, and a fourth lead-out portion 32bc. The third lead-out portion 32bb is exposed on the first end face 28a and the first side face 29a. The fourth lead-out portion 32bc is exposed on the second end face 28b and the second side face 29b. When viewed from above, the third lead-out portion 32bb and the fourth lead-out portion 32bc are located at two corners on the diagonal of the laminate 25.

[0133] The capacity forming portions 32aa and 32ba overlap when viewed from above. The first lead-out portion 32ab does not overlap with the third lead-out portion 32bb and the fourth lead-out portion 32bc when viewed from above. The second lead-out portion 32ac does not overlap with the third lead-out portion 32bb and the fourth lead-out portion 32bc when viewed from above.

[0134] like Figure 25 As shown, the first coated portion 33 and the second coated portion 34 are located at both ends of the active portion 30 in the third direction (z-axis).

[0135] like Figure 26AAs shown, the first coating portion 33 includes four virtual electrodes 33a, 33b, 33c, and 33d and a first dielectric portion 33e. The four virtual electrodes 33a, 33b, 33c, and 33d are located at the four corners of the laminate 25 when viewed from above. The virtual electrodes 33a, 33b, 33c, and 33d are exposed on the first surface 27a. Virtual electrode 33a is further exposed on the first end surface 28a and the second side surface 29b. Virtual electrode 33b is further exposed on the second end surface 28b and the first side surface 29a. Virtual electrode 33c is further exposed on the first end surface 28a and the first side surface 29a. Virtual electrode 33d is further exposed on the second end surface 28b and the second side surface 29b. The virtual electrodes 33a, 33b, 33c, and 33d can be, for example, rectangular parallelepiped, cubic, triangular prism, or a four-part cylindrical shape. The virtual electrodes 33a, 33b, 33c, and 33d can be made of the same metallic material that constitutes the internal electrode layer 32. The first dielectric portion 33e is made of a dielectric material, which electrically insulates the virtual electrodes 33a, 33b, 33c, and 33d from each other. The first dielectric portion 33e can be made of the same ceramic material that constitutes the dielectric layer 31.

[0136] like Figure 26D As shown, the second coating portion 34 includes four virtual electrodes 34a, 34b, 34c, and 34d, and a second dielectric portion 34e. The four virtual electrodes 34a, 34b, 34c, and 34d are located at the four corners of the laminate 25 when viewed from above. The virtual electrodes 34a, 34b, 34c, and 34d are exposed on the second surface 27b. Virtual electrode 34a is further exposed on the first end surface 28a and the first side surface 29a. Virtual electrode 34b is further exposed on the second end surface 28b and the second side surface 29b. Virtual electrode 34c is further exposed on the first end surface 28a and the second side surface 29b. Virtual electrode 34d is further exposed on the second end surface 28b and the first side surface 29a. The virtual electrodes 34a, 34b, 34c, and 34d can be, for example, rectangular, cubic, triangular prism, or quartered cylindrical, etc. The virtual electrodes 34a, 34b, 34c, and 34d can be made of the same metallic material that constitutes the inner electrode layer 32. The second dielectric portion 34e is made of a dielectric material, which electrically insulates the virtual electrodes 34a, 34b, 34c, and 34d from each other. The second dielectric portion 34e can be made of the same ceramic material that constitutes the dielectric layer 31. Hereinafter, the virtual electrodes 33a, 33b, 33c, and 33d, and the virtual electrodes 34a, 34b, 34c, and 34d, are sometimes collectively referred to as virtual electrodes 33a to 34d.

[0137] The first external electrode 26a is located on the first surface 27a, the first end surface 28a, the second side surface 29b, and the second surface 27b. The first external electrode 26a is connected to the portion of the first lead-out portion 32ab exposed on the surface of the laminate 25, as well as the portions of the virtual electrodes 33a and 34c exposed on the surface of the laminate 25. The first external electrode 26a can completely cover the portions of the first lead-out portion 32ab exposed on the surface of the laminate 25, as well as the portions of the virtual electrodes 33a and 34c exposed on the surface of the laminate 25.

[0138] The second external electrode 26b is located on the first surface 27a, the second end surface 28b, the first side surface 29a, and the second surface 27b. The second external electrode 26b is connected to the portion of the second lead 32ac exposed on the surface of the laminate 25, as well as the portions of the virtual electrodes 33b and 34d exposed on the surface of the laminate 25. The second external electrode 26b can completely cover the portions of the second lead 32ac exposed on the surface of the laminate 25, as well as the portions of the virtual electrodes 33b and 34d exposed on the surface of the laminate 25.

[0139] The third external electrode 26c is located on the first surface 27a, the first end surface 28a, the first side surface 29a, and the second surface 27b. The third external electrode 26c is connected to the portion of the third lead 32bb exposed on the surface of the laminate 25, as well as the portions of the virtual electrodes 33c and 34a exposed on the surface of the laminate 25. The third external electrode 26c can completely cover the portions of the third lead 32bb and the virtual electrodes 33c and 34a exposed on the surface of the laminate 25.

[0140] The fourth external electrode 26d is located on the first surface 27a, the second end surface 28b, the second side surface 29b, and the second surface 27b. The fourth external electrode 26d is connected to the exposed portions of the fourth lead-out portion 32bc on the surface of the laminate 25, as well as the exposed portions of the virtual electrodes 33d and 34b on the surface of the laminate 25. The fourth external electrode 26d can completely cover the exposed portions of the fourth lead-out portion 32bc and the exposed portions of the virtual electrodes 33d and 34b on the surface of the laminate 25.

[0141] The external electrodes 26a to 26d can be made of, for example, a metallic material whose main components are metals such as Ni, Cu, Sn, Pt, Pd, Ag, and Au, or their alloys. The external electrodes 26a to 26d can be formed, for example, using thick film forming techniques such as dip-coating, screen printing, or gravure printing. The external electrodes 26a to 26d and... Figure 3 , 4Similarly, the external electrodes 10a and 10b shown can be configured to include a base layer in contact with the surface of the laminate 25 and an outer layer covering the base layer.

[0142] The manufacturing method of the multilayer ceramic capacitor 1C is the same as that of the multilayer ceramic capacitor 1. First, a master multilayer is made, and the master multilayer is cut to produce a plurality of unfired multilayers 25. Next, after degreasing the unfired multilayers 25, the degreased multilayers 25 are fired. Then, the fired multilayers 25 are subjected to tumbling grinding to obtain... Figure 24 The laminate 25 is shown. By forming external electrodes 26a to 26d on the obtained laminate 25, a multilayer ceramic capacitor 1C can be manufactured.

[0143] like Figure 24 , 25 As shown, the multilayer ceramic capacitor 1C has a structure in which the thickness of the third direction (z-axis) of the virtual electrodes 33a-34d is greater than that of the inner electrode layer 32. Therefore, compared with existing multilayer ceramic capacitors, the multilayer ceramic capacitor 1C can reduce the number of dissimilar material interfaces in the coated portions 33 and 34. As a result, the occurrence of interlayer delamination in the coated portions 33 and 34 during tumbling of the laminate 25 can be reduced, thus improving the reliability of the multilayer ceramic capacitor 1C.

[0144] The multilayer ceramic capacitor 1C can be any structure in which at least one of the virtual electrodes 33a to 34d is thicker than the inner electrode layer 32. Figure 5 The virtual electrodes 33a to 34d shown, such as the second virtual electrode 61b, the third virtual electrode 62a, and the fourth virtual electrode 62b, have a thickness less than or equal to the thickness of the inner electrode layer 32. For example, when the thickness of the virtual electrode 33b is less than or equal to the thickness of the inner electrode layer 32, the laminate 25 may have a thickness equal to or less than the thickness of the inner electrode layer 32 on the inner side (below) of the virtual electrode 33b in the third direction (z-axis). Figure 5 The auxiliary electrode sections 61ba, 62aa, and 62ba shown are the same as the auxiliary electrode sections.

[0145] Virtual electrodes 33a-34d can be a single virtual electrode. Virtual electrodes 33a-34d can also be... Figure 6 As shown in the diagram, the virtual electrodes 61a to 62b are stacked together in a plurality of layers. In this case, it is easy to form virtual electrodes 33a to 34d according to the design dimensions, which can improve the reliability of the stacked ceramic capacitor 1C.

[0146] The interface between at least one of the virtual electrodes 33a, 33b, 33c, and 33d and the first dielectric portion 33e can be as follows: Figure 7The interfaces 61d and 62d shown have an uneven structure. In this case, when the multilayer ceramic capacitor 1C is soldered and mounted to the outer substrate, even if a crack is assumed to originate from the first coated portion 33, the extension of the crack to the active portion 30 can be suppressed. As a result, the moisture resistance of the multilayer ceramic capacitor 1C can be improved, and its reliability can be enhanced. The interface between at least one of the dummy electrodes 34a, 34b, 34c, and 34d and the second dielectric portion 34e can have an uneven structure. In this case, as described above, the moisture resistance of the multilayer ceramic capacitor 1C can be improved, and its reliability can be enhanced.

[0147] The embodiments of this disclosure have been described in detail above. This disclosure is not limited to the above embodiments, and various changes and improvements can be made without departing from the spirit of this disclosure.

[0148] Figure 27 This is a cross-sectional view showing a multilayer ceramic capacitor 1D according to yet another embodiment of the present disclosure. Furthermore, this embodiment is similar to... Figure 3 The implementation method is similar, and the corresponding parts are labeled with the same reference numerals, and repeated descriptions are omitted. The multilayer ceramic capacitor 1D of this embodiment may also be provided with intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1. The intermediate virtual electrodes 61a1 and 61b1 may also be configured, for example, to be provided inside (below) the first and second virtual electrodes 61a and 61b in the third direction (z-axis) and between the electrode layer and the lower side of the first and second virtual electrodes 61a and 61b. The intermediate virtual electrodes 61a1 and 61b1 are electrically insulated by a dielectric layer made of the same dielectric material as the dielectric portion, and the dielectric layer may be made of ceramic material. Furthermore, the intermediate virtual electrodes 62a1 and 62b1 may also be configured to be provided inside (above) the third and fourth virtual electrodes 62a and 62b and between the electrode layer and the electrode layer of the third and fourth virtual electrodes 62a and 62b. This increases the exposed area of ​​the intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 in the end faces 8a and 8b and the side faces 9a and 9b. Therefore, the reliability of the multilayer ceramic capacitor 1D can be effectively improved. Furthermore, when the substrate layer 11 is formed by plating, for example, a plating film growing from the end of the first internal electrode layer 5a exposed from the first end face 8a can easily reach the virtual electrode 61a via the intermediate virtual electrode 61a1, thus facilitating the formation of the substrate layer 11.

[0149] The intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1, when viewed from above, can have the same shape as the virtual electrodes 61a, 61b, 62a, and 62b, or a different shape. Furthermore, the thickness of the intermediate virtual electrodes 61f, 61g, 62f, and 62g in the third direction (z-axis) can be greater than that of the inner electrode layer 5. The intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 can be approximately the same size as each other. The intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 can be made of the same material as the metal material constituting the virtual electrodes 61a, 61b, 62a, and 62b. Because the intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 are located between the active portion 3 and the coated portions 61 and 62, the coating can be easily formed from the active portion 3 to the main surface side.

[0150] Figure 28 This is a cross-sectional view showing a multilayer ceramic capacitor 1E according to yet another embodiment of this disclosure. Furthermore, this embodiment is similar to... Figure 25 The implementation method is similar, and the corresponding parts are labeled with the same reference numerals, and repeated descriptions are omitted. The multilayer ceramic capacitor 1E of this embodiment may also be provided with intermediate virtual electrodes 33a1, 33c1, 33b1, 33d1, 34a1, 34c1, 34b1, and 34d1. The intermediate virtual electrodes 33a1, 33c1, 33b1, and 33d1 may also be configured, for example, to be disposed on the inner side (below) of each of the virtual electrodes 33a, 33c, 33b, 33d, 34a, 34c, 34b, and 34d in the third direction (z-axis) and between the electrode layer close to the virtual electrodes 33a, 33c, 33b, 33d, 34a, 34c, 34b, and 34d. The intermediate virtual electrodes 33a1, 33c1, 33b1, and 33d1 are electrically insulated by a dielectric layer made of the same dielectric material as the dielectric portion. The dielectric layer may be made of ceramic material. Furthermore, the intermediate virtual electrodes 34a1, 34c1, 34b1, and 34d1 may be configured such that they are disposed on the inner side (above) of each of the virtual electrodes 34a, 34c, 34b, and 34d, and between them and the electrode layers adjacent to the virtual electrodes 34a, 34c, 34b, and 34d.

[0151] The intermediate virtual electrodes 33a1, 33c1, 33b1, 33d1, 34a1, 34c1, 34b1, and 34d1, when viewed from above, can have the same shape as the virtual electrodes 33a, 33c, 33b, 33d, 34a, 34c, 34b, and 34d, or they can have a different shape. Furthermore, the thickness of the intermediate virtual electrodes 33a1, 33c1, 33b1, 33d1, 34a1, 34c1, 34b1, and 34d1 in the third direction (z-axis) can be greater than that of the inner electrode layer 32. The virtual electrodes 33a, 33c, 33b, 33d, 34a, 34c, 34b, and 34d can be approximately the same size as each other. The intermediate virtual electrodes 33a1, 33c1, 33b1, 33d1, 34a1, 34c1, 34b1, and 34d1 can be made of the same metallic material that constitutes the virtual electrodes 33a, 33c, 33b, 33d, 34a, 34c, 34b, and 34d. The length of the virtual electrodes 33a, 33c, 33b, 33d, 34a, 34c, 34b, and 34d along the y-axis can be shorter than that of the substrate layer.

[0152] This maintains the characteristic that solder does not easily adhere to the sides 9a and 9b, and the coating can easily form from the active part to the main side.

[0153] Figure 29 This is a perspective view showing the laminate 2B of a multilayer ceramic capacitor according to yet another embodiment of this disclosure. Furthermore, this embodiment is similar to... Figure 20 The implementation method is similar, and the corresponding parts are labeled with the same reference numerals, omitting repeated descriptions. In this embodiment, the multilayer ceramic capacitor may also have intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 provided on the four virtual electrodes 61a, 61b, 62c, and 62d included in the first covered portion 61. The intermediate virtual electrodes 61a1 and 61b1 may also be configured, for example, to be provided inside (below) the first and second virtual electrodes 61a and 61b in the third direction (z-axis) and between them and the electrode layer adjacent to the first and second virtual electrodes 61a and 61b. The intermediate virtual electrodes 62a1 and 62b1 are electrically insulated by a dielectric layer made of the same dielectric material as the dielectric portion, and the dielectric layer may be made of ceramic material. Furthermore, intermediate virtual electrodes 62a1 and 62b1 are provided on the inner (upper) sides of the two virtual electrodes 34a, 34b, 34c, and 34d included in the second covered portion 62 and between them and the electrode layers close to the third and fourth virtual electrodes 62a and 62b. This increases the exposed area of ​​the virtual electrodes in the end face and side face, thus effectively improving the reliability of the multilayer ceramic capacitor.

[0154] The intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1, when viewed from above, can have the same shape as or different from the virtual electrodes 61a, 61b, 62a, and 62b. Furthermore, the thickness of the intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 in the third direction (z-axis) can be greater than that of the virtual electrodes 61a, 61b, 62a, and 62b. The virtual electrodes 61a, 61b, 62a, and 62b can be approximately the same size. The intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 can be made of the same metallic material that constitutes the virtual electrodes 61a, 61b, 62a, and 62b. With intermediate virtual electrodes 61a1, 61b1, 62a1, and 62b1 located between the active portion 3 and the coated portions 61 and 62, the coating can be easily formed from the active portion to the main surface side.

[0155] The multilayer ceramic capacitor disclosed herein can improve the bonding strength between the multilayer and the external electrode, and can suppress the occurrence of interlayer delamination of the coated portion. Therefore, the multilayer ceramic capacitor according to the present disclosure can provide a multilayer ceramic capacitor with improved reliability.

[0156] The multilayer ceramic capacitor disclosed herein can be implemented in the following structures (1) to (10).

[0157] (1) A multilayer ceramic capacitor, wherein, include: A generally rectangular parallelepiped-shaped laminate includes: an active portion, a dielectric layer and an internal electrode layer stacked alternately; and a first covered portion and a second covered portion, respectively located at both ends of the active portion in the stacking direction of the dielectric layer and the internal electrode layer; the laminate has a first face and a second face facing each other in the stacking direction, a first end face and a second end face facing each other, and a first side face and a second side face facing each other. A first external electrode is located from the first end face to the first surface and the second surface; and The second external electrode is located from the second end face to the first face and the second face; The first external electrode and the second external electrode are connected to different internal electrode layers of the internal electrode layer. The first coated portion has: a first dielectric portion; and a first virtual electrode and a second virtual electrode, respectively located at both ends of the first dielectric portion in a first direction orthogonal to the first end face; The second coating portion has: a second dielectric portion; and a third dummy electrode and a fourth dummy electrode, respectively located at both ends of the second dielectric portion in the first direction; The first virtual electrode and the third virtual electrode are exposed on the first end face, and the second virtual electrode and the fourth virtual electrode are exposed on the second end face. At least one of the first virtual electrode, the second virtual electrode, the third virtual electrode, and the fourth virtual electrode is thicker than the inner electrode layer.

[0158] (2) The multilayer ceramic capacitor according to the structure (1) above, wherein, The first virtual electrode and the second virtual electrode are further exposed on the first surface. The third virtual electrode and the fourth virtual electrode are further exposed on the second surface.

[0159] (3) The multilayer ceramic capacitor according to the structure (1) or (2) above, wherein, The first virtual electrode and the second virtual electrode are further exposed on the first side and the second side, respectively. The third virtual electrode and the fourth virtual electrode are further exposed on the first side and the second side.

[0160] (4) A multilayer ceramic capacitor according to any one of the structures (1) to (3) above, wherein, At least one of the first virtual electrode, the second virtual electrode, the third virtual electrode, and the fourth virtual electrode includes a plurality of stacked virtual electrode layers.

[0161] (5) The multilayer ceramic capacitor according to the structure (4) above, wherein, The plurality of virtual electrode layers comprise a common material composed of dielectric material.

[0162] (6) A multilayer ceramic capacitor according to any one of the structures (1) to (5) above, wherein, At least one of the first virtual electrode and the second virtual electrode has an uneven structure at its interface with the first dielectric portion. At least one of the third virtual electrode and the fourth virtual electrode has an uneven structure at its interface with the second dielectric portion.

[0163] (7) A multilayer ceramic capacitor according to any one of the structures (1) to (6) above, wherein, The first coated portion also has a fifth virtual electrode and a sixth virtual electrode located at both ends of the first dielectric portion in the first direction. The second coating portion also has a seventh virtual electrode and an eighth virtual electrode located at both ends of the second dielectric portion in the first direction, respectively. The fifth and seventh virtual electrodes are exposed on the first end face, and the sixth and eighth virtual electrodes are exposed on the second end face.

[0164] (8) The multilayer ceramic capacitor according to the structure (7) above, wherein, The first virtual electrode, the second virtual electrode, the fifth virtual electrode, and the sixth virtual electrode are further exposed on the first surface. The third, fourth, seventh, and eighth virtual electrodes are further exposed on the second surface.

[0165] (9) The multilayer ceramic capacitor according to structure (7) or (8) above, wherein, The first virtual electrode and the second virtual electrode are further exposed on the first side. The fifth and sixth virtual electrodes are further exposed on the second side. The third and fourth virtual electrodes are further exposed on the first side. The seventh and eighth virtual electrodes are further exposed on the second side.

[0166] (10) A multilayer ceramic capacitor according to any one of the structures (1) to (9) above, wherein, It also has: A first intermediate virtual electrode is located between the first virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer. The second intermediate virtual electrode is located between the second virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer. A third intermediate virtual electrode is located between the third virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer; and The fourth intermediate virtual electrode is located between the fourth virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer.

[0167] The embodiments of this disclosure have been described in detail above. However, this disclosure is not limited to the above embodiments, and various changes and improvements can be made without departing from the spirit of this disclosure. Of course, appropriate combinations can be made within a non-contradictory scope to constitute all or part of the above embodiments.

[0168] Explanation of reference numerals in the attached figures

[0169] 1. 1A, 1B, 1C, 1D, 1E Multilayer Ceramic Capacitors

[0170] 2, 2A, 2B laminates

[0171] 2f opposing regions

[0172] 3 Active parts

[0173] 4 dielectric layer

[0174] 5 Internal electrode layer

[0175] 5a First internal electrode layer

[0176] 5aa capacity forming section

[0177] 5ab lead-out section

[0178] 5b Second internal electrode layer

[0179] 5ba volume forming section

[0180] 5bb Exit Section

[0181] 61 First Covered Section

[0182] 61a First Virtual Electrode

[0183] 61b Second Virtual Electrode

[0184] 61ba auxiliary electrode section

[0185] 61c First Dielectric Section

[0186] 61d interface

[0187] 61e interface

[0188] 62 Second Covered Part

[0189] 62a Third Virtual Electrode

[0190] 62aa auxiliary electrode section

[0191] 62b Fourth Virtual Electrode

[0192] 62ba auxiliary electrode section

[0193] 62c Second Dielectric Section

[0194] 62D interface

[0195] 63 Virtual Electrode Layers

[0196] 63a Common Materials

[0197] 64 dielectric layer

[0198] 65 dielectric layer

[0199] 66 electrode layers

[0200] 7a First Page

[0201] 7b Second Page

[0202] 8a First end face

[0203] 8b Second end face

[0204] 9a First side view

[0205] 9b Second side

[0206] 10a First External Electrode

[0207] 10b Second External Electrode

[0208] 10t inner end

[0209] 11. First layer (basal layer)

[0210] 12. Second layer (outer layer)

[0211] 13, 13' Ceramic raw shards (raw shards)

[0212] 14 electrode patterns

[0213] 15 Pattern Sheets

[0214] 16 Support Sheets

[0215] 17 First Covering Sheet

[0216] 18 electrode patterns

[0217] 19 Dielectric Patterns

[0218] 20 Second Cover Sheet

[0219] 21 parent layer stack

[0220] 22 Virtual dividing lines

[0221] 23 parent layer stacks

[0222] 24 virtual dividing lines

[0223] 25-layer stack

[0224] 26a First External Electrode

[0225] 26b Second External Electrode

[0226] 26c Third External Electrode

[0227] 26d Fourth External Electrode

[0228] 27a First Page

[0229] 27b Second Page

[0230] 28a First end face

[0231] 28b Second end face

[0232] 29a First side view

[0233] 29b Second side view

[0234] 30 active parts

[0235] 31 Dielectric Layer

[0236] 32 Internal Electrode Layer

[0237] 32a First internal electrode layer

[0238] 32aa Capacity Forming Section

[0239] 32ab First Introduction

[0240] 32ac second lead

[0241] 32b Second Internal Electrode Layer

[0242] 32ba volume forming section

[0243] 32bb Third Introduction

[0244] 32bc fourth lead-out section

[0245] 33 First Covered Section

[0246] Virtual electrodes 33a, 33b, 33c, and 33d

[0247] 33e First Dielectric Section

[0248] 34 Second Covered Part

[0249] Virtual electrodes 34a, 34b, 34c, and 34d

[0250] 34e Second Dielectric Section

Claims

1. A multilayer ceramic capacitor, wherein, include: A generally rectangular parallelepiped-shaped laminate includes: an active portion, a dielectric layer and an internal electrode layer stacked alternately; and a first covered portion and a second covered portion, respectively located at both ends of the active portion in the stacking direction of the dielectric layer and the internal electrode layer; the laminate has a first face and a second face facing each other in the stacking direction, a first end face and a second end face facing each other, and a first side face and a second side face facing each other. A first external electrode is disposed from the first end face onto the first surface and the second surface; and A second external electrode is disposed from the second end face onto the first face and the second face; The first external electrode and the second external electrode are connected to different internal electrode layers of the internal electrode layer. The first coated portion has: a first dielectric portion; and a first virtual electrode and a second virtual electrode, respectively located at both ends of the first dielectric portion in a first direction orthogonal to the first end face; The second coating portion has: a second dielectric portion; and a third dummy electrode and a fourth dummy electrode, respectively located at both ends of the second dielectric portion in the first direction; The first virtual electrode and the third virtual electrode are exposed on the first end face, and the second virtual electrode and the fourth virtual electrode are exposed on the second end face. At least one of the first virtual electrode, the second virtual electrode, the third virtual electrode, and the fourth virtual electrode is thicker than the inner electrode layer.

2. The multilayer ceramic capacitor according to claim 1, wherein, The first virtual electrode and the second virtual electrode are further exposed on the first surface. The third virtual electrode and the fourth virtual electrode are further exposed on the second surface.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein, The first virtual electrode and the second virtual electrode are further exposed on the first side and the second side, respectively. The third virtual electrode and the fourth virtual electrode are further exposed on the first side and the second side.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein, At least one of the first virtual electrode, the second virtual electrode, the third virtual electrode, and the fourth virtual electrode includes a plurality of stacked virtual electrode layers.

5. The multilayer ceramic capacitor according to claim 4, wherein, The plurality of virtual electrode layers comprise a common material composed of dielectric material.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein, At least one of the first virtual electrode and the second virtual electrode has an uneven structure at its interface with the first dielectric portion. At least one of the third virtual electrode and the fourth virtual electrode has an uneven structure at its interface with the second dielectric portion.

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein, The first coated portion also has a fifth virtual electrode and a sixth virtual electrode located at both ends of the first dielectric portion in the first direction. The second coating portion also has a seventh virtual electrode and an eighth virtual electrode located at both ends of the second dielectric portion in the first direction, respectively. The fifth and seventh virtual electrodes are exposed on the first end face, and the sixth and eighth virtual electrodes are exposed on the second end face.

8. The multilayer ceramic capacitor according to claim 7, wherein, The first virtual electrode, the second virtual electrode, the fifth virtual electrode, and the sixth virtual electrode are further exposed on the first surface. The third, fourth, seventh, and eighth virtual electrodes are further exposed on the second surface.

9. The multilayer ceramic capacitor according to claim 7 or 8, wherein, The first virtual electrode and the second virtual electrode are further exposed on the first side. The fifth and sixth virtual electrodes are further exposed on the second side. The third and fourth virtual electrodes are further exposed on the first side. The seventh and eighth virtual electrodes are further exposed on the second side.

10. The multilayer ceramic capacitor according to any one of claims 1 to 9, wherein, It also has: A first intermediate virtual electrode is located between the first virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer. The second intermediate virtual electrode is located between the second virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer. A third intermediate virtual electrode is located between the third virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer; and The fourth intermediate virtual electrode is located between the fourth virtual electrode and the inner electrode layer in the stacking direction, and its thickness is greater than that of the inner electrode layer.

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