Refrigeration equipment

Abstract

The invention provides refrigeration equipment, relates to the technical field of household appliances, and is used for realizing operation of an artificial intelligence algorithm while a refrigeration function of a refrigerator is not influenced under the condition that resources of a main control chip of the refrigerator are limited. The refrigeration equipment comprises a box body, a refrigeration system, a heater, a memory and a controller, wherein a target model is deployed in the memory; the controller is configured to split a target algorithm task corresponding to the target model into a plurality of algorithm sub-tasks; executing at least one algorithm sub-task in the plurality of algorithm sub-tasks in the residual execution duration of at least one execution cycle of the plurality of execution cycles; wherein the remaining execution duration is the remaining duration after all the core tasks are executed in each execution period, and the core tasks are used for achieving normal operation of the refrigeration equipment; and running the plurality of execution cycles until the plurality of algorithm sub-tasks end running, and obtaining a running result of the target model.

Description

Technical Field

[0001] This application relates to the field of household appliance technology, and more particularly to a refrigeration device. Background Technology

[0002] With the rapid development and widespread application of smart technologies, the home appliance industry is accelerating its intelligent transformation. Today, more and more users are prioritizing smart features in their home appliances, hoping for a more convenient and efficient user experience. However, the main control chips in smart home appliances generally face limited resources, especially refrigeration appliances like refrigerators, which need to operate continuously 24 hours a day to maintain stable cooling, further compressing the available resources of the main control chip. Therefore, how to run artificial intelligence algorithms under the hardware constraints of limited main control chip resources has become a pressing technical problem that needs to be solved. Summary of the Invention

[0003] This application provides a refrigeration device for implementing artificial intelligence algorithms under hardware constraints of limited main control chip resources, without affecting the core refrigeration function of a refrigerator.

[0004] In a first aspect, embodiments of this application provide a refrigeration device, comprising: a housing having at least one freezer compartment and at least one refrigerator compartment; a refrigeration system for providing cooling capacity to the refrigeration device; a fan for regulating air circulation within the refrigeration device; a heater for melting frost condensed within the refrigeration device; a memory containing a target model for implementing intelligent control functions of the refrigeration device; and a controller configured to: divide a target algorithm task corresponding to the target model into multiple algorithm subtasks; execute at least one of the multiple algorithm subtasks within the remaining execution time of at least one execution cycle of multiple execution cycles; wherein the remaining execution time is the remaining time after all core tasks have been executed within the at least one execution cycle, and the core tasks are used to achieve normal operation of the refrigeration device; and run the multiple execution cycles until the multiple algorithm subtasks have finished running to obtain the running result of the target model.

[0005] In this embodiment, the target algorithm task of the target model is split into smaller parts. During the remaining execution time of at least one execution cycle (i.e., the idle resources of the main control chip), at least one of the split sub-tasks is executed. This process is repeated for multiple execution cycles until all sub-tasks are completed, thereby obtaining the result of the target model. This approach enables the execution of artificial intelligence algorithms within the remaining execution time of multiple execution cycles, even when main control chip resources are limited. It effectively solves the problem of not being able to run artificial intelligence algorithms locally due to limited main control chip resources, while also ensuring the execution of the core tasks of the refrigeration equipment, thus guaranteeing the normal operation of the refrigeration function. Furthermore, it improves the resource utilization rate of the main control chip.

[0006] In one possible implementation, each of the plurality of execution cycles needs to execute multiple core tasks; the controller is further configured to: calculate the estimated remaining execution time for each execution cycle based on the estimated execution time for each core task and the total duration for each execution cycle; and determine the at least one algorithm subtask to be executed in each execution cycle based on the estimated remaining execution time for each execution cycle, the estimated execution time for each algorithm subtask, and the data dependencies between the plurality of algorithm subtasks.

[0007] In this implementation, by calculating the estimated remaining execution time for each execution cycle, the estimated execution time for each algorithm subtask, and the data dependencies between multiple algorithm subtasks, the number of algorithm subtasks that can be completed within each execution cycle can be calculated, thereby determining at least one algorithm subtask that needs to be executed in each execution cycle. This method typically ensures that at least one algorithm subtask can be executed completely in each execution cycle, effectively reducing the occurrence of algorithm subtask execution interruptions, and thus reducing the consumption of storage resources.

[0008] In one possible implementation, the controller is configured to: upon detecting the completion of all core tasks in each execution cycle, calculate a first actual remaining execution time for each execution cycle based on the total duration and the execution duration of each execution cycle; and if the first actual remaining execution time is greater than or equal to the estimated remaining execution time, execute at least one algorithm subtask within the first actual remaining execution time according to the data dependencies between the plurality of algorithm subtasks.

[0009] In this implementation, by comparing the first actual remaining execution time and the estimated remaining execution time of each execution cycle, the actual available resources for the current execution cycle can be assessed. Based on this, it can be determined whether at least one algorithm subtask can be fully executed within the first actual remaining execution time. This mechanism effectively avoids the interruption of algorithm subtask execution due to resource misjudgment.

[0010] In one possible implementation, the number of the at least one execution cycle is at least two; the controller is configured to: when the first actual remaining execution time is less than the estimated remaining execution time, calculate a target number of algorithm subtasks that can be executed within the first actual remaining execution time based on the estimated execution time corresponding to each algorithm subtask in the at least one algorithm subtask; and execute the at least one algorithm subtask within the remaining execution time of the at least two execution cycles based on the target number.

[0011] In this implementation, if the actual remaining execution time is less than the estimated remaining execution time, it indicates that the available resources in the current execution cycle are insufficient to fully execute at least one algorithm subtask. In this case, based on the actual remaining execution time and the estimated execution time for each of the at least one algorithm subtask, the number of algorithm subtasks to be executed in the current execution cycle is dynamically adjusted to avoid interruption of algorithm subtask execution. Furthermore, all unexecuted algorithm subtasks are postponed to subsequent execution cycles, utilizing the remaining execution time of those cycles. This cross-cycle sharding scheduling mechanism ensures that all algorithm subtasks can be completed.

[0012] In one possible implementation, the controller is configured to: during the first actual remaining execution time, execute the algorithm subtasks that match the target number among the at least one algorithm subtasks according to the data dependencies between the plurality of algorithm subtasks; and during the remaining execution time of the next execution cycle of the current execution cycle, execute the algorithm subtasks that have not been executed among the at least one algorithm subtasks according to the data dependencies between the plurality of algorithm subtasks.

[0013] In this implementation, within the first actual remaining execution time, algorithm subtasks matching the target number are executed according to the data dependencies between subtasks. Since the target number is calculated based on the first actual remaining execution time and the estimated execution time of the algorithm subtasks, this effectively avoids the interruption of algorithm subtask execution.

[0014] In one possible implementation, the controller is further configured to: when all at least one algorithm subtask has been completed, calculate a second actual remaining execution time for each execution cycle based on the executed duration of each execution cycle and the total duration of each execution cycle; determine whether to execute the second algorithm subtask based on the second actual remaining execution time and the estimated execution time of the second algorithm subtask, wherein the second algorithm subtask is the next algorithm subtask following the at least one algorithm subtask among a plurality of algorithm subtasks arranged according to the data dependency relationship; and execute the second algorithm subtask within the second actual remaining execution time if the second actual remaining execution time is greater than or equal to the estimated execution time of the second algorithm subtask.

[0015] In this implementation, if at least one algorithm subtask in each execution cycle is completed ahead of schedule, it can be determined whether to execute an additional second algorithm subtask based on the second actual remaining execution time of each execution cycle and the estimated execution time of the second algorithm subtask. If the second actual remaining execution time is too short to fully complete the second algorithm subtask, it is not executed to avoid additional overhead. If the second algorithm subtask can be fully executed within the second actual remaining execution time, it is executed to improve the running efficiency of the target algorithm task.

[0016] In one possible implementation, the controller is configured to: for each of the at least one execution cycle, before the end of each execution cycle, detect whether the at least one algorithm subtask has been completed; if the first algorithm subtask in the at least one algorithm subtask has not been completed, stop executing the first algorithm subtask and save the current execution state and intermediate results of the first algorithm subtask; and within the remaining execution time of the subsequent execution cycles of each execution cycle, obtain the current execution state and intermediate results of the first algorithm subtask and continue to complete the first algorithm subtask.

[0017] During the remaining execution time of each execution cycle, while executing at least one algorithm subtask, the execution time of each cycle must be monitored in real time. When the execution time of each cycle reaches the total execution time, the execution of the algorithm subtask is immediately stopped to ensure that the core task (i.e., the main control task) of the next execution cycle can still be executed normally, thereby ensuring the normal operation of the cooling function of the refrigeration equipment. Furthermore, if the first algorithm subtask is not completed, its current execution state and intermediate results are saved, allowing it to be directly invoked during the remaining execution time of subsequent execution cycles without repeated execution, thus improving algorithm efficiency.

[0018] In one possible implementation, the controller is further configured to: for the at least one execution cycle, before executing the at least one algorithm subtask, obtain the execution status of the target algorithm task; if the execution status of the target algorithm task is pending execution, execute at least one of the plurality of algorithm subtasks during the remaining execution time of the at least one execution cycle.

[0019] In this implementation, since the target algorithm task is a periodically executed task, when the execution status of the target algorithm task is determined to be pending execution, at least one algorithm subtask is executed within the remaining execution time of at least one execution cycle. This approach effectively avoids excessive consumption of computing resources and ensures efficient resource utilization.

[0020] In one possible implementation, the controller is configured to: perform a first split operation on the target algorithm task according to the model structure of the target algorithm task to obtain the algorithm task corresponding to each network layer; and perform a second split operation on the algorithm task corresponding to each network layer according to the internal data dependencies and computational characteristics of the algorithm task corresponding to each network layer to obtain the plurality of algorithm subtasks.

[0021] In this implementation, the target algorithm task is first split into coarse-grained tasks according to the model structure of the target algorithm task, and then the algorithm task corresponding to each network layer is split into fine-grained tasks according to the internal data dependencies and computational characteristics of each network layer. This splits the task into smaller, more flexibly schedulable algorithm subtasks. The resulting multiple algorithm subtasks can better adapt to the remaining resource constraints in each execution cycle, ensuring that the task can be fully executed within the remaining execution time of each execution cycle.

[0022] In one possible implementation, the target model is a deep learning model, and the model structure of the deep learning model includes convolutional layers, pooling layers, and fully connected layers. The controller is configured to: for the algorithm task of the convolutional layer, split the algorithm task of the convolutional layer according to the channel dimension of the output feature map of the convolutional layer to obtain M algorithm subtasks; for the algorithm task of the pooling layer, split the algorithm task of the pooling layer according to the spatial dimension of the output feature map of the pooling layer to obtain N algorithm subtasks; for the algorithm task of the fully connected layer, split the algorithm task of the fully connected layer according to the output neurons of the fully connected layer to obtain P algorithm subtasks; wherein M, N, and P are all positive integers; and obtain the plurality of algorithm subtasks based on the M algorithm subtasks, the N algorithm subtasks, and the P algorithm subtasks.

[0023] In this implementation, since the output feature maps of convolutional layers are inherently independent across each channel, this decomposition method allows the sub-tasks obtained by splitting the algorithmic task corresponding to the convolutional layer to be computed independently. Similarly, dividing the output feature map of the pooling layer into different regions in height and width, with each region's computation independent of the others, allows for independent computation of the sub-tasks obtained by splitting the pooling layer's output feature map according to its spatial dimensions. The core computation of fully connected layers is matrix-vector multiplication, where the computation of each element of the output vector (i.e., the value of the output neuron) is independent. Therefore, splitting the algorithmic task of the fully connected layer according to the output neurons is equivalent to breaking down the large matrix operations of the fully connected layer into multiple smaller matrix vectors, which helps optimize memory access efficiency. Consequently, the resulting sub-tasks are better suited to resource-constrained operating environments, effectively solving the fundamental problem of running large models in resource-constrained environments. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the structure of a refrigeration device provided in an embodiment of this application;

[0026] Figure 2 A system architecture diagram of a refrigeration device provided in this application embodiment;

[0027] Figure 3 A control flow of a controller provided in an embodiment of this application Figure 1 ;

[0028] Figure 4 A time allocation diagram of an execution cycle provided in an embodiment of this application;

[0029] Figure 5 A control flow of a controller provided in an embodiment of this application Figure 2 ;

[0030] Figure 6 This is a schematic diagram of the structure of a state management system provided in an embodiment of this application;

[0031] Figure 7 A control flow of a controller provided in an embodiment of this application Figure 3 ;

[0032] Figure 8A control flow of a controller provided in an embodiment of this application Figure 4 ;

[0033] Figure 9 A control flow of a controller provided in an embodiment of this application Figure 5 ;

[0034] Figure 10 A control flow of a controller provided in an embodiment of this application Figure 6 . Detailed Implementation

[0035] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0036] To facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with essentially the same function and effect. For example, "first instruction" and "second instruction" are used to distinguish different user instructions and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0037] It should be noted that, in this application, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplarily" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner.

[0038] Furthermore, "at least one" refers to one or more, while "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can mean: a, or b, or c, or a and b, or a and c, or b and c, or a, b, and c, where a, b, and c can be single or multiple.

[0039] Furthermore, the terms "comprising" and "having," and any variations thereof, in the embodiments and drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0040] Because the main control chips of smart home appliances generally face the problem of limited resources, especially refrigeration appliances like refrigerators, which need to operate continuously 24 hours a day to maintain a stable cooling effect, the available resource space of the main control chip is further compressed. Currently, to achieve the intelligence of home appliances, most choose the following two methods:

[0041] The first approach is to add dedicated artificial intelligence (AI) algorithm chips or other high-performance chips to existing home appliances to support the operation of AI algorithms. However, this method will increase hardware costs and reduce users' willingness to buy.

[0042] The second approach involves deploying AI algorithms in the cloud. When home appliances need to use AI algorithms, a network connection is established with the cloud, the AI ​​algorithm runs in the cloud, and then the cloud sends the results to the refrigerator. However, this method requires a stable network connection, has a high degree of network dependency, and also carries the risk of data privacy leaks. In addition, the operational costs of the cloud will also increase.

[0043] Therefore, how to run artificial intelligence algorithms under the hardware constraints of limited main control chip resources has become an urgent technical problem to be solved.

[0044] Based on this, this application provides a refrigeration device, which includes a housing with at least one freezer compartment and at least one refrigerator compartment; a refrigeration system for providing cooling capacity; a fan for regulating air circulation inside the refrigeration device; a heater for melting frost condensed in the refrigeration device; a memory containing a target model for implementing intelligent control functions of the refrigeration device; and a controller configured to: split the target algorithm task corresponding to the target model into multiple algorithm subtasks; execute at least one algorithm subtask within the remaining execution time of at least one execution cycle of multiple execution cycles; wherein the remaining execution time is the time remaining after all core tasks in each execution cycle have been executed, and the core tasks are used to ensure the normal operation of the refrigeration device; and run multiple execution cycles until the multiple algorithm subtasks have finished running to obtain the running result of the target model.

[0045] By breaking down the target algorithm task into multiple algorithm subtasks and using the remaining execution time of multiple execution cycles to execute these subtasks, the normal operation of the cooling function of the cooling equipment is not affected, and the target algorithm task can be run. This effectively solves the problem of not being able to run artificial intelligence algorithms locally due to limited main control chip resources, and also improves the resource utilization rate of the main control chip.

[0046] The refrigeration equipment provided in this application embodiment can be a refrigerator, freezer, or other refrigeration equipment. To better understand the refrigeration equipment provided in this application embodiment, a refrigerator will be used as an example below, combined with... Figure 1 The diagram shows a structural schematic of a refrigeration device, illustrating the structure of the refrigeration device provided in the embodiments of this application.

[0047] Please refer to Figure 1 This is a schematic diagram of the structure of a refrigeration device provided in an embodiment of this application. Figure 1 As shown, the refrigeration equipment includes a housing 110, a refrigeration system 120, a fan 130, a heater 140, a memory (not shown in the figure), and a controller (not shown in the figure).

[0048] The interior of the cabinet 110 has at least one refrigerator compartment and at least one freezer compartment. For example, Figure 1 The refrigerator compartment 111 and freezer compartment 112 are shown. Both refrigerator and freezer compartments are storage spaces for storing items such as food and medicine. The difference lies in the different cooling effects of refrigerator and freezer compartments, which in turn affects the shelf life of the stored items. It should be understood that... Figure 1 The example uses a cabinet 110 with a refrigerator compartment and a freezer compartment. However, in actual applications, the number of refrigerator compartments and freezer compartments inside the cabinet 110 of the refrigeration equipment can be one or more. This application does not limit this.

[0049] The refrigeration system 120 is located inside the enclosure 110, and the refrigeration system 120 is used to provide cooling capacity for the refrigeration equipment. For example... Figure 1As shown, the refrigeration system 120 includes a compressor, a condenser, and an evaporator. The refrigeration process of the system includes compression, condensation, throttling, and evaporation. The compression process is as follows: after the refrigeration equipment is powered on, when there is a cooling demand in the housing 110, the compressor starts working. Low-temperature, low-pressure refrigerant is drawn into the compressor and compressed into high-temperature, high-pressure superheated gas in the compressor cylinder before being discharged into the condenser. The condensation process is as follows: the high-temperature, high-pressure refrigerant gas dissipates heat through the condenser, and its temperature continuously decreases, gradually cooling into room-temperature, high-pressure saturated vapor, and further cooling into saturated liquid. The temperature at this point no longer decreases; this temperature is called the condensation temperature. The pressure of the refrigerant remains almost constant throughout the condensation process. The throttling process is as follows: the saturated refrigerant liquid after condensation is filtered through a dryer filter to remove moisture and impurities before flowing into the throttling component (…). Figure 1 (Not shown in the image) Through it, the refrigerant is throttled and depressurized, turning into a room-temperature, low-pressure wet vapor. The evaporation process is as follows: the room-temperature, low-pressure wet vapor begins to absorb heat and vaporize in the evaporator, which not only lowers the temperature of the evaporator and its surroundings, but also turns the refrigerant into a low-temperature, low-pressure gas. The refrigerant coming out of the evaporator passes through the gas-liquid separator and returns to the compressor. The above process is repeated to transfer the heat inside the refrigeration equipment to the air outside the box, thus achieving the purpose of refrigeration.

[0050] A fan 130 is installed in the air duct of the refrigeration equipment to regulate the air circulation inside the refrigeration equipment. For example, the fan 130 can allow air to enter the evaporator for heat exchange and deliver the heated air into at least one freezer or refrigerator compartment of the refrigeration equipment.

[0051] Heater 140, located inside housing 110, is used to melt frost that has condensed in the refrigeration equipment.

[0052] The memory contains a target model used to implement intelligent control functions for the refrigeration equipment. The target model can be a deep learning model, an artificial intelligence model, etc., and this embodiment is not limited to this. Intelligent control functions include energy-saving control, fault detection, food identification, etc. For example, the memory may store the program algorithm of the target model, and the controller can implement the corresponding intelligent control functions by running the program algorithm of the target model stored in the memory.

[0053] The controller is used to control the operating status of refrigeration equipment, the operating parameters of devices such as compressors, fans, and heaters, and to run the target model in the memory to achieve corresponding intelligent control functions. For example, it controls the refrigeration equipment to enter or exit energy-saving mode; however, this application will not provide further examples of these functions.

[0054] It should be noted that refrigeration equipment may also include other components ( Figure 1 (not shown in the image), such as refrigerator temperature sensor, freezer temperature sensor, humidity sensor, etc., which will not be listed here.

[0055] Please refer to Figure 2 This is a system architecture diagram of a refrigeration device provided in an embodiment of this application. Figure 2 As shown, the system architecture of this refrigeration equipment may include, but is not limited to, components such as controller 210, temperature sensor 220, fan 230, compressor 240, heater 250, communication device 260, and memory 270. The system architecture of the refrigeration equipment may also include... Figure 2 The number of components shown may be more or less, or some components may be combined, or different component arrangements may be made.

[0056] The controller 210 is the control center of the refrigeration equipment. It connects various parts of the refrigeration equipment via various interfaces and lines. By running or executing software programs and / or modules stored in the memory 270, and by calling data stored in the memory 270, it performs various functions and processes data, thereby providing overall monitoring of the refrigeration equipment. Optionally, the controller 210 may include one or more processing units; preferably, the controller 210 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the controller 210.

[0057] Temperature sensor 220 is used to collect temperature data inside the freezer or refrigerator compartment. It should be noted that there can be multiple temperature sensors 220, each positioned at a different location within the refrigeration unit, to collect temperature data from different locations within the refrigeration system.

[0058] Fan 230 is used to regulate the air circulation inside the refrigeration equipment.

[0059] Compressor 240 is used in conjunction with other components in the refrigeration system to provide cooling capacity to the refrigeration equipment.

[0060] Heater 250 is used to melt frost that has condensed in refrigeration equipment.

[0061] Communication device 260 is a component used to communicate with target smart home appliances or servers according to various communication protocol types. For example, communication device 260 may include at least one of the following: a wireless communication technology (WiFi) module, a Bluetooth module, a wired Ethernet module, and a near-field communication (NFC) module, or other network communication protocol chips or NFC protocol chips, as well as an infrared receiver. Communication device 260 can be used to communicate with other devices or communication networks (such as Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc.). Optionally, controller 210 can communicate with user-used terminal devices (such as mobile phones) through communication device 260 to obtain user adjustment commands for the cooling equipment, thereby enabling remote control of the cooling equipment.

[0062] The memory 270 can be used to store software programs and modules. The controller 210 executes various functional applications and data processing of the refrigeration equipment by running the software programs and modules stored in the memory 270. For example, the controller 210 obtains the running results by running the algorithm of the target model stored in the memory 270, and realizes intelligent control of the refrigeration equipment based on the running results. The memory 270 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, application programs required for at least one function, etc.; the data storage area may store data created according to the use of the refrigeration equipment (such as the operating parameters of the compressor 240 and the temperature data collected by the temperature sensor 220). In addition, the memory 270 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0063] Optionally, the system architecture of the refrigeration equipment may also include a timer to detect the operating time of each component, such as the operating time of the compressor, the operating time of the heater, etc., and store the acquired duration information in the memory 270 so that the controller 210 can control the refrigeration equipment.

[0064] By introducing the hardware components in the system architecture of the refrigeration equipment, we can understand the function of each component. The following section will further describe the algorithm execution method for refrigeration equipment provided in the embodiments of this application.

[0065] Please refer to Figure 3 This is a control flowchart of a controller provided in an embodiment of this application.

[0066] S301 breaks down the target algorithm task corresponding to the target model into multiple algorithm subtasks.

[0067] The target model can be a deep learning model or an AI model. It should be understood that the target model involved in the embodiments of this application can be a pre-trained model. The target algorithm task can be understood as all the inference and computation processes involved in the process of inputting input data into the target model and obtaining the output result of the target model.

[0068] For example, taking the target model as the fault detection model, the input data is the operating data of the refrigeration equipment over a period of time. The controller inputs the operating data into the target model and runs the target model to obtain the fault detection result. The entire calculation process is the target algorithm task corresponding to the fault detection model.

[0069] Before executing the target algorithm task, it can be decomposed into multiple sub-tasks based on its model structure, data dependencies, and computational characteristics. The model structure, also known as the network structure, refers to the static, logical framework design of the model, defining the connections and data dependencies between its computational components (or network layers). Data dependencies refer to the constraints on the execution order between two or more tasks due to accessing the same data during computation. For example, in deep learning models, the output of the convolutional layer is the input of the pooling layer; therefore, the pooling layer's algorithm depends on the convolutional layer's algorithm. Computational characteristics describe the resource requirements and computational complexity of the target model when executed on hardware. For example, convolutional layers are computationally intensive and have high parallelization potential, while fully connected layers are memory-intensive, requiring frequent readings of large weight matrices.

[0070] In some embodiments, the controller can perform a coarse-grained first split operation on the target algorithm task based on its model structure, obtaining the algorithm task corresponding to each network layer. The first split operation can be understood as splitting the task according to the network layer of the model structure as the basic unit. For example, if the model structure corresponding to the target algorithm task includes four network layers, then the target algorithm task is split into algorithm tasks corresponding to each of the four network layers. Then, based on the internal data dependencies and computational characteristics of the algorithm tasks corresponding to each network layer, a fine-grained second split operation is performed on the algorithm tasks corresponding to each network layer, obtaining multiple algorithm subtasks. The second split operation can be understood as, based on the first split operation, further splitting the algorithm tasks corresponding to each network layer into smaller, lower-level algorithm subtasks according to the internal data dependencies and computational characteristics of the algorithm tasks corresponding to each network layer. By performing fine-grained splitting on the algorithm tasks corresponding to each network layer, the granularity of the resulting multiple algorithm subtasks can be matched with the granularity of the remaining available resources of the controller in each execution cycle.

[0071] For example, the controller identifies the internal data dependencies of each network layer, that is, whether the various parts of the output data within each network layer are independent during computation, and identifies computations that can be executed in parallel and those that need to be executed sequentially. The controller also identifies the computational characteristics of each network layer, that is, the inherent computational patterns and resource requirements of each network layer. A description of computational characteristics can be found in the preceding text and will not be repeated here. Then, based on the identified computational characteristics and data dependencies, the algorithm task corresponding to each network layer is broken down, resulting in multiple algorithm subtasks.

[0072] The following section uses the target model as a deep learning model, whose model structure includes convolutional layers, pooling layers, and fully connected layers, as an example to illustrate how to break down the target algorithm task into multiple algorithmic subtasks.

[0073] After the controller performs the first split operation according to the model structure of the deep learning model, it can obtain the algorithm tasks corresponding to the convolutional layer, the pooling layer, and the fully connected layer.

[0074] For convolutional layer algorithms, the computational characteristics and internal data dependencies of convolutional layers are identified as follows: Convolutional networks perform calculations in matrix form; the calculation process for each output channel depends on the input data, parameter matrix, and convolution kernel; the calculation of each output channel is independent, and there is no interference between output channels. Based on this, the convolutional layer algorithm can be decomposed according to the channel dimension of the output feature map, resulting in M ​​sub-tasks. Each of the M sub-tasks is responsible for calculating a portion of the output channels, where M is a positive integer. The activation function (such as ReLU) is processed element-wise and executed in conjunction with the corresponding convolution calculation sub-task to avoid additional data transmission overhead.

[0075] For the pooling layer algorithm task, the identified computational characteristics and internal data dependencies are as follows: the smallest computational unit of the pooling layer is calculated using a pooling window (a spatial region), and the computation process is related to the size of the pooling window and the input data. Based on this, for the pooling layer algorithm task, the controller can decompose the pooling layer algorithm task according to the spatial dimension of the output feature map of the pooling layer, resulting in N algorithm subtasks. Here, N is a positive integer.

[0076] For the algorithm task of the fully connected layer, the identified computational characteristics and internal data dependencies are as follows: the fully connected layer network performs calculations in matrix form. The computation of each output neuron depends on the input data and parameter matrix, and the computation of each output neuron is independent, without interference between them. Based on this, the controller can decompose the algorithm task of the fully connected layer according to the output neurons of the fully connected layer, obtaining P algorithm subtasks, where P is a positive integer.

[0077] Finally, the controller obtains multiple algorithm subtasks based on the M, N, and P algorithm subtasks. For example, the M, N, and P algorithm subtasks can be combined into multiple algorithm subtasks.

[0078] It should be noted that the embodiments of this application are illustrated using a deep learning model as an example. However, in practical applications, the target model of the embodiments of this application can also be other models, such as artificial intelligence models, etc. The embodiments of this application do not limit this.

[0079] S302, within the remaining execution time of at least one execution cycle of multiple execution cycles, execute at least one algorithm subtask from multiple algorithm subtasks; wherein, the remaining execution time is the remaining time after all core tasks have been executed within at least one execution cycle, and the core tasks are used to achieve the normal operation of the refrigeration equipment.

[0080] The execution cycle can be understood as a fixed working cycle of the controller. Within each execution cycle, the controller typically executes multiple core tasks. These core tasks can be understood as the main control tasks on the main control chip (i.e., the controller) of the refrigeration equipment, such as temperature control, compressor control, fan control, heater control, and communication with other components. These will not be illustrated in detail in this embodiment. The number of core tasks in a refrigeration equipment is typically in the dozens, and the execution frequency of some core tasks varies. For example, some core tasks may need to be executed every execution cycle, some may be executed every few execution cycles, and some may be executed every ten or more execution cycles. Based on this, the controller typically groups all core tasks according to their execution frequency, executing one group of core tasks in each execution cycle, and so on in a cyclical manner. This is why the controller of the refrigeration equipment needs to operate continuously and periodically.

[0081] The remaining execution time of each execution cycle in at least one execution cycle refers to the idle time remaining after the controller has completed all the core tasks to be executed in that execution cycle and before the start of the next execution cycle.

[0082] Since the core tasks executed in each execution cycle may differ, the remaining execution time in each cycle will also vary. Therefore, if the remaining execution time in an execution cycle is sufficiently long, the controller can complete at least one algorithmic subtask within that cycle's remaining execution time. Conversely, if the remaining execution time in an execution cycle is relatively short, the controller can complete at least one algorithmic subtask within the remaining execution time of at least two execution cycles.

[0083] S303 runs multiple execution cycles until multiple algorithm subtasks have finished running, and the running results of the target model are obtained.

[0084] The results of the target model's operation are related to the intelligent control functions implemented by the target model.

[0085] For example, if the intelligent control function implemented by the target model is energy-saving control, the output operating result can be an energy-saving strategy; as another example, if the intelligent control function implemented by the target model is fault detection, the output operating result can be the fault detection result of the refrigeration equipment. The input data of the target model can be the operating data of the refrigeration equipment within a preset time period, etc., and this application embodiment does not limit this.

[0086] Typically, when running AI algorithms in refrigeration equipment, the complete inference time can reach around 8 seconds, while the remaining execution time of the controller in each execution cycle is usually in the milliseconds. Therefore, even if the target algorithm task is broken down into multiple algorithm subtasks, it is still impossible to complete them all within a single execution cycle. The controller needs to execute multiple algorithm subtasks within the remaining execution time of several consecutive execution cycles until all algorithm subtasks are completed before the result of the target model can be obtained.

[0087] By breaking down the target algorithm task, multiple algorithm subtasks with the remaining execution time of each execution cycle of the controller are obtained. By making full use of the remaining available resources of each execution cycle, multiple algorithm subtasks can be executed. Thus, under the hardware constraints of the main control chip, the AI ​​algorithm can be run without affecting the normal operation of the refrigeration equipment.

[0088] Since the execution state and intermediate results before the interruption need to be stored after an algorithm subtask is interrupted, this will lead to frequent storage resource consumption and additional overhead. Therefore, in order to reduce the number of interruptions, the controller can estimate the remaining execution time of each execution cycle and the estimated execution time of each algorithm subtask, that is, calculate the number of algorithm subtasks that can be executed in each execution cycle, thereby reducing the storage resource consumption and performance loss caused by task interruptions.

[0089] In one possible implementation, the controller can calculate the estimated remaining execution time for each execution cycle based on the estimated execution time of each core task among multiple core tasks and the total execution time for each execution cycle. The total execution time for each execution cycle can be understood as the cycle length of each execution cycle. The total execution time for each execution cycle is typically pre-configured in the controller; the total execution time for different controllers may be the same or different, and this embodiment does not limit this. The estimated execution time for each core task can also be pre-configured in the controller. The estimated execution time for each core task can be obtained experimentally or configured empirically, and this embodiment does not limit this. For example, if the total execution time for each execution cycle is X milliseconds (ms), and the estimated total execution time for multiple core tasks is Ams, then the estimated remaining execution time for each execution cycle can be calculated as (XA) ms.

[0090] Furthermore, the controller can determine at least one algorithm subtask to be executed in each execution cycle based on the estimated remaining execution time for each execution cycle, the estimated execution time for each algorithm subtask, and the data dependencies between multiple algorithm subtasks. Since some of the multiple algorithm subtasks need to be executed sequentially, the determination of the at least one algorithm subtask to be executed in each execution cycle needs to be made sequentially according to the data dependencies between the multiple algorithm subtasks.

[0091] It should be understood that at least one algorithmic subtask to be executed in each execution cycle is determined to be one that can be completed within the estimated remaining execution time of each execution cycle. That is, the estimated total execution time of at least one algorithmic subtask corresponding to each execution cycle is less than or equal to the estimated remaining execution time of each execution cycle.

[0092] For example, in practical applications, the controller can maintain two task queues: a core task queue and an algorithm subtask queue. The core task queue consists of tasks pre-grouped and sorted according to their execution frequency; each group of core tasks typically corresponds to one execution cycle. The algorithm subtask queue is sorted according to the data dependencies between multiple algorithm subtasks. Within the estimated remaining execution time of each execution cycle, at least one algorithm subtask from the algorithm subtask queue can be executed.

[0093] For example, please refer to Figure 4 This is a schematic diagram illustrating the time allocation of an execution cycle according to an embodiment of this application. Figure 4 As shown, the total duration of execution cycle 1 is X milliseconds (ms). Within execution cycle 1, the controller needs to perform core tasks such as temperature control, compressor control, fan control, display and communication, with an estimated total execution time of Ams. The controller pre-allocates at least one algorithm subtask within execution cycle 1, including subtask A, subtask B, subtask C and subtask D, with an estimated remaining execution time of (XA) ms.

[0094] By estimating the remaining execution time of each execution cycle, at least one algorithm task matching the estimated remaining execution time can be pre-assigned to each execution cycle, thereby effectively reducing the number of task interruptions, thus reducing storage resource consumption and additional performance overhead.

[0095] In practical applications, due to the uncertainty of the execution environment, the actual remaining execution time of each execution cycle may differ from the estimated remaining execution time. For example, when the controller is disturbed, the actual remaining execution time may be less than the estimated remaining execution time; or the controller may complete all core tasks ahead of schedule, resulting in the actual remaining execution time being longer than the estimated remaining execution time. Therefore, before executing at least one algorithmic subtask corresponding to each execution cycle, the controller can compare the actual remaining execution time with the estimated remaining execution time of each execution cycle to dynamically adjust the number of algorithmic subtasks that can be executed in each execution cycle.

[0096] Please refer to Figure 5 This application provides a control flow for a controller according to an embodiment of the present application. Figure 2 .

[0097] S501, after detecting that all core tasks of each execution cycle have been completed, calculates the first actual remaining execution time of each execution cycle based on the total duration and the execution time of each execution cycle.

[0098] The execution time represents the actual execution time used to execute all core tasks in each execution cycle.

[0099] For example, the controller can calculate the first actual remaining execution time for each execution cycle based on the difference between the total duration and the execution duration.

[0100] S502, determine whether the first actual remaining execution time is greater than or equal to the estimated remaining execution time.

[0101] If the first actual remaining execution time is greater than or equal to the estimated remaining execution time, it indicates that at least one algorithm subtask can be completed within the execution cycle. Therefore, proceed to step S503. If the first actual remaining execution time is less than the estimated remaining execution time, it indicates that at least one algorithm subtask cannot be fully completed within the execution cycle. Therefore, to avoid task interruption, it is necessary to adjust the number of algorithm subtasks that can be completed within the execution cycle. Proceed to step S504.

[0102] S503, within the first actual remaining execution time, execute at least one algorithm subtask according to the data dependencies between multiple algorithm subtasks.

[0103] The explanation of data dependencies can be found in the preceding text.

[0104] In some embodiments, the controller may determine the execution order of at least one algorithmic subtask based on the data dependencies of at least one algorithmic subtask.

[0105] For example, if at least one algorithmic subtask includes subtask A, subtask B, and subtask C, and subtask C depends on subtask A, and subtask B depends on subtask C, then the execution order of at least one algorithmic subtask is subtask A - subtask C - subtask B.

[0106] The controller can then execute at least one algorithm subtask within the first actual remaining execution time according to the determined execution order.

[0107] S504, based on the estimated execution time of each algorithm subtask in at least one algorithm subtask, calculate the target number of algorithm subtasks that can be executed within the first actual remaining execution time.

[0108] If the first actual remaining execution time is less than the estimated actual remaining execution time, since at least one algorithm subtask cannot be completed within the first actual remaining execution time, the controller can calculate the target number of algorithm subtasks that can actually be executed within the first actual remaining execution time based on the estimated execution time corresponding to each of the at least one algorithm subtask, in order to reduce the number of task interruptions. It should be understood that the target number is an integer greater than or equal to 0.

[0109] S505, depending on the target number, execute at least one algorithmic subtask within the remaining execution time of at least two execution cycles.

[0110] Since at least one algorithmic subtask cannot be completed within one execution cycle, the other algorithmic subtasks besides the target number must be completed in subsequent execution cycles. The number of subsequent execution cycles is specifically related to the first actual remaining execution time of each execution cycle and the execution time of the other algorithmic subtasks. For example, a subsequent execution cycle could be the next execution cycle after the current execution cycle, or the last two execution cycles, etc. This application does not limit this.

[0111] The following example illustrates how to execute at least one algorithmic subtask within the remaining execution time of at least two execution cycles, taking the subsequent execution cycle as the next execution cycle of the current execution cycle as an example.

[0112] The controller can, within the first actual remaining execution time of the current execution cycle, execute at least one algorithmic subtask that matches the target number, according to the data dependencies between multiple algorithmic subtasks. For example, if the target number is 0, no algorithmic subtasks are executed within the first actual remaining execution time of the current execution cycle; if the target number is 1, one algorithmic subtask from the at least one algorithmic subtask is executed within the first actual remaining execution time of the current execution cycle. Within the remaining execution time of the next execution cycle, the controller executes at least one unexecuted algorithmic subtask according to the data dependencies between multiple algorithmic subtasks.

[0113] Because some core tasks in certain execution cycles may be completed ahead of schedule, the actual remaining execution time for these cycles is longer than that of at least one algorithm subtask. Furthermore, even after completing at least one algorithm subtask, there may still be a considerable amount of time remaining for execution. Therefore, within the first actual remaining execution time, assuming at least one algorithm subtask for each execution cycle has been completed, the second actual remaining execution time for each execution cycle is calculated based on the already executed time and the total execution time of each cycle. In this case, the already executed time for each execution cycle is the time consumed by executing all core tasks and at least one corresponding algorithm subtask for that cycle. The total execution time for each cycle can be found in the preceding text.

[0114] Furthermore, the controller can determine whether to execute the second algorithm subtask based on the second actual remaining execution time and the estimated execution time of the second algorithm subtask. The second algorithm subtask is the next algorithm subtask after at least one algorithm subtask among multiple algorithm subtasks arranged according to data dependencies.

[0115] If the second actual remaining execution time is greater than or equal to the estimated execution time of the second algorithm subtask, it indicates that the second algorithm subtask can be executed completely. Therefore, the second algorithm subtask is executed within the second actual remaining execution time.

[0116] It should be understood that this embodiment is illustrated by taking the second actual remaining execution time as an example to satisfy the completion of one second algorithm subtask. However, in actual applications, the second actual remaining execution time can satisfy the completion of multiple algorithm subtasks. This application embodiment does not limit this.

[0117] In the above embodiments, by calculating the number of algorithm subtasks that can be executed in each execution cycle, the number of execution interruptions of algorithm subtasks can be effectively avoided, thereby effectively reducing storage resource consumption and additional performance overhead.

[0118] In some cases, to maximize the utilization of the controller's remaining available resources, the controller may attempt to execute at least one algorithmic subtask within the remaining execution time of each execution cycle. However, to ensure the proper functioning of the cooling equipment, if any algorithmic subtask fails to complete before the end of each execution cycle, the execution of that subtask is immediately interrupted, and the current execution state and intermediate results are saved. This allows the execution state and intermediate results of the previous cycle to be restored within the remaining execution time of the next execution cycle, enabling the continuation of the interrupted algorithmic subtask.

[0119] In one possible implementation, for each execution cycle within at least one execution cycle, before the end of each execution cycle, it is detected whether at least one algorithm subtask has been completed. If the first algorithm subtask has not been completed, execution of the first algorithm subtask is stopped, and its current execution state and intermediate results are saved. The current execution state can be understood as the execution context information of the first algorithm subtask, and the intermediate results can be understood as the data that the first algorithm subtask has calculated but has not yet constituted its final output at the time of interruption. Finally, within the remaining execution time of subsequent execution cycles of each execution cycle, the current execution state and intermediate results of the first algorithm subtask are obtained, and execution of the first algorithm subtask continues to complete it. The number of subsequent execution cycles is related to its actual remaining execution time and the execution time of the first algorithm subtask; this embodiment does not limit this.

[0120] In this implementation, a state management system also runs within the controller. For an example, please refer to... Figure 6 This is a schematic diagram of the structure of a state management system provided in an embodiment of this application. Figure 6 As shown, the state management system includes a state caching mechanism and a recovery mechanism. The state caching mechanism is used to save the current execution state and intermediate results of the interrupted algorithm subtasks. The recovery mechanism is used to quickly load the execution context and intermediate results of the interrupted algorithm subtasks from memory when the interrupted algorithm subtasks are rescheduled (executed) in subsequent execution cycles, so as to continue the execution of the interrupted algorithm subtasks.

[0121] In this implementation, the controller does not need to calculate the number of algorithm subtasks that can be executed in each execution cycle. After detecting that all core tasks in each execution cycle have been completed, it executes at least one of the multiple algorithm subtasks according to the data dependencies between them within the remaining execution time of each cycle until the end of each cycle. The controller then saves the current execution state and intermediate results of any interrupted algorithm subtasks for subsequent continuation. This approach maximizes the utilization of remaining available resources in each execution cycle, improving resource utilization.

[0122] In some cases, due to the uncertainty of the controller's execution environment, the actual remaining execution time of some execution cycles may be extremely short. In such situations, if algorithm subtasks are still executed, there is a possibility that after switching from executing core tasks to executing algorithm subtasks, the execution cycle may end just as the algorithm subtasks begin, leading to an increase in interruptions and additional overhead. Therefore, the controller can calculate the actual remaining execution time of each execution cycle in real time after all core tasks in each execution cycle have been completed. If the actual remaining execution time is greater than or equal to a preset execution time, the execution of the algorithm subtasks is allowed to continue; if the actual remaining execution time is less than the preset execution time, the algorithm subtasks are not executed, and the execution cycle is waited for to end before starting the next execution cycle. The preset execution time can be pre-configured in the controller and can be set according to actual conditions; this embodiment does not limit this setting.

[0123] In one possible implementation, the controller may also acquire the execution status of the target algorithm task before executing at least one of the multiple algorithm subtasks. If the execution status of the target algorithm task is pending execution, the execution of the target algorithm task begins, that is, at least one of the multiple algorithm subtasks is executed within the remaining execution time of at least one execution cycle.

[0124] Since the target algorithm task is typically a periodic task, such as executing every 5 or 10 minutes, if the target algorithm task is determined to be in a pending execution state, at least one algorithm subtask is executed within the remaining execution time of at least one execution cycle. This approach effectively avoids excessive consumption of computing resources and ensures efficient utilization of computing resources.

[0125] For example, in order to more clearly illustrate the algorithm operation method provided in the embodiments of this application, the following is combined with Figure 7 The control flow of a controller is shown. Figure 3 Alternatively, it can be referred to as a flowchart of an algorithm execution method. Taking the current execution cycle as execution cycle 1 as an example, the algorithm execution method provided in the embodiments of this application will be illustrated.

[0126] S701 executes multiple core tasks corresponding to execution cycle 1 after execution cycle 1 begins.

[0127] The introduction of the core tasks can be found in the content mentioned above, and will not be repeated here.

[0128] S702 determines whether multiple core tasks have been completed.

[0129] The controller can monitor the execution status of multiple core tasks in real time and determine whether all core tasks have been completed.

[0130] If multiple core tasks have been completed, proceed to step S703. If multiple core tasks have not been completed, continue execution until multiple core tasks have been completed.

[0131] S703, calculate the actual remaining execution time of execution cycle 1.

[0132] The controller can calculate the actual remaining execution time of execution cycle 1 based on the actual execution time of multiple core tasks in execution cycle 1 and the total execution time of execution cycle 1.

[0133] S704, determine whether the actual remaining execution time is greater than or equal to the preset execution time.

[0134] If the actual remaining execution time of execution cycle 1 is greater than or equal to the preset execution time, then step S705 is executed; if the actual remaining execution time of execution cycle 1 is less than the preset execution time, then step S711 is executed, and execution cycle 1 is waited for to end.

[0135] S705, determine whether the execution status of the target algorithm task is pending execution.

[0136] If the execution status of the target algorithm task is pending, proceed to step S706; if the execution status of the target algorithm task is not executing, proceed to step S711 and wait for execution cycle 1 to end.

[0137] S706: Based on the data dependencies of multiple algorithm subtasks, obtain the algorithm subtask to be executed 1 and restore the previous execution context.

[0138] The explanation of data dependencies can be found in the previous text and will not be repeated here.

[0139] S707, within the actual remaining execution time of execution cycle 1, execute algorithm subtask 1.

[0140] S708, determine whether algorithm subtask 1 has been completed.

[0141] If algorithm subtask 1 is completed, then step S709 is executed; if algorithm subtask 1 is not completed, then step S710 is executed.

[0142] S709, Execute algorithm subtask 2 according to the data dependencies of multiple algorithm subtasks.

[0143] S710 saves the current execution status and intermediate results of the unfinished algorithm subtask 1.

[0144] After performing step S710, proceed to step S711.

[0145] S711, determine whether the execution time of execution cycle 1 has reached the total execution time of execution cycle 1.

[0146] If the execution time of execution cycle 1 has reached the total execution time of the execution cycle, indicating that execution cycle 1 has ended, then step S712 is executed. If the execution time of execution cycle 1 is less than the total execution time of the execution cycle, then either algorithm subtask 1 or algorithm subtask 2 is executed. For example, if algorithm subtask 1 has not been completed, then algorithm subtask 1 is executed; if algorithm subtask 2 has not been completed, then algorithm subtask 2 is executed.

[0147] S712 determines whether the target algorithm task has been completed.

[0148] If the target algorithm task has been completed, proceed to step S713; if the target algorithm task has not been completed, proceed to step S714.

[0149] S713 outputs the running results.

[0150] The description of the results can be found in the previous text, and will not be repeated here.

[0151] S714, save the current state.

[0152] Saving the current state can be understood as saving the current execution state and intermediate results of the target algorithm task.

[0153] S715, begin the next execution cycle.

[0154] It should be understood that, Figure 7 This explanation uses one execution cycle as an example. In practical applications, the process of the next execution cycle can also refer to the algorithm execution method described above, and will not be illustrated again here. Furthermore, Figure 7The example described uses the execution of two algorithm subtasks (algorithm subtask 1 and algorithm subtask 2) in one execution cycle. In practical applications, the number of algorithm subtasks that can be executed in one execution cycle can be more or less, and this application does not limit this.

[0155] For example, in practical applications, multiple algorithm subtasks can be pre-split or obtained after determining that the target algorithm task is in a state to be executed. In this case, taking a deep learning model as the target model, which includes convolutional layers, pooling layers, and fully connected layers as an example, the controller can first detect whether the current execution progress of the target algorithm task is a convolutional layer, a pooling layer, or a fully connected layer. If it is a convolutional layer, the algorithm task for the convolutional layer is split; if it is a pooling layer, the algorithm task for the pooling layer is split; and if it is a fully connected layer, the algorithm task for the fully connected layer is split.

[0156] The following is combined with Figures 8-10 The control flow of a controller is shown. Figures 4 to 6 This paper provides an example illustrating the process of splitting algorithm tasks for convolutional layers, pooling layers, and fully connected layers after determining that the target algorithm task is in the state to be executed.

[0157] Please refer to Figure 8 This application provides a control flow for a controller according to an embodiment of the present application. Figure 4 .

[0158] S801, when the current execution progress is a convolutional layer, splits the output feature map according to the output channel to obtain M algorithm subtasks corresponding to the convolutional layer.

[0159] It should be understood that S801 is executed when the actual remaining execution time of the execution cycle is greater than or equal to the preset execution time, the target algorithm task is in a pending execution state, and the current execution progress of the target algorithm task is a convolutional layer.

[0160] S802, according to the data dependency, execute algorithm subtask A among the M algorithm subtasks.

[0161] The explanation of data dependencies can be found in the previous text and will not be repeated here.

[0162] S803, apply the activation function.

[0163] S804, save the intermediate feature map.

[0164] Save the intermediate feature map after executing subtask A of the algorithm.

[0165] S805, determine whether the execution time of execution cycle 1 has reached the total execution time of execution cycle 1.

[0166] The descriptions of the execution time and total duration can be found in the previous text and will not be repeated here.

[0167] If the execution time of execution cycle 1 reaches the total execution time of execution cycle 1, it indicates that execution cycle 1 has not yet ended, and the algorithm subtasks can continue to be executed, so proceed to step S806. If the execution time of execution cycle 1 reaches the total execution time of execution cycle 1, it indicates that execution cycle 1 has ended, and the current execution state and intermediate results need to be saved to start the next execution cycle, so proceed to step S808.

[0168] S806 determines whether all algorithm subtasks in the current layer have been completed.

[0169] If none of the algorithm subtasks in the current layer are completed, proceed to step S807. If all algorithm subtasks in the current layer are completed, proceed to step S810.

[0170] S807, move to the next algorithm subtask.

[0171] S808 saves the current execution status and intermediate results.

[0172] S809, proceed to the next execution cycle.

[0173] The execution process of the next execution cycle can be referred to as the execution process of execution cycle 1, which will not be repeated here.

[0174] S810 determines whether there are any unfinished network layers.

[0175] If there are still incomplete network layers, proceed to step S811. If all network layers are completed, proceed to step S812.

[0176] S811, move to the next network layer.

[0177] It should be understood that moving to the next network layer requires executing the procedures of that next network layer; it is not done within the current network layer. Figure 8 As shown in the image.

[0178] S812 outputs the running results.

[0179] The description of the results can be found in the previous text, and will not be repeated here.

[0180] Please see Figure 9 This application provides a control flow for a controller according to an embodiment of the present application. Figure 5 .

[0181] S901, when the current execution progress is the pooling layer, split the output feature map according to the spatial dimension to obtain N algorithm subtasks corresponding to the pooling layer.

[0182] S902, according to the data dependency relationship, execute algorithm subtask B among N algorithm subtasks.

[0183] S903 performs a region pooling operation.

[0184] S904, save the pooling results.

[0185] S905, determine whether the execution time of execution cycle 1 has reached the total execution time of execution cycle 1.

[0186] The descriptions of the execution time and total duration can be found in the previous text and will not be repeated here.

[0187] If the execution time of execution cycle 1 reaches the total execution time of execution cycle 1, it indicates that execution cycle 1 has not yet ended, and the algorithm subtasks can continue to be executed, so proceed to step S906. If the execution time of execution cycle 1 reaches the total execution time of execution cycle 1, it indicates that execution cycle 1 has ended, and the current execution state and intermediate results need to be saved to start the next execution cycle, so proceed to step S908.

[0188] S906 determines whether all algorithm subtasks in the current layer have been completed.

[0189] If all algorithm subtasks in the current layer are not completed, proceed to step S907. If all algorithm subtasks in the current layer are completed, proceed to step S910.

[0190] S907, move to the next algorithm subtask.

[0191] S908 saves the current execution status and intermediate results.

[0192] S909, proceed to the next execution cycle.

[0193] The execution process of the next execution cycle can be referred to as the execution process of execution cycle 1, which will not be repeated here.

[0194] S910 determines whether there are any unfinished network layers.

[0195] If there are still incomplete network layers, proceed to step S911. If all network layers are completed, proceed to step S912.

[0196] S911, move to the next network layer.

[0197] It should be understood that moving to the next network layer requires executing the procedures of that next network layer; it is not done within the current network layer. Figure 9 As shown in the image.

[0198] S912 outputs the running results.

[0199] The description of the results can be found in the previous text, and will not be repeated here.

[0200] Please refer to Figure 10 The control flow of the controller provided in the embodiments of this application Figure 6 .

[0201] S1001, with the current execution progress at the fully connected layer, split according to the output neurons of the fully connected layer to obtain P algorithm subtasks corresponding to the fully connected layer.

[0202] S1002, according to the data dependency, execute algorithm subtask C among P algorithm subtasks.

[0203] The explanation of data dependencies can be found in the previous text and will not be repeated here.

[0204] S1003, calculate the matrix multiplication of the current algorithm subtask C.

[0205] S1004, Accumulated bias term.

[0206] S1005, save the output results.

[0207] S1006, determine whether the execution time of execution cycle 1 has reached the total execution time of execution cycle 1.

[0208] The descriptions of the execution time and total duration can be found in the previous text and will not be repeated here.

[0209] If the execution time of execution cycle 1 reaches the total execution time of execution cycle 1, it indicates that execution cycle 1 has not yet ended, and the algorithm subtasks can continue to be executed, so proceed to step S1007. If the execution time of execution cycle 1 reaches the total execution time of execution cycle 1, it indicates that execution cycle 1 has ended, and the current execution state and intermediate results need to be saved to start the next execution cycle, so proceed to step S1009.

[0210] S1007, determine whether all algorithm subtasks in the current layer have been completed.

[0211] If all algorithm subtasks in the current layer are not completed, proceed to step S1008. If all algorithm subtasks in the current layer are completed, proceed to step S1011.

[0212] S1008, move to the next algorithm subtask.

[0213] S1009, save the current execution status and intermediate results.

[0214] S1010, start the next execution cycle.

[0215] The execution process of the next execution cycle can be referred to as the execution process of execution cycle 1, which will not be repeated here.

[0216] S1011, determine if there are any unfinished network layers.

[0217] If there are still incomplete network layers, proceed to step S1012. If all network layers are completed, proceed to step S1013.

[0218] S1012, move to the next network layer.

[0219] It should be understood that moving to the next network layer requires executing the procedures of that next network layer; it is not done within the current network layer. Figure 10 As shown in the image.

[0220] S1013, output the running results.

[0221] The description of the results can be found in the previous text, and will not be repeated here.

[0222] In this embodiment, by splitting the target algorithm task and utilizing the fragmented time after the completion of the main control task in each execution cycle to execute the split algorithm subtasks, the problem of running AI algorithms is effectively solved without affecting the normal operation of the cooling function of the cooling equipment when the main control chip resources of the cooling equipment are limited.

[0223] Based on the same inventive concept, this application provides an algorithm execution method. This method can be applied to the refrigeration equipment or other intelligent devices (such as user equipment) provided in any of the above embodiments, and can be executed by the controller in the refrigeration equipment or other intelligent devices. The algorithm execution method includes: splitting the target algorithm task corresponding to the target model into multiple algorithm subtasks; executing at least one algorithm subtask within the remaining execution time of at least one execution cycle of multiple execution cycles; wherein the remaining execution time is the time remaining after all core tasks in each execution cycle have been executed, and the core tasks are used to realize the normal operation of the refrigeration equipment; running multiple execution cycles until the multiple algorithm subtasks have finished running, and obtaining the running result of the target model.

[0224] It is worth noting that the method provided in this application belongs to the same inventive concept as the aforementioned refrigeration device. Therefore, this method may also include any other possible steps to achieve any technical effect and function that the refrigeration device and / or the controller in the refrigeration device can achieve. The embodiments of this application will not be elaborated upon here.

[0225] Based on the same inventive concept, this application provides a control device for a refrigeration device. The modules and units included in the control device can be implemented by a processor; alternatively, they can be implemented by specific logic circuits. During implementation, the processor can be a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP), or a field-programmable gate array (FPGA), etc. This device can be used with any of the refrigeration devices provided in the above embodiments.

[0226] The control device can be used to implement the following method: splitting the target algorithm task corresponding to the target model into multiple algorithm subtasks; executing at least one algorithm subtask within the remaining execution time of at least one execution cycle of multiple execution cycles; wherein, the remaining execution time is the remaining time after all core tasks are executed in each execution cycle, and the core tasks are used to realize the normal operation of the refrigeration equipment; running multiple execution cycles until the multiple algorithm subtasks are completed, and obtaining the running result of the target model.

[0227] In implementation, each step of the above method can be completed by integrated logic circuits in the processor's hardware or by instructions in software. The steps of the method disclosed in the embodiments of this application can be directly manifested as execution by a hardware processor, or as a combination of hardware and software modules within the processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor executes the instructions in the memory, combining them with its hardware to complete the steps of the above method. To avoid repetition, detailed descriptions are omitted here.

[0228] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0229] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0230] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0231] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0232] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0233] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to related technologies, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0234] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A refrigeration device, characterized in that, include: The cabinet has at least one freezer compartment and at least one refrigerator compartment. A refrigeration system for providing cooling capacity to the refrigeration equipment; A fan is used to regulate the air circulation inside the refrigeration equipment; A heater for melting the frost that has condensed in the refrigeration equipment; The memory contains a target model, which is used to implement the intelligent control function of the refrigeration equipment. The controller is configured to: The target algorithm task corresponding to the target model is divided into multiple algorithm subtasks; During the remaining execution time of at least one execution cycle in a plurality of execution cycles, at least one algorithm subtask among the plurality of algorithm subtasks is executed; wherein, the remaining execution time is the remaining time after all core tasks are executed in the at least one execution cycle, and the core tasks are used to realize the normal operation of the refrigeration equipment; The multiple execution cycles are run until the multiple algorithm subtasks have finished running, and the running result of the target model is obtained.

2. The refrigeration equipment according to claim 1, characterized in that, Each of the multiple execution cycles needs to execute multiple core tasks; the controller is also configured to: Based on the estimated execution time of each core task and the total execution time of each execution cycle, the estimated remaining execution time of each execution cycle is calculated. Based on the estimated remaining execution time for each execution cycle, the estimated execution time for each algorithm subtask, and the data dependencies between the multiple algorithm subtasks, determine the at least one algorithm subtask that needs to be executed in each execution cycle.

3. The refrigeration equipment according to claim 2, characterized in that, The controller is configured to: If it is detected that all core tasks of each execution cycle have been completed, the first actual remaining execution time of each execution cycle is calculated based on the total duration and the execution time of each execution cycle. If the first actual remaining execution time is greater than or equal to the estimated remaining execution time, at least one algorithm subtask is executed within the first actual remaining execution time according to the data dependencies between the plurality of algorithm subtasks.

4. The refrigeration equipment according to claim 3, characterized in that, The number of the at least one execution cycle is at least two; the controller is configured to: If the first actual remaining execution time is less than the estimated remaining execution time, the target number of algorithm subtasks that can be executed within the first actual remaining execution time is calculated based on the estimated execution time corresponding to each algorithm subtask in the at least one algorithm subtask. Based on the target number, the at least one algorithmic subtask is executed within the remaining execution time of the at least two execution cycles.

5. The refrigeration equipment according to claim 4, characterized in that, The controller is configured to: Within the first actual remaining execution time, according to the data dependency relationship between the plurality of algorithm subtasks, execute the algorithm subtask that matches the target number in at least one algorithm subtask; During the remaining execution time of the next execution cycle in the current execution cycle, the unexecuted algorithm subtasks in the at least one algorithm subtask are executed according to the data dependencies between the multiple algorithm subtasks.

6. The refrigeration equipment according to claim 3, characterized in that, The controller is also configured to: If at least one algorithm subtask has been completed within the first actual remaining execution time, the second actual remaining execution time of each execution cycle is calculated based on the execution time of each execution cycle and the total duration of each execution cycle. Based on the second actual remaining execution time and the estimated execution time of the second algorithm subtask, determine whether to execute the second algorithm subtask. The second algorithm subtask is the next algorithm subtask after the at least one algorithm subtask among a plurality of algorithm subtasks arranged according to the data dependency relationship. If the second actual remaining execution time is greater than or equal to the estimated execution time of the second algorithm subtask, the second algorithm subtask shall be executed within the second actual remaining execution time.

7. The refrigeration equipment according to claim 1, characterized in that, The controller is configured to: For each of the at least one execution cycle, before the end of each execution cycle, it is detected whether the at least one algorithm subtask has been completed; If the first algorithm subtask in the at least one algorithm subtask has not been completed, stop executing the first algorithm subtask and save the current execution state and intermediate results of the first algorithm subtask; Within the remaining execution time of the subsequent execution cycle of each execution cycle, the current execution status and intermediate results of the first algorithm subtask are obtained, and the first algorithm subtask is completed.

8. The refrigeration equipment according to any one of claims 1-7, characterized in that, The controller is also configured to: Before executing at least one of the plurality of algorithm subtasks, obtain the execution status of the target algorithm task; When the execution state of the target algorithm task is pending execution, at least one of the plurality of algorithm subtasks is executed during the remaining execution time of the at least one execution cycle.

9. The refrigeration equipment according to any one of claims 1-7, characterized in that, The controller is configured to: The target algorithm task is split into two parts based on its model structure to obtain the algorithm task corresponding to each network layer. Based on the internal data dependencies and computational characteristics of the algorithm tasks corresponding to each network layer, a second splitting operation is performed on the algorithm tasks corresponding to each network layer to obtain the multiple algorithm subtasks.

10. The refrigeration equipment according to claim 9, characterized in that, The target model is a deep learning model, and the model structure of the deep learning model includes convolutional layers, pooling layers, and fully connected layers; the controller is configured as follows: For the algorithm task of the convolutional layer, the algorithm task of the convolutional layer is split according to the channel dimension of the output feature map of the convolutional layer to obtain M algorithm subtasks; For the algorithm task of the pooling layer, the algorithm task of the pooling layer is split according to the spatial dimension of the output feature map of the pooling layer to obtain N algorithm subtasks; For the algorithm task of the fully connected layer, the algorithm task of the fully connected layer is split according to the output neurons of the fully connected layer to obtain P algorithm subtasks; where M, N and P are all positive integers; The plurality of algorithm subtasks are obtained based on the M algorithm subtasks, the N algorithm subtasks, and the P algorithm subtasks.

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