InGaN cantilever beam LED and TFT amplification integration-based opto-electro-mechanical accelerometer preparation method

Abstract

The invention discloses a preparation method of an opto-electro-mechanical accelerometer based on InGaN cantilever beam LED and TFT amplification integration, a silicon-based nitride wafer is used as a carrier, and a silicon substrate layer, an AlN layer, an AlGaN layer, an N-type GaN layer, an InGaN / GaN multi-quantum well layer, a P-type GaN layer, an insulating layer, a silicon dioxide layer and a Ti / Au metal layer are sequentially arranged from bottom to top. The device is composed of a light source, a detector and an MOSFET. In a light source module, an insulating layer is deposited above a P-type GaN layer (not including a circular area), so that only the circular area emits light, emitted light of a light source is output after being subjected to resonance enhancement of a micro-cavity dynamically modulated by a cantilever beam, the light intensity received by a detector is changed and converted into a corresponding light current signal, an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) is integrated at the output end of the detector, and the detection accuracy is improved. And then the amplified voltage signal can be converted into a current signal through the transconductance amplifier to be output.

Description

Technical Field

[0001] This invention fully utilizes the optoelectronic and mechanical properties of GaN materials and belongs to the fields of monolithic optoelectronic integration and opto-mechatronics technology. In particular, it relates to a high-density optoelectronic fusion accelerometer based on cantilever beam strength demodulation and its fabrication method. Background Technology

[0002] In the field of traditional opto-mechatronic accelerometers, device performance is often limited by factors such as parasitic effects, fabrication complexity, and system integration. Existing technologies typically integrate discrete components via metal interconnects. This approach not only introduces significant parasitic capacitance and resistance, limiting system bandwidth and response speed, but also affects device reliability due to interface instability. Particularly in applications requiring high-precision dynamic measurements, the traditional structure suffers from insufficient anti-interference capabilities and low signal conversion efficiency. To address these technical bottlenecks, the industry urgently needs an integrated solution capable of efficient photoelectric signal conversion and processing. Against this backdrop, this invention proposes an opto-mechatronic accelerometer fabrication method based on the integration of an InGaN cantilever LED and a TFT amplification. By integrating the detector in series with an N-channel enhancement-mode MOSFET, and sharing the same N-type GaN region between the drain and the LED, the parasitic effects introduced by the metal interconnect leads are fundamentally eliminated, resulting in a substantial improvement in system bandwidth and response speed. This technology fully utilizes existing LED epitaxial structures to achieve multifunctional integration without the need for additional complex processes such as ion implantation or secondary epitaxial growth, simplifying the fabrication process while ensuring device performance. Of particular note is that this integrated device architecture significantly enhances interface stability and anti-interference capabilities through TFT amplification integration technology, resulting in a qualitative leap in device reliability. In practical implementation, through innovative selective light emission design and a microcavity resonance enhancement mechanism, combined with MOSFET signal conversion and amplification functions integrated into the detector output, a complete signal chain from light intensity modulation to electrical signal output is constructed. This demonstrates the high adaptability and functional completeness of TFT amplification integration technology in the field of optoelectronic sensing, providing a completely new technical path for acceleration measurement. Summary of the Invention

[0003] To address the aforementioned issues, this invention discloses a method for fabricating an opto-electro-mechanical integrated display based on InGaN cantilever LED and TFT amplification. A silicon-based nitride wafer is used as the carrier, and the structure from bottom to top consists of a silicon substrate layer (1.5 mm), an AlN layer (300 nm), an AlGaN layer (350 nm), an N-type GaN layer (3500 nm), an InGaN / GaN multiple quantum well layer (90 nm), a P-type GaN layer (150 nm), an insulating layer (100 nm), a silicon dioxide layer (100 nm), and a Ti / Au metal layer (20 / 200 nm).

[0004] Furthermore, in this invention, it consists of three parts: a light source, a detector, and a MOSFET. The emitted light from the light source is enhanced by the microcavity resonance of the cantilever beam dynamic modulation and then output, causing the light intensity received by the detector to change and be converted into a corresponding photocurrent signal. By integrating a MOSFET at the output of the detector, it is converted into an amplified voltage signal, which can then be converted into a current signal output by a transconductance amplifier.

[0005] Furthermore, in the present invention, an insulating layer (100nm) is deposited on top of the P-type GaN layer (excluding the circular electrode region) in the light source module, so that only the circular region of the light source emits light.

[0006] Furthermore, in this invention, the detector and MOSFET are connected in series, and the drain of the MOSFET shares the same N-type GaN region as the LED. This not only avoids the parasitic effects introduced by interconnect leads but also significantly improves device reliability. The device fabrication requires no additional ion implantation or secondary epitaxial growth processes, greatly simplifying the device structure and process flow.

[0007] Furthermore, in this invention, the MOSFET is an enhancement-mode MOSFET. To achieve the enhancement-mode operation, an AlGaN layer is selected as the MOSFET channel layer, and N-type GaN is selected as the source and drain material.

[0008] Furthermore, in this invention, the MOSFET adopts a sawtooth gate structure, which improves the width-to-length ratio (W / L) and output current.

[0009] Furthermore, in this invention, since the AlGaN layer is located below the n-type GaN layer, the AlGaN channel region needs to be exposed through a trench etching structure. The gate metal simultaneously covers the trench sidewalls and bottom, thereby enhancing the gate voltage's ability to control the channel conductivity.

[0010] Furthermore, in this invention, the gate channel is first etched to the middle of the AlGaN layer.

[0011] The exposure,

[0012] Next, a 100nm thick high-quality SiO2 dielectric layer is grown at the gate channel and the gate electrode, and finally Ti / Au metal is deposited to form the G electrode and the sawtooth channel.

[0013] Furthermore, in this invention, the electrodes of the detector LED are in an interdigitated shape, resulting in a compact structure.

[0014] Furthermore, in this invention, the preparation process comprises the following steps:

[0015] Step 1: Prepare silicon-based nitride wafers.

[0016] Step 2: The silicon-based GaN wafer is sequentially ultrasonically cleaned with acetone solution, anhydrous ethanol, and ultrapure water for five minutes, and then dried with nitrogen gas. Next, a spin coater is used to spin-coat AZ 4620 photoresist onto the P-type GaN layer surface of the wafer at a speed of 4000 rpm for 40 seconds, resulting in a photoresist thickness of 1.5 μm.

[0017] Step 3: Using optical lithography, the P-type electrode regions for the light source and detector are defined on the spin-coated photoresist layer. The lithography machine used is model MA6.

[0018] Step 4: Using EBE technology, a 300nm thick layer of metallic nickel is deposited on top of the wafer.

[0019] Step 5: Then clean it and remove any remaining photoresist to reveal a mask pattern for nickel.

[0020] Step 6: Inductively coupled plasma reactive ion etching (ICP-RIE, rate 100 nm / min) is used to the middle of the N-type GaN layer to define the P-type electrode region, with an etching depth of 1,000 nm.

[0021] Step 7: Use dilute nitric acid to remove the metallic nickel deposited on the surface, and then immediately immerse the wafer in ultrapure water to clean it.

[0022] Step 8: Next, use a spin coater to spin coat the AZ4620 photoresist onto the upper surface of the wafer at a speed of 4000 rpm for 40 seconds. The photoresist thickness is 1.5 μm.

[0023] Step 9: Using optical lithography, define the shapes of the light source, detector, and MOSFET on the spin-coated photoresist layer.

[0024] Step 10: Using EBE technology, deposit a 300nm thick layer of metallic nickel on top of the wafer.

[0025] Step 11: Then clean it and remove any remaining photoresist to obtain a mask pattern for nickel.

[0026] Step 12: Define the shape of the entire system by etching to the silicon substrate layer using high-speed ICP-RIE (rate 1000nm / min); form the gate trench by etching using a combination of high-speed ICP-RIE (3 minutes) and low-speed ICP-RIE (3 minutes), exposing the AlGaN channel layer.

[0027] Step 13: Then clean it and remove any remaining photoresist.

[0028] Step 14: A 100 nm thick high-quality SiO2 dielectric layer is grown at the defined gate channel and gate electrode using plasma-enhanced chemical vapor deposition (PECVD), and patterned using a buffered oxide etchant. A 100 nm SiO2 insulating layer is deposited at the P-type electrode defined by the light source (except for the circular electrode) using EBE, so that only the circular P-type electrode emits light from the light source.

[0029] Step 15: Deposit and pattern a Ti / Au (20 / 200nm) double metal layer using EBE to form the P and N poles of the light source and detector. The detector uses interdigitated electrodes, as well as the gate and source poles of the MOSFET. The drain is shared with the N pole of the detector, which not only avoids the parasitic effects introduced by interconnect leads, but also significantly improves the reliability of the device.

[0030] Step 16: Using AZ 4620 photoresist as a mask, ICP-RIE is used to remove the cantilever beam of the light source and the silicon substrate on the back of the circular electrode, and the suspension is further thinned to the N-type GaN layer.

[0031] Furthermore, in this invention, the positive and negative electrodes, as well as the gate, source, and drain electrodes, are all Ti / Au metal layers.

[0032] The beneficial effects of this invention are:

[0033] 1. This invention creatively adopts a MOSFET and LED series structure and uses GaN optoelectronic-electronic monolithic integration technology to improve the output current and significantly improve the overall performance of the device. This not only greatly reduces the production cost, but also achieves a dual breakthrough in device miniaturization and functional integration, realizing more powerful functions with a more streamlined structure.

[0034] 2. In this invention, an N-channel enhancement-mode MOSFET and a detector LED are connected in series. The MOSFET uses AlGaN as the channel material and N-type GaN as the source and drain material. The drain of the MOSFET and the LED share the same N-type GaN region, which not only avoids the parasitic effects introduced by interconnect leads but also significantly improves device reliability. To improve the aspect ratio (W / L) and output current, the MOSFET adopts a unique sawtooth gate structure. The device fabrication does not require additional ion implantation or secondary epitaxial growth processes, greatly simplifying the device structure and process flow.

[0035] 3. An innovative opto-electro-mechanical (OEM) fabrication method based on the integration of InGaN cantilever LEDs and TFT amplification is proposed. By integrating the detector and N-channel enhancement-mode MOSFET in series, and sharing the same N-type GaN region with the LED, the parasitic effects caused by metal interconnect leads in traditional schemes are eliminated, resulting in a substantial improvement in system bandwidth and response speed. The integrated device architecture significantly enhances interface stability and anti-interference capability, leading to a qualitative leap in device reliability. The innovative use of existing LED epitaxial structures achieves multifunctional integration without the need for additional complex processes such as ion implantation or secondary epitaxial growth, greatly simplifying the fabrication process while ensuring device performance. In the light source module design, selective emission is achieved by depositing an insulating layer above the P-type GaN layer (excluding the circular region), ensuring that only the circular region emits light. The emitted light is amplified by the microcavity resonance dynamically modulated by the cantilever beam before being output, causing the detector to receive light intensity changes and convert them into corresponding photocurrent signals. These are then converted into amplified voltage signals by the MOSFET integrated at the detector output, and finally converted into current signals by a transconductance amplifier. This highly integrated design achieves efficient conversion and processing of photoelectric signals, providing a novel solution for acceleration measurement. Attached Figure Description

[0036] Figure 1 : An overall view (a), a top view (b), and a legend (c) of an opto-electro-mechanical addition table based on InGaN cantilever beam LED and TFT amplification integration.

[0037] Figure 2 : A light source component of an opto-electro-mechanical integrated meter based on InGaN cantilever beam LED and TFT amplification: overall view (a), top view (b).

[0038] Figure 3 : A MOSFET-LED component of an opto-electro-mechanical integrated table based on InGaN cantilever beam LED and TFT amplification: Overall (a), Top view (b).

[0039] Figure 4 : A MOSFET component of an opto-electro-mechanical integrated table based on InGaN cantilever LED and TFT amplification: Overall (a), Top view (b).

[0040] Figure 5 : An interdigitated electrode of a detector LED based on an opto-electro-mechanical integrated InGaN cantilever beam LED and TFT amplification: Overall (a), top view (b).

[0041] Figure 6 A gate channel of a detector LED based on an opto-electro-mechanical integrated InGaN cantilever LED and TFT amplification: Overall (a), top view (b).

[0042] Figure 7 A fabrication process and illustrations of an opto-electro-mechanical integrated table based on InGaN cantilever LED and TFT amplification, (a)-(q); each figure in (a)-(p) corresponds to the steps of the embodiment in turn, and (q) is the illustration. Detailed Implementation

[0043] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. It should be noted that the terms "front," "rear," "left," "right," "up," and "down" used in the following description refer to directions in the accompanying drawings, and the terms "inner" and "outer" refer to directions toward or away from the geometric center of a specific component, respectively.

[0044] Example: An opto-electro-mechanical integrated display based on InGaN cantilever LED and TFT amplification integration of the present invention uses a silicon-based nitride wafer as a carrier. The structure from bottom to top is as follows: silicon substrate layer (1.5mm), AlN layer (300nm), AlGaN layer (350nm), N-type GaN layer (3500nm), InGaN / GaN multiple quantum well layer (90nm), P-type GaN layer (150nm), insulating layer (100nm), silicon dioxide layer (100nm), and Ti / Au metal layer (20 / 200nm).

[0045] Step 1: Prepare a silicon-based nitride wafer, such as Figure 7 As shown in (a).

[0046] Step 2: The silicon-based GaN wafer is sequentially ultrasonically cleaned with acetone solution, anhydrous ethanol, and ultrapure water for five minutes, followed by drying with nitrogen gas. Then, a spin coater is used to spin-coat AZ 4620 photoresist onto the P-type GaN layer surface of the wafer at a speed of 4000 rpm for 40 seconds, resulting in a photoresist thickness of 1.5 μm. Figure 7 As shown in (b).

[0047] Step 3: Using optical lithography, the P-type electrode regions for the light source and detector are defined on the spin-coated photoresist layer. The lithography machine used is model MA6. Figure 7 As shown in (c).

[0048] Step 4: Using EBE technology, a 300nm thick layer of metallic nickel is deposited on top of the wafer. For example... Figure 7 As shown in (d).

[0049] Step 5: Then clean it to remove any remaining photoresist, revealing a mask pattern for nickel. (Example:...) Figure 7As shown in (e).

[0050] Step 6: Inductively Coupled Plasma Reactive Ion Etching (ICP-RIE, rate 100 nm / min) is used to reach the middle of the N-type GaN layer to define the P-type electrode region, with an etching depth of 1000 nm. Figure 7 As shown in (f).

[0051] Step 7: Remove the deposited nickel metal from the surface using dilute nitric acid, then immediately rinse the wafer in ultrapure water. Figure 7 As shown in (g).

[0052] Step 8: Next, use a spin coater to spin-coat AZ4620 photoresist onto the wafer surface at a speed of 4000 rpm for 40 seconds, resulting in a photoresist thickness of 1.5 μm. Figure 7 As shown in (h).

[0053] Step 9: Using optical lithography, define the shapes of the light source, detector, and MOSFET on the spin-coated photoresist layer. For example... Figure 7 As shown in (i).

[0054] Step 10: Using EBE technology, a 300nm thick layer of metallic nickel is deposited on top of the wafer. (Example:...) Figure 7 As shown in (j).

[0055] Step 11: Then clean it to remove any remaining photoresist, revealing a mask pattern for nickel. (Example:...) Figure 7 As shown in (k).

[0056] Step 12: Define the shape of the entire system by etching to the silicon substrate using high-speed ICP-RIE (rate 1000 nm / min); form the gate trench by combining high-speed ICP-RIE (3 minutes, rate 100 nm / min) and low-speed ICP-RIE (3 minutes, rate 1000 nm / min), exposing the AlGaN channel layer. For example... Figure 7 As shown in (l).

[0057] Step 13: Then clean it and remove any remaining photoresist. For example... Figure 7 As shown in (m).

[0058] Step 14: A 100 nm thick high-quality SiO2 dielectric layer is grown at the defined gate channel and gate electrode using plasma-enhanced chemical vapor deposition (PECVD), and patterned using a buffered oxide etchant. A 100 nm SiO2 insulating layer is deposited at the P-type electrode defined by the light source (excluding the circular electrode) using EBE, ensuring that only the circular P-type electrode emits light from the light source. Figure 7As shown in (n).

[0059] Step 15: A Ti / Au (20 / 200nm) bilayer metal is deposited and patterned using EBE to form the P and N electrodes of the light source and detector. The detector uses interdigitated electrodes, and the gate and source electrodes of the MOSFET are also present. The drain electrode is shared with the N electrode of the detector, which not only avoids parasitic effects introduced by interconnect leads but also significantly improves device reliability. Figure 7 As shown in (o).

[0060] Step 16: Using AZ 4620 photoresist as a mask, ICP-RIE is used to remove the silicon substrate on the back of the cantilever beam of the light source and the circular electrode, and the layer is further thinned down to the N-type GaN layer. Figure 7 As shown in (p).

[0061] Table 1: Layer Distribution of an Opto-Mechatronics Table Based on InGaN Cantilever LED and TFT Amplification Integration

[0062]

[0063] The technical means disclosed in this invention are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features.

Claims

1. An opto-mechanical integrated meter based on InGaN cantilever beam LED and TFT amplification, characterized in that, It consists of three parts: a light source, a detector, and a MOSFET. The emitted light from the light source is enhanced by the microcavity resonance of the cantilever beam dynamic modulation and output, which causes the light intensity received by the detector to change and be converted into a corresponding photocurrent signal. By integrating a MOSFET at the output of the detector, it is converted into an amplified voltage signal, which can then be converted into a current signal output by a transconductance amplifier.

2. The opto-electro-mechanical meter based on InGaN cantilever beam LED and TFT amplification integration according to claim 1, characterized in that, The light source, detector, and MOSFET have the same layer structure, all using a silicon-based nitride wafer as a carrier. The structure from bottom to top is as follows: silicon substrate layer, AlN layer, AlGaN layer, N-type GaN layer, InGaN / GaN multi-quantum-well layer, P-type GaN layer, insulating layer, silicon dioxide layer, and Ti / Au metal layer.

3. The opto-electro-mechanical meter based on InGaN cantilever beam LED and TFT amplification integration according to claim 2, characterized in that, In the light source, an insulating layer is deposited on the area above the P-type GaN layer, excluding the circular electrode area, so that only the circular area of ​​the light source emits light.

4. The opto-electro-mechanical meter based on InGaN cantilever beam LED and TFT amplification integration according to claim 1, characterized in that, The detector and the MOSFET are connected in series, with the drain of the MOSFET sharing the same N-type GaN region as the LED.

5. The opto-electro-mechanical meter based on InGaN cantilever beam LED and TFT amplification integration according to claim 4, characterized in that, The MOSFET uses an enhancement mode. To achieve the enhancement mode operation, an AlGaN layer is selected as the MOSFET channel layer, and N-type GaN is selected as the source and drain material.

6. An opto-mechanical integrated meter based on InGaN cantilever beam LED and TFT amplification as described in claim 1 or 5, characterized in that, The MOSFET adopts a sawtooth gate channel structure. The gate channel is first etched to the middle of AlGaN to expose it. Then, a 100 nm thick high-quality SiO2 dielectric layer is grown at the gate channel and the gate electrode. Finally, Ti / Au metal is deposited to form the G electrode and the sawtooth channel.

7. The opto-electro-mechanical meter based on InGaN cantilever beam LED and TFT amplification integration according to claim 5, characterized in that, Since the AlGaN layer is located below the N-type GaN layer, the AlGaN channel region needs to be exposed through a groove etching structure; the gate metal covers both the sidewalls and the bottom of the groove to enhance the ability of the gate voltage to control the channel conductivity.

8. The opto-electro-mechanical meter based on InGaN cantilever beam LED and TFT amplification integration according to claim 5, characterized in that, The electrodes of the detector LED are in an interdigitated shape.

9. A method for fabricating an opto-mechanical integrated display based on InGaN cantilever beam LED and TFT amplification, characterized in that, The specific steps are as follows: Step 1: Prepare silicon-based nitride wafers; Step 2: The silicon-based nitride wafer is ultrasonically cleaned for five minutes in acetone solution, anhydrous ethanol and ultrapure water, and then dried with nitrogen gas. Next, a spin coater is used to spin coat the P-type GaN layer onto the wafer at a speed of 4000 rpm for 40 seconds, with a photoresist thickness of 1.5 μm. Step 3: Using optical lithography, define the P-type electrode regions of the light source and detector on the spin-coated photoresist layer; Step 4: Using EBE technology, a 300 nm thick layer of metallic nickel is deposited on top of the wafer; Step 5: Then clean it and remove any remaining photoresist to reveal a mask pattern for nickel; Step 6: Inductively Coupled Plasma Reactive Ion Etching (ICP-RIE) is used at a rate of 100 nm / min to the middle of the N-type GaN layer to define the P-type electrode region, with an etching depth of 1000 nm. Step 7: Use dilute nitric acid to remove the metallic nickel deposited on the surface, and then immediately immerse the wafer in ultrapure water to clean it. Step 8: Next, use a spin coater to spin coat the AZ4620 photoresist onto the upper surface of the wafer at a speed of 4000 rpm for 40 seconds. The photoresist thickness is 1.5 μm. Step 9: Using optical lithography, define the shapes of the light source, detector, and MOSFET on the spin-coated photoresist layer; Step 10: Deposit a 300 nm thick layer of metallic nickel on top of the wafer using EBE technology; Step 11: Then clean it and remove any remaining photoresist to reveal a mask pattern for nickel; Step 12: Define the shape of the entire system by etching to the silicon substrate layer using high-speed ICP-RIE at a rate of 1000 nm / min; form the gate trench by combining high-speed ICP-RIE at a rate of 300 nm / min for 3 minutes with low-speed ICP-RIE at a rate of 1000 nm / min for 3 minutes. Step 13: Then clean it and remove any remaining photoresist; Step 14: A 100 nm thick high-quality SiO2 dielectric layer is grown at the defined gate channel and gate electrode using plasma-enhanced chemical vapor deposition, and patterned using a buffer oxide etchant; a 100 nm SiO2 insulating layer is deposited at the P-type electrode defined by the light source, except for the circular electrode, so that only the circular P-type electrode emits light in the light source part. Step 15: Deposit and pattern a 20 / 200 nm Ti / Au double layer metal via EBE to form the P and N poles of the light source and detector. The detector uses interdigitated electrodes, as well as the gate and source poles of the MOSFET. The drain is shared with the N pole of the detector, which not only avoids the parasitic effects introduced by interconnect leads, but also significantly improves the reliability of the device. Step 16: Using AZ 4620 photoresist as a mask, ICP-RIE is used to remove the cantilever beam of the light source and the silicon substrate on the back of the circular electrode, and the suspension is further thinned to the N-type GaN layer.

10. The method for fabricating an opto-mechanical integrated display based on InGaN cantilever LED and TFT amplification according to claim 9, characterized in that, The positive and negative electrodes, as well as the gate, source, and drain electrodes, are all Ti / Au metal layers.

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