Driver circuit

Abstract

The invention provides a driver circuit which comprises a driving transistor and a compensation circuit. The first end of the driving transistor is coupled to the output node. The compensation circuit is coupled to the output node and the second end and the control end of the driving transistor. The compensation circuit is configured to receive a power supply voltage and a reference voltage, perform compensation operation in response to a plurality of control signals, and provide a control voltage to a control terminal of the driving transistor to compensate for variation of a threshold voltage of the driving transistor.

Description

Technical Field

[0001] This invention relates to an electronic circuit, and more particularly to a driver circuit. Background Technology

[0002] With technological advancements, there is a continuous pursuit of higher operating speeds and density utilization in memory device applications (including volatile and non-volatile memory), leading to a continuous reduction in component size. However, prolonged operation in high-frequency, high-temperature, and high-voltage environments can accelerate component degradation. In particular, the threshold voltage of the transistors within the driver is prone to variation, causing operational malfunctions. Summary of the Invention

[0003] This invention provides a driver circuit that can compensate for variations in the threshold voltage of internal transistors to improve product quality.

[0004] The driver circuit of the present invention includes a driving transistor and a compensation circuit. A first terminal of the driving transistor is coupled to an output node. The compensation circuit is coupled to the output node, a second terminal of the driving transistor, and a control terminal. The compensation circuit is configured to receive a power supply voltage and a reference voltage, and responds to multiple control signals to perform compensation operations, thereby providing a control voltage to the control terminal of the driving transistor to compensate for variations in the threshold voltage of the driving transistor.

[0005] Based on the above, the driver circuit of the present invention can compensate for variations in the threshold voltage of the drive transistor when it needs to be turned on through a compensation operation. This reduces the impact of component degradation and improves product quality and reliability.

[0006] To make the above-mentioned features and advantages of this case more apparent and understandable, specific embodiments are provided below, along with detailed descriptions in conjunction with the accompanying drawings. Attached Figure Description

[0007] Figure 1 This is a circuit diagram of a driver circuit according to an embodiment of the present invention;

[0008] Figure 2 This is a waveform diagram of the compensation operation according to an embodiment of the present invention;

[0009] Figures 3A to 3C This is a schematic diagram of the compensation operation according to an embodiment of the present invention. Detailed Implementation

[0010] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0011] Please refer to Figure 1 In one embodiment of the present invention, the driver circuit 100 is, for example, a word line driver that can be built into a volatile or non-volatile memory device, and is capable of providing the voltage required for the word line. The driver circuit 100 includes a driving transistor TD and a compensation circuit 110. It should be noted that although the driver circuit 100 in this embodiment is described using a word line driver as an example, the present invention is not limited thereto. In other embodiments, the driver circuit 100 can also be used to provide the voltage required for data selection or column selection, etc.

[0012] exist Figure 1 In this circuit, the first terminal of the driving transistor TD is coupled to the output node Nout. The compensation circuit 110 is coupled to the output node Nout and the second terminal and control terminal of the driving transistor TD. The compensation circuit 110 can be configured to receive a power supply voltage VDD and a reference voltage Vref. The power supply voltage VDD is, for example, 1.5 to 3.3 volts, and the reference voltage Vref can vary, for example, between a low voltage value V1 (e.g., a negative voltage) and a high voltage value V2. The output node Nout is also, for example, coupled to a word line within the memory device. When the driving transistor TD is turned on, the driver circuit 100 can provide the power supply voltage VDD to the word line via the output node Nout to select the corresponding memory cell.

[0013] The compensation circuit 110 can respond to the first control signal S1 and the second control signal S2 to perform compensation operations, and provide a control voltage VCT to the control terminal of the driving transistor TD to compensate for the variation of the threshold voltage Vth of the driving transistor TD.

[0014] In detail, the compensation circuit 110 is, for example, a 3T1C architecture. The compensation circuit 110 includes a first transistor T1, a second transistor T2, a third transistor T3, and a capacitor C1. The first terminal of the first transistor T1 receives the power supply voltage VDD, and the second terminal of the first transistor T1 is coupled to the second terminal of the driving transistor TD. The control terminal of the first transistor T1 receives a first control signal S1. The first terminal of the second transistor T2 is coupled to the second terminal of the first transistor T1, and the second terminal of the second transistor T2 is coupled to the control terminal of the driving transistor TD to provide a control voltage VCT. The control terminal of the second transistor T2 receives a second control signal S2. The first terminal of the third transistor T3 receives a reference voltage Vref, and the second terminal of the third transistor T3 is coupled to the output node Nout. The control terminal of the third transistor T3 receives the second control signal S2. The first terminal of the capacitor C1 is coupled to the second terminal of the second transistor T2, and the second terminal of the capacitor C1 is coupled to the first terminal of the third transistor T3. In this embodiment, the driving transistor TD, the first transistor T1, the second transistor T2, and the third transistor T3 are, for example, N-type metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0015] The compensation operation performed by the compensation circuit 110 sequentially includes an initial stage Ph1, a sensing stage Ph2, and a compensation stage Ph3. Figure 2 The diagram shows the voltage waveforms of the first control signal S1, the second control signal S2, and the reference voltage Vref in each of the following stages: the initial stage (Ph1), the sensing stage (Ph2), and the compensation stage (Ph3). The vertical axis represents the voltage value, and the horizontal axis represents time. The following is a description of the accompanying diagram. Figures 3A to 3C The compensation operation performed by the compensation circuit 110 of the present invention will be explained.

[0016] Please refer to the following at the same time Figure 2 and Figure 3A In the initial stage Ph1, the first control signal S1 and the second control signal S2 are at the first logic level H, and the reference voltage Vref is a low voltage value V1. At this time, the first transistor T1 is turned on by the first control signal S1, and the second transistor T2 and the third transistor T3 are also turned on by the second control signal S2, thus forming a charging loop R1 in the compensation circuit 110. In this way, in the initial stage Ph1, the capacitor C1 can be charged by the power supply voltage VDD.

[0017] Furthermore, since the reference voltage Vref is a low voltage value V1 under the initial stage Ph1, even if the third transistor T3 is turned on, it will not affect the components (such as memory cells) at the output node Nout.

[0018] Next, please refer to the following: Figure 2 and Figure 3B During the sensing phase Ph2, the first control signal S1 is converted to the second logic level L, while the second control signal S2 remains at the first logic level H, and the reference voltage Vref remains at a low voltage value V1. At this time, the first transistor T1 is turned off by the first control signal S1, and the second transistor T2 is turned on by the second control signal S2. Therefore, the driving transistor TD forms an equivalent circuit structure of a diode (as shown in equivalent circuit 300). Once the voltage at the control terminal of the driving transistor TD is greater than the threshold voltage Vth, the driving transistor TD will turn on. At the same time, the third transistor T3 will also be turned on by the second control signal S2, thus forming a discharge circuit R2 in the compensation circuit 110. In this way, during the sensing phase Ph2, the capacitor C1 can be continuously discharged through the discharge circuit R2 until the capacitor voltage Vc between the two ends of the capacitor C1 is equivalent to the threshold voltage Vth (Vc = Vth).

[0019] Next, please refer to the following: Figure 2 and Figure 3C During the compensation phase Ph3, the first control signal S1 is converted back to the first logic level H, and the second control signal S2 is converted to the second logic level L. The reference voltage Vref is converted to a high voltage value V2. At this time, the first transistor T1 is turned on by the first control signal S1, and the second transistor T2 and the third transistor T3 are turned off by the second control signal S2. Due to the coupling characteristics of capacitor C1, the compensation circuit 110 can generate a control voltage VCT (VCT = V2 + Vth) by adding the reference voltage Vref (Vref = V2) to the current capacitor voltage Vc (Vc = Vth) across capacitor C1, thereby turning on the driving transistor TD. In this way, regardless of whether the threshold voltage Vth of the driving transistor TD changes, the influence of the threshold voltage Vth can be canceled out, ensuring that the reference voltage Vref at the high voltage value V2 can successfully turn on the driving transistor TD each time, avoiding operational malfunctions.

[0020] The compensation operation in this embodiment can prevent the shift of the gate characteristics of the field-effect transistor under long-term operation in high-frequency, high-temperature, and high-pressure environments, reduce the impact of component degradation, and thus improve product quality and reliability.

[0021] It should be noted that the first control signal S1, the second control signal S2, and the reference voltage Vref in this embodiment can be provided, for example, by a memory controller. The memory controller can be, for example, a state machine, a central processing unit, or other programmable general-purpose or special-purpose microprocessor, digital signal processor, programmable controller, application-specific integrated circuit, programmable logic device, or other similar device or combination thereof. Furthermore, Figure 2 The voltage waveform is for the case where the driving transistor TD, the first transistor T1, the second transistor T2, and the third transistor T3 are N-type metal-oxide-semiconductor field-effect transistors. However, the present invention is not limited thereto. In other embodiments, those skilled in the art should be able to replace the driving transistor TD, the first transistor T1, the second transistor T2, and the third transistor T3 with P-type metal-oxide-semiconductor field-effect transistors for compensation operation according to their actual needs and with reference to the teachings of this embodiment.

[0022] In summary, the driver circuit of the present invention can compensate for variations in the threshold voltage of the driving transistor when an output power supply voltage is required through a compensation operation. This prevents the gate characteristics of the field-effect transistor from shifting under prolonged operation in high-frequency, high-temperature, and high-voltage environments, reducing the impact of component degradation and thereby improving product quality and reliability.

[0023] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A driver circuit, characterized in that, include: A driving transistor, the first terminal of which is coupled to the output node; as well as The compensation circuit, coupled to the output node and the second terminal and control terminal of the driving transistor, is configured to receive the power supply voltage and reference voltage, and responds to multiple control signals to perform compensation operations, thereby providing a control voltage to the control terminal of the driving transistor to compensate for variations in the threshold voltage of the driving transistor.

2. The driver circuit according to claim 1, characterized in that, The plurality of control signals includes a first control signal and a second control signal, and the compensation circuit includes: The first transistor has a first terminal receiving the power supply voltage, a second terminal coupled to the second terminal of the driving transistor, and a control terminal receiving the first control signal. The second transistor has a first terminal coupled to the second terminal of the first transistor, and a second terminal coupled to the control terminal of the driving transistor, the control terminal of which receives the second control signal. A third transistor, having a first terminal receiving the reference voltage, a second terminal coupled to the output node, and a control terminal receiving the second control signal; and A capacitor, the first end of which is coupled to the second end of the second transistor, and the second end of which is coupled to the first end of the third transistor.

3. The driver circuit according to claim 2, characterized in that, The compensation operation includes, in sequence, an initial phase, a sensing phase, and a compensation phase.

4. The driver circuit according to claim 3, characterized in that, In the initial stage, the first control signal and the second control signal are at a first logic level, and the reference voltage is a low voltage value.

5. The driver circuit according to claim 3, characterized in that, In the initial stage, the first transistor is turned on by the first control signal, and the second and third transistors are turned on by the second control signal, forming a charging loop in the compensation circuit, and the capacitor is charged by the power supply voltage.

6. The driver circuit according to claim 3, characterized in that, During the sensing phase, the first control signal is converted to a second logic level, the second control signal is at the first logic level, and the reference voltage is a low voltage value.

7. The driver circuit according to claim 3, characterized in that, During the sensing phase, the first transistor is turned off by the first control signal, and the second and third transistors are turned on by the second control signal, forming a discharge circuit in the compensation circuit, so that the capacitor continues to discharge until the capacitor voltage between the two ends of the capacitor is equivalent to the threshold voltage.

8. The driver circuit according to claim 3, characterized in that, During the compensation phase, the first control signal is converted to a first logic level, the second control signal is converted to a second logic level, and the reference voltage is converted to a high voltage value.

9. The driver circuit according to claim 3, characterized in that, During the compensation phase, the first transistor is turned on by the first control signal, and the second and third transistors are turned off by the second control signal. The compensation circuit generates the control voltage by adding the reference voltage to the capacitor voltage across the capacitor to turn on the driving transistor.

10. The driver circuit according to claim 1, characterized in that, When the driving transistor is turned on, the power supply voltage is provided to the word line via the output node to select the corresponding memory cell.

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