Message processing module verification method and device, electronic equipment and storage medium
By utilizing an FPGA board and a custom message processing module in the server management module for verification, the problem of high cost and low efficiency in message processing module verification was solved, achieving efficient and accurate verification results.
Patent Information
- Application Number
- CN202511012871.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-22
- Publication Date
- 2025-11-14
AI Technical Summary
Existing methods for verifying message processing modules are costly and inefficient.
By identifying the sending and receiving units in the server management module, and using an FPGA board that implements the functions of the server management module, the message packet to be sent is determined based on the length of the message to be sent being less than a preset threshold, and the message processing module is verified on the FPGA board.
It achieves cost reduction and improved verification efficiency, enabling efficient and accurate verification of the correctness of sent and received data in the message processing module within the same software system.
Smart Images
Figure CN120950440A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer hardware verification technology, and in particular to methods, apparatus, electronic devices and storage media for verifying message processing modules. Background Technology
[0002] A server host can connect to a large number of components, and the server management module is used to monitor and control these components. In related technologies, the server management module typically manages high-speed serial computer extension bus standard (peripheral component interconnect express, or PCIe) components through the Management Component Transport Protocol (MCTP). This MCTP protocol supports different physical media; currently, the mainstream method for component monitoring is MCTP over PCIe, which refers to the data format transmitted via MCTP on the PCIe bus.
[0003] Due to the complex message format, frequent message exchanges, and large data volume of the MCTP over PCIe protocol, server management modules typically have built-in message processing modules to handle tasks such as message sending and receiving, caching, encapsulation, and parsing. Therefore, the message processing module is crucial for monitoring server components and needs to be verified to ensure its correct functionality, i.e., to ensure it functions properly. However, current methods for verifying message processing modules are costly and inefficient. Summary of the Invention
[0004] This application provides a message processing module verification method, apparatus, electronic device, and storage medium to at least solve the problems of high cost and low efficiency in related technologies for verifying message processing modules.
[0005] This application provides a method for verifying a message processing module, including:
[0006] The sending unit and receiving unit in the server management module are determined, wherein the sending unit is a functional unit in the first target endpoint device and the receiving unit is a functional unit in the second target endpoint device;
[0007] If the data length of the message to be sent is less than the preset data length threshold, then the message packet to be sent is determined based on the message to be sent, the sending unit, and the receiving unit.
[0008] The message packet to be sent is sent to the message processing module so that the message processing module can process the message packet to be sent, obtain the target message packet to be sent, send the target message packet to the sending unit, the sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module.
[0009] The verification result of the message processing module is determined based on the target message packet sent by the message processing module and the target message packet received by the message processing module.
[0010] This application also provides a message processing module verification device, including:
[0011] The first determining module is used to determine the sending unit and the receiving unit in the server management module, wherein the sending unit is a functional unit in the first target endpoint device and the receiving unit is a functional unit in the second target endpoint device;
[0012] The second determining module is used to determine the message packet to be sent based on the message to be sent, the sending unit, and the receiving unit if the data length of the message to be sent is less than a preset data length threshold.
[0013] The sending module is used to send the message packet to be sent to the message processing module, so that the message processing module processes the message packet to be sent, obtains the target message packet to be sent, sends the target message packet to the sending unit, the sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module.
[0014] The third determination module is used to determine the verification result of the message processing module based on the target message packet sent by the message processing module and the target message packet received by the message processing module.
[0015] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described message processing module verification methods when executing the computer program.
[0016] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described message processing module verification methods.
[0017] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described message processing module verification methods.
[0018] This application establishes a sending unit and a receiving unit within the server management module. The sending unit is a functional unit in the first target endpoint device, and the receiving unit is a functional unit in the second target endpoint device. If the data length of the message to be sent is less than a preset data length threshold, a message packet to be sent is determined based on the message to be sent, the sending unit, and the receiving unit. The message packet to be sent is then sent to the message processing module, which processes the message packet to obtain the target message packet. The target message packet is then sent to the sending unit, which sends it to the host end. The host end sends the target message packet to the receiving unit, and the receiving unit sends it to the message processing module. Based on the target message packet sent by the message processing module and the target message packet received by the message processing module, the verification result of the message processing module is determined. The message processing module can be verified by using a Field-Programmable Gate Array (FPGA) board that implements the server management module. Therefore, it can solve the technical problems of high cost and low efficiency in the verification of message processing modules in related technologies, and achieve the technical effect of reducing costs and improving verification efficiency. Attached Figure Description
[0019] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This application provides a schematic diagram of the structure of a message processing module verification system according to an embodiment of the present application.
[0021] Figure 2 A flowchart illustrating a message processing module verification method provided in an embodiment of this application;
[0022] Figure 3 This is a schematic diagram of the structure of another message processing module verification system provided in an embodiment of this application;
[0023] Figure 4 A flowchart illustrating another message processing module verification method provided in an embodiment of this application;
[0024] Figure 5 A schematic diagram of the transmit / receive buffer of the MCTP module provided in the embodiments of this application;
[0025] Figure 6 A flowchart illustrating another message processing module verification method provided in an embodiment of this application;
[0026] Figure 7 A flow diagram of sub-packages provided in the embodiments of this application;
[0027] Figure 8 This is a schematic diagram of the structure of a message processing module verification device provided in an embodiment of this application;
[0028] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0029] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0030] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0031] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0032] A server host can connect to a large number of devices, such as hardware, Redundant Array of Independent Disks (RAID) cards, network cards, etc., to provide necessary storage or network capabilities. These devices can be collectively referred to as components. The server management module is used to monitor the server status and perform necessary controls. The aforementioned components are among the resources monitored and controlled by the server management module. In related technologies, the server management module typically manages PCIe components through the MCTP protocol. This MCTP protocol supports different physical media, such as the Inter-Integrated Circuit (IIC), the Improved Inter-Integrated Circuit (I3C), and the PCIe bus. The MCTP message format also differs for different physical media. The MCTP message format based on the PCIe bus is MCTP over PCIe, while the MCTP message format based on the IIC or I3C bus is MCTP over IIC / I3C. Because the IIC / I3C bus has low load capacity, component monitoring based on MCTP over IIC / I3C has low monitoring efficiency and is generally only used in scenarios where MCTP over PCIe cannot be used. In servers, the mainstream component monitoring method is MCTP over PCIe.
[0033] MCTP over PCIe messages have complex formats, high PCIe bandwidth, frequent interactions, and large data volumes. Handling message sending, receiving, caching, encapsulation, and parsing entirely in software is resource-intensive and inefficient. Therefore, service management modules typically include a built-in message processing module to handle MCTP messages. This includes message sending and receiving, caching, encapsulation and parsing of key PCIe Vendor Defined Messages (VDM) headers, and Endpoint Identifier (EID) filtering. In essence, the message processing module is a dedicated hardware module within the server management module specifically designed to process MCTP over PCIe data. Therefore, the message processing module is crucial for monitoring server components and requires verification to ensure its correct functionality and proper operation.
[0034] In related technologies, a server management module typically integrates only one message processing module. However, verifying the message processing module requires attention to whether message sending and receiving meet expectations. This includes the complete link from the sender to the receiver via the PCIe Root Complex (RC) or PCIe switch. Therefore, there are two methods for verifying the message processing module in related technologies. The first method involves connecting a standard PCIe card (such as a network card) as an MCTP endpoint device, and using the server management module's FPGA board as the MCTP bus owner to form a standard MCTP network. Then, the server management module implements standard MCTP protocol data encapsulation and communicates with the MCTP endpoint device according to its requirements, thereby verifying the functionality of the message processing module within the server management module. Here, the MCTP endpoint device is the MCTP communication terminal, representing the endpoint or origin of MCTP messages. The second method involves using two FPGA boards from the server management module to send and receive messages to each other, thus verifying the functionality of the message processing module within the server management module. In this method, custom MCTP messages can be used. The PCIe RC is a core component of the PCIe architecture, responsible for connecting the processor system and PCIe devices, managing bus resources, and coordinating data transmission. A PCIe Switch is a hardware device used to expand the connectivity of the PCIe bus; its main functions include expanding connectivity, data exchange, and bandwidth allocation. The MCTP Bus Owner is responsible for managing the allocation of addresses (logical or physical addresses) on the MCTP bus.
[0035] However, the first verification method requires implementing the standard MCTP protocol stack in the server management module, and the behavior of MCTP endpoint devices is uncontrollable, making it impossible to fully verify the functionality of the message processing module. Therefore, this verification method is costly and inefficient. The second verification method requires two FPGA boards, resulting in higher resource costs.
[0036] To address the aforementioned issues, this application provides a message processing module verification method, apparatus, electronic device, and storage medium. The method includes: determining a sending unit and a receiving unit in a server management module, wherein the sending unit is a functional unit in a first target endpoint device, and the receiving unit is a functional unit in a second target endpoint device; if the data length of the message to be sent is less than a preset data length threshold, then determining a message packet to be sent based on the message to be sent, the sending unit, and the receiving unit; sending the message packet to be sent to a message processing module, so that the message processing module processes the message packet to be sent to obtain a target message packet to be sent; sending the target message packet to the sending unit, the sending unit sending the target message packet to the host, the host sending the target message packet to the receiving unit, and the receiving unit sending the target message packet to the message processing module; and determining the verification result of the message processing module based on the target message packet sent by the message processing module and the target message packet received by the message processing module. The method provided by the above solution can realize the verification of the message processing module by using an FPGA board that implements the server management module function. Therefore, it can solve the technical problems of high cost and low efficiency in the verification of message processing modules in related technologies, and achieve the technical effect of reducing costs and improving verification efficiency.
[0037] The specific application environment architecture or specific hardware architecture on which the execution of the verification method in the message processing module depends is described here.
[0038] The message processing module verification method, apparatus, electronic device, and storage medium provided in this application are applicable to verifying the message processing module in a server management module. Figure 1 The diagram shows the structure of the message processing module verification system based on this application embodiment. The system includes a server management module and a host terminal, where the host terminal is the server host. The server management module determines the sending unit and receiving unit within the server management module. The sending unit is a functional unit in the first target endpoint device, and the receiving unit is a functional unit in the second target endpoint device. If the data length of the message to be sent is less than a preset data length threshold, a message packet to be sent is determined based on the message to be sent, the sending unit, and the receiving unit. The message packet to be sent is sent to the message processing module so that the message processing module processes the message packet to obtain the target message packet to be sent. The target message packet to be sent is then sent to the sending unit, which sends the target message packet to the host terminal. The host terminal sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module. Based on the target message packet sent by the message processing module and the target message packet received by the message processing module, the verification result of the message processing module is determined.
[0039] The embodiments of this application provide a message processing module verification method, which is applied to a server management module. The server management module can be a Baseboard Management Controller (BMC), which is implemented by an FPGA board. Figure 2 A flowchart of a message processing module verification method provided in an embodiment of this application is shown below. Figure 2 As shown, the process includes the following steps:
[0040] Step S201: Determine the sending unit and receiving unit in the server management module, wherein the sending unit is a functional unit in the first target endpoint device and the receiving unit is a functional unit in the second target endpoint device.
[0041] The transmitting and receiving units are functional units within different target endpoint devices, which are PCIe endpoint devices. A BMC chip typically includes the following modules, each used to handle different transactions:
[0042] The MCTP module, or message processing module, is used to process MCTP messages and relies on the target endpoint device for message sending and receiving.
[0043] The Video Graphics Array (VGA) module is used to process image data from the server host and is a functional unit of PCIe EP0, a PCIe endpoint device in the BMC chip.
[0044] The Universal Serial Bus (USB) module is used to extend the host's USB capabilities and is a functional unit of the PCIe EP1 PCIe endpoint device in the BMC chip.
[0045] For example, the transmitting unit may be a VGA module and the receiving unit may be a USB module. As another example, the transmitting unit may be a USB module and the receiving unit may be a VGA module. It is understood that the above are merely illustrative examples, and the transmitting and receiving units are not limited thereto, as long as they are functional units in different target endpoint devices of the BMC.
[0046] It should be noted that the VGA module acts as an MCTP device on the server host. MCTP messages sent to the BMC are routed to the MCTP module for processing via the VGA module. However, the USB module and the MCTP module are not connected. To achieve the verification effect of the MCTP module using only one FPGA board, the USB module is connected to the MCTP module. In this way, MCTP messages received by the USB module are also routed to the MCTP module. Since the VGA module and the USB module are on two independent PCIe endpoint devices, two MCTP devices can be instantiated on one BMC FPGA board. Through these two MCTP devices, the MCTP module function on the BMC chip can be fully verified.
[0047] It is understandable that if the identified sending or receiving unit is not connected to the message processing module, then the sending or receiving unit will be connected to the message processing module.
[0048] Figure 3 This is a schematic diagram of the structure of the message processing module verification system provided in the embodiments of this application, as shown below. Figure 3 As shown, the message processing module verification system includes a BMC and a server host. The BMC includes an MCTP module, PCIe EP0, and PCIe EP1. The server host includes a PCIe RC, VGA module interface, and USB module interface. The VGA module interface connects to the VGA module in PCIe EP0 via the PCIe bus, and the USB interface connects to the USB module in PCIe EP1 via the PCIe bus. When verifying the MCTP module, the BMC acts as both the MCTP message sender and receiver. As a sender, it can arbitrarily choose to send messages from either the VGA module in PCIe EP0 or the USB module in PCIe EP1. For example, if the sender uses the VGA module in PCIe EP0, the target device for the message to be sent must be set to the USB module in PCIe EP1. As a receiver, it must explicitly select to receive messages from the USB module in PCIe EP1. This allows for MCTP message transmission and reception across PCIe bridge chips on the same FPGA board, thereby verifying the complete functionality of the MCTP module.
[0049] Step S202: If the data length of the message to be sent is less than the preset data length threshold, then the message packet to be sent is determined based on the message to be sent, the sending unit, and the receiving unit.
[0050] The preset data length threshold is set by technical personnel and is not specifically limited here. The message to be sent is an MCTP message. BMC encapsulates the message to be sent, the sending unit, and the receiving unit to obtain the message packet to be sent. It should be noted that the message to be sent can be a custom message.
[0051] Step S203: The message packet to be sent is sent to the message processing module so that the message processing module processes the message packet to be sent, obtains the target message packet to be sent, sends the target message packet to the sending unit, the sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module.
[0052] Understandably, the message processing module parses the message packet to be sent, determines the sending unit in the message packet, processes the message packet to be sent, obtains the target message packet to be sent, and sends the target message packet to the sending unit.
[0053] The sending unit sends the target message packet to the PCIe RC on the host side. The PCIe RC on the host side parses the target message packet, determines the receiving unit in the target message packet, and sends the target message packet to the receiving unit. The receiving unit then sends the target message packet to the message processing module.
[0054] Step S204: Based on the target message packet to be sent sent by the message processing module and the target message packet to be sent received by the message processing module, determine the verification result of the message processing module.
[0055] It is understood that the target message packet sent by the message processing module is the same as the target message packet sent by the message processing module to the sending unit. The target message packet received by the message processing module is the same as the target message packet sent by the receiving unit to the message processing module. In this embodiment, the verification result of the message processing module is the final verification result of the message processing module.
[0056] The message processing module verification method provided in this application can achieve complete verification of the message processing module by utilizing an FPGA board that implements the server management module function, an MCTP module, and custom messages. Therefore, it can solve the technical problems of high cost and low efficiency in related technologies for verifying message processing modules, achieving the technical effects of reducing costs and improving verification efficiency. Sending and receiving MCTP messages within the same software system can efficiently and accurately verify the correctness of sent and received data, thereby realizing the verification of the MCTP module.
[0057] Embodiments of this application provide a message processing module verification method, applied to a server management module. Figure 4 A flowchart of a message processing module verification method provided in an embodiment of this application is shown below. Figure 4 As shown, the process includes the following steps:
[0058] Step S401: Determine the sending unit and receiving unit in the server management module, wherein the sending unit is a functional unit in the first target endpoint device, and the receiving unit is a functional unit in the second target endpoint device. For details, please refer to [link to relevant documentation]. Figure 2 Step S201 of the illustrated embodiment will not be described again here.
[0059] Step S402: If the data length of the message to be sent is less than a preset data length threshold, then the message packet to be sent is determined based on the message to be sent, the sending unit, and the receiving unit. For details, please refer to [link to relevant documentation]. Figure 2 Step S202 of the illustrated embodiment will not be described again here.
[0060] Step S403: The message packet to be sent is sent to the message processing module so that the message processing module processes the message packet to be sent, obtains the target message packet to be sent, sends the target message packet to the sending unit, the sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module.
[0061] Specifically, step S403 includes:
[0062] Step S4031: Save the payload data in the message packet to be sent to the shared memory, and write the message packet to be sent to the sending buffer of the message processing module. Trigger the message processing module to convert the message packet to be sent into a target message packet conforming to the target bus protocol, and send the target message packet to the sending unit. The sending unit sends the target message packet to the host end. The host end sends the target message packet to the receiving unit. The receiving unit writes the target message packet to the receiving buffer of the message processing module.
[0063] The target bus protocol is PCIe. The message processing module uses a separate send / receive buffer, which allows for simultaneous sending and receiving of MCTP messages within the same software system. Figure 5 This is a schematic diagram of the transmit / receive buffer of the MCTP module provided in the embodiments of this application, as shown below. Figure 5As shown, the transmit and receive buffers include a receive buffer (receive buffer) and a transmit buffer (transmit buffer). In this application, the receive buffer is divided into several consecutively located and uniformly sized buffer blocks, such as Buf0, Buf1, and Buf2, at the software layer. The starting address, size, and number of these buffer blocks are configured in the hardware registers of the MCTP module at the hardware layer. When the MCTP module receives a message, it fills these buffer blocks one by one and increments the count. The software layer can obtain the starting position and number of buffer blocks currently filled with data. Similarly, the transmit buffer is also divided into several consecutively located and uniformly sized buffer blocks, such as Buf3, Buf4, and Buf5. The starting address, size, and number of these buffer blocks are configured in the hardware registers of the MCTP module at the hardware layer. The software can fill multiple buffer blocks with messages and update the starting position and number of the corresponding buffer blocks in the hardware registers to trigger the MCTP module to send data.
[0064] To facilitate the verification of message packets to be sent, the payload data of the message packet needs to be saved to shared memory before being written to the sending buffer of the message processing module. This shared memory is used by both the software sending and receiving logic to temporarily store the payload data of the message packet to be sent, making it easier to compare and verify with the payload data in the message packet received by the MCTP module. The payload data refers to the actual data information that needs to be transmitted in a single communication or interaction.
[0065] It should be noted that after comparing and verifying the payload data of the message packet to be sent in the shared memory with the payload data of the message packet received by the MCTP module, the payload data of the message packet to be sent in the shared memory is deleted until the shared memory is filled with the payload data of the message packet to be sent again.
[0066] The software sending logic involves writing the payload data of the message packet to be sent into shared memory before writing it into the sending buffer of the message processing module. The software receiving logic involves retrieving the payload data of the message packet to be sent from shared memory when the MCTP module receives a message packet, and comparing the retrieved payload data with the payload data of the message packet received by the MCTP module to determine if the sending and receiving functions of the MCTP module are functioning correctly.
[0067] Step S404: Based on the target message packet sent by the message processing module and the target message packet received by the message processing module, determine the verification result of the message processing module.
[0068] Specifically, step S404 includes:
[0069] Step S4041: Obtain the target message packet to be sent received by the message processing module from the receive buffer of the message processing module, and determine the payload data in the target message packet to be sent received by the message processing module.
[0070] It is understandable that the target message packet received by the message processing module is the target message packet to be sent that the receiving unit writes into the receiving buffer of the message processing module.
[0071] Step S4042: Obtain the payload data from the target message packet to be sent sent by the message processing module from the shared memory.
[0072] Step S4043: Compare the payload data in the target message packet to be sent received by the message processing module with the payload data in the target message packet to be sent sent by the message processing module.
[0073] Step S4044: If the comparison result indicates that the payload data in the target message packet to be sent received by the message processing module is completely consistent with the payload data in the target message packet to be sent sent by the message processing module, then the verification result of the message processing module is determined to be that the message processing module has passed the verification.
[0074] Understandably, if the comparison result indicates that the payload data in the target message packet received by the message processing module is not completely consistent with the payload data in the target message packet sent by the message processing module, then the verification result of the message processing module is determined to be that the message processing module verification failed.
[0075] The message processing module verification method provided in this application saves the payload data in the message packet to be sent to shared memory. When comparing the payload data of the target message packet to be sent sent by the message processing module and the payload data of the target message packet to be sent received by the message processing module, it is not necessary to retrieve the target message packet sent by the message processing module from the sending cache and then retrieve the payload data therein. The data can be retrieved directly from the shared memory, which improves the verification efficiency of the message processing module.
[0076] In some optional implementations, the message processing module verification method described above further includes:
[0077] Step a1: If the data length of the message to be sent is not less than the preset data length threshold, the message to be sent is split to obtain multiple sub-messages to be sent. Based on the multiple sub-messages to be sent, the sending unit, and the receiving unit, multiple sub-message packets to be sent are determined, wherein each sub-message packet to be sent corresponds to a unique sorting order identifier.
[0078] Understandably, this sorting order identifier is used to characterize the position of the sub-message to be sent within the message to be sent.
[0079] Step a2: Based on the order identifier of the sub-message packets to be sent, the sub-message packets to be sent are sent to the message processing module in sequence, so that the message processing module processes the sub-message packets to be sent, obtains the target sub-message packet to be sent, sends the target sub-message packet to the sending unit, the sending unit sends the target sub-message packet to the host, the host sends the target sub-message packet to the receiving unit, and the receiving unit sends the target sub-message packet to the message processing module.
[0080] Similar to the description of step S203 above, it will not be repeated here.
[0081] Step a3: Based on the target sub-message packet sent by the message processing module and the target sub-message packet received by the message processing module, determine the verification result of the message processing module.
[0082] The message processing module verification method provided in this application can achieve complete verification of the message processing module by utilizing an FPGA board that implements the server management module function, an MCTP module, and custom messages. Therefore, it can solve the technical problems of high cost and low efficiency in related technologies for verifying message processing modules, achieving the technical effects of reducing costs and improving verification efficiency. Sending and receiving MCTP messages within the same software system can efficiently and accurately verify the correctness of sent and received data, thereby realizing the verification of the MCTP module.
[0083] In some alternative implementations, step a2 above includes:
[0084] Step a21: Based on the order identifier of the sub-message packets to be sent, save the payload data of the sub-message packets to be sent to the shared memory in sequence, and write the sub-message packets to be sent to the sending buffer of the message processing module. This triggers the message processing module to convert the sub-message packets to be sent into target sub-message packets conforming to the target bus protocol, and send the target sub-message packets to the sending unit. The sending unit sends the target sub-message packets to the host, the host sends the target sub-message packets to the receiving unit, and the receiving unit writes the target sub-message packets to the receiving buffer of the message processing module.
[0085] Similar to the description of step S4031 above, it will not be repeated here.
[0086] The message processing module verification method provided in this application saves the payload data in the sub-message packet to be sent to shared memory. When comparing the payload data of the target sub-message packet sent by the message processing module and the payload data of the target sub-message packet received by the message processing module, it is not necessary to retrieve the target sub-message packet sent by the message processing module from the sending cache and then retrieve the payload data therein. The data can be retrieved directly from the shared memory, which improves the verification efficiency of the message processing module.
[0087] In some alternative implementations, step a3 above includes:
[0088] Step a31: Whenever the message processing module receives a target sub-message packet to be sent, it retrieves the target sub-message packet to be sent received by the message processing module from the message processing module's receive buffer.
[0089] Step a32: Based on the target sub-message packet to be sent received by the message processing module, determine the target arrangement order identifier corresponding to the target sub-message packet to be sent received by the message processing module and the payload data in the target sub-message packet to be sent.
[0090] Step a33: Based on the target sorting order identifier, retrieve the corresponding target payload data from shared memory. It can be understood that the payload data stored in shared memory is associated with the sorting order identifier of its corresponding sub-message packets to be sent.
[0091] Step a34: Compare the payload data in the target sub-message packet to be sent with the target payload data byte by byte to obtain the comparison result.
[0092] Step a35: If the comparison result indicates that the load data in the target sub-message packet to be sent is completely consistent with the target load data, it is determined that the target sub-message packet to be sent has passed the verification. Based on the target arrangement order identifier, it is determined whether the target sub-message packet to be sent is the last sub-message packet to be sent.
[0093] Step a36: If the target sub-message packet to be sent is not the last sub-message packet to be sent, then return to the step of retrieving the target sub-message packet received by the message processing module from the receive buffer of the message processing module whenever the message processing module receives a target sub-message packet to be sent.
[0094] Step a37: If the target sub-message packet to be sent is the last sub-message packet to be sent, then the verification result of the message processing module is determined to be that the message processing module has passed the verification.
[0095] In this case, if the message processing module passes the verification, it means that the message processing module is functioning normally and can work properly.
[0096] The message processing module verification method provided in this application ensures the accuracy of the comparison results by comparing the payload data in the target sub-message packet to be sent with the target payload data byte by byte, thereby determining the accuracy of the verification results of the message processing module.
[0097] In some optional implementations, the message processing module verification method described above further includes:
[0098] Step b1: If the comparison result indicates that the payload data in the target sub-message packet to be sent is not completely consistent with the target payload data, it is determined that the verification of the target sub-message packet to be sent has failed.
[0099] Step b2: If the verification of the target sub-message packet to be sent fails, determine that the verification result of the message processing module is that the message processing module verification failed.
[0100] In some optional implementations, the message processing module verification method described above further includes:
[0101] Step c1 involves executing the verification process for the message processing module multiple times to obtain multiple verification results for the message processing module. The verification process for the message processing module includes the aforementioned steps S201 to S204.
[0102] Step c2: If multiple verification results of the message processing module indicate that the message processing module has passed verification, then the target verification result of the message processing module is determined to be that the message processing module has passed verification.
[0103] If at least one verification result among multiple verification results of the message processing module indicates that the message processing module has failed verification, the target verification result for the message processing module is determined to be "message processing module verification failed". In this embodiment, the target verification result for the message processing module is the final verification result of the message processing module.
[0104] The message processing module verification method provided in this application verifies the message processing module multiple times and determines the target verification result of the message processing module based on the results of the multiple verifications, thereby determining the verification accuracy of the message processing module.
[0105] The embodiments of this application provide a message processing module verification method, applied to a server management module. This embodiment is described using the example that the data length of the message to be sent is not less than a preset data length threshold. Figure 6 A flowchart of a message processing module verification method provided in an embodiment of this application is shown below. Figure 6 As shown, the process includes the following steps:
[0106] Step 1: The software sends MCTP packets, which are then encapsulated and their payload data is saved to shared memory. These packets correspond to the aforementioned sub-message packets to be sent.
[0107] Step 2: The software sending logic writes the packet to the sending buffer, triggering the MCTP module to send the packet.
[0108] Understandably, the MCTP module converts the packets into target packets that conform to the target bus protocol, sends the target packets to the sending unit, the sending unit sends the target packets to the host, the host sends the target packets to the receiving unit, and the receiving unit writes the target packets into the receiving buffer of the MCTP module.
[0109] Step 3: The software sends a logic check to determine if the message packet has been completely sent. If the message packet has not been completely sent, it returns to the step of encapsulating MCTP sub-packets. If the message packet has been completely sent, the process ends. The message packet includes multiple MCTP sub-packets.
[0110] Step 4: The software receiving logic reads the MCTP packet (target packet) from the receiving buffer, verifies the message header of the MCTP packet, and determines whether the message header of the packet is correct, that is, whether the packet conforms to the target protocol specification and whether the endpoint identifier in the packet matches the receiving unit.
[0111] Step 5: If the message header of the sub-packet is correct, then obtain the payload data in the sub-packet. Retrieve the payload data of the sub-packet sent by the MCTP module from the shared memory, verify the payload data, and determine whether the payload data passes the verification. That is, determine whether the payload data in the sub-packet in the receive buffer is completely consistent with the payload data of the sub-packet sent by the MCTP module retrieved from the shared memory.
[0112] If the message header of the sub-packet is incorrect, the process ends, indicating that the MCTP module verification has failed.
[0113] Step Six: If the load data verification passes, determine whether the current packet is the last packet based on the packet header. If the current packet is the last packet, the process ends, and the MCTP module verification is confirmed to have passed. The packet header includes an identifier indicating the packet's order.
[0114] If the current packet is not the last packet, return to step four until all packets have been verified, and determine the verification result of the MCTP module. For details on the software receiving logic, please refer to steps a31 to a37 above; they will not be repeated here.
[0115] Figure 7 The packet flow diagram provided in this application embodiment is described using a USB module with a PCIe EP1 sending unit and a VGA module with a PCIe EP0 receiving unit as an example. Figure 7 As shown, the BMC's software transceiver logic includes software sending logic and software receiving logic. Packets are sent by the software sending logic, first arriving at the MCTP module's send buffer, and then being sent to the USB module of PCIe EP1 via the MCTP module. The USB module sends the packets to the host's PCIe RC via the PCIe bus and the USB module interface on the server side. The PCIe RC sends the packets to the VGA module of PCIe EP0 via the VGA module interface and the PCIe bus. The VGA module forwards the packets to the MCTP module, which writes the packets into the receive buffer. The software receiving logic can then read the packets from the receive buffer and perform packet verification and MCTP module verification.
[0116] The message processing module verification method provided in this application embodiment can achieve complete verification of the message processing module by using an FPGA board that implements the server management module function, an MCTP module and a custom message, thereby achieving the technical effect of reducing costs and improving verification efficiency.
[0117] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.
[0118] Embodiments of this application also provide a message processing module verification device, such as... Figure 8 As shown, the message processing module verification device includes:
[0119] The first determining module 801 is used to determine the sending unit and the receiving unit in the server management module, wherein the sending unit is a functional unit in the first target endpoint device and the receiving unit is a functional unit in the second target endpoint device.
[0120] The second determining module 802 is used to determine the message packet to be sent based on the message to be sent, the sending unit, and the receiving unit if the data length of the message to be sent is less than a preset data length threshold.
[0121] The sending module 803 is used to send the message packet to be sent to the message processing module, so that the message processing module processes the message packet to be sent, obtains the target message packet to be sent, sends the target message packet to the sending unit, the sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module.
[0122] The third determining module 804 is used to determine the verification result of the message processing module based on the target message packet to be sent by the message processing module and the target message packet to be sent received by the message processing module.
[0123] In some alternative implementations, the sending module 803 includes:
[0124] The first sending unit is used to save the payload data in the message packet to be sent to the shared memory, write the message packet to be sent to the sending buffer of the message processing module, trigger the message processing module to convert the message packet to be sent into a target message packet conforming to the target bus protocol, and send the target message packet to the sending unit. The sending unit sends the target message packet to the host end, the host end sends the target message packet to the receiving unit, and the receiving unit writes the target message packet to the receiving buffer of the message processing module.
[0125] In some alternative implementations, the third determining module 804 includes:
[0126] The first determining unit is used to obtain the target message packet to be sent received by the message processing module from the receive buffer of the message processing module, and to determine the payload data in the target message packet to be sent received by the message processing module.
[0127] The first acquisition unit is used to acquire the payload data in the target message packet to be sent sent by the message processing module from the shared memory.
[0128] The first comparison unit is used to compare the payload data in the target message packet to be sent received by the message processing module with the payload data in the target message packet to be sent sent by the message processing module.
[0129] The second determining unit is used to determine that the verification result of the message processing module is that the message processing module has passed verification if the comparison result indicates that the payload data in the target message packet to be sent received by the message processing module is completely consistent with the payload data in the target message packet to be sent sent by the message processing module.
[0130] In some optional implementations, the message processing module verification device further includes:
[0131] The second acquisition unit is used to split the message to be sent into multiple sub-messages if the data length of the message to be sent is not less than a preset data length threshold. Based on the multiple sub-messages to be sent, the sending unit, and the receiving unit, multiple sub-message packets to be sent are determined, wherein each sub-message packet to be sent corresponds to a unique sorting order identifier.
[0132] The second sending unit is used to send the sub-message packets to be sent to the message processing module in sequence based on the order identifier of the sub-message packets to be sent, so that the message processing module can process the sub-message packets to be sent, obtain the target sub-message packet to be sent, send the target sub-message packet to the sending unit, the sending unit sends the target sub-message packet to the host, the host sends the target sub-message packet to the receiving unit, and the receiving unit sends the target sub-message packet to the message processing module.
[0133] The third determining unit is used to determine the verification result of the message processing module based on the target sub-message packet sent by the message processing module and the target sub-message packet received by the message processing module.
[0134] In some alternative implementations, the second transmitting unit includes:
[0135] The third sending unit is used to save the payload data of the sub-message packets to be sent to the shared memory in sequence based on the order identifier of the sub-message packets to be sent, and write the sub-message packets to be sent to the sending buffer of the message processing module. This triggers the message processing module to convert the sub-message packets to be sent into target sub-message packets that conform to the target bus protocol, and send the target sub-message packets to the sending unit. The sending unit then sends the target sub-message packets to the host end, and the host end sends the target sub-message packets to the receiving unit. The receiving unit then writes the target sub-message packets to the receiving buffer of the message processing module.
[0136] In some optional implementations, the third determining unit includes:
[0137] The third acquisition unit is used to acquire the target sub-message packet received by the message processing module from the receive buffer of the message processing module whenever the message processing module receives a target sub-message packet to be sent.
[0138] The fourth determining unit is used to determine the target arrangement order identifier and the payload data in the target sub-message packet received by the message processing module based on the target sub-message packet to be sent.
[0139] The fourth acquisition unit is used to acquire the corresponding target load data from the shared memory based on the target sorting order identifier.
[0140] The fifth acquisition unit is used to compare the payload data in the target sub-message packet to be sent with the target payload data byte by byte to obtain the comparison result.
[0141] The fifth determining unit is used to determine that the target sub-message packet has passed verification if the comparison result indicates that the load data in the target sub-message packet to be sent is completely consistent with the target load data, and to determine whether the target sub-message packet to be sent is the last sub-message packet to be sent based on the target arrangement order identifier.
[0142] The return execution unit is used to return to the execution step of retrieving the target sub-message packet received by the message processing module from the receive buffer whenever the message processing module receives a target sub-message packet.
[0143] The sixth determining unit is used to determine the verification result of the message processing module as "verification passed" if the target sub-message packet to be sent is the last sub-message packet to be sent.
[0144] In some optional implementations, the message processing module verification device further includes:
[0145] The seventh determining unit is used to determine that the verification of the target sub-message packet has failed when the comparison result indicates that the load data in the target sub-message packet to be sent is not completely consistent with the target load data.
[0146] The eighth determining unit is used to determine the verification result of the message processing module as "message processing module verification failed" when the verification of the target sub-message packet to be sent fails.
[0147] For a description of the features in the embodiment corresponding to the message processing module verification device, please refer to the relevant description of the embodiment corresponding to the message processing module verification method, which will not be repeated here.
[0148] Embodiments of this application also provide an electronic device, such as... Figure 9 As shown, it includes a processor 901 and a memory 902, in which a computer program is stored. The processor 901 is configured to run the computer program to perform the steps in any of the above-described message processing module verification method embodiments.
[0149] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described message processing module verification method embodiments at runtime.
[0150] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.
[0151] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described message processing module verification method embodiments.
[0152] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described message processing module verification method embodiments.
[0153] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0154] The foregoing has provided a detailed description of the message processing module verification method, apparatus, electronic device, and storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A method for verifying a message processing module, characterized in that, include: The sending unit and receiving unit in the server management module are determined, wherein the sending unit is a functional unit in the first target endpoint device, and the receiving unit is a functional unit in the second target endpoint device; If the data length of the message to be sent is less than a preset data length threshold, then the message packet to be sent is determined based on the message to be sent, the sending unit, and the receiving unit. The message packet to be sent is sent to the message processing module so that the message processing module processes the message packet to be sent, obtains the target message packet to be sent, and sends the target message packet to the sending unit. The sending unit sends the target message packet to the host end, the host end sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module. Based on the target message packet sent by the message processing module and the target message packet received by the message processing module, the verification result of the message processing module is determined.
2. The method according to claim 1, characterized in that, The step of sending the message packet to be sent to the message processing module, so that the message processing module processes the message packet to be sent to obtain the target message packet to be sent, and then sends the target message packet to the sending unit. The sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module, including: The payload data in the message packet to be sent is saved to shared memory, and the message packet to be sent is written into the sending buffer of the message processing module. This triggers the message processing module to convert the message packet to be sent into a target message packet conforming to the target bus protocol. The target message packet to be sent is then sent to the sending unit. The sending unit sends the target message packet to the host end. The host end sends the target message packet to the receiving unit. The receiving unit writes the target message packet to the receiving buffer of the message processing module.
3. The method according to claim 2, characterized in that, The determination of the verification result of the message processing module based on the target message packet sent by the message processing module and the target message packet received by the message processing module includes: Obtain the target message packet to be sent received by the message processing module from the receive buffer of the message processing module, and determine the payload data in the target message packet to be sent received by the message processing module; Retrieve payload data from the target message packet to be sent by the message processing module from the shared memory; Compare the payload data in the target message packet to be sent received by the message processing module with the payload data in the target message packet to be sent sent by the message processing module; If the comparison result indicates that the payload data in the target message packet to be sent received by the message processing module is completely consistent with the payload data in the target message packet to be sent sent by the message processing module, then the verification result of the message processing module is determined to be that the message processing module has passed the verification.
4. The method according to claim 1, characterized in that, The method further includes: If the data length of the message to be sent is not less than a preset data length threshold, the message to be sent is split to obtain multiple sub-messages to be sent. Based on the multiple sub-messages to be sent, the sending unit, and the receiving unit, multiple sub-message packets to be sent are determined, wherein each sub-message packet to be sent corresponds to a unique sorting order identifier. Based on the order identifier of the sub-message packets to be sent, the sub-message packets to be sent are sent to the message processing module in sequence, so that the message processing module processes the sub-message packets to be sent, obtains the target sub-message packet to be sent, and sends the target sub-message packet to the sending unit. The sending unit sends the target sub-message packet to the host, the host sends the target sub-message packet to the receiving unit, and the receiving unit sends the target sub-message packet to the message processing module. Based on the target sub-message packet sent by the message processing module and the target sub-message packet received by the message processing module, the verification result of the message processing module is determined.
5. The method according to claim 4, characterized in that, The step of sending the sub-message packets to be sent sequentially to the message processing module based on their arrangement order identifiers, so that the message processing module processes the sub-message packets to be sent, obtains the target sub-message packet to be sent, sends the target sub-message packet to the sending unit, the sending unit sends the target sub-message packet to the host, the host sends the target sub-message packet to the receiving unit, and the receiving unit sends the target sub-message packet to the message processing module, including: Based on the order identifier of the sub-message packets to be sent, the payload data of the sub-message packets to be sent are saved to the shared memory in sequence, and the sub-message packets to be sent are written into the sending buffer of the message processing module. This triggers the message processing module to convert the sub-message packets to be sent into target sub-message packets conforming to the target bus protocol, and send the target sub-message packets to the sending unit. The sending unit sends the target sub-message packets to the host, the host sends the target sub-message packets to the receiving unit, and the receiving unit writes the target sub-message packets to the receiving buffer of the message processing module.
6. The method according to claim 5, characterized in that, The determination of the verification result of the message processing module based on the target sub-message packet sent by the message processing module and the target sub-message packet received by the message processing module includes: Whenever the message processing module receives a target sub-message packet to be sent, it retrieves the target sub-message packet to be sent received by the message processing module from the message processing module's receive buffer; Based on the target sub-message packet to be sent received by the message processing module, the target arrangement order identifier corresponding to the target sub-message packet to be sent received by the message processing module and the load data in the target sub-message packet to be sent are determined. Based on the target sorting order identifier, the corresponding target load data is obtained from the shared memory; The payload data in the target sub-message packet to be sent and the target payload data are compared byte by byte to obtain the comparison result; If the comparison result indicates that the load data in the target sub-message packet to be sent is completely consistent with the target load data, it is determined that the target sub-message packet to be sent has passed the verification. Based on the target arrangement order identifier, it is determined whether the target sub-message packet to be sent is the last sub-message packet to be sent. If the target sub-message packet to be sent is not the last sub-message packet to be sent, then return to the step of retrieving the target sub-message packet received by the message processing module from the receive buffer of the message processing module whenever the message processing module receives a target sub-message packet to be sent. If the target sub-message packet to be sent is the last sub-message packet to be sent, then the verification result of the message processing module is determined to be that the message processing module has passed the verification.
7. The method according to claim 6, characterized in that, The method further includes: If the comparison result indicates that the payload data in the target sub-message packet to be sent is not completely consistent with the target payload data, it is determined that the verification of the target sub-message packet to be sent has failed. If the verification of the target sub-message packet to be sent fails, the verification result of the message processing module is determined to be that the message processing module verification failed.
8. A message processing module verification device, characterized in that, include: The first determining module is used to determine the sending unit and the receiving unit in the server management module, wherein the sending unit is a functional unit in the first target endpoint device and the receiving unit is a functional unit in the second target endpoint device; The second determining module is used to determine the message packet to be sent based on the message to be sent, the sending unit, and the receiving unit if the data length of the message to be sent is less than a preset data length threshold. A sending module is used to send the message packet to be sent to a message processing module, so that the message processing module processes the message packet to be sent, obtains a target message packet to be sent, sends the target message packet to the sending unit, the sending unit sends the target message packet to the host, the host sends the target message packet to the receiving unit, and the receiving unit sends the target message packet to the message processing module. The third determining module is used to determine the verification result of the message processing module based on the target message packet to be sent by the message processing module and the target message packet to be sent received by the message processing module.
9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the message processing module verification method as described in any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the message processing module verification method as described in any one of claims 1 to 7.