Epitaxial silicon wafer and method for manufacturing same

Abstract

[Problem] To provide an epitaxial silicon wafer having small in-plane variation in resistivity and a small amount of warpage, and a method for manufacturing the same. [Solution] An epitaxial silicon wafer (1) having a diameter of 300 mm and a thickness of 761-795 [mu] m comprises: a boron-doped bulk silicon substrate (2) having a resistivity of 8-20 m [Omega] cm; an epitaxial silicon film (3) formed on the front surface (2a) of the bulk silicon substrate (2); and a back surface oxide film (4) formed on the back surface (2b) of the bulk silicon substrate (2). The thickness of the epitaxial silicon film (3) is 1.7-2.7 [mu] m, the resistivity under boron doping is 8-12 [Omega] cm, and the in-plane distribution of the resistivity is 3% or less. The thickness of the back oxide film (4) is 50-150 nm.

Description

Technical Field

[0001] This invention relates to epitaxial silicon wafers and methods for manufacturing the same, and particularly to epitaxial silicon wafers with warpage reduction measures implemented and methods for manufacturing the same. Background Technology

[0002] Epitaxial silicon wafers are widely used as substrate materials for semiconductor devices. An epitaxial silicon wafer is a wafer on the main surface of a bulk silicon substrate with an epitaxial silicon film formed thereon. Due to the high integrity of the crystal, it is possible to manufacture high-quality and highly reliable semiconductor devices.

[0003] The bulk silicon substrate, which serves as the substrate material for epitaxial silicon wafers, can be manufactured by sequentially performing peripheral grinding, slicing, polishing, etching, double-sided grinding, single-sided grinding, and cleaning processes on a silicon single crystal ingot grown using the Czochralski method (CZ method). Then, an epitaxial film is grown in the vapor phase on the surface of the bulk silicon substrate using an epitaxial growth apparatus, thus completing the epitaxial silicon wafer.

[0004] Recently, for applications such as BSI-CIS (back-illuminated CMOS image sensors) and BSPDN (back-side power supply network), there is a demand for large-diameter epitaxial silicon wafers obtained by growing high-resistivity epitaxial films with low dopant concentrations on low-resistivity bulk silicon substrates with high dopant concentrations. In these applications, the dopant concentration difference is utilized as the etching stop after the bonding process.

[0005] In the manufacture of such epitaxial silicon wafers, there is a problem of autodoping, where dopants contained in the bulk silicon substrate volatilize during the epitaxial process and are absorbed into the epitaxial film, resulting in a localized increase in dopant concentration in the epitaxial film. As a method to prevent autodoping, a known method is to form an oxide film (SiOx) on the back side of the bulk silicon substrate to prevent dopant volatilization.

[0006] Furthermore, warpage becomes a problem in such epitaxial silicon wafers. This is mainly due to the difference in dopant concentration between the bulk silicon substrate and the epitaxial silicon film. Moreover, when an oxide film is deposited on the back side of the bulk silicon substrate, the warpage problem of the epitaxially grown wafer is further complicated by the difference in the coefficients of thermal expansion between the epitaxial wafer and the oxide film, as well as the warpage of the epitaxial wafer and the uneven film stress of the oxide film. The warpage of the epitaxial silicon wafer affects the wafer bonding process and the control of pattern overlap on the wafer.

[0007] Regarding measures to reduce wafer warpage, Patent Document 1 describes a method for predicting the amount of wafer warpage caused by epitaxial growth and manufacturing a substrate wafer with warpage in the opposite direction to that caused by epitaxial growth by grinding or polishing.

[0008] Furthermore, Patent Document 2 describes a method for manufacturing a high-quality semiconductor epitaxial wafer with low warpage and a polycrystalline silicon film exhibiting high gettering capability. This method involves forming a protective film on the front and back sides of a semiconductor wafer to prevent dopant volatilization. After removing the protective film on the front side, an epitaxial film is simultaneously formed on the front side of the semiconductor wafer, and a polycrystalline silicon film is formed on the back side, both within a reactor. According to this manufacturing method, films of the same material are formed on both the front and back sides of the semiconductor wafer, thus enabling the production of epitaxial wafers with low stress on the semiconductor wafer, maintained surface flatness, and low warpage.

[0009] Existing technical documents

[0010] Patent documents

[0011] Patent Document 1: Japanese Patent Application Publication No. 2008-140856

[0012] Patent Document 2: Japanese Patent Application Publication No. 2003-188107 Summary of the Invention

[0013] The problem that the invention aims to solve

[0014] However, in the manufacturing of epitaxial silicon wafers described in Patent Document 1, the substrate wafer needs to be ground or polished, which presents a problem of difficulty in processing the substrate wafer with high precision. Furthermore, Patent Document 1 does not disclose any information regarding the back oxide film. Patent Document 2, from the viewpoint of preventing dopant volatilization, describes a back oxide film thickness of 50 mm. (5–1000 nm), but by forming a polysilicon film on the back side, a balance is achieved with the warpage of the epitaxial film on the surface side, and the effect of the back oxide film on wafer warpage is almost negligible. However, in recent applications where etching stops after bonding, the back polysilicon is not required, and considering cost, there is no point in forming it. In addition, the larger the wafer diameter, the greater the effect of the back oxide film on wafer warpage; in large-diameter wafers of 300 mm and above, the thickness of the back oxide film needs to be strictly managed.

[0015] Therefore, the object of the present invention is to provide an epitaxial silicon wafer with small in-plane resistivity deviation and small warpage, and a method for manufacturing the same.

[0016] Solution for solving the problem

[0017] Until now, it was believed that a sufficiently thick back oxide film was required to suppress autodoping. However, the results of repeated and in-depth research by the inventors of this application have shown that an excessively thick back oxide film is a major cause of warpage degradation in epitaxial silicon wafers. Furthermore, it has been clarified that even by thinning the back oxide film to a certain extent, the effect of suppressing autodoping can be achieved; moreover, by reducing the thickness of the back oxide film, the warpage of the epitaxial wafer can be reduced.

[0018] This invention is based on the following technical insight: the epitaxial silicon wafer of this invention is an epitaxial silicon wafer with a diameter of 300 mm and a thickness of 761–795 μm. It is characterized by having a bulk silicon substrate with a resistivity of 8–20 mΩ·cm doped with boron, an epitaxial silicon film formed on the surface of the bulk silicon substrate, and a back oxide film formed on the back side of the bulk silicon substrate. The epitaxial silicon film has a thickness of 1.7–2.7 μm, a resistivity of 8–12 Ω·cm under boron doping, and an in-plane resistivity deviation of less than 3%. The back oxide film has a thickness of 50–150 nm.

[0019] Furthermore, the method for manufacturing an epitaxial silicon wafer of the present invention is a method for manufacturing an epitaxial silicon wafer with a diameter of 300 mm and a thickness of 761 to 795 μm, characterized by comprising: a step of fabricating a bulk silicon substrate doped with boron and having a resistivity of 8 to 20 mΩ·cm; a step of forming a back oxide film with a thickness of 50 to 150 nm on the back side of the bulk silicon substrate; and a step of forming an epitaxial silicon film with a thickness of 1.7 to 2.7 μm, a resistivity of 8 to 12 Ω·cm under boron doping, and an in-plane deviation of resistivity of 3% or less on the surface of the bulk silicon substrate.

[0020] According to the present invention, the film stress of the back oxide film can be used to counteract the warpage of the wafer caused by the influence of the epitaxial silicon film. Therefore, it is possible to realize large-diameter epitaxial silicon wafers with low warpage.

[0021] The warp-bf of the epitaxial silicon wafer of the present invention is preferably 10 μm or less, and the bow-bf is preferably ±5 μm or less. This results in high wafer flatness quality, thereby suppressing defects such as voids in the wafer bonding process and improving the overlap accuracy of patterns on the wafer. Therefore, the manufacturing yield of semiconductor devices can be improved.

[0022] Furthermore, the epitaxial silicon wafer manufacturing method of the present invention is a method for manufacturing an epitaxial silicon wafer with a diameter of 300 mm and a thickness of 761–795 μm, characterized by comprising: a step of fabricating a boron-doped bulk silicon substrate with a resistivity of 8–20 mΩ·cm; and using the boron concentration and thickness of the bulk silicon substrate, and the thickness t of the epitaxial silicon film. epiThe process involves calculating the warpage δ1 of the epitaxial wafer using a correlation formula; calculating the warpage δ2 of the silicon wafer with the back oxide film formed using a correlation formula between the diameter and thickness of the bulk silicon substrate and the thickness of the back oxide film; and estimating the back oxide film thickness t at which Warp-bf and Bow-bf are minimized based on the warpage δ1 and the warpage δ2. f The process; forming the thickness t on the back side of the bulk silicon substrate. f The process of forming the back oxide film; and forming the thickness t on the surface of the bulk silicon substrate. epi The process of epitaxial silicon film.

[0023] The manufacturing method of the present invention is preferably based on the estimated thickness t of the back oxide film. f Experimentally, the thickness of the back oxide film at which Warp-bf and Bow-bf are actually minimized is determined. Furthermore, it is preferable to calculate Bow-bf by adding the warp amount δ1 as the positive direction and the warp amount δ2 as the negative direction, and even more preferably, the absolute value of the calculated Bow-bf is used as Warp-b.

[0024] The effects of the invention

[0025] According to the present invention, an epitaxial silicon wafer with small in-plane resistivity deviation and small warpage, and a method thereof are provided.

[0026] Brief description of the attached diagram

[0027] Figure 1 This is a schematic cross-sectional view showing the structure of an epitaxial silicon wafer according to an embodiment of the present invention.

[0028] Figure 2 This is an illustration of a predictive formula for the warpage of an epitaxial silicon wafer without a back oxide film.

[0029] Figure 3 This is a predictive illustration of the warping of a silicon wafer with a back oxide film.

[0030] Figure 4 It is a graph showing the relationship between the thickness of the back oxide film and the bow of the wafer.

[0031] Figure 5 It is a graph showing the relationship between the thickness of the back oxide film and the warp of the wafer.

[0032] Figure 6 It is a graph showing the relationship between the thickness of the back oxide film and the Bow-bf of the wafer.

[0033] Figure 7It is a graph showing the relationship between the thickness of the back oxide film and the warp-bf of the wafer.

[0034] Figure 8 This is a schematic diagram illustrating the points where resistivity is measured.

[0035] Figure 9 It is a graph showing the relationship between the thickness of the back oxide film and the in-plane deviation of the resistivity of the epitaxial silicon film. Detailed Implementation

[0036] The following is a reference to the appendix. Figure 1 The preferred embodiments of the present invention will be described in detail below.

[0037] Figure 1 This is a schematic cross-sectional view showing the structure of an epitaxial silicon wafer according to an embodiment of the present invention.

[0038] like Figure 1 As shown, the epitaxial silicon wafer 1 has a bulk silicon substrate 2 cut from a CZ silicon single crystal, an epitaxial silicon film 3 formed on the surface 2a of the bulk silicon substrate 2, and a back oxide film 4 formed on the back surface 2b of the bulk silicon substrate 2. In this embodiment, the diameter of the epitaxial silicon wafer 1 is 300 mm and the thickness is 761–795 μm. It should be noted that the 300 mm diameter wafer is a wafer conforming to the SEMI standard, allowing for an error of ±0.2 mm.

[0039] The bulk silicon substrate 2 is a p-type semiconductor silicon doped with boron (B) with a resistivity of 8 to 20 mΩ·cm. Although it also depends on the specifications, the resistivity of the bulk silicon substrate 2 is preferably 8 to 10 mΩ·cm.

[0040] An epitaxial silicon film 3 is formed on the surface 2a (main surface) of the bulk silicon substrate 2. That is, the surface of the epitaxial silicon wafer 1 is composed of the epitaxial silicon film 3. The thickness of the epitaxial silicon film 3 is not particularly limited, but is preferably 1.7 to 2.7 μm. The thickness of the epitaxial silicon film 3 is determined based on the type and characteristics of the semiconductor device to be fabricated.

[0041] The epitaxial silicon film 3 is a boron (B)-doped p-type semiconductor silicon with a resistivity of 8–12 Ω·cm. Since the dopant concentration of the epitaxial silicon film 3 is very low compared to the dopant concentration of the bulk silicon substrate 2, during the epitaxial growth process, when the highly doped bulk silicon substrate 2 is heated, dopant evaporates from the back side 2b of the bulk silicon substrate 2 and travels to the surface 2a, partially incorporating into the epitaxial silicon film 3 during the growth process. Therefore, the deterioration of the in-plane resistivity distribution of the epitaxial silicon film 3 becomes a problem.

[0042] A back oxide film 4 formed of SiOx is formed on the back side 2b of the bulk silicon substrate 2. That is, the back side of the epitaxial silicon wafer 1 is composed of the back oxide film 4. The back oxide film 4 serves to prevent dopant from volatilizing from the bulk silicon substrate 2 during the formation of the epitaxial silicon film 3.

[0043] The thickness of the back oxide film 4 is preferably 50-150 nm (500- In this embodiment, the back oxide film 4 not only suppresses autodoping but also suppresses wafer warpage. Here, when the thickness of the back oxide film 4 is greater than 150 nm, the effect of suppressing wafer warpage cannot be obtained; furthermore, when the thickness of the back oxide film 4 is less than 50 nm, the autodoping suppression effect may not be obtained. However, if the thickness of the back oxide film 4 is 50–150 nm, it is possible to suppress both autodoping and warpage of the epitaxial silicon wafer 1.

[0044] The in-plane deviation of the resistivity of the epitaxial silicon film 3 is preferably 3% or less. When autodoping is suppressed by using the back oxide film 4, the deterioration of the in-plane resistivity distribution of the epitaxial silicon film 3 can be suppressed, and the in-plane deviation of the resistivity can be suppressed to 3% or less.

[0045] The in-plane deviation of the resistivity of the outer periphery of the epitaxial silicon film 3 is preferably 1.5% or less. Here, the outer periphery of the epitaxial silicon film 3 refers to the region within 100 mm from the outermost periphery of the wafer. When autodoping is suppressed by using the back oxide film 4, the change in resistivity of the outer periphery of the epitaxial silicon film 3 can be suppressed, and the in-plane deviation of the resistivity of the outer periphery can be suppressed to 1.5% or less.

[0046] Figure 2 This is an illustrative diagram showing the predicted warpage of an epitaxial silicon wafer without a back oxide film. Additionally, Figure 3 This is a predictive illustration of the warping of a silicon wafer with a back oxide film.

[0047] like Figure 2 As shown, a simple epitaxial silicon wafer without a back oxide film is a wafer on which an epitaxial silicon film is formed on the surface of a silicon substrate. However, due to the difference in boron concentration between the silicon substrate and the epitaxial silicon film, a warping shape with an upward convex shape based on the different atomic radii of silicon atoms and boron atoms is generated on the epitaxial silicon wafer. The amount of warping δ1 can be expressed by the following formula.

[0048] [Mathematical Expression 1]

[0049]

[0050] Where r is the radius of the bulk silicon substrate 2, t si [B] is the thickness of bulk silicon substrate 2, [B] is the boron concentration in bulk silicon substrate 2, and t is the thickness of bulk silicon substrate 2.epi This refers to the thickness of the epitaxial silicon film 3. The boron concentration in the epitaxial silicon film is negligible compared to the boron concentration in the bulk silicon substrate 2, and therefore is not considered.

[0051] In addition, such as Figure 3 As shown, a warping shape with a downward convex shape is generated on a silicon wafer with a back oxide film, and the amount of warping δ2 can be expressed by the following formula.

[0052] [Mathematical Expression 2]

[0053]

[0054] Among them, R s Let t be the radius of the silicon wafer. s E represents the thickness of the silicon wafer. s v is the Young's modulus of silicon. s t is the Poisson's ratio of silicon. f σ represents the thickness of the oxide film 4 on the back side. f The stress is the film stress of the oxide film 4 on the back side.

[0055] Moreover, when the two warp values ​​δ1 and δ2 are balanced, the warp value of the epitaxial silicon wafer with the back oxide film is minimized.

[0056] In this embodiment, the warp of the epitaxial silicon wafer 1, where the warp of the convex shape and the warp of the concave shape cancel each other out, is preferably 10 μm or less, and the bow is preferably within ±5 μm. Here, warp is a value expressed as the difference between the maximum and minimum displacement from the best fit plane of thickness central plane (where the thickness is never fixed) to the central plane in the thickness direction of the wafer (Warp-bf: SEMI-MF657, SEMI-MF1390). Bow, on the other hand, is a value expressed as the displacement from the best fit plane of thickness central plane (where the concave shape is set as the surface side, the center point of the thickness of the central portion of the wafer) to the center point of the thickness of the central portion of the wafer (Bow-bf: SEMI-MF534). Warp-bf and Bow-bf can be measured using, for example, a capacitive flatness measuring instrument.

[0057] In this embodiment, the epitaxial silicon wafer 1 is manufactured by forming an epitaxial silicon film 3 on the surface 2a of the bulk silicon substrate 2 after forming a back oxide film 4 on the back side 2b of the bulk silicon substrate 2. The back oxide film 4 can be formed, for example, using a monolithic atmospheric pressure CVD (Chemical Vapor Deposition) apparatus.

[0058] The epitaxial silicon film 3 can be formed by growing a silicon vapor phase, for example, at a temperature range of 900 to 1200°C, while supplying a raw material gas to the surface 2a of the bulk silicon substrate 2. Here, the raw material gas can be, for example, Si3H8, SiH2Cl2, SiHCl3, SiCl4, etc.

[0059] As explained above, the epitaxial silicon wafer 1 of this embodiment includes: a bulk silicon substrate 2 with a resistivity of 8 to 20 mΩ·cm doped with boron, an epitaxial silicon film 3 formed on the surface 2a of the bulk silicon substrate 2, and a back oxide film 4 formed on the back surface 2b of the bulk silicon substrate 2. The thickness of the epitaxial silicon film 3 is 1.7 to 2.7 μm, the resistivity under boron doping is 8 to 12 Ω·cm, and the in-plane deviation of the resistivity is 3% or less. The thickness of the back oxide film 4 is 50 nm or more and 150 nm or less. Therefore, while suppressing autodoping, the warp-bf of the epitaxial silicon wafer 1 can be suppressed to 10 μm or less, and the bow-bf can be suppressed to within ±5 μm. The final epitaxial silicon wafer 1 is, for example, a wafer with a diameter of 300 mm and a thickness of 761 to 795 μm.

[0060] This invention is not limited to the embodiments described above. Various modifications can be made without departing from the spirit of this invention, and these modifications are also included within the scope of this invention.

[0061] Example

[0062] The warpage δ1 of the epitaxial wafer alone is calculated using Equation (1), and then the warpage δ2 based on the back oxide film is calculated using Equation (2). The value obtained by adding the calculated positive warpage δ1 to the negative warpage δ2 is used as Bow. The absolute value of the calculated Bow is used as Warp. The calculation results of Bow and Warp when forming 50nm, 100nm, 150nm, and 200nm back oxide films on wafers with various silicon substrate resistivity, silicon substrate thickness, and epitaxial silicon film thickness are shown below. Figure 4 and Figure 5 .according to Figure 4 and Figure 5 It can be inferred that by setting the thickness of the back oxide film to around 150nm, both Bow-bf and Warp-bf can be reduced.

[0063] Based on the estimated results, epitaxial silicon wafers of Examples 1-3 and Comparative Examples 1-3 with different thicknesses of back oxide films formed on the back side of a p-type silicon substrate formed from a block silicon wafer with a diameter of 300 mm were prepared. The resistivity of the p-type silicon substrate was set to 8-10 mΩ·cm. The back oxide film was formed using monolithic atmospheric pressure CVD at a film deposition rate of 400-500 mΩ·cm. It is formed in this way. In addition, in all embodiments and comparative examples, a material in which an oxide film is formed on the entire back side of the wafer without special edge treatment of the back oxide film is used.

[0064] The back oxide film thicknesses of the epitaxial silicon wafers in Examples 1-3 were set to 50 nm, 100 nm, and 150 nm, respectively. The back oxide film thicknesses of the epitaxial silicon wafers in Comparative Examples 1 and 2 were set to 200 nm and 300 nm, respectively. Furthermore, a mass-produced epitaxial silicon wafer with a back oxide film thickness of 300-400 nm was designated as Comparative Example 3. The thickness of the epitaxial film formed on the surface of the bulk silicon substrate was set to 1.7-2.7 μm, and the resistivity was set to 8-12 Ω·cm. The sample numbers of the epitaxial silicon wafers in Examples 1-3 were set to 14, 15, and 15, respectively. The sample numbers of the epitaxial silicon wafers in Comparative Examples 1 and 2 were set to 14 and 15, respectively. Furthermore, the sample number of the epitaxial silicon wafer in Comparative Example 3 was set to 1500.

[0065] Next, the Bow-bf and Warp-bf of each epitaxial silicon wafer sample were measured using a flatness measuring device manufactured by ADE. The outer periphery within 2 mm from the outermost edge of the wafer was excluded from the flatness measurement. The results are shown in Tables 1 and 2.

[0066] [Table 1]

[0067]

[0068] [Table 2]

[0069]

[0070] Figure 6 This is a graph showing the relationship between the thickness of the back oxide film and the Bow-bf of the wafer, as shown in Table 1. Additionally, Figure 7 This is a graph showing the relationship between the thickness of the back oxide film and the Warp-bf of the wafer, as shown in Table 2.

[0071] like Figure 6 As shown in Table 1, the average Bow-bf value of the 14 wafer samples from Example 1 with a back oxide film thickness of 50 nm was 2.0504 μm, and the standard deviation of Bow-bf was 0.6137 μm. Additionally, as... Figure 7 As shown in Table 2, the average Warp-bf value of the 14 wafer samples in Example 1 was 6.9674 μm, and the standard deviation of Warp-bf was 0.9572 μm.

[0072] The average Bow-bf value of the 15 wafer samples in Example 2, with a back oxide film thickness of 100 nm, was 0.64 μm, with a standard deviation of 0.2517 μm. Additionally, the average Warp-bf value of the 15 wafer samples in Example 2 was 4.2153 μm, with a standard deviation of 0.3328 μm.

[0073] The average Bow-bf value of the 15 wafer samples in Example 3, with a back oxide film thickness of 150 nm, was -2.592 μm, with a standard deviation of 0.2682 μm. Additionally, the average Warp-bf value of the 15 wafer samples in Example 3 was 7.5999 μm, with a standard deviation of 0.4470 μm.

[0074] The average Bow-bf value of the 15 wafer samples in Comparative Example 1, with a back oxide film thickness of 200 nm, was -5.791 μm, with a standard deviation of 0.1598 μm. Additionally, the average Warp-bf value of the 15 wafer samples in Comparative Example 1 was 13.666 μm, with a standard deviation of 0.2092 μm.

[0075] The average Bow-bf value of the 14 wafer samples in Comparative Example 2, with a back oxide film thickness of 300 nm, was -11.33 μm, with a standard deviation of 0.2664 μm. Additionally, the average Warp-bf value of the 14 wafer samples in Comparative Example 2 was 25.079 μm, with a standard deviation of 0.3819 μm.

[0076] The average Bow-bf value of the 1500 wafer samples in Comparative Example 3, with a back oxide film thickness of 300–400 nm, was -14.66 μm, with a standard deviation of 0.89 μm. Additionally, the average Warp-bf value of the 1500 wafer samples in Comparative Example 3 was 33.1 μm, with a standard deviation of 2.9139 μm.

[0077] Based on the above results, it was confirmed that the warpage of the epitaxial silicon wafer tends to decrease as the thickness of the back oxide film decreases. Furthermore, in Examples 1-3, where the back oxide film thickness was 150 nm or less, the Bow-bf was within ±5 μm and the Warp-bf was 10 μm or less, resulting in a significantly smaller warpage of the epitaxial silicon wafer compared to Comparative Example 3, which was a mass-produced product. In Example 2, where the back oxide film thickness was 100 nm, the Bow-bf was within ±1 μm and the Warp-bf was 5 μm or less, demonstrating that the warpage of the epitaxial silicon wafer could be minimized.

[0078] In the estimation using Equations (1) and (2), it is considered good to set the thickness of the back oxide film at around 150 nm, but in reality, a thinner thickness is better. The reason for this can be cited as follows: Equation (2) is a formula that quantifies the deflection at the center of the wafer, while the actual back oxide film expands three-dimensionally, and the Young's modulus and Poisson's ratio actually vary according to the resistivity.

[0079] Next, the resistivity distribution of each sample of epitaxial silicon wafers from Examples 1-3 and Comparative Examples 1-3 was measured using an SCP (Surface Charge Profiler) to evaluate the uniformity of the resistivity of the epitaxial silicon film. From the viewpoint of measurement reproducibility, a pretreatment based on heating (200-300°C, 30 seconds or more) was performed, and measurements were conducted at a light source wavelength of 450 nm. Furthermore, 4253 points were mapped at 4 mm intervals, excluding the outermost 2 mm region of the wafer. Then, among all measurement points, the measurement points within the outermost 6 mm region of the wafer were excluded. Figure 8 The 145 points shown are on the crosshairs. Then, the maximum value ρ extracted is... max , and minimum value ρ min The resistivity uniformity U (%) is calculated using the following formula (3). Furthermore, among the 145 points mentioned above, 48 points (12 × 4 points) in a region further outward (100-150 mm) from the center of the wafer are selected, and the resistivity uniformity U (%) is calculated in the same way.

[0080] [Mathematical Expression 3]

[0081] U=(ρ max -ρ min ) / (ρ max +ρ min )×100···(3)

[0082] Figure 9 It is a graph showing the relationship between the thickness of the back oxide film and the uniformity of the resistivity of the epitaxial silicon film.

[0083] like Figure 9 As shown, the resistivity uniformity at 145 measurement points, including the center of the wafer, was 2.7% or less in Examples 1-3 and Comparative Examples 1-3, which is a good result of less than 3%. Furthermore, the resistivity uniformity at 48 points on the outer periphery of the wafer was 1.2% or less in Examples 1-3, which is a good result of less than 1.5%. These results confirm that if the thickness of the back oxide film is 50 nm or more, the difference in back oxide film thickness has a negligible effect on autodoping, ensuring resistivity uniformity.

[0084] Explanation of symbols

[0085] 1. Epitaxial silicon wafer

[0086] 2. Bulk silicon substrate

[0087] 2a Surface of a bulk silicon substrate

[0088] 2b Back side of bulk silicon substrate

[0089] 3. Epitaxial silicon film

[0090] 4. Oxide film on the back

Claims

1. An epitaxial silicon wafer, characterized in that it has a diameter of 300 mm and a thickness of 761–795 μm, and is further characterized in that... This epitaxial silicon wafer has: Bulk silicon substrates doped with boron have a resistivity of 8–20 mΩ·cm. The epitaxial silicon film formed on the surface of the bulk silicon substrate, and A back oxide film formed on the back side of the bulk silicon substrate. The epitaxial silicon film has a thickness of 1.7–2.7 μm, a resistivity of 8–12 Ω·cm under boron doping, and an in-plane resistivity deviation of less than 3%. The back oxide film is a film with a thickness of 50-150 nm.

2. The epitaxial silicon wafer according to claim 1, wherein, Warp-bf is below 10μm.

3. The epitaxial silicon wafer according to claim 1, wherein, Bow-bf is less than ±5μm.

4. A method for manufacturing an epitaxial silicon wafer, characterized in that, it is a method for manufacturing an epitaxial silicon wafer with a diameter of 300 mm and a thickness of 761–795 μm, This manufacturing method has the following characteristics: The process of fabricating boron-doped bulk silicon substrates with a resistivity of 8–20 mΩ·cm. The process of forming a back oxide film with a thickness of 50-150 nm on the back side of the bulk silicon substrate, and The process of forming an epitaxial silicon film with a thickness of 1.7 to 2.7 μm, a resistivity of 8 to 12 Ω·cm under boron doping, and an in-plane deviation of resistivity of less than 3% on the surface of the bulk silicon substrate.

5. A method for manufacturing an epitaxial silicon wafer, characterized in that, it is a method for manufacturing an epitaxial silicon wafer with a diameter of 300 mm and a thickness of 761–765 μm, This manufacturing method has the following characteristics: The process of fabricating boron-doped bulk silicon substrates with a resistivity of 8–20 mΩ·cm. The boron concentration and thickness of the bulk silicon substrate, and the thickness t of the epitaxial silicon film are used. epi The process of calculating the warpage δ1 of the epitaxial wafer using the correlation formula. The process of calculating the warpage δ2 of the silicon wafer with the back oxide film formed using the correlation between the diameter and thickness of the bulk silicon substrate and the thickness of the back oxide film. The warp amounts δ1 and δ2 are used to estimate the minimum thickness t of the back oxide film, which represents the minimum thickness of Warp-bf and Bow-bf. f process, The thickness t is formed on the back side of the bulk silicon substrate. f The process of the oxide film on the back, and The thickness t is formed on the surface of the bulk silicon substrate. epi The process of epitaxial silicon film.

6. The method for manufacturing an epitaxial silicon wafer according to claim 5, wherein, Based on the estimated thickness t of the back oxide film f Experimentally, the thickness of the back oxide film, where Warp-bf and Bow-bf are actually the smallest, was determined.

7. The method for manufacturing an epitaxial silicon wafer according to claim 5, wherein, The value obtained by adding the warp amount δ1 as the positive direction and the warp amount δ2 as the negative direction is used as Bow-bf for calculation.

8. The method for manufacturing an epitaxial silicon wafer according to claim 6, wherein, The absolute value of the calculated Bow-bf is used as the basis for calculating Warp-bf.

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