Motor controller active short circuit control method and system, motor controller and vehicle

Abstract

The invention relates to an active short-circuit control method and system for a motor controller, the motor controller and a vehicle, and the method comprises the steps: detecting the fault information of the motor control system, and enabling the fault information to comprise a first fault and a second fault; when detecting that the first fault is triggered, starting time delay; when the time delay reaches a preset first time delay threshold value, detecting and confirming the first fault again; if the first fault is maintained, the first fault is confirmed successfully, a fault flag bit is latched, active short-circuit judgment logic is executed, and an upper bridge active short-circuit control signal and a lower bridge active short-circuit control signal are output according to a judgment result; if the first fault disappears, determining that the first fault fails, and not executing the active short-circuit judgment logic; and outputting a corresponding ASC state to the driving chip according to the upper bridge active short circuit control signal and the lower bridge active short circuit control signal in combination with the state information of the second fault, and driving the power module to execute a corresponding action. According to the invention, the power module can be protected more effectively and comprehensively.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of motor controller, and particularly relates to a motor controller active short circuit control method, system, motor controller and vehicle. BACKGROUND

[0002] The mainstream driving mode of the current new energy vehicle is that the power battery outputs direct current, the motor controller controls the power module to complete direct current inversion, controls the motor to rotate, and realizes vehicle driving. In the actual driving process, overvoltage, overcurrent, bridge arm failure and the like occur due to unexpected external interference, complex working conditions, hardware damage and the like. Because the system maintains high voltage, the power module may be damaged, which seriously affects the driving safety and the performance of the whole vehicle. Therefore, in order to protect the power module, the motor controller is usually designed with an active short circuit control (ASC) function for protecting the power module when a fault occurs.

[0003] Therefore, it is necessary to develop a new motor controller active short circuit control method, system, motor controller and vehicle. SUMMARY

[0004] The present application aims to provide a motor controller active short circuit control method, system, motor controller and vehicle, which can actively control the motor controller when a fault occurs under high voltage working conditions, so as to more effectively and comprehensively protect the power module.

[0005] In order to achieve the above-mentioned purpose, the technical scheme adopted by the present application is as follows: In a first aspect, the present application provides a motor controller active short circuit control method, which comprises the following steps: detecting fault information of a motor control system, wherein the fault information comprises a first fault and a second fault; when the first fault is detected, starting a delay; after the delay reaches a preset first delay threshold, detecting and confirming the first fault again; if the first fault is maintained, the first fault confirmation is successful, a fault flag bit is latched, an active short circuit judgment logic is executed, and upper bridge active short circuit control signals and lower bridge active short circuit control signals are output according to the judgment result; if the first fault has disappeared, the first fault confirmation fails, and the active short circuit judgment logic is not executed; according to the upper bridge active short circuit control signals and the lower bridge active short circuit control signals, and in combination with the state information of the second fault, corresponding ASC states are output to a driving chip, and the power module is driven to execute corresponding actions.

[0006] Optionally, the active short circuit judgment logic comprises: If the first fault is a DC bus voltage overvoltage trigger, latch the overvoltage fault flag bit, and output the corresponding ASC state according to whether the bridge arm has failed; If the first fault is a non-DC bus voltage overvoltage trigger, latch the corresponding fault flag bit, and output the corresponding ASC state according to the bus voltage and motor speed. This avoids using the same strategy for all faults, improves the flexibility and accuracy of control, and lays the foundation for subsequent hierarchical processing.

[0007] Optionally, the output of the corresponding ASC state according to whether the bridge arm has failed includes: If the lower bridge arm has not failed, the output ASC state is lower bridge arm active short circuit; If the lower bridge arm has failed but the upper bridge arm has not failed, the output ASC state is upper bridge arm active short circuit; Otherwise, the output ASC state is bridge arm full off. Under the premise of ensuring safety, the healthy bridge arm is preferentially used to perform short circuit, avoiding the failure of the entire system due to partial hardware failure, and improving the fault tolerance capability.

[0008] Optionally, the output of the ASC state according to the bus voltage and the motor speed includes: Set a safe bus voltage threshold and a motor speed threshold; If the bus voltage does not exceed the safe bus voltage threshold or the motor speed does not reach the safe speed threshold, the output ASC state is bridge arm full off; If the bus voltage exceeds the safe bus voltage threshold and the motor speed reaches the safe speed threshold, output the corresponding ASC state according to the bridge arm fault state. This prevents unnecessary active short circuit in low energy states (such as low speed, low voltage), avoids impact on the power module, and prevents abnormal rise of the bus voltage.

[0009] Optionally, when it is judged that the lower bridge arm has failed but the upper bridge arm has not failed, and the current is in the upper bridge arm active short circuit, an active short circuit switching logic is executed, and the switching logic includes: The output ASC state is bridge arm full off, the bridge arm output is prohibited, and a delay is started; When the delay reaches a preset second delay threshold, the output ASC state is upper bridge arm active short circuit. This effectively avoids the shoot-through short circuit that may occur in the switching moment of the upper and lower bridge arms, protects the power module, and improves the reliability and safety of the switching process.

[0010] In a second aspect, the application provides a motor controller active short circuit control system, which includes: A fault detection module for detecting fault information of the motor control system, the fault information including a first fault and a second fault, and completing first fault confirmation when the first fault trigger is detected; The control module is connected with the fault detection module, and is used for executing active short circuit judgment logic according to the fault type, the current fault latching state, the voltage and the rotating speed condition after the first fault confirmation, and outputting the upper bridge active short circuit control signal and the lower bridge active short circuit control signal. The logic operation module is connected with the control module and the fault detection module respectively, and is used for receiving the upper bridge active short circuit control signal, the lower bridge active short circuit control signal and the state information of the second fault, and outputting the corresponding ASC state after logic operation. The driving chip module includes a plurality of driving chips, and each driving chip is connected with the logic operation module and is used for receiving the ASC state output by the logic operation module and converting the ASC state into a driving signal. The power module is connected with the driving chip module, and is used for executing corresponding actions according to the driving signal.

[0011] Optionally, the first fault confirmation process of the fault detection module includes: When the first fault is detected, a first fault confirmation delay logic is executed; When the delay reaches a first delay threshold, the first fault is detected and confirmed again; If the first fault is maintained, the first fault confirmation is successful, a fault flag is latched, and the control module is informed to execute the active short circuit judgment logic; If the first fault disappears, the first fault confirmation fails, and the active short circuit judgment logic is not executed. Through the delay and the second confirmation, transient interference or false fault signals are filtered out, unnecessary system shutdown is avoided, and the stability of the whole vehicle operation is improved.

[0012] Optionally, when the control module executes the active short circuit judgment logic, if it is needed to switch from the lower bridge arm active short circuit to the upper bridge arm active short circuit, a bridge arm full-off control signal is output first, and a switching delay is started, and when the delay reaches a second delay threshold, the upper bridge arm active short circuit control signal is output. The through short circuit that may be generated at the switching moment of the upper and lower bridge arms is effectively avoided, the power module is protected, and the reliability and safety of the switching process are improved.

[0013] In a third aspect, the motor controller adopts the motor controller active short circuit control system.

[0014] In a fourth aspect, the vehicle adopts the motor controller.

[0015] The application has the following unexpected technical effects: (1) The application executes different judgment logic according to the fault type (such as whether it is bus overvoltage), and comprehensively considers key parameters such as bus voltage and motor speed. The application avoids the extensive processing mode of "one size fits all" for all faults, realizes fine and scene-based fault response, and improves the accuracy and effectiveness of the protection strategy.

[0016] (2) In the decision-making process, the system checks the health status of the upper and lower bridge arms, and selects the most suitable short-circuit path (lower bridge, upper bridge or full-off) accordingly. Even if a bridge arm fails, the system can still perform active short-circuit through another healthy bridge arm, significantly improving the redundancy and reliability of the system, and avoiding the paralysis of the entire protection function due to single-point hardware failure.

[0017] (3) When the lower bridge arm needs to be switched to the upper bridge arm, the system will first enter a short "bridge arm full-off" state, and then switch to the new bridge arm. This design fundamentally eliminates the risk of "through" short-circuit that may occur during bridge arm switching, protects the power module from secondary damage, and ensures the safety of the protection action itself under high pressure conditions.

[0018] (4) After the fault detection module detects the fault initially, it will start a delay and perform a second confirmation. Only when the fault persists will the protection logic be triggered. This method effectively filters transient electromagnetic interference or signal glitches, prevents unnecessary active short-circuit actions, avoids interference with normal driving and unnecessary impact on the power module, and ensures the stability of the vehicle.

[0019] (5) The protection strategy of the application is mainly software protection, so the protection method is more flexible and the protection scene is more comprehensive. At the same time, the scene of software control failure due to the second fault (i.e. key chip failure) is considered, which complements the software out-of-control scene and further improves the effectiveness of protection.

[0020] In summary, the application can actively control the short-circuit of the motor controller when a fault occurs under high pressure conditions, and can more effectively and comprehensively protect the power module. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a flowchart of the motor controller active short-circuit control method described in the embodiments of the application; Figure 2 is a principle block diagram of the motor controller active short-circuit control system described in the embodiments of the application; Figure 3 is a flowchart of the fault monitoring and confirmation described in the embodiments of the application; Figure 4 is a flowchart of the ASC state judgment and output described in the embodiments of the application; Figure 5 Logic diagram for the ASC state switching described in the embodiments of the present application; In the figure: 1, fault detection module, 2, control module, 3, logic operation module, 4, drive chip module, 5, power module. DETAILED DESCRIPTION

[0022] The advantages and effects of the present application can be understood by those skilled in the art from the disclosure in the specification. The present application can also be implemented or applied by different specific embodiments, and the details in the specification can be modified or changed based on different views and applications without departing from the spirit of the present application. It should be understood that the preferred embodiments are only for illustrating the present application, but not for limiting the protection scope of the present application.

[0023] In the embodiments of the present application, the words such as “exemplary” or “for example” are used to represent an example, illustration or description. Any embodiment or design scheme described as “exemplary” or “for example” in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. In fact, the words such as “exemplary” or “for example” are intended to present the related concept in a specific manner, and facilitate understanding.

[0024] In the embodiments of the present application, at least one can also be described as one or more, and the number can be two, three, four or more, which is not limited in the present application.

[0025] In the embodiments of the present application, a motor controller active short circuit control method comprises the following steps: Detecting fault information of a motor control system, wherein the fault information comprises a first fault and a second fault.

[0026] When the first fault trigger is detected, start a delay.

[0027] When the delay reaches a first delay threshold, the first fault is detected and confirmed again.

[0028] If the first fault still remains, the first fault confirmation is successful, a fault flag bit is latched, an active short circuit judgment logic is executed, and upper bridge active short circuit control signals and lower bridge active short circuit control signals are output according to the judgment result.

[0029] If the first fault has disappeared, the first fault confirmation fails, and the active short circuit judgment logic is not executed.

[0030] According to the upper bridge active short circuit control signals and the lower bridge active short circuit control signals, and in combination with the state information of the second fault, corresponding ASC (i.e. active short circuit control) states are output to the drive chip, and the drive power module 5 performs corresponding actions.

[0031] In the embodiment of the application, the main control chip of the motor controller simultaneously outputs the upper bridge active short-circuit control signal (STATE_H) and the lower bridge active short-circuit control signal (STATE_L), and combines the second fault state information (Errout) to output the corresponding ASC state to the driving chip through a simple logic operation module 3, and the driving chip controls the power module 5 to perform corresponding actions.

[0032] As shown in Table 1, the logic operation of the ASC state is as follows: (1) Logic input: if Errout is no fault, STATE_H is enabled, STATE_L is enabled, and the ASC state is FW (bridge arm full off), the power module 5 is turned off, and conduction is prohibited.

[0033] (2) Logic input: if Errout is no fault, STATE_H is enabled, STATE_L is disabled, and the ASC state is upper bridge ASC (i.e. upper bridge arm active short-circuit), the upper bridge arm active short-circuit is executed.

[0034] (3) Logic input: if Errout is no fault, STATE_H is disabled, STATE_L is enabled, and the ASC state is lower bridge ASC (i.e. lower bridge arm active short-circuit), the lower bridge arm active short-circuit is executed.

[0035] (4) Logic input: if Errout is no fault, STATE_H is disabled, STATE_L is disabled, and the ASC state is PWM (i.e. normal output control), the power module 5 is turned on according to the PWM control.

[0036] (5) Logic input: if Errout is fault, the software (i.e. STATE_H and STATE_H) output signal is invalid at this time, the ASC state is FW, the power module 5 is turned off, and conduction is prohibited.

[0037] Table 1: ASC output active short-circuit control state In the table, Y: indicates enabled or fault, N: indicates disabled or no fault, -: indicates Y or N, ×: needs to be designed according to the specific driving chip, combined with the driving chip manual. FW: indicates bridge arm full off, PWM: indicates normal output control, upper bridge ASC: indicates upper bridge arm active short-circuit, lower bridge ASC: indicates lower bridge arm active short-circuit.

[0038] The lower bridge arm active short circuit is to control all lower bridge arm power devices (such as IGBT) in the three-phase bridge to be turned on at the same time, so that the three-phase windings of the motor form a closed loop through the lower bridge arm. When the lower bridge arm is short-circuited, the current flows out from the motor winding and flows back to the negative pole of the DC bus through the lower bridge arm device, forming a loop current with the negative pole as the common ground. When the lower bridge arm is short-circuited, the current path is usually closer to the rated working condition of the device, and the impact on the power device is relatively small. It is a more commonly used strategy.

[0039] The upper bridge arm active short circuit is to control all upper bridge arm power devices in the three-phase bridge to be turned on at the same time, so that the three-phase windings of the motor form a closed loop through the upper bridge arm. When the upper bridge arm is short-circuited, the current flows out from the positive pole of the DC bus and flows into the motor winding through the upper bridge arm device, forming a loop current with the positive pole as the common ground. The upper bridge arm short circuit may cause the bus voltage to be directly applied to the upper bridge arm device, which may generate a larger instantaneous current in some operating conditions (such as high speed), and requires higher withstand voltage and current capacity of the device.

[0040] In a possible embodiment, the first fault includes real-time detection of phase current, DC bus voltage, power module 5 fault state, etc. When the first fault trigger is detected, the active short circuit software judgment logic is executed, and the state of STATE_H and STATE_L is determined according to the judgment result.

[0041] In a possible embodiment, the second fault is a failure of a key chip of the motor control system. When the second fault occurs, the output level signal Errout is N. The key chip includes MCU (Microcontroller Unit), SBC (System Basis Chip) and other chips. It should be noted that Errout is a set of fault signals output by the key chip when a fault occurs. The fault associated with this pin will seriously affect the normal operation of the motor controller system, and the software cannot normally run or the execution result is not reliable.

[0042] As shown in Figure 4 In a possible embodiment, the active short circuit judgment logic includes: (1) If the first fault is triggered by the overvoltage of the DC bus voltage (i.e. judged as overvoltage fault), the overvoltage fault flag bit is latched, and the corresponding ASC state is output according to whether the bridge arm has a fault.

[0043] (2) If the first fault is not triggered by the overvoltage of the DC bus voltage, the corresponding fault flag bit is latched, and the corresponding ASC state is output according to the bus voltage and the motor speed.

[0044] As shown in Figure 4 In a possible embodiment, the corresponding ASC state is output according to whether the bridge arm has a fault, including: According to the latch fault flag, if the lower bridge arm does not have a fault, the ASC state is output as the lower bridge arm active short circuit; if the lower bridge arm has a fault but the upper bridge arm does not have a fault, the ASC state is output as the upper bridge arm active short circuit; otherwise, the ASC state is output as the bridge arm full off.

[0045] As shown in FIG. 1, in a possible embodiment, the ASC state is output according to the bus voltage and the motor speed, including: Figure 4 (1) A safe bus voltage threshold and a motor speed threshold are set.

[0046] (2) If the bus voltage does not exceed the safe bus voltage threshold or the motor speed does not reach the safe speed threshold, the ASC state is output as the bridge arm full off.

[0047] (3) If the bus voltage exceeds the safe bus voltage threshold and the motor speed reaches the safe speed threshold, the corresponding ASC state is output according to the bridge arm fault state.

[0048] In particular, after determining that the lower bridge arm has a fault but the upper bridge arm does not have a fault, the upper bridge arm active short circuit control state is output, which inevitably causes the lower bridge arm to have a fault and the system to be in the lower bridge arm active short circuit. At this time, to avoid the shoot-through condition that may occur in the upper and lower bridge arms when the output state is switched, the software executes the active short circuit switching logic.

[0049] As shown in FIG. 1, in a possible embodiment, the ASC state is output according to the bus voltage and the motor speed, including: Figure 5 (1) The ASC state is output as the bridge arm full off, the bridge arm output is prohibited, and the delay is started.

[0050] (2) When the delay reaches the second delay threshold, the ASC state is output as the upper bridge arm active short circuit.

[0051] Through the delay step in the switching logic, the problem of power module 5 damage caused by bridge arm shoot-through in the active short circuit switching process can be effectively avoided.

[0052] In the embodiment, the motor controller active short circuit control method is adopted, the fault recognition and the active short circuit output control in each fault state are completed through software, the logic risk caused by the complex logic operation module 3 is avoided, the flexibility of software design and optimization makes the fault protection more comprehensive and flexible, the first fault delay reconfirmation effectively avoids the problem of first fault false alarm, the active short circuit switching logic can avoid the bridge arm shoot-through, and the effect of the fault protection is better. Finally, the introduction of the hardware serious fault signal (i.e., the second fault) eliminates the risk that the software protection logic cannot be executed when the hardware fails.

[0053] As shown in FIG. 1, in a possible embodiment, the ASC state is output according to the bus voltage and the motor speed, including: Figure 2 ​​As shown, in the embodiment of the present application, an active short circuit control system of a motor controller includes a fault detection module 1, a control module 2, a logic operation module 3, a drive chip module 4 and a power module 5. The fault detection module 1 is used to detect fault information of the motor control system, the fault information includes a first fault and a second fault, and a first fault confirmation is completed when the first fault trigger is detected. The control module 2 is connected with the fault detection module 1, and is used to execute an active short circuit judgment logic according to the fault type, the current fault latch state, the voltage and the speed condition after the first fault confirmation, and output an upper bridge active short circuit control signal and a lower bridge active short circuit control signal. The logic operation module 3 is connected with the control module 2 and the fault detection module 1 respectively, and is used to receive the upper bridge active short circuit control signal, the lower bridge active short circuit control signal and the state information of the second fault, and output the corresponding ASC state after logic operation. The drive chip module 4 includes a plurality of drive chips, each drive chip is connected with the logic operation module 3, and is used to receive the ASC state output by the logic operation module 3 and convert it into a drive signal. The power module 5 is connected with each drive chip, and is used to execute corresponding actions according to the drive signal.

[0054] As shown in Table 1, in a possible embodiment, the drive chip module 4 includes drive chip one to drive chip six. Figure 2

[0055] As shown in Table 1, in a possible embodiment, the first fault confirmation process of the fault detection module 1 includes: Figure 3 When the first fault is detected, a first fault confirmation delay logic is executed. When the delay reaches a first delay threshold, the first fault is detected and confirmed again. If the first fault persists, the first fault confirmation is successful, the fault flag is latched, and the control module 2 is notified to execute the active short circuit judgment logic. If the first fault disappears, the first fault confirmation fails, and the active short circuit judgment logic is not executed.

[0056] In particular, as shown in Table 1, the control signal output by the control module 2 is only STATE_H and STATE_L in Table 1.

[0057] As shown in Table 1, the logic input of the logic operation module 3 is Errout, STATE_H and STATE_L, wherein when Errout is N, the logic output or ASC state is controlled by STATE_H and STATE_L, and when Errout is Y, the logic output or ASC state is only controlled by Errout.

[0058] ​​In particular, the logic operation module 3 inputs signals are Errout, STATE_H, STATE_L three signals, combined with the driving chip input and output control logic and the ASC output state determined by table 1, the input and output truth table of the logic operation module 3 can be combined, so as to determine the hardware design of the logic operation module 3.

[0059] In the embodiment of the application, a motor controller adopts the motor controller active short circuit control system in the embodiment of the application.

[0060] In the embodiment of the application, a vehicle adopts the motor controller in the embodiment of the application.

[0061] The vehicle can be, but is not limited to, a pure electric vehicle (PEV / BEV), a hybrid electric vehicle (HEV), a range extended electric vehicle (REEV), a plug-in hybrid electric vehicle (PHEV), a new energy vehicle, a fuel vehicle, etc.

[0062] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of functional modules is exemplified, and in actual application, the above-mentioned functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0063] The above embodiments are the preferred embodiments of the application, but the embodiments of the application are not limited to the above embodiments, and any changes, modifications, substitutions, combinations, simplifications made without departing from the spirit and principles of the application are equivalent replacement methods and are included in the protection scope of the application.

Claims

1. A method for active short-circuit control of a motor controller, characterized in that, Includes the following steps: The fault information of the motor control system is detected, wherein the fault information includes a first fault and a second fault; When the first fault is detected, a delay is initiated. Once the delay reaches the preset first delay threshold, the first fault is detected and confirmed again. If the first fault persists, the first fault is confirmed successfully, the fault flag is latched, the active short circuit judgment logic is executed, and the upper bridge active short circuit control signal and the lower bridge active short circuit control signal are output according to the judgment result. If the first fault has disappeared, the first fault confirmation fails, and the active short-circuit judgment logic is not executed. Based on the upper bridge active short circuit control signal and the lower bridge active short circuit control signal, and combined with the status information of the second fault, the corresponding ASC status is output to the driver chip, and the driver power module (5) performs the corresponding action.

2. The active short-circuit control method for a motor controller according to claim 1, characterized in that, The active short-circuit detection logic includes: If the first fault is triggered by DC bus voltage overvoltage, then the overvoltage fault flag bit is latched, and the corresponding ASC status is output according to whether a fault has occurred in the bridge arm; If the first fault is triggered by a non-DC bus voltage overvoltage, the corresponding fault flag bit is latched, and the corresponding ASC status is output according to the bus voltage and motor speed.

3. The active short-circuit control method for a motor controller according to claim 2, characterized in that, The corresponding ASC status is output based on whether a bridge arm has failed, including: If the lower bridge arm does not fail, the ASC status is output as "lower bridge arm active short circuit". If the lower bridge arm fails but the upper bridge arm does not fail, the ASC status is output as an active short circuit of the upper bridge arm. Otherwise, output the ASC status as "all bridge arms closed".

4. The active short-circuit control method for a motor controller according to claim 2, characterized in that, The ASC status is output based on the bus voltage and motor speed, including: Set safety bus voltage threshold and motor speed threshold; If the bus voltage does not exceed the safe bus voltage threshold or the motor speed does not reach the safe speed threshold, the output ASC status is that the bridge arm is fully off; If the bus voltage exceeds the safe bus voltage threshold and the motor speed reaches the safe speed threshold, the corresponding ASC status will be output according to the bridge arm fault status.

5. The active short-circuit control method for a motor controller according to claim 3, characterized in that, When it is determined that the lower bridge arm has failed but the upper bridge arm has not failed, and the upper bridge arm is currently in an active short circuit state, the active short circuit switching logic is executed. The switching logic includes: The output ASC status is set to "bridge arm all off", which disables bridge arm output and starts a delay. When the delay reaches the preset second delay threshold, the output ASC status is active short circuit of the upper bridge arm.

6. An active short-circuit control system for a motor controller, characterized in that, include: The fault detection module (1) is used to detect fault information of the motor control system, the fault information including a first fault and a second fault, and to confirm the first fault when the first fault is detected. The control module (2) is connected to the fault detection module (1) and is used to perform active short circuit judgment logic according to the fault type, current fault latching state, voltage and speed conditions after the first fault is confirmed, and output the upper bridge active short circuit control signal and the lower bridge active short circuit control signal. The logic operation module (3) is connected to the control module (2) and the fault detection module (1) respectively. It is used to receive the upper bridge active short circuit control signal, the lower bridge active short circuit control signal and the status information of the second fault, and output the corresponding ASC status after performing logic operation. The driver chip module (4) includes multiple driver chips, each of which is connected to the logic operation module (3) to receive the ASC state output by the logic operation module (3) and convert it into a drive signal; The power module (5) is connected to the drive chip module (4) and is used to perform corresponding actions according to the drive signal.

7. The active short-circuit control system for a motor controller according to claim 6, characterized in that, The first fault confirmation process of the fault detection module (1) includes: When the first fault is detected, the first fault confirmation delay logic is executed; Once the delay reaches the first delay threshold, the first fault is detected and confirmed again. If the first fault persists, the first fault is confirmed successfully, the fault flag is latched, and the control module (2) is notified to execute the active short-circuit judgment logic. If the first fault disappears, the first fault confirmation fails, and the active short-circuit judgment logic is not executed.

8. The active short-circuit control system for a motor controller according to claim 6, characterized in that, When the control module (2) executes the active short circuit judgment logic, if it needs to switch from active short circuit of the lower bridge arm to active short circuit of the upper bridge arm, it first outputs the bridge arm full shut-off control signal and starts the switching delay. When the delay reaches the second delay threshold, it outputs the active short circuit control signal of the upper bridge arm.

9. A motor controller, characterized in that, The motor controller active short-circuit control system as described in any one of claims 6 to 8 is adopted.

10. A vehicle, characterized in that, The motor controller as described in claim 9 is used.

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