Driving controller and electronic device including same

Abstract

The invention provides a driving controller and an electronic device including the same. A driving controller of an electronic device includes: a memory storing an input image signal and outputting a previous image signal; a counter circuit which, if the previous image signal corresponds to a black gray level, performs incremental counting on a count value and outputs a count signal; a gain calculator outputting a gain in response to the count signal; and a compensation section that outputs an image data signal based on the input image signal and the gain if the previous image signal corresponds to the black gradation.

Description

TECHNICAL FIELD

[0001] The present application relates to a driving controller and an electronic device including the same. BACKGROUND

[0002] Electronic devices such as smart phones, digital cameras, notebook computers, navigators, monitors, and smart TVs provide images to users. The electronic devices generate images and provide the generated images to the users through display screens.

[0003] The electronic devices include display panels and driving controllers for controlling the display panels. The driving controllers can provide data signals to the display panels, and as currents corresponding to the data signals are provided to pixels of the display panels, the display panels can display predetermined images.

[0004] An image displayed in a display frame can be recognized as being different from a desired brightness according to a gray level of an image displayed in a previous frame. SUMMARY

[0005] An object of the present application is to provide a driving controller and an electronic device capable of improving display quality.

[0006] According to one feature of the present application for achieving the object as described above, a driving controller includes a memory storing an input image signal and outputting a previous image signal, a counter circuit incrementally counting a count value if the previous image signal corresponds to a black gray level and outputting a count signal, a gain calculator outputting a gain in response to the count signal, and a compensation section outputting an image data signal based on the input image signal and the gain if the previous image signal corresponds to the black gray level.

[0007] In one embodiment, the input image signal can correspond to a current frame, and the previous image signal can correspond to a previous frame.

[0008] In one embodiment, the counter circuit can output, as the count value, a number of consecutive frames in which the previous image signal corresponds to the black gray level.

[0009] In one embodiment, the gain calculator can output the gain having a value inversely proportional to the count value.

[0010] In one embodiment, the gain calculator can output the gain having a value inversely proportional to the count value if the count value is less than or equal to a reference value, and output the gain having a predetermined value if the count value is greater than the reference value.

[0011] In an embodiment, the compensation section can operate in one of a DCC compensation on mode and a DCC compensation off mode, and during the DCC compensation on mode, the compensation section can output a DCC compensation signal corresponding to the input image signal.

[0012] In an embodiment, if the previous image signal corresponds to a black gray level during the DCC compensation on mode, the compensation section can output a product of the DCC compensation signal and a gain as the image data signal.

[0013] In an embodiment, the gain can be less than or equal to 1.

[0014] In an embodiment, during the DCC compensation on mode, the compensation section can output the DCC compensation signal corresponding to a gray level lower than a gray level of the input image signal.

[0015] In an embodiment, during the DCC compensation off mode, the compensation section can output the DCC compensation signal identical to the input image signal.

[0016] An electronic device according to one feature of the present invention includes a display panel, a driving controller receiving an input image signal and outputting an image data signal, and a data driving circuit providing a data signal corresponding to the image data signal to the display panel. The driving controller includes a memory storing the input image signal and outputting a previous image signal, a counter circuit incrementally counting a count value if the previous image signal corresponds to a black gray level and outputting a count signal, a gain calculator outputting a gain in response to the count signal, and a compensation section outputting the image data signal based on the input image signal and the gain if the previous image signal corresponds to the black gray level.

[0017] In an embodiment, the input image signal can correspond to a current frame, and the previous image signal can correspond to a previous frame.

[0018] In an embodiment, the counter circuit can output a number of consecutive frames in which the previous image signal corresponds to the black gray level as the count value.

[0019] In an embodiment, the gain calculator can output the gain having a value inversely proportional to the count value.

[0020] In an embodiment, if the count value is less than or equal to a reference value, the gain calculator can output the gain having a value inversely proportional to the count value, and if the count value is greater than the reference value, the gain calculator can output the gain having a predetermined value.

[0021] In an embodiment, the compensation section can operate in one of a DCC compensation on mode and a DCC compensation off mode, and during the DCC compensation on mode, the compensation section can output a DCC compensation signal corresponding to the input image signal.

[0022] In an embodiment, if the previous image signal corresponds to the black gray scale during the DCC compensation on mode, the compensation section can output a product of the DCC compensation signal and the gain as the image data signal.

[0023] In an embodiment, the gain can be less than or equal to 1.

[0024] In an embodiment, during the DCC compensation on mode, the compensation section can output the DCC compensation signal corresponding to a gray scale lower than a gray scale of the input image signal.

[0025] In an embodiment, during the DCC compensation off mode, the compensation section can output the DCC compensation signal identical to the input image signal.

[0026] The driving controller of the electronic device having the configuration as described above can compensate for luminance of a displayed image according to a time in which a black gray scale image is continuously displayed in a previous frame. Accordingly, it is possible to prevent a situation in which display quality of an image displayed in a current frame is degraded due to a black gray scale image in a previous frame. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 is a perspective view of an electronic device according to an embodiment of the present application.

[0028] Figure 2 is an exploded perspective view of an electronic device according to an embodiment of the present application.

[0029] Figure 3 is a block diagram of an electronic device according to an embodiment of the present application.

[0030] Figure 4 is an equivalent circuit diagram of a pixel according to an embodiment of the present application.

[0031] Figure 5a and Figure 5b is a circuit diagram for explaining an operation of a pixel.

[0032] Figure 6a and Figure 6b is a diagram exemplarily showing a first image and a second image displayed on a display panel.

[0033] Figure 7 is a diagram exemplarily showing Figure 6ba graph showing luminance variation of the first region.

[0034] Figure 8 is a block diagram showing a configuration of a drive controller.

[0035] Figure 9 is a graph exemplarily showing an image displayed on an electronic device.

[0036] Figure 10a , Figure 10b and Figure 10c is a graph exemplarily showing luminance variation when Figure 9 the first to fourth images shown in FIG. 1 are displayed on an electronic device.

[0037] Figure 11 is a graph exemplarily showing a gain according to a count value.

[0038] Figure 12a and Figure 12b are graphs for explaining an operation of a DCC compensation section.

[0039] Figure 13 is a graph exemplarily showing a relationship between an input image signal and a DCC compensation signal according to an operation state of a DCC compensation section.

[0040] Figure 14 is a lookup table exemplarily showing a relationship between an input image signal and a DCC compensation signal of a DCC compensation section.

[0041] Figure 15 is a graph for explaining an operation of a DCC compensation section according to an embodiment of the present application.

[0042] Figure 16a , Figure 16b and Figure 16c are graphs exemplarily showing luminance variation according to a gain.

[0043] BRIEF DESCRIPTION OF DRAWINGS DD: electronic device DP: display panel PX: pixel 100: drive controller 110: frame memory 120: counter circuit 130: gain calculator 140: DCC compensation section 200: data drive circuit 300: voltage generator 400: scan drive circuit DETAILED DESCRIPTION

[0044] In the present specification, in the case where it is mentioned that a certain constitutional element (or a region, a layer, a part, etc.) is "on" another constitutional element, is "connected" to another constitutional element, or is "combined" with another constitutional element, it means that it can be directly placed / connected / combined on another constitutional element, or a third constitutional element can be placed between them.

[0045] The same reference numerals denote the same constitutional elements. Also, in the drawings, the thickness, ratio, and size of the constitutional elements are exaggerated for the sake of effective explanation of the technology. "And / or" includes all combinations of one or more of the relevant constitutional definitions.

[0046] The terms "first", "second", and so on can be used to explain various constitutional elements, but the constitutional elements are not limited to the terms. The terms are used only for the purpose of distinguishing one constitutional element from another constitutional element. For example, a first constitutional element can be named a second constitutional element, and similarly, a second constitutional element can also be named a first constitutional element, without departing from the scope of the claims of the present invention. Unless the context clearly indicates otherwise, the singular expression includes the plural expression.

[0047] Also, the terms "under", "lower side", "above", "upper side", and so on are used to explain the relative relationship of the constitutional elements shown in the drawings. The terms are explained as relative concepts, with the direction shown in the drawings as a basis.

[0048] The terms "include" or "have" and so on should be understood to specify the existence of the features, numbers, steps, operations, constitutional elements, components, or combinations thereof described in the specification, and not to preclude the existence or additional possibility of one or more other features or numbers, steps, operations, constitutional elements, components, or combinations thereof.

[0049] Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention pertains. Also, the same terms as those defined in a generally used dictionary are to be interpreted as having the same meaning as those in the context of relevant technology, and are not to be interpreted as an ideal or overly formal meaning unless explicitly defined in the present specification.

[0050] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0051] Figure 1 is a perspective view of an electronic device DD according to an embodiment of the present invention, Figure 2 is an exploded perspective view of an electronic device DD according to an embodiment of the present invention.

[0052] Referring toFigure 1 and Figure 2 The electronic device DD can be a device activated according to an electric signal. The electronic device DD according to the present application can be a large electronic device such as a television, a monitor, etc., and a medium or small electronic device such as a portable phone, a tablet computer, a notebook, a car navigation system, a game machine, etc. These are merely exemplary, and it is obvious that other forms of electronic devices can be included without departing from the idea of the present application. The electronic device DD has a rectangular shape having a long side in a first direction DR1 and a short side in a second direction DR2 intersecting the first direction DR1. However, the shape of the electronic device DD is not limited thereto, and various shapes of the electronic device DD can be provided. The electronic device DD can display an image IM toward a third direction DR3 on a display surface IS parallel to the first direction DR1 and the second direction DR2, respectively. The display surface IS displaying the image IM can correspond to a front surface of the electronic device DD.

[0053] In the present embodiment, a front surface (or an upper surface) and a rear surface (or a lower surface) of each component are defined with reference to the direction in which the image IM is displayed. The front surface and the rear surface can oppose each other in the third direction DR3, and the normal direction of the front surface and the rear surface can be parallel to the third direction DR3.

[0054] The separation distance between the front surface and the rear surface in the third direction DR3 can correspond to the thickness of the electronic device DD in the third direction DR3. In addition, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 are relative concepts, and can be converted into another direction.

[0055] The electronic device DD can detect an external input applied from the outside. The external input can include various forms of input provided from the outside of the electronic device DD. The electronic device DD according to an embodiment of the present application can detect an external input of a user applied from the outside. The external input of the user can be one or a combination of various forms of external inputs of a part of the user's body, light, heat, a line of sight, or pressure, etc. Further, the electronic device DD can also detect an external input of a user applied to a side surface or a rear surface of the electronic device DD according to the structure of the electronic device DD, but is not limited to any one embodiment. As an example of the present application, the external input can also include an input by an input device (e.g., a stylus, a pen, a touch pen, an electronic pen, etc.), etc.

[0056] The display surface IS of the electronic device DD can be divided into a display area DA and a non-display area NDA. The display area DA can be the area where an image IM is displayed. The user identifies the image IM through the display area DA. In this embodiment, the display area DA is shown as a quadrilateral shape with a circular vertex. However, this is an exemplary illustration, and the display area DA can have various shapes and is not limited to one embodiment.

[0057] The non-display area NDA is adjacent to the display area DA. The non-display area NDA may have a predetermined color. The non-display area NDA may surround the display area DA. Accordingly, the shape of the display area DA may be substantially defined by the non-display area NDA. However, this is illustrative, and the non-display area NDA may be arranged only adjacent to one side of the display area DA, or it may be omitted. The electronic device DD according to an embodiment of the present invention may include various embodiments and is not limited to one embodiment.

[0058] like Figure 2 As shown, the electronic device DD may include a display module DM and a window WM arranged on the display module DM. The display module DM may include a display panel DP and an input detection layer ISP.

[0059] According to an embodiment of the present invention, the display panel DP can be a light-emitting display panel. As an example, the display panel DP can be an organic light-emitting display panel, an inorganic light-emitting display panel, or a quantum dot light-emitting display panel. The light-emitting layer of an organic light-emitting display panel may contain organic light-emitting materials. The light-emitting layer of an inorganic light-emitting display panel may contain inorganic light-emitting materials. The light-emitting layer of a quantum dot light-emitting display panel may contain quantum dots and quantum rods, etc. Hereinafter, in this embodiment, the display panel DP will be described as an organic light-emitting display panel.

[0060] The display panel DP can output an image IM, which can be displayed on the display surface IS.

[0061] An input detection layer (ISP) can be disposed on a display panel (DP) and detect external input. The input detection layer (ISP) can be directly disposed on the display panel (DP). According to one embodiment of the invention, the input detection layer (ISP) can be formed on the display panel (DP) using a continuous process. That is, when the input detection layer (ISP) is directly disposed on the display panel (DP), an internal adhesive film (not shown) is not disposed between the input detection layer (ISP) and the display panel (DP). However, the internal adhesive film can be disposed between the input detection layer (ISP) and the display panel (DP). In this case, the input detection layer (ISP) can be manufactured using a process separate from the display panel (DP) instead of a continuous process, and then fixed to the upper surface of the display panel (DP) by the internal adhesive film.

[0062] The window WM can be formed using a transparent substance capable of outputting the image IM. For example, it can be configured using glass, sapphire, plastic, or the like. The window WM is shown as a single layer, but is not limited thereto, and can include multiple layers.

[0063] In addition, although not shown, the non-display area NDA of the electronic device DD can be substantially provided as an area in which a substance of a predetermined color is printed in a region of the window WM. As an example of the present application, the window WM can include a light-blocking pattern for defining the non-display area NDA. The light-blocking pattern is a colored organic film, and for example, can be formed using a coating method.

[0064] The window WM can be combined with the display module DM through an adhesive film. As an example of the present application, the adhesive film can include an optically clear adhesive film (OCA). However, the adhesive film is not limited thereto, and can include a general adhesive or a tackifier. For example, the adhesive film can include an optically clear resin (OCR) or a pressure sensitive adhesive film (PSA).

[0065] A reflection prevention layer can also be disposed between the window WM and the display module DM. The reflection prevention layer reduces the reflectance of external light incident from the upper side of the window WM. The reflection prevention layer according to an embodiment of the present application can include a phase retarder and a polarizer. The phase retarder can be of a film type or a liquid crystal coating type. The polarizer can also be of a film type or a liquid crystal coating type. The film type can include a stretched synthetic resin film, and the liquid crystal coating type can include liquid crystals arranged in a predetermined arrangement. The phase retarder and the polarizer can be implemented as one polarizing film.

[0066] As an example of the present application, the reflection prevention layer can further include a color filter. The arrangement of the color filter can be determined in consideration of the color of light generated by the plurality of pixels PX included in the display panel DP (refer to FIG. 1). The reflection prevention layer can further include a light-blocking pattern. Figure 3

[0067] The display module DM can display the image IM according to an electrical signal, and can transmit / receive information regarding an external input. The display module DM can be defined by an active area AA and a non-active area NAA. The active area AA can be defined as an area in which the image IM provided from the display module DM is output. Also, the active area AA can be defined as an area in which the input detection layer ISP detects an external input applied from the outside.

[0068] ​The non-active area NAA is adjacent to the active area AA. For example, the non-active area NAA can surround the active area AA. However, this is merely illustrative, and the non-active area NAA can be defined in various shapes, and is not limited to one embodiment. According to an embodiment, the active area AA of the display module DM can correspond to at least a portion of the display area DA.

[0069] The electronic device DD can further include a main circuit board MCB, a flexible circuit film D-FCB, a driving controller 100, a data driving circuit 200, and a voltage generator 300. The main circuit board MCB can be connected with the flexible circuit film D-FCB to be electrically connected with the display panel DP. The flexible circuit film D-FCB is connected with the display panel DP to electrically connect the display panel DP with the main circuit board MCB. The main circuit board MCB can include a plurality of driving elements. The plurality of driving elements can include a circuit portion for driving the display panel DP. The data driving circuit 200 can be mounted on the flexible circuit film D-FCB.

[0070] As an example of the present application, the flexible circuit film D-FCB can include a first flexible circuit film D-FCB1, a second flexible circuit film D-FCB2, and a third flexible circuit film D-FCB3. The data driving circuit 200 can include a first driving chip DIC1, a second driving chip DIC2, and a third driving chip DIC3. The first flexible circuit film D-FCB1, the second flexible circuit film D-FCB2, and the third flexible circuit film D-FCB3 can be arranged apart in the first direction DR1, and can be connected with the display panel DP to electrically connect the display panel DP with the main circuit board MCB. The first driving chip DIC1 can be mounted on the first flexible circuit film D-FCB1. The second driving chip DIC2 can be mounted on the second flexible circuit film D-FCB2. The third driving chip DIC3 can be mounted on the third flexible circuit film D-FCB3. However, embodiments of the present application are not limited thereto. For example, the display panel DP can be electrically connected with the main circuit board MCB through one flexible circuit film, and only one driving chip can be mounted on the one flexible circuit film. Further, the display panel DP can be electrically connected with the main circuit board MCB through four or more flexible circuit films, and driving chips can be respectively mounted on the flexible circuit films.

[0071] Figure 2The structure in which the first, second, and third drive chips DIC1, DIC2, and DIC3 are mounted on the first, second, and third flexible circuit films D-FCB1, D-FCB2, and D-FCB3, respectively, is shown in FIG. 1, but the present application is not limited thereto. For example, the first, second, and third drive chips DIC1, DIC2, and DIC3 can be directly mounted on the display panel DP. In this case, the display panel DP can be bent such that the portion of the display panel DP on which the first, second, and third drive chips DIC1, DIC2, and DIC3 are mounted is disposed on the rear surface of the display module DM. Further, the first, second, and third drive chips DIC1, DIC2, and DIC3 can also be directly mounted on the main circuit substrate MCB.

[0072] The input detection layer ISP can be electrically connected with the main circuit substrate MCB through the flexible circuit film D-FCB. However, embodiments of the present application are not limited thereto. That is, the display module DM can additionally include a separate flexible circuit film for electrically connecting the input detection layer ISP with the main circuit substrate MCB.

[0073] In an embodiment, the drive controller 100 and the voltage generator 300 can be disposed on the main circuit substrate MCB. The drive controller 100 and the voltage generator 300 can be electrically connected with the display panel DP through the main circuit substrate MCB and the flexible circuit film D-FCB.

[0074] The electronic device DD further includes an external housing EDC that accommodates the display module DM. The external housing EDC can be combined with the window WM and define the appearance of the electronic device DD. The external housing EDC absorbs an impact applied from the outside and prevents foreign matter / moisture, etc. from penetrating into the display module DM, thereby protecting the components accommodated in the external housing EDC. In addition, as an example of the present application, the external housing EDC can be provided in a form combined with a plurality of receiving members.

[0075] Figure 3 is a block diagram of an electronic device according to an embodiment of the present application.

[0076] Referring to Figure 3 , the electronic device DD includes a drive controller 100, a data driving circuit 200, a voltage generator 300, a scan driving circuit 400, and a display panel DP. The drive controller 100, the data driving circuit 200, and the scan driving circuit 400 can be referred to as driving circuits that provide a data signal to the pixels PX of the display panel DP.

[0077] The drive controller 100 receives an input image signal RGB and a control signal CTRL. The drive controller 100 converts the input image signal RGB into an image data signal DS and outputs. The drive controller 100 outputs a scan control signal SCS and a data control signal DCS. In this embodiment, the drive controller 100 can output a voltage control signal VCTRL for controlling the voltage generator 300.

[0078] The data drive circuit 200 receives the data control signal DCS and the image data signal DS from the drive controller 100. The data drive circuit 200 converts the image data signal DS into a data signal and outputs the data signal to a plurality of data lines DL1-DLm described later. The data signal is an analog voltage corresponding to a gradation value of the image data signal DS.

[0079] The display panel DP includes first scan lines SCL1-SCLn, second scan lines SSL1-SSLn, data lines DL1-DLm, and pixels PX.

[0080] The display panel DP can be divided into an active area AA and a non-active area NAA. The pixels PX can be arranged in the active area AA, and the scan drive circuit 400 can be arranged in the non-active area NAA.

[0081] The first scan lines SCL1-SCLn and the second scan lines SSL1-SSLn are arranged apart from each other in the second direction DR2. The data lines DL1-DLm extend from the data drive circuit 200 in the second direction DR2 and are arranged apart from each other in the first direction DR1.

[0082] The plurality of pixels PX are electrically connected to the first scan lines SCL1-SCLn, the second scan lines SSL1-SSLn, and the data lines DL1-DLm, respectively. For example, the pixels of the first row can be connected to the first scan line SCL1 and the second scan line SSL1. Further, the pixels of the second row can be connected to the first scan line SCL2 and the second scan line SSL2.

[0083] Each of the plurality of pixels PX includes a light emitting element ED (see Figure 4 ) and a pixel circuit PXC (see Figure 4 ) that controls light emission of the light emitting element ED. The pixel circuit PXC can include a plurality of transistors and a capacitor. The scan drive circuit 400 can include a transistor formed by the same process as the pixel circuit PXC. In an embodiment, the light emitting element ED can be an organic light emitting diode. However, the present application is not limited thereto.

[0084] Each of the plurality of pixels PX can receive a first drive voltage ELVDD, a second drive voltage ELVSS, and an initialization voltage VINT.

[0085] The scan driving circuit 400 receives a scan control signal SCS from the driving controller 100. The scan driving circuit 400 can output first scan signals to the first scan lines SCL1-SCLn and output second scan signals to the second scan lines SSL1-SSLn in response to the scan control signal SCS.

[0086] In an embodiment, the scan driving circuit 400 can be disposed in the non-active area NAA adjacent to the first side of the active area AA. The first scan lines SCL1-SCLn and the second scan lines SSL1-SSLn extend from the scan driving circuit 400 in the first direction DR1.

[0087] In another embodiment, the scan driving circuit 400 can be disposed in the non-active area NAA adjacent to the first and second sides of the active area AA, respectively. For example, the scan driving circuit disposed in the non-active area NAA adjacent to the first side of the active area AA can provide the first scan signals to the first scan lines SCL1-SCLn, and the scan driving circuit disposed in the non-active area NAA adjacent to the second side of the active area AA can provide the second scan signals to the second scan lines SSL1-SSLn.

[0088] The voltage generator 300 generates voltages required for the operation of the display panel DP. In this embodiment, the voltage generator 300 generates a first driving voltage ELVDD, a second driving voltage ELVSS, and an initialization voltage VINT required for the operation of the display panel DP. The first driving voltage ELVDD, the second driving voltage ELVSS, and the initialization voltage VINT can be provided to the display panel DP through a first voltage line VL1, a second voltage line VL2, and a third voltage line VL3.

[0089] The voltage generator 300 can not only generate the first driving voltage ELVDD, the second driving voltage ELVSS, and the initialization voltage VINT, but also generate various voltages required for the operation of the display panel DP, the driving controller 100, the data driving circuit 200, and the scan driving circuit 400.

[0090] In an embodiment, if the input image signal RGB input to a previous frame corresponds to a black gray scale, the driving controller 100 can output the image data signal DS based on the input image signal RGB of a current frame and a gain according to the number of frames in which a black gray scale is continuously input. The configuration and operation of the driving controller 100 will be described in detail later.

[0091] Figure 4 is an equivalent circuit diagram of a pixel according to an embodiment of the present application.

[0092] Figure 4 is exemplarily shown in FIG.Figure 3 A circuit diagram of a pixel PX connected to an i-th data line DLi among the data lines DL1-DLm, a j-th first scan line SCLj among the first scan lines SCL1-SCLn, and a j-th second scan line SSLj among the second scan lines SSL1-SSLn is shown.

[0093] Figure 3 Each of the plurality of pixels PX can have the same circuit configuration as the pixel PX shown. Figure 4 The pixel PX shown includes at least one light emitting element ED and a pixel circuit PXC.

[0094] The pixel circuit PXC can include at least one transistor electrically connected to the light emitting element ED and configured to supply a current corresponding to a data signal Di transmitted from the data line DLi to the light emitting element ED. In this embodiment, the pixel circuit PXC of the pixel PX includes a first transistor T1, a second transistor T2, a third transistor T3, and a capacitor Cst. Each of the first transistor T1 to the third transistor T3 is an N-type transistor having an oxide semiconductor as a semiconductor layer. However, the present application is not limited thereto, and each of the first transistor T1 to the third transistor T3 can be a P-type transistor having a low-temperature polycrystalline silicon (LTPS: low-temperature polycrystalline silicon) semiconductor layer. In an embodiment, at least one of the first transistor T1 to the third transistor T3 can be an N-type transistor, and the rest can be P-type transistors. Further, the circuit configuration of the pixel PX according to the present application is not limited to Figure 4 . Figure 4 The pixel circuit PXC shown is only one example, and the circuit configuration of the pixel circuit PXC can be modified and implemented.

[0095] Referring to Figure 4 , the first scan line SCLj can transmit a first scan signal SCj, and the second scan line SSLj can transmit a second scan signal SSj. The data line DLi transmits a data signal Di. The data signal Di can have a voltage level corresponding to an input image signal RGB input to the electronic device DD (see Figure 1 ).

[0096] The first voltage line VL1 and the third voltage line VL3 transmit a first drive voltage ELVDD and an initialization voltage VINT to the pixel circuit PXC, and the second voltage line VL2 can transmit a second drive voltage ELVSS to the cathode (or the second terminal) of the light emitting element ED.

[0097] The first transistor T1 includes a first electrode connected to the first voltage line VL1, a second electrode electrically connected to the anode (or first terminal) of the light emitting element ED, and a gate electrode connected to one end of the capacitor Cst. The first transistor T1 can supply a drive current to the light emitting element ED in response to the data signal Di transmitted from the data line DLi according to the switching operation of the second transistor T2.

[0098] The second transistor T2 includes a first electrode connected to the data line DLi, a second electrode connected to the gate electrode of the first transistor T1, and a gate electrode connected to the first scan line SCLj. The second transistor T2 can be turned on according to the first scan signal SCj received through the first scan line SCLj, thereby transmitting the data signal Di transmitted from the data line DLi to the gate electrode of the first transistor T1.

[0099] The third transistor T3 includes a first electrode connected to the third voltage line VL3, a second electrode connected to the anode of the light emitting element ED, and a gate electrode connected to the second scan line SSLj. The third transistor T3 can be turned on according to the second scan signal SSj received through the second scan line SSLj, thereby transmitting the initialization voltage VINT to the anode of the light emitting element ED.

[0100] As described above, one end of the capacitor Cst is connected to the gate electrode of the first transistor T1, and the other end is connected to the second electrode of the first transistor T1. The structure of the pixel PX according to an embodiment is not limited to the structure shown above. The number of transistors, the number of capacitors, and the connection relationship included in the pixel PX can be variously modified. Figure 4 The pixel PX includes a first transistor T1, a second transistor T2, a third transistor T3, a capacitor Cst, and a light emitting element ED.

[0101] Figure 5a and Figure 5b is a circuit diagram for explaining the operation of the pixel PX.

[0102] Figure 5a The operation of the pixel PX when the data signal Di corresponds to 0 gray scale 0G is exemplarily shown.

[0103] Referring to Figure 5a , if the data signal Di corresponds to 0 gray scale 0G (i.e., black gray scale), the first transistor T1 is not turned on.

[0104] At this time, since no current flows through the light emitting element ED, the voltage of the second electrode of the first transistor T1 (i.e., the anode voltage Vanode of the light emitting element ED) is in a floating state. For example, the anode voltage Vanode of the light emitting element ED can be 6V or less.

[0105] Figure 5bThe operation of the pixel PX when the data signal Di corresponds to the 51 gradation 51G is exemplarily shown.

[0106] Referring to Figure 5b , if the data signal Di corresponds to the 51 gradation 51G (i.e., the gray gradation), the first transistor T1 is turned on.

[0107] At this time, if a current flows through the light emitting element ED, the voltage of the second electrode of the first transistor T1 (i.e., the anode voltage Vanode of the light emitting element ED) increases. For example, when the light emitting element ED emits light, the anode voltage Vanode of the light emitting element ED can be 14 V.

[0108] Figure 6a and Figure 6b are diagrams exemplarily showing the first image IMG1 and the second image IMG2 displayed on the display panel.

[0109] Referring to Figure 6a , in the 1st frame F1, the first image IMG1 includes a black pattern BX1 arranged in a first position x1 along a first direction DR1 and a gray pattern GX1 surrounding the black pattern BX1.

[0110] Referring to Figure 5a , Figure 5b and Figure 6a , the anode voltage Vanode of the light emitting element ED within the pixel PX displaying the black pattern BX1 can be 6 V or less. The anode voltage Vanode of the light emitting element ED within the pixel PX displaying the gray pattern GX1 can be 14 V corresponding to the gray gradation of the gray pattern GX1.

[0111] Referring to Figure 6b , in the 2nd frame F2 continuous to the 1st frame F1, the second image IMG2 includes a black pattern BX2 arranged in a second position x2 along the first direction DR1 and a gray pattern GX2 surrounding the black pattern BX2. That is, the black pattern BX1 of the 1st frame F1 moves in the first direction DR1 and the gray pattern GX2 is displayed in the first area A1. The anode voltage Vanode of the light emitting element ED within the pixel PX displaying the gray pattern GX2 can be 2 V corresponding to the gray gradation of the gray pattern GX2.

[0112] Referring to Figure 5a , Figure 5b and Figure 6b , the anode voltage Vanode of the light emitting element ED within the pixel PX located in the first area A1 needs to be changed from 6 V to a voltage (e.g., 2 V) corresponding to the gray gradation of the gray pattern GX2. That is, the anode voltage Vanode of the light emitting element ED changes by 4 V.

[0113] The anode voltage Vanode of the light emitting element ED in the pixel PX in which the gray pattern (i.e., the gray pattern GX1 and the gray pattern GX2) is displayed in both the 1st frame F1 and the 2nd frame F2 needs to be changed from 14 V to 2 V corresponding to the gray gray scale. That is, the anode voltage Vanode of the light emitting element ED is changed by 12 V.

[0114] The pixel PX located in the first region A1 reaches 2 V faster than the pixel PX displaying the gray pattern GX1 reaches 2 V. Therefore, the luminance of the gray pattern GX2 of the pixel PX located in the first region A1 is higher than that of the pixel PX in which the gray pattern GX1 is displayed in both the 1st frame F1 and the 2nd frame F2.

[0115] Figure 7 The luminance change of the first region A1 of Figure 6b is exemplarily shown.

[0116] Referring to Figure 5a , Figure 5b , Figure 6a , Figure 6b and Figure 7 , in the 1st frame F1, the luminance B0 of the first region A1 corresponds to the black gray scale. In the 2nd frame F2, the luminance BB of the first region A1 can overshoot OS from the desired luminance. In the 3rd frame F3, the luminance BA of the first region A1 can return to the desired luminance.

[0117] If the black pattern moves in the first direction DR1 across a plurality of frames, the user can recognize the screen dragging phenomenon.

[0118] Figure 8 is a block diagram showing the configuration of the drive controller 100.

[0119] Figure 8 Only the configuration related to the function of compensating for the luminance change caused by the black image among the functions of the drive controller 100 is shown in Figure 8 . The drive controller 100 can include not only the configuration shown in but also configurations related to various functions (for example, a configuration related to a function of outputting a scan control signal SCS and a data control signal DCS in response to a control signal CTRL).

[0120] Figure 8The drive controller 100 includes a frame memory 110, a counter circuit 120, a gain calculator 130, and a compensation section 140. The compensation section 140 can be implemented as a dynamic capacitance compensation (DCC) compensation section 140, for example. Meanwhile, the DCC compensation ON mode and the DCC compensation OFF mode described below are examples of a compensation ON mode and a compensation OFF mode, respectively, which are performed when the compensation section 140 is implemented as the DCC compensation section 140.

[0121] The frame memory 110 stores the input image signal RGB. In an embodiment, the frame memory 110 stores the input image signal RGB in units of one frame. In other words, the size of the frame memory 110 can be the same as the size of one frame of the input image signal RGB. The frame memory 110 outputs the previous image signal RGB P. The size of the frame memory 110 can be larger than the size of one frame, without being limited thereto.

[0122] The input image signal RGB supplied from the outside to the frame memory 110 of the drive controller 100 corresponds to a current frame (e.g., an Nth frame), and the previous image signal RGB P output from the frame memory 110 corresponds to a previous frame (e.g., an (N-1)th frame) (where N is a positive integer).

[0123] The counter circuit 120 discriminates whether the previous image signal RGB P from the frame memory 110 corresponds to a black gray scale. If the previous image signal RGB P corresponds to a black gray scale, the counter circuit 120 increments the count value CNT. For example, if the previous image signal RGB P corresponds to a black gray scale, the counter circuit 120 increases the count value CNT by 1.

[0124] In an embodiment, the counter circuit 120 can discriminate whether the previous image signal RGB P corresponds to a black gray scale in units of one pixel PX (see Figure 3 In an embodiment, the counter circuit 120 can discriminate whether the previous image signal RGB P corresponds to a black gray scale in units of a block in which a plurality of pixels PX (see Figure 3 For example, if a predetermined number or more of the previous image signals RGB P in one block correspond to a black gray scale, it can be discriminated that the block corresponds to a black gray scale.

[0125] In an embodiment, the counter circuit 120 can output the number of consecutive frames in which the previous image signal RGB P corresponds to a black gray scale as the count value CNT.

[0126] If the previous image signal RGB P is not a black gray scale, the counter circuit 120 resets the count value CNT to 0.

[0127] The gain calculator 130 outputs the gain GN in response to the count value CNT from the counter circuit 120.

[0128] The DCC compensation section 140 outputs the image data signal DS in response to the input image signal RGB and the gain GN.

[0129] Figure 9 FIG. 1 is a diagram exemplarily showing an image displayed on an electronic device.

[0130] Referring to Figure 9 , the first image MIMG1 is a black pattern during the 1st frame Fl among the 0th frame F0 to the 7th frame F7, and includes a gray pattern in the remaining 0th frame F0, 2nd frame F2 to the 7th frame F7. The second image MIMG2 is a black pattern during the 1st frame Fl to the 10th frame FlO (i.e., 10 frames) among the 0th frame F0 to the 14th frame F14, and includes a gray pattern in the remaining 0th frame F0, 11th frame Fl l to the 14th frame F14. The 1st frame Fl to the 40th frame F40 (i.e., 40 frames) of the third image MIMG3 among the 0th frame F0 to the 43rd frame F43 are black patterns, and include a gray pattern in the remaining 0th frame F0, 41st frame F41 to the 43rd frame F43. The 1st frame Fl to the 120th frame F120 (i.e., 120 frames) of the fourth image MIMG4 among the 0th frame F0 to the 122nd frame F122 are black patterns, and include a gray pattern in the remaining 0th frame F0, 121st frame Fl l, 122nd frame F122.

[0131] In Figure 9 , for example, the black pattern is 0 gray 0G, and the gray pattern is 51 gray 51G.

[0132] Figure 10a , Figure 10b and Figure 10c FIG. 6 is a diagram exemplarily showing a luminance change when the first image MIMG1 to the fourth image MIMG4 shown in FIG. 5 are displayed on an electronic device. Figure 9

[0133] FIG. 8 is a diagram exemplarily showing a luminance change when the first image MIMG1 and the fourth image MIMG4 shown in FIG. 7 are displayed on an electronic device. Figure 10a Figure 9

[0134] In Figure 10a , the luminance of the 0th frame F0, the 1st frame Fl, and the 2nd frame F2 of the first image MIMG1 and the luminance of the 0th frame F0, the 120th frame F120, and the 121st frame Fl l of the fourth image MIMG4 are overlapped.

[0135] Referring to Figure 9 and​​Figure 10a The first image MIMG1 is a gray pattern in the 0th frame F0, a black pattern in the 1st frame Fl, and a gray pattern in the 2nd frame F2.

[0136] The fourth image MIMG4 is a gray pattern in the 0th frame F0, a black pattern in each of the 1st frame Fl to the 120th frame F120, and a gray pattern in the 121st frame F121.

[0137] The luminance of the fourth image MIMG4, which is changed to a gray pattern after a long time of displaying a black pattern, overshoots the luminance of the first image MIMG1.

[0138] Figure 10b is a graph exemplarily showing a luminance change when Figure 9 the second image MIMG2 and the fourth image MIMG4 shown in FIG. 2 are displayed in the electronic device.

[0139] In Figure 10b , the luminance of the 1st frame Fl to the 10th frame F10 of the second image MIMG2 is overlaid with the luminance of the 1st frame Fl to the 120th frame F120 of the fourth image MIMG4, and the luminance of the 11th frame Fl 1 of the second image MIMG2 is overlaid with the luminance of the 121st frame F121 of the fourth image MIMG4.

[0140] Referring to Figure 9 and Figure 10b , the second image MIMG2 is a gray pattern in the 0th frame F0, a black pattern in the 1st frame Fl to the 10th frame F10, and a gray pattern in the 11th frame Fl 1.

[0141] The fourth image MIMG4 is a gray pattern in the 0th frame F0, a black pattern in each of the 1st frame Fl to the 120th frame F120, and a gray pattern in the 121st frame F121.

[0142] The luminance of the fourth image MIMG4, which is changed to a gray pattern after a long time of displaying a black pattern, overshoots the luminance of the second image MIMG2.

[0143] Figure 10c is a graph exemplarily showing a luminance change when Figure 9 the third image MIMG3 and the fourth image MIMG4 shown in FIG. 3 are displayed in the electronic device.

[0144] In Figure 10cIn this case, the luminance of the 1st frame F1 to the 40th frame F40 of the third image MIMG3 is overlaid with the luminance of the 1st frame F0 to the 120th frame F120 of the fourth image MIMG4, and the luminance of the 41st frame F41 of the third image MIMG3 is overlaid with the luminance of the 121st frame F121 of the fourth image MIMG4.

[0145] Referring to Figure 9 and Figure 10c , the third image MIMG3 is a black pattern in the 1st frame F1 to the 40th frame F40, and is a gray pattern in the 41st frame F41.

[0146] The fourth image MIMG4 is a black pattern in each of the 1st frame F1 to the 120th frame F120, and is a gray pattern in the 121st frame F121.

[0147] In Figure 10c the example shown, the luminance of the third image MIMG3 and the fourth image MIMG4 is substantially the same.

[0148] Referring again to Figure 8 and Figure 9 , the counter circuit 120 can count the time for which the black pattern continues in the previous image signal RGB_P. For example, when the previous image signal RGB_P corresponds to the black gray scale, the counter circuit 120 increases the count value CNT by 1.

[0149] When the previous image signal RGB_P corresponds to the first image MIMG1, the count value CNT can increase to 1. When the previous image signal RGB_P corresponds to the second image MIMG2, the count value CNT can increase to 10. When the previous image signal RGB_P corresponds to the third image MIMG3, the count value CNT can increase to 40. When the previous image signal RGB_P corresponds to the fourth image MIMG4, the count value CNT can increase to 120.

[0150] Figure 11 is a graph that exemplarily shows the gain GN according to the count value CNT.

[0151] Referring to Figure 8 and Figure 11 , the gain calculator 130 outputs the gain GN corresponding to the count value CNT.

[0152] In Figure 8In the example shown, the gain GN is less than or equal to 1 and greater than or equal to 0.8. When the count value CNT is greater than 0 and less than or equal to 120, the gain GN decreases as the count value CNT increases. That is, when the count value CNT is greater than 0 and less than or equal to 120, the count value CNT is inversely proportional to the gain GN. For example, the gain GN decreases as the count value CNT increases, and, as... Figure 11 As shown, the gain GN decreases linearly as the count value CNT increases.

[0153] from Figure 10a , Figure 10b and Figure 10c It can be seen that the longer the black pattern is displayed, the greater the brightness overshoot when a gray pattern is displayed after the black pattern. However, it can be seen that when the black pattern is displayed for a predetermined time or longer (e.g., more than 40 frames) before being changed to a gray pattern, the overshoot amplitude converges to a constant value.

[0154] Therefore, if the count value CNT is less than or equal to the reference value (e.g., 120), the gain calculator 130 outputs a gain GN that is inversely proportional to the count value CNT; if the count value CNT is greater than the reference value (e.g., 120), the gain calculator 130 outputs a gain GN of a predetermined value (e.g., 0.8).

[0155] Figure 8 The reference values ​​of the count value CNT and the gain GN shown are merely illustrative, and the present invention is not limited thereto.

[0156] Figure 12a and Figure 12b This is a diagram used to illustrate the operation of the DCC compensation unit 140.

[0157] Reference Figure 8 and Figure 12a DCC compensation unit 140 adjusts the display panel DP (refer to...) Figure 3 The characteristics of the input image signal RGB are used to convert the DCC compensation signal DCC_DS into a DCC compensation signal.

[0158] For example, suppose that in frame 1 F1, the input image signal RGB corresponds to the first input image signal RGB1, and in frame 2 F2 and frame 3 F3, the input image signal RGB corresponds to the second input image signal RGB2.

[0159] It is predicted that when the input image signal RGB changes from the first input image signal RGBl to the second input image signal RGB2, the display panel DP emits light at a lower luminance than that corresponding to the second input image signal RGB2. In this case, the DCC compensation section 140 performs overdrive in which the DCC compensation signal DCC_DS is output as a third input image signal RGB3 larger than the second input image signal RGB2 in the 2nd frame F2. In the 2nd frame F2, in a case where the DCC compensation signal DCC_DS corresponding to the third input image signal RGB3 is output as the image data signal DS, the luminance of the display panel DP can correspond to the second input image signal RGB2.

[0160] Referring to Figure 8 and Figure 12b , the DCC compensation section 140 converts the input image signal RGB into the DCC compensation signal DCC_DS in accordance with the characteristics of the display panel DP (refer to Figure 3 ).

[0161] For example, it is assumed that in the 1st frame Fl, the input image signal RGB corresponds to a fourth input image signal RGB4, and in the 2nd frame F2 and the 3rd frame F3, the input image signal RGB corresponds to a fifth input image signal RGB5.

[0162] It is predicted that when the input image signal RGB changes from the fourth input image signal RGB4 to the fifth input image signal RGB5, the display panel DP emits light at a higher luminance than that corresponding to the fifth input image signal RGB5. In this case, the DCC compensation section 140 performs underdrive in which the DCC compensation signal DCC_DS is output as a sixth input image signal RGB6 lower than the fifth input image signal RGB5 in the 2nd frame F2. In the 2nd frame F2, in a case where the DCC compensation signal DCC_DS corresponding to the sixth input image signal RGB6 is output as the image data signal DS, the luminance of the display panel DP can correspond to the fifth input image signal RGB5.

[0163] Figure 13 is a graph that exemplarily shows the relationship between the input image signal RGB and the DCC compensation signal DCC_DS according to the operation state of the DCC compensation section 140.

[0164] Referring to Figure 8 and Figure 13, the DCC compensation section 140 can selectively perform DCC compensation. That is, the DCC compensation section 140 can operate in one of a DCC compensation on mode DCC_ON and a DCC compensation off mode DCC_OFF. In the DCC compensation off mode DCC_OFF, the DCC compensation signal DCC_DS of the DCC compensation section 140 can be the same as the input image signal RGB. For example, if the input image signal RGB is 128 gray 128G, the DCC compensation signal DCC_DS is 128 gray 128G. For example, if the input image signal RGB is 255 gray 255G, the DCC compensation signal DCC_DS is 255 gray 255G.

[0165] In the DCC compensation on mode DCC_ON, the DCC compensation signal DCC_DS of the DCC compensation section 140 can have a gray level lower than the input image signal RGB. For example, if the input image signal RGB is 128 gray 128G, the DCC compensation signal DCC_DS can be a gray level lower than 128 gray 128G. For example, if the input image signal RGB is 255 gray 255G, the DCC compensation signal DCC_DS can be a gray level lower than 255 gray 255G. Further, in the DCC compensation on mode, the DCC compensation signal DCC_DS can be proportional to the input image signal RGB and have a gray level lower than the input image signal RGB.

[0166] Figure 14 is a look-up table exemplarily showing the relationship between the input image signal RGB and the DCC compensation signal DCC_DS of the DCC compensation section 140.

[0167] Referring to Figure 8 and Figure 14 When the DCC compensation section 140 is in the DCC compensation on mode, the DCC compensation section 140 outputs the DCC compensation signal DCC_DS according to the input image signal RGB of the current frame.

[0168] If the input image signal RGB is 0 gray 0G, the DCC compensation signal DCC_DS is 0 gray 0G, which is the same as the input image signal RGB.

[0169] If the input image signal RGB is greater than 0 gray 0G, the DCC compensation signal DCC_DS is a gray level lower than the input image signal RGB.

[0170] For example, if the input image signal RGB is 32 gray scale 32G, 64 gray scale 64G, 96 gray scale 96G, 128 gray scale 128G, 160 gray scale 160G, 192 gray scale 192G, 224 gray scale 224G, and 256 gray scale 256G, the DCC compensation signal DCC_DS is 30 gray scale 30G, 61 gray scale 61G, 91 gray scale 91G, 121 gray scale 121G, 152 gray scale 152G, 182 gray scale 182G, 212 gray scale 212G, and 243 gray scale 243G, respectively.

[0171] Figure 15 is a diagram for explaining the operation of the DCC compensation section 140 according to an embodiment of the present application.

[0172] Referring to Figure 8 and Figure 15 , if the previous image signal RGB_P from the frame memory 110 is not 0 gray scale 0G, the DCC compensation section 140 outputs the DCC compensation signal DCC_DS according to the DCC compensation on mode / DCC compensation off mode as the image data signal DS.

[0173] If the previous image signal RGB_P from the frame memory 110 is 0 gray scale 0G, the DCC compensation section 140 outputs the image data signal DS by multiplying the DCC compensation signal DCC_DS according to the DCC compensation on mode by the gain GN.

[0174] In the example shown in Figure 15 , if the previous image signal RGB_P of the previous frame is 0 gray scale 0G, the input image signal RGB of the current frame is 128 gray scale 128G, and the gain GN is 1, the image data signal DS is 121 gray scale 121G.

[0175] In another example, if the previous image signal RGB_P of the previous frame is 0 gray scale 0G, the input image signal RGB of the current frame is 128 gray scale 128G, and the gain GN is 0.8, the image data signal DS is 97 gray scale 97G.

[0176] That is, if the previous image signal RGB_P of the previous frame is 0 gray scale 0G, and the input image signal RGB of the current frame is not 0 gray scale 0G, the image data signal DS is output based on the DCC compensation signal DCC_DS according to the DCC compensation operation of the input image signal RGB and the gain GN according to the count value CNT.

[0177] As a result, if the previous image signal RGB_P of the previous frame is 0 gray scale 0G, and the input image signal RGB of the current frame is not 0 gray scale 0G, the underdrive of outputting the image data signal DS to a lower gray scale than the input image signal RGB is performed. Therefore, it is possible to prevent, for example,Figure 10a and Figure 10b brightness overshoot when an image of a different gray scale is displayed after a long time display of a black pattern.

[0178] Figure 16a 、 Figure 16b and Figure 16c are graphs that exemplarily show the brightness change according to the gain GN.

[0179] In Figure 16a 、 Figure 16b and Figure 16c , the references R1, R2, R3 indicate the brightness when the DCC compensation section 140 does not perform compensation for a black pattern.

[0180] Referring to Figure 8 and Figure 16a , when the count value CNT is 1 and the gain GN is 1, the brightness INT1 corresponding to the image data signal DS becomes lower than the reference R1 and approaches the target brightness TL1 through the DCC compensation operation of the DCC compensation section 140.

[0181] Referring to Figure 8 and Figure 16b , when the count value CNT is 6 and the gain GN is 0.95, the brightness INT2 corresponding to the image data signal DS output from the DCC compensation section 140 becomes lower than the reference R2 and approaches the target brightness TL2.

[0182] Referring to Figure 8 and Figure 16c , when the count value CNT is 40 and the gain GN is 0.8, the brightness INT3 corresponding to the image data signal DS output from the DCC compensation section 140 becomes lower than the reference R3 and approaches the target brightness TL3.

[0183] In particular, as shown in Figure 16b and Figure 16c , as the count value CNT increases, the brightness of the references R2, R3 overshoots the target brightness TL2, TL3, but by reducing the gain GN, the brightness INT2, INT3 corresponding to the image data signal DS can approach the target brightness TL2, TL3.

[0184] The above has been described with reference to the preferred embodiments of the present application, but it will be understood by those skilled in the art or those ordinarily skilled in the art that the present application can be variously modified and changed within the scope of the concept and technical field of the present application recited in the appended claims, without departing from the present application. Therefore, the technical scope of the present application is not limited to the contents recited in the detailed description of the specification, but should be determined by the claims.

Claims

1. A drive controller, comprising: The memory stores the input image signal and outputs the previous image signal; The counter circuit increments the count value and outputs a count signal if the previous image signal corresponds to black grayscale. A gain calculator that outputs gain in response to the counting signal; and The compensation unit outputs an image data signal based on the input image signal and the gain if the previous image signal corresponds to the black grayscale.

2. The drive controller according to claim 1, wherein, The input image signal corresponds to the current frame, and the previous image signal corresponds to the previous frame.

3. The drive controller according to claim 2, wherein, The counter circuit outputs the number of consecutive frames corresponding to the previous image signal and the black grayscale as the count value.

4. The drive controller according to claim 1, wherein, The gain calculator outputs a gain that is inversely proportional to the count value.

5. The drive controller according to claim 1, wherein, If the count value is less than or equal to the reference value, the gain calculator outputs a gain that is inversely proportional to the count value; if the count value is greater than the reference value, the gain calculator outputs a gain that has a predetermined value.

6. The drive controller according to claim 1, wherein, The compensation unit operates in one of two modes: DCC compensation enabled mode and DCC compensation disabled mode. During the DCC compensation enabled mode, the compensation unit outputs a DCC compensation signal corresponding to the input image signal.

7. The drive controller according to claim 6, wherein, If the previous image signal corresponds to the black grayscale during the DCC compensation enabled mode, the compensation unit outputs the product of the DCC compensation signal and the gain as the image data signal.

8. The drive controller according to claim 7, wherein, The gain is less than or equal to 1.

9. The drive controller according to claim 6, wherein, During the DCC compensation enabled mode, the compensation unit outputs the DCC compensation signal corresponding to a gray level lower than that of the input image signal.

10. The drive controller according to claim 6, wherein, During the DCC compensation off mode, the compensation unit outputs the same DCC compensation signal as the input image signal.

11. An electronic device comprising: Display panel; The drive controller receives input image signals and outputs image data signals; as well as The data driving circuit provides the display panel with a data signal corresponding to the image data signal. The drive controller is the drive controller according to any one of claims 1 to 10.

Images