Packaging structure and forming method thereof

Abstract

The invention discloses a packaging structure and a forming method thereof. The structure comprises a glass substrate; the buffer bonding layer covers the side wall of the glass substrate in a surrounding manner; the rewiring layers are located on the front face and the back face of the glass substrate, and the rewiring layers are electrically connected with the glass substrate; and the chip is arranged on the rewiring layer on the front surface of the glass substrate, and the chip is electrically connected with the rewiring layer. By arranging the buffer bonding layer surrounding and covering the side wall of the glass substrate, the buffer bonding layer can repair micro-cracks generated by the cutting process on the edge of the glass substrate, so that gaps among the micro-cracks are bonded again through the buffer bonding layer; according to the glass substrate provided by the invention, the risk that the whole glass substrate is cracked due to the influence of stress on the microcracks can be reduced, and meanwhile, the buffer bonding layer can also play a role in bonding the glass substrate and other film layers (such as a reinforcing layer).

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing, and more particularly to a packaging structure and a method for forming the same. Background Technology

[0002] With the continuous advancement of semiconductor technology, chip packaging technology is also constantly evolving to meet the growing demands for high performance, high density, and miniaturization. Among the many packaging technologies, the 2.5D advanced packaging structure with glass as the interlayer is gradually attracting attention.

[0003] Traditional packaging technologies face numerous challenges in signal transmission, heat dissipation, and integration, making it difficult to meet the high performance and miniaturization requirements of modern electronic devices. Glass, with its excellent electrical properties, thermal stability, and mechanical strength, has become an ideal interposer material in advanced packaging technologies. Glass interposers not only enable efficient signal transmission between the chip and external circuits but also effectively improve the reliability and integration of the packaging structure.

[0004] Currently, the reliability and performance of glass substrate-based packaging structures still need to be improved. Summary of the Invention

[0005] The problem addressed by the embodiments of this disclosure is to provide a packaging structure and a method for forming the same, which improves the performance and reliability of the packaging structure.

[0006] To address the aforementioned issues, this disclosure provides a packaging structure comprising: a glass substrate; a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate; a redistribution layer located on the front and back sides of the glass substrate, the redistribution layer being electrically connected to the glass substrate; and a chip disposed on the redistribution layer on the front side of the glass substrate, the chip being electrically connected to the redistribution layer.

[0007] Accordingly, this disclosure also provides a method for forming a packaging structure, including: providing a glass substrate; forming a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate; after forming the buffer adhesive layer, forming a redistribution layer on the front and back sides of the glass substrate, the redistribution layer being electrically connected to the glass substrate; and disposing a chip on the redistribution layer on the front side of the glass substrate, the chip being electrically connected to the redistribution layer.

[0008] Compared with the prior art, the technical solution of the present disclosure has the following advantages: The packaging structure provided in this disclosure includes a buffer adhesive layer surrounding the sidewalls of a glass substrate, a redistribution layer located on the front and back sides of the glass substrate and electrically connected to the glass substrate, and a chip disposed on the redistribution layer on the front side of the glass substrate and electrically connected to the redistribution layer. By providing a buffer adhesive layer surrounding the sidewalls of the glass substrate, the buffer adhesive layer can repair microcracks caused by the cutting process at the edge of the glass substrate, allowing the gaps between the microcracks to be re-bonded through the buffer adhesive layer. In the packaging process, this reduces the risk of the entire glass substrate cracking due to stress caused by microcracks. At the same time, the buffer adhesive layer also serves to bond the glass substrate to other film layers (such as reinforcing layers).

[0009] The packaging structure formation method provided in this disclosure includes forming a buffer adhesive layer surrounding and covering the sidewalls of a glass substrate. After forming the buffer adhesive layer, redistribution layers are formed on the front and back sides of the glass substrate. The redistribution layers are electrically connected to the glass substrate. A chip is disposed on the redistribution layer on the front side of the glass substrate, and the chip is electrically connected to the redistribution layer. By forming a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate, the buffer adhesive layer can repair microcracks caused by the cutting process at the edge of the glass substrate, allowing the gaps between the microcracks to be re-bonded through the buffer adhesive layer. In subsequent packaging processes, this reduces the risk of the entire glass substrate cracking due to stress caused by the microcracks. At the same time, the buffer adhesive layer also serves to bond the glass substrate and subsequently formed film layers (such as reinforcing layers). Attached Figure Description

[0010] Figures 1 to 4 A schematic diagram of the corresponding structure in the first embodiment of the packaging structure disclosed herein is shown; Figures 5 to 6 A schematic diagram of the corresponding structure in the second embodiment of the packaging structure disclosed herein is shown; Figure 7 This is a flowchart corresponding to the first embodiment of the method for forming the packaging structure of the present invention; Figures 8 to 21 This is a schematic diagram of each step in the first embodiment of the method for forming the packaging structure disclosed herein; Figures 22 to 24 This is a schematic diagram of each step in the second embodiment of the method for forming the encapsulation structure disclosed herein. Detailed Implementation

[0011] Currently, there are some problems with glass substrates during the packaging process, which limit their performance and application range. During the cutting process, microcracks are easily generated at the edges of the glass substrate. When these microcracks are subjected to stress in subsequent packaging processes, they may extend to the entire surface of the glass substrate, causing the glass substrate to crack and affecting the reliability and yield of the packaging.

[0012] To address the aforementioned technical problems, this disclosure provides a packaging structure, comprising: a glass substrate having interconnect vias; a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate; a redistribution layer located on the front and back sides of the glass substrate, the redistribution layer being electrically connected to the interconnect vias; and a chip disposed on the redistribution layer on the front side of the glass substrate, the chip being electrically connected to the redistribution layer.

[0013] The packaging structure provided in this disclosure includes interconnect vias through a glass substrate, a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate, and redistribution layers located on the front and back sides of the glass substrate. The redistribution layers are electrically connected to the interconnect vias, and a chip is disposed on the redistribution layer on the front side of the glass substrate, and the chip is electrically connected to the redistribution layer. By providing a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate, the buffer adhesive layer can repair microcracks caused by the cutting process at the edges of the glass substrate, filling and repairing the gaps between the microcracks. In the packaging process, this reduces the risk of the entire glass substrate cracking due to stress caused by microcracks. At the same time, the buffer adhesive layer also acts as a bonding reinforcement layer and the glass substrate.

[0014] To make the above-mentioned objects, features and advantages of the embodiments of this disclosure more apparent and understandable, the specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0015] Figures 1 to 4 A schematic diagram of the corresponding structure in the first embodiment of the packaging structure disclosed herein is shown. Wherein, Figure 2 yes Figure 1 A cross-sectional view along the AA direction. For ease of illustration, Figure 1 Only a schematic diagram of the glass substrate and the reinforcing layer is shown.

[0016] The packaging structure includes: a glass substrate 300; a buffer adhesive layer 303 surrounding and covering the sidewalls of the glass substrate 300; a redistribution layer 666 located on the front side 361 and the back side 360 ​​of the glass substrate 300, and the redistribution layer 666 is electrically connected to the glass substrate 300; and a chip 370 disposed on the redistribution layer 666 on the front side 361 of the glass substrate 300, and the chip 370 is electrically connected to the redistribution layer 666.

[0017] Specifically, a buffer adhesive layer 303 surrounds the sidewalls of the glass substrate 300, a redistribution layer 666 is located on the front side 361 and back side 360 ​​of the glass substrate 300, and the redistribution layer 666 is electrically connected to the glass substrate 300. A chip 370 is disposed on the redistribution layer 666 on the front side 361 of the glass substrate 300, and the chip 370 is electrically connected to the redistribution layer 666. By providing a buffer adhesive layer 303 surrounding the sidewalls of the glass substrate 300, the buffer adhesive layer 303 can repair microcracks on the edges of the glass substrate 300 caused by the cutting process, allowing the gaps between the microcracks to be re-bonded through the buffer adhesive layer 303. In the packaging process, this reduces the risk of the entire glass substrate cracking due to stress caused by microcracks.

[0018] Specifically, the glass substrate 300 provides a process platform for the formation of the packaging structure, provides mechanical support for the placement of the chip 370, and has good thermal conductivity, which can conduct away the heat generated by the chip 370 during operation in a timely manner, which helps to reduce the temperature of the chip 370 and improve the stability and reliability of the chip 370.

[0019] In some embodiments, an interconnect via structure 301 extends through the glass substrate 300, enabling the chip 370 to be electrically connected to an external circuit structure through the interconnect via structure 301.

[0020] It should be noted that the interconnect via structure 301 enables the three-dimensional integration of the subsequently configured chip 370, improving the integration and performance of the chip 370 and greatly shortening the interconnect length inside the chip 370.

[0021] In some embodiments, the material of the interconnect via structure 301 includes one or more of copper, nickel, and gold.

[0022] In some embodiments, the material of the glass substrate 300 includes one or more of borosilicate, quartz, and aluminosilicate.

[0023] In some embodiments, the glass substrate 300 includes a wafer-level glass substrate or a glass adapter plate.

[0024] Specifically, a buffer adhesive layer 303 is provided to surround and cover the sidewall of the glass substrate 300. The buffer adhesive layer 303 can repair the microcracks on the edge of the glass substrate 300 caused by the cutting process, and the gaps between the microcracks can be re-bonded through the buffer adhesive layer 303. In the packaging process, the risk of the entire glass substrate cracking due to stress caused by the microcracks can be reduced.

[0025] It should be noted that after the glass substrate 300 is cut to the target size, the microcracks are usually located on the sidewalls of the glass substrate 300 edge. By forming a buffer adhesive layer 303 covering the sidewalls of the glass substrate 300, the buffer adhesive layer 303 can repair the microcracks and re-bond the gaps between the microcracks through the buffer adhesive layer 303, thereby improving the strength of the glass substrate 300. In the subsequent packaging process, the risk of the entire glass substrate 300 cracking due to stress caused by the microcracks is reduced.

[0026] In some embodiments, the buffer adhesive layer 303 further extends to cover the edge regions of the front side 361 and the back side 360 ​​of the glass substrate 300, and the buffer adhesive layer 303 exposes the interconnect via structure 301.

[0027] Specifically, the buffer adhesive layer 303 extends to cover the edge areas of the front side 361 and the back side 360 ​​of the glass substrate 300, which can further repair micro-cracks in the edge areas of the front side 361 and the back side 360 ​​of the glass substrate 300, enhance the support of the edge areas, and reduce the risk of the glass substrate 300 breaking in subsequent packaging processes.

[0028] It should be noted that the buffer adhesive layer 303 exposes the interconnect via structure 301, providing a process window for setting up the chip 370, enabling the interconnect via structure 301 to be electrically connected to the subsequently set up chip 370.

[0029] In other embodiments, the buffer adhesive layer 303 may also simply surround the sidewalls of the covering glass substrate 300.

[0030] In some embodiments, the material of the buffer adhesive layer 303 includes organic materials, metals, or metal oxides.

[0031] It should be noted that organic materials possess flexibility and adhesiveness, enabling them to fill microcracks and form chemical bonds, thus repairing microcracks in the edge region of the glass substrate 300 and enhancing its strength. Metallic materials, with their ductility, can also repair microcracks and enhance the strength of the glass substrate 300. Metal oxides repair microcracks through chemical bonding and plastic deformation. In other words, organic materials, metals, or metal oxides can all form a good bond with the microcracks in the glass substrate 300, while providing a certain degree of stress buffering, thereby improving the overall strength and reliability of the glass substrate 300.

[0032] In some embodiments, the material of the buffer adhesive layer 303 includes one or more of titanium, chromium, palladium, zinc oxide, and organic adhesives.

[0033] Specifically, organic adhesives can be epoxy resin adhesives, polyurethane adhesives, acrylic adhesives, underfill adhesives, polyimide (PI), and other materials.

[0034] In some embodiments, the encapsulation structure further includes a reinforcing layer 310 surrounding the glass substrate 300.

[0035] Specifically, by forming a reinforcing layer 310 around the glass substrate 300, the strength of the edge region of the glass substrate 300 can be further increased, and the risk of warping of the glass substrate 300 can be reduced in the packaging process.

[0036] In some embodiments, such as Figure 2 As shown, the reinforcing layer 310 surrounds the edge regions of the front side 361 and the back side 360 ​​of the glass substrate 300, as well as the sidewalls of the glass substrate 300.

[0037] It should be noted that a buffer adhesive layer 303 is formed on the edge areas of the front side 361 and the back side 360 ​​of the glass substrate 300, as well as on the sidewalls of the glass substrate 300. The reinforcing layer 310 surrounds the edge areas of the front side 361 and the back side 360 ​​of the glass substrate 300, as well as on the sidewalls of the glass substrate 300. This means that the buffer adhesive layer 303 is located between the glass substrate 300 and the reinforcing layer 310. The reinforcing layer 310 is directly deposited on the glass substrate 300, resulting in poor adhesion between the two. The buffer adhesive layer 303 can be used to bond the reinforcing layer 310 and the glass substrate 300. When stress is generated on the glass substrate 300, the reinforcing layer 310 can increase the strength of the edge area of ​​the glass substrate 300 and reduce the risk of warping of the glass substrate 300.

[0038] In other embodiments, the reinforcing layer 310 surrounds the edge region of the back surface 360 ​​of the glass substrate 300.

[0039] In other embodiments, the reinforcing layer 310 surrounds the edge region of the front side 361 of the glass substrate 300.

[0040] In other embodiments, the reinforcing layer 310 surrounds the edge regions of the front side 361 and the back side 360 ​​of the glass substrate 300.

[0041] Specifically, the reinforcing layer 310 surrounds the edge regions of the front side 361 and the back side 360 ​​of the glass substrate 300, so that the reinforcing layer 310 can support both the front side 361 and the back side 360 ​​of the glass substrate 300, increasing the strength of the edge regions of the front side 361 and the back side 360 ​​of the glass substrate 300 and reducing the risk of warping of the glass substrate 300.

[0042] It should be noted that in some other embodiments, such as Figure 3 and Figure 4As shown, the reinforcing layer 310 may also cover the redistribution layer 666 at the edge of the glass substrate 300; or, the reinforcing layer 310 may cover the redistribution layer 666 at the edge of the glass substrate 300 and the buffer adhesive layer 303 on the sidewall of the glass substrate 300, thereby further increasing the strength of the edge of the glass substrate 300 and reducing the risk of warping of the glass substrate 300 in subsequent packaging processes.

[0043] In some embodiments, the material of the reinforcing layer 310 includes a metallic material.

[0044] Specifically, the metal material has high rigidity, which enables the reinforcing layer 310 to provide additional support to the edge area of ​​the glass substrate 300, limiting the bending deformation of the edge area of ​​the glass substrate 300. At the same time, the difference in thermal expansion coefficients between the metal material and the glass substrate 300 is elastically coordinated by the buffer adhesive layer 303. The buffer adhesive layer 303 can buffer and bond the glass substrate 300 and the reinforcing layer 310, thereby improving the overall mechanical stability of the glass substrate 300 and thus improving the reliability of the packaging structure.

[0045] In some embodiments, the material of the reinforcing layer 310 includes one or more of molybdenum, tungsten, chromium, titanium, and copper.

[0046] In some embodiments, the redistribution layer 666 on the back side of the glass substrate 300 includes an encapsulation structure that further includes: a first dielectric layer 330 located on the back side 360 ​​of the glass substrate 300; one or more conductive lines 331 located in the first dielectric layer 330, with the topmost conductive line 331 electrically connected to the glass substrate 300, and the first dielectric layer 330 exposing the bottommost conductive line 331.

[0047] Specifically, the first dielectric layer 330 is used to provide electrical isolation for the conductive lines 331 on the back side 360 ​​of the glass substrate 300.

[0048] In some embodiments, the material of the first dielectric layer 330 includes an insulating material.

[0049] In some embodiments, one or more conductive lines 331 are located in the first dielectric layer 330, and the top conductive line 331 is electrically connected to the interconnect via structure 301 in the glass substrate 300, and the bottom conductive line 331 is exposed in the first dielectric layer 330.

[0050] Specifically, conductive lines 331 are disposed on the back side 360 ​​of the glass substrate 300 and electrically connected to the interconnect via structure 301. The conductive lines 331 can rewire the signals led out from the interconnect via structure 301 and connect them to different circuit units, thereby improving the flexibility and modular design of the circuit. At the same time, the conductive lines 331 help to reduce signal loss and reduce the influence of parasitic capacitance and inductance.

[0051] In some embodiments, the redistribution layer 666 on the front side of the glass substrate 300 includes: a second dielectric layer 333 located on the front side 361 of the glass substrate 300; one or more conductive lines 331 located in the second dielectric layer 333, and the bottommost conductive line 331 is electrically connected to the glass substrate 300, with the second dielectric layer 333 exposing the topmost conductive line 331.

[0052] Specifically, the second dielectric layer 333 is used to provide electrical isolation for the conductive lines 331 on the front side 361 of the glass substrate 300.

[0053] In some embodiments, one or more conductive lines 331 are located in the second dielectric layer 333, and the bottom conductive line 331 is electrically connected to the interconnect via structure 301 in the glass substrate 300, and the second dielectric layer 333 exposes the top conductive line 331.

[0054] Specifically, conductive lines 331 are disposed on the front side 361 of the glass substrate 300 and electrically connected to the interconnect via structure 301. The conductive lines 331 can rewire the signals led out from the interconnect via structure 301 and connect them to different circuit units, thereby improving the flexibility and modular design of the circuit. At the same time, the conductive lines 331 help to reduce signal loss and reduce the influence of parasitic capacitance and inductance.

[0055] It should be noted that chip 370 is used to provide electronic components, thereby enabling data processing, signal processing, data storage, and driving photonic devices.

[0056] In some embodiments, the specific type of chip 370 can be selected according to actual needs. For example, chip 370 may include one or more of ASIC (Application-Specific Integrated Circuit) chip 370, HBM (High Bandwidth Memory) chip 370, CPU (Central Processing Unit) chip 370, GPU (Graphics Processing Unit) chip 370 and FPGA (Field-Programmable Gate Array) chip 370.

[0057] In some embodiments, chip 370 is bonded to the front side 361 of glass substrate 300 via a flip chip process and electrically connected to redistribution layer 666, thereby improving the communication speed between chips 370.

[0058] In other embodiments, the chip 370 may be bonded to the front side 361 of the glass substrate 300 using other suitable bonding processes, such as flip bonding, direct metal bonding, or hybrid metal-oxide bonding.

[0059] In some embodiments, the packaging structure further includes: a first conductive bump 371 located between the second dielectric layer 333 and the chip 370, and the chip 370 is electrically connected to the conductive lines 331 exposed on the second dielectric layer 333 through the first conductive bump 371.

[0060] In some embodiments, the first conductive bump 371 may be made of a material with good conductivity, for example, it may include one or more of copper, aluminum, gold, nickel, silver, palladium and tin.

[0061] In some embodiments, the packaging structure further includes a bottom fill layer 390 located between the chip 370 and the redistribution layer 666 on the front side 361 of the glass substrate 300, and the bottom fill layer 390 covers the first conductive bump 371.

[0062] It should be noted that the bottom filler layer 390 helps to improve the bonding strength between the chip 370 and the glass substrate 300, and also helps to protect the first conductive bump 371.

[0063] In some embodiments, the bottom filler layer 390 is made of epoxy resin, which can help to mitigate stress impacts.

[0064] In some embodiments, the packaging structure further includes a first molding layer 391, located on the redistribution layer 666 and surrounding and covering the bottom fill layer 390 and the chip 370, with the first molding layer 391 exposing the top surface of the chip 370.

[0065] It should be noted that the first molding layer 391 is used to protect the chip 370 and the glass substrate 300, and to mold the chip 370 and the glass substrate 300 into a package, effectively isolating them from external moisture, mechanical impact and chemical corrosion, and improving the reliability of the package structure.

[0066] It should also be noted that the first molding layer 391 is exposed on the top surface of the chip 370, which helps to reduce the thickness of the package structure. The top of the chip 370 is exposed by the first molding layer 391, which helps to improve the heat dissipation performance of the chip 370.

[0067] In some embodiments, the material of the first molding layer 391 includes polyimide, epoxy resin, acrylic resin, phenolic resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable polymer dielectric material.

[0068] In some embodiments, the packaging structure further includes a second conductive bump 396 located on the exposed conductive line 331 of the first dielectric layer 330, and the second conductive bump 396 is electrically connected to the exposed conductive line 331 of the first dielectric layer 330.

[0069] It should be noted that the second conductive bump 396 is electrically connected to the conductive line 331, thereby enabling the chip 370 to be electrically connected to the second conductive bump 396 through the conductive line 331 and the interconnect via structure 301. When the subsequent package structure is soldered to the circuit board through the second conductive bump 396, the chip 370 can be electrically connected to the circuit board through the second conductive bump 396.

[0070] In some embodiments, the second conductive bump 396 may be made of a material with good conductivity, for example, it may include one or more of copper, aluminum, gold, nickel, silver, palladium and tin.

[0071] Figures 5 to 6 A schematic diagram of the corresponding structure in the second embodiment of the packaging structure disclosed herein is shown.

[0072] The similarities between the packaging structure disclosed herein and the first embodiment will not be repeated here. The differences between the packaging structure disclosed herein and the first embodiment are as follows: refer to Figures 5 to 6 The glass substrate 400 includes a chip-level glass substrate 498.

[0073] It should be noted that chip-level glass substrate 498 refers to cutting wafer-level glass substrate 400 into multiple independent chip-level glass substrates 498.

[0074] It should also be noted that the glass substrate 400 is a chip-level glass substrate 498, and when there are multiple glass substrates 400, each glass substrate 400 has a buffer adhesive layer 403 on its sidewall in the packaging structure.

[0075] Specifically, in the method of forming the encapsulation structure, multiple glass substrates 400 are reconstructed into unit-level glass substrates 488 by a second molding layer 410. The second molding layer 410 covers the sidewalls of the buffer adhesive layer 403, and the top of the second molding layer 410 is flush with the front and back sides of the glass substrates 400. Specifically, the second molding layer 410 can fix the adjacent glass substrates 400, thereby reconstructing multiple glass substrates 400 into a unit-level glass substrate 488, which is beneficial for setting chips that meet different functional requirements on the unit-level glass substrate 488.

[0076] It should be noted that after the front and back packaging processes of the unit-level glass substrate 488 are completed, the unit-level glass substrate 488 is cut to divide it into multiple chip-level glass substrates 498. This facilitates the subsequent placement of multiple chip-level glass substrates 498 on different circuit boards to meet different functional requirements.

[0077] In some embodiments, the sidewalls of the divided plurality of chip-level glass substrates 498 are covered with a buffer adhesive layer 403 and a second molding compound 410.

[0078] It should also be noted that since the buffer adhesive layer 403 has repaired the micro-cracks on the edge of the glass substrate 400 caused by the cutting process, the gaps between the micro-cracks are re-bonded through the buffer adhesive layer 403. During the cutting process of the unit-level glass substrate 488, the cutting process is less likely to cause cracks on the edge of the chip-level glass substrate 498, thereby improving the performance and reliability of the chip-level glass substrate 498.

[0079] The present invention also provides a method for forming an encapsulation structure. Figure 7 This is a flowchart corresponding to the first embodiment of the method for forming the packaging structure of the present invention.

[0080] In this embodiment, the method for forming the packaging structure includes the following basic steps: Step S1: Provide a glass substrate, in which interconnect vias are formed; Step S2: Form a buffer adhesive layer surrounding and covering the sidewalls of the glass substrate; Step S3: After forming the buffer adhesive layer, a redistribution layer is formed on the front and back sides of the glass substrate, and the redistribution layer is electrically connected to the interconnect via structure. Step S4: Place the chip on the redistribution layer on the front side of the glass substrate, and electrically connect the chip to the redistribution layer.

[0081] In this embodiment of the invention, interconnect vias are formed through a glass substrate to create a buffer adhesive layer that surrounds and covers the sidewalls of the glass substrate. After forming the buffer adhesive layer, redistribution layers are formed on the front and back sides of the glass substrate. The redistribution layers are electrically connected to the interconnect vias. A chip is disposed on the redistribution layer on the front side of the glass substrate and is electrically connected to the redistribution layer. By forming a buffer adhesive layer that surrounds and covers the sidewalls of the glass substrate, the buffer adhesive layer can repair microcracks caused by the cutting process at the edge of the glass substrate, filling and repairing the gaps between the microcracks. In the packaging process, this reduces the risk of the entire glass substrate cracking due to stress caused by microcracks. At the same time, the buffer adhesive layer also serves to bond the glass substrate to the subsequently formed film layers (e.g., reinforcing layers).

[0082] To make the above-mentioned objectives, features and advantages of the embodiments of the present invention more apparent and understandable, specific embodiments of the method for forming the packaging structure of the present disclosure will be described in detail below.

[0083] in, Figures 8 to 21 This is a schematic diagram of each step in the first embodiment of the method for forming the encapsulation structure disclosed herein.

[0084] refer to Figure 8 A glass substrate 100 is provided.

[0085] Specifically, the glass substrate 100 provides a process platform for the subsequent packaging structure formation method, provides mechanical support for the subsequently formed chip, and has good thermal conductivity, which can conduct away the heat generated by the chip during operation in a timely manner, which helps to reduce the chip temperature and improve the chip's stability and reliability.

[0086] In some embodiments, the material of the glass substrate 100 includes one or more of borosilicate, quartz, and aluminosilicate.

[0087] In some embodiments, the glass substrate 100 includes a wafer-level glass substrate or a glass adapter plate.

[0088] In some embodiments, an interconnect via structure 101 extends through the glass substrate 100.

[0089] It should be noted that the interconnect via structure 101 enables the three-dimensional integration of subsequent chips, improving chip integration and performance, and greatly shortening the interconnect length inside the chip.

[0090] In some embodiments, the material of the interconnect via structure 101 includes one or more of copper, nickel, and gold.

[0091] refer to Figure 9 A buffer adhesive layer 103 is formed around the sidewall of the glass substrate 100.

[0092] Specifically, after the glass substrate 100 is cut to the target size, the microcracks are usually located on the sidewalls of the glass substrate 100 edge. By forming a buffer adhesive layer 103 covering the sidewalls of the glass substrate 100, the buffer adhesive layer 103 can fill and repair the microcracks, and the gaps between the microcracks can be re-bonded through the buffer adhesive layer 103, thereby improving the strength of the glass substrate 100. In the subsequent packaging process, the risk of the entire glass substrate 100 cracking due to stress caused by the microcracks is reduced.

[0093] In some embodiments, during the step of forming the buffer adhesive layer 103, the buffer adhesive layer 103 further extends to cover the edge regions of the front side 161 and the back side 160 of the glass substrate 100, and the buffer adhesive layer 103 exposes the interconnect via structure 101.

[0094] Specifically, the buffer adhesive layer 103 extends to cover the edge areas of the front side 161 and the back side 160 of the glass substrate 100, which can further repair microcracks in the edge areas of the front side 161 and the back side 160 of the glass substrate 100, enhance the support of the edge areas, and reduce the risk of the glass substrate 100 breaking in subsequent packaging processes.

[0095] It should be noted that the buffer adhesive layer 103 exposes the interconnect via structure 101, providing a process window for subsequent chip setup, enabling the interconnect via structure 101 to be electrically connected to the subsequently set chip.

[0096] In some embodiments, the step of forming the buffer adhesive layer 103 includes: coating the sidewalls of the glass substrate 100 and the edge regions of the front side 161 and the back side 160 of the glass substrate 100 with a buffer adhesive material layer, and using the buffer adhesive material layer as the buffer adhesive layer 103.

[0097] In other embodiments, the buffer adhesive layer 103 may also simply surround the sidewalls of the covering glass substrate 100.

[0098] In some embodiments, the process of forming the buffer adhesive layer includes a dispensing process or a vapor deposition process.

[0099] Specifically, the dispensing process is suitable for precisely forming a buffer adhesive layer 103 in localized areas, especially when microcracks are mainly concentrated at the edges of the glass substrate 100. It can accurately repair and bond microcracks while avoiding material waste. The vapor deposition process is also suitable for covering the front side 161, back side 160, and sidewalls of the edge area of ​​the glass substrate 100. It can provide a uniform thin film coverage of the buffer adhesive layer 103, repair and bond microcracks, and improve the overall strength of the glass substrate 100.

[0100] In some embodiments, the material of the buffer adhesive layer 103 includes organic materials, metals, or metal oxides.

[0101] It should be noted that organic materials possess flexibility and adhesiveness, enabling them to fill microcracks and form chemical bonds, thereby repairing microcracks in the edge region of the glass substrate 100 and enhancing its strength. Metallic materials, with their ductility, can also repair microcracks and enhance the strength of the glass substrate 100. Metal oxides repair microcracks through chemical bonding and plastic deformation. In other words, organic materials, metals, or metal oxides can all form a good bond with the microcracks in the glass substrate 100, while providing a certain degree of stress buffering, thus improving the overall strength and reliability of the glass substrate 100.

[0102] In some embodiments, the material of the buffer adhesive layer 103 includes one or more of titanium, chromium, palladium, zinc oxide, and organic adhesives.

[0103] Specifically, organic adhesives can be epoxy resin adhesives, polyurethane adhesives, acrylic adhesives, underfill adhesives, polyimide (PI), and other materials.

[0104] refer to Figures 10 to 11 ,in, Figure 10 It is a top view. Figure 11 yes Figure 10 A cross-sectional view along the AA direction, after forming the buffer adhesive layer 103 and before subsequently forming the redistribution layer, the method further includes: forming a reinforcing layer 110 surrounding the glass substrate 100.

[0105] Specifically, by forming a reinforcing layer 110 around the glass substrate 100, the strength of the edge region of the glass substrate 100 can be further increased, and the risk of warping of the glass substrate 100 can be reduced in the subsequent packaging process.

[0106] In some embodiments, such as Figure 11 As shown, the reinforcing layer 110 surrounds the edge regions of the front side 161 and the back side 160 of the glass substrate 100, as well as the sidewalls of the glass substrate 100.

[0107] It should be noted that a buffer adhesive layer 103 is formed on the edge regions of the front side 161 and the back side 160 of the glass substrate 100, as well as on the sidewalls of the glass substrate 100. The reinforcing layer 110 surrounds the edge regions of the front side 161 and the back side 160 of the glass substrate 100, as well as on the sidewalls of the glass substrate 100. This means that the buffer adhesive layer 103 is located between the glass substrate 100 and the reinforcing layer 110. The reinforcing layer 110 is directly deposited on the glass substrate 100, resulting in poor adhesion between the two. The buffer adhesive layer 103 can be used to bond the reinforcing layer 110 and the glass substrate 100. When stress is generated on the glass substrate 100, the reinforcing layer 110 can increase the strength of the edge region of the glass substrate 100 and reduce the risk of warping of the glass substrate 100.

[0108] In other embodiments, the reinforcing layer 110 surrounds the edge region of the back side 160 of the glass substrate 100.

[0109] In other embodiments, the reinforcing layer 110 surrounds the edge region of the front side 161 of the glass substrate 100.

[0110] In other embodiments, the reinforcing layer 110 surrounds the edge regions of the front side 161 and the back side 160 of the glass substrate 100.

[0111] Specifically, the reinforcing layer 110 surrounds the edge regions of the front side 161 and the back side 160 of the glass substrate 100, so that the reinforcing layer 110 can support both the front side 161 and the back side 160 of the glass substrate 100, increasing the strength of the edge regions of the front side 161 and the back side 160 of the glass substrate 100 and reducing the risk of warping of the glass substrate 100.

[0112] In some embodiments, the material of the reinforcing layer 110 includes a metallic material.

[0113] Specifically, the metal material has high rigidity, which enables the reinforcing layer 110 to provide additional support to the edge area of ​​the glass substrate 100, limiting the bending deformation of the edge area of ​​the glass substrate 100. At the same time, the difference in thermal expansion coefficients between the metal material and the glass substrate 100 is elastically coordinated by the buffer adhesive layer 103. The buffer adhesive layer 103 can play a buffering role between the glass substrate 100 and the reinforcing layer 110, thereby improving the overall mechanical stability of the glass substrate 100 and thus improving the reliability of the packaging structure.

[0114] In some embodiments, the material of the reinforcing layer 110 includes one or more of molybdenum, tungsten, chromium, titanium, and copper.

[0115] refer to Figures 12 to 16 After forming the buffer adhesive layer 103, a redistribution layer 131 is formed on the front side 161 and the back side 160 of the glass substrate 100, and the redistribution layer 131 is electrically connected to the glass substrate 100.

[0116] It should be noted that the redistribution layer 131 (RDL) is formed on the front side 161 and back side 160 of the glass substrate 100 and is electrically connected to the interconnect via structure 101 in the glass substrate 100. The redistribution layer 131 can rewire the signals led out from the interconnect via structure 101 and connect them to different circuit units, thereby improving the flexibility and modular design of the circuit. At the same time, the redistribution layer 131 helps to reduce signal loss and reduce the influence of parasitic capacitance and inductance.

[0117] In some embodiments, the step of forming a redistribution layer 131 on the front side 161 and the back side 160 of the glass substrate 100 includes: as follows Figure 12As shown, the glass substrate 100 is bonded to the first temporary carrier plate 120 through the first temporary bonding layer 121, and the front side 161 of the glass substrate 100 is opposite to the first temporary carrier plate 120; Figure 13 As shown, a first dielectric layer 130 and one or more conductive lines are formed on the back side 160 of the glass substrate 100, and the bottom conductive line is electrically connected to the glass substrate 100. The first dielectric layer 130 exposes the top conductive line, and the first dielectric layer 130 and the one or more conductive lines constitute a redistribution layer 131 on the back side of the glass substrate 100. Figure 14 As shown, the first temporary carrier 120 and the first temporary bonding layer 121 are removed; Figure 15 As shown, the glass substrate 100 is bonded to the second temporary carrier plate 140 via the second temporary bonding layer 141, and the back surface 160 of the glass substrate 100 is opposite to the second temporary carrier plate 140; Figure 16 As shown, a second dielectric layer 133 and one or more conductive lines are formed on the front side 161 of the glass substrate 100, and the bottom conductive line is electrically connected to the glass substrate 100. The top conductive line is exposed in the second dielectric layer 133, and the second dielectric layer 133 and one or more conductive lines constitute the redistribution layer 131 on the front side of the glass substrate 100.

[0118] Specifically, the first dielectric layer 130 is used to electrically isolate the conductive lines on the back side 160 of the glass substrate 100, and the second dielectric layer 133 is used to electrically isolate the conductive lines on the front side 161 of the glass substrate 100.

[0119] In some embodiments, the material of the first dielectric layer 130 includes an insulating material.

[0120] It should be noted that during the process of forming the redistribution layer 131 on the back side 160 of the glass substrate 100, the first temporary carrier 120 plays a supporting role, and the first temporary bonding layer 121 is used to stabilize the glass substrate 100 on the first temporary carrier 120, thereby reducing the risk of displacement of the glass substrate 100 during the formation of the redistribution layer 131.

[0121] It should also be noted that removing the first temporary carrier 120 and the first temporary bonding layer 121 exposes the front side 161 of the glass substrate 100, which facilitates the formation of the redistribution layer 131 on the front side 161 of the glass substrate 100.

[0122] Specifically, after the redistribution layer 131 is formed on the front side 161 of the glass substrate 100, the second temporary carrier 140 and the second temporary bonding layer 141 are retained to provide a support platform for subsequent chip placement and molding processes.

[0123] refer to Figure 17 A chip 170 is disposed on the redistribution layer 131 on the front side 161 of the glass substrate 100, and the chip 170 is electrically connected to the redistribution layer 131.

[0124] It should be noted that chip 170 is used to provide electronic devices to achieve functions such as data processing, signal processing, data storage, and driving photonic devices.

[0125] In some embodiments, the specific type of chip 170 can be selected according to actual needs. For example, chip 170 may include one or more of ASIC (Application-Specific Integrated Circuit) chips, HBM (High Bandwidth Memory) chips, CPU (Central Processing Unit) chips, GPU (Graphics Processing Unit) chips, and FPGA (Field-Programmable Gate Array) chips.

[0126] In some embodiments, chip 170 is bonded to the front side 161 of glass substrate 100 via a flip chip process and electrically connected to redistribution layer 131, thereby improving the communication speed between chips 170.

[0127] In other embodiments, the chip 170 may be bonded to the front side 161 of the glass substrate 100 using other suitable bonding processes, such as direct metal bonding or hybrid metal-oxide bonding.

[0128] In some embodiments, during the step of setting chip 170, a first conductive bump 171 is formed between chip 170 and redistribution layer 131, and chip 170 is electrically connected to redistribution layer 131 through the first conductive bump 171.

[0129] In some embodiments, the first conductive bump 171 may be made of a material with good conductivity, for example, it may include one or more of copper, aluminum, gold, nickel, silver, palladium and tin.

[0130] refer to Figures 18 to 21After the chip 170 is set, a bottom fill layer 190 is formed on the redistribution layer 131 on the front side 161 of the glass substrate 100, and the bottom fill layer 190 covers the first conductive bump 171; a first molding compound 191 is formed on the redistribution layer, surrounding and covering the bottom fill layer 190 and the chip 170, and the first molding compound 191 exposes the top surface of the chip 170; after the first molding compound 191 is formed, the second temporary carrier 140 and the second temporary bonding layer 141 are removed; a second conductive bump 196 is formed on the conductive line exposed on the first dielectric layer 130, and the second conductive bump 196 is electrically connected to the conductive line.

[0131] It should be noted that the bottom filler layer 190 helps to improve the bonding strength between the chip 170 and the glass substrate 100, and also helps to protect the first conductive bump 171.

[0132] In some embodiments, the material of the bottom filler layer 190 includes epoxy resin, which can mitigate stress impact.

[0133] It should be noted that the first molding layer 191 is used to protect the chip 170 and the glass substrate 100, and to mold the chip 170 and the glass substrate 100 into a package, effectively isolating them from external moisture, mechanical impact and chemical corrosion, and improving the reliability of the package structure.

[0134] It should also be noted that the first molding layer 191 is exposed on the top surface of the chip 170, which helps to reduce the thickness of the package structure. The top of the chip 170 is exposed by the first molding layer 191, which helps to improve the heat dissipation performance of the chip 170.

[0135] In some embodiments, the material of the first molding layer 191 includes polyimide, epoxy resin, acrylic resin, phenolic resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable polymer dielectric material.

[0136] Specifically, removing the second temporary carrier 140 and the second temporary bonding layer 141 exposes the redistribution layer 131 on the back side 160 of the glass substrate 100, which facilitates the subsequent formation of the second conductive bump 196 on the redistribution layer 131.

[0137] It should be noted that the second conductive bump 196 is electrically connected to the redistribution layer 131, thereby enabling the chip 170 to be electrically connected to the second conductive bump 196 through the interconnect via structure 101 and the redistribution layer 131. When the subsequent package structure is soldered to the circuit board through the second conductive bump 196, the chip 170 can be electrically connected to the circuit board through the second conductive bump 196.

[0138] In some embodiments, the second conductive bump 196 may be made of a material with good conductivity, for example, it may include one or more of copper, aluminum, gold, nickel, silver, palladium and tin.

[0139] It should be noted that in some embodiments, the reinforcement layer 110 is formed before the redistribution layer 131, for example... Figures 10 to 11 As shown.

[0140] In other embodiments, after forming the redistribution layer and before subsequently setting up the chip, the method further includes forming a reinforcing layer surrounding the glass substrate.

[0141] This means that the reinforcing layer covers the redistribution layer at the edge of the glass substrate; or, the reinforcing layer covers the redistribution layer at the edge of the glass substrate and the buffer bonding layer on the sidewall of the glass substrate, thereby further increasing the strength of the edge of the glass substrate and reducing the risk of warping of the glass substrate in subsequent packaging processes.

[0142] Figures 22 to 24 This is a schematic diagram of each step in the second embodiment of the method for forming the encapsulation structure disclosed herein.

[0143] The similarities between the packaging structure disclosed herein and the first embodiment will not be repeated here. The differences between the packaging structure disclosed herein and the first embodiment are as follows: refer to Figure 22 The glass substrate 200 includes a chip-level glass substrate. In the step of providing the glass substrate 200, when the glass substrate 200 is a chip-level glass substrate, the number of glass substrates 200 is multiple.

[0144] It should be noted that chip-level glass substrates refer to wafer-level glass substrates 200 cut into multiple independent chip-level glass substrates.

[0145] It should also be noted that when the glass substrate 200 is a chip-level glass substrate and there are multiple glass substrates 200, a buffer bonding layer is formed on the sidewall of each glass substrate 200 in the subsequent packaging process.

[0146] refer to Figure 23 After forming the buffer adhesive layer 203 and before forming the redistribution layer, the method further includes: forming a second molding layer 210 between adjacent glass substrates 200, wherein multiple glass substrates 200 are reconstructed into unit-level glass substrates 288 through the second molding layer 210, the second molding layer 210 covers the sidewalls of the buffer adhesive layer 203, and the top of the second molding layer 210 is flush with the front and back sides of the glass substrates 200.

[0147] Specifically, the second molding layer 210 can fix the adjacent glass substrates 200, thereby reconstructing multiple glass substrates 200 into a unit-level glass substrate 288, which facilitates the subsequent placement of chips that meet different functional requirements on the unit-level glass substrate 288.

[0148] It should be noted that the number of glass substrates 200 in the unit-level glass substrate 288 is not limited here and can be selected according to actual needs.

[0149] It should also be noted that the second molding layer 210 is used to fix the adjacent glass substrate 200, and the second molding layer 210 is used to protect the adjacent glass substrate 200.

[0150] In some embodiments, the material of the second molding layer 210 includes epoxy resin.

[0151] Specifically, the second molding layer 210 covers the sidewall of the buffer adhesive layer 203, and the top of the second molding layer 210 is flush with the front and back sides of the glass substrate 200, which can improve the flatness of the front and back sides of the glass substrate 200, expose the front and back sides of the glass substrate 200, and provide a process window for subsequent packaging processes.

[0152] refer to Figure 24 After setting the chip 270, the method further includes: forming a molding compound layer covering the chip 270 on the redistribution layer, and cutting the unit-level glass substrate 288 along the second molding compound layer 210.

[0153] Specifically, the unit-level glass substrate 288 is cut into multiple chip-level glass substrates 298, which facilitates the subsequent placement of multiple chip-level glass substrates 298 on different circuit boards to meet different functional requirements.

[0154] It should also be noted that since the buffer adhesive layer 203 has repaired the micro-cracks on the edge of the glass substrate 200 caused by the cutting process, the gaps between the micro-cracks are re-bonded through the buffer adhesive layer 203. During the cutting process of the unit-level glass substrate 288, the cutting process is less likely to cause cracks on the edge of the chip-level glass substrate 298, thereby improving the performance and reliability of the chip-level glass substrate 298.

[0155] While the above disclosure is provided, it is not limited thereto. Any person skilled in the art may make various alterations and modifications without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure shall be determined by the scope defined in the claims.

Claims

1. A packaging structure, characterized in that, include: Glass substrate; A buffer adhesive layer surrounds and covers the sidewalls of the glass substrate; A redistribution layer is located on the front and back sides of the glass substrate, and the redistribution layer is electrically connected to the glass substrate. A chip is disposed on the redistribution layer on the front side of the glass substrate, and the chip is electrically connected to the redistribution layer.

2. The packaging structure as described in claim 1, characterized in that, The buffer adhesive layer also extends to cover the edge regions of the front and back sides of the glass substrate, in which interconnect via structures are formed, and the buffer adhesive layer exposes the interconnect via structures.

3. The packaging structure as described in claim 1, characterized in that, The material of the buffer adhesive layer includes organic materials, metals, or metal oxides.

4. The packaging structure as described in claim 1 or 3, characterized in that, The material of the buffer adhesive layer includes one or more of titanium, chromium, palladium, zinc oxide, and organic adhesives.

5. The packaging structure as described in claim 2, characterized in that, The encapsulation structure further includes: a reinforcing layer surrounding the glass substrate, and a buffer adhesive layer located between the glass substrate and the reinforcing layer.

6. The packaging structure as described in claim 5, characterized in that, The reinforcing layer surrounds the edge region of the front side of the glass substrate; or, The reinforcing layer surrounds the edge region of the back side of the glass substrate; or, The reinforcing layer surrounds the edge regions of the front and back sides of the glass substrate; or, The reinforcing layer surrounds the edge regions of the front and back sides of the glass substrate, as well as the sidewalls of the glass substrate.

7. The packaging structure as described in claim 5, characterized in that, The reinforcing layer covers the redistribution layer at the edge region of the glass substrate; or, The reinforcing layer covers the redistribution layer at the edge of the glass substrate and the buffer bonding layer on the sidewall of the glass substrate.

8. The packaging structure as described in claim 5, characterized in that, The reinforcing layer is made of metallic materials.

9. The packaging structure as described in claim 5 or 8, characterized in that, The reinforcing layer is made of one or more of molybdenum, tungsten, chromium, titanium, and copper.

10. The packaging structure as described in claim 1, characterized in that, The redistribution layer on the back side of the glass substrate includes: a first dielectric layer located on the back side of the glass substrate; One or more conductive lines are located in the first dielectric layer, and the topmost conductive line is electrically connected to the glass substrate, with the bottommost conductive line exposed in the first dielectric layer. The redistribution layer on the front side of the glass substrate includes: a second dielectric layer located on the front side of the glass substrate; One or more conductive lines are located in the second dielectric layer, and the bottom conductive line is electrically connected to the glass substrate, with the top conductive line exposed in the second dielectric layer.

11. The packaging structure as described in claim 10, characterized in that, The packaging structure further includes: a first conductive bump located between the redistribution layer and the chip, and the chip being electrically connected to the conductive lines exposed in the second dielectric layer through the first conductive bump.

12. The packaging structure as described in claim 11, characterized in that, The packaging structure further includes: a bottom fill layer located between the chip and the redistribution layer on the front side of the glass substrate, and the bottom fill layer covers the first conductive bump; The packaging structure further includes: a first molding layer, located on the redistribution layer and surrounding and covering the bottom filler layer and the chip, wherein the first molding layer exposes the top surface of the chip; The packaging structure further includes a second conductive bump located on the exposed conductive line of the first dielectric layer, the second conductive bump being electrically connected to the exposed conductive line of the first dielectric layer.

13. The packaging structure as described in claim 1, characterized in that, The encapsulation structure further includes a second molding layer that covers the sidewalls of the buffer adhesive layer.

14. The packaging structure as described in claim 5, characterized in that, The encapsulation structure further includes a second molding layer that covers the sidewalls of the reinforcing layer.

15. The packaging structure as described in claim 1, characterized in that, The glass substrate includes a wafer-level glass substrate, a chip-level glass substrate, or a glass adapter board.

16. A method for forming an encapsulation structure, characterized in that, include: Provide glass substrates; A buffer adhesive layer is formed around and covers the sidewalls of the glass substrate; After the buffer adhesive layer is formed, a redistribution layer is formed on the front and back sides of the glass substrate, and the redistribution layer is electrically connected to the glass substrate. A chip is disposed on the redistribution layer on the front side of the glass substrate, and the chip is electrically connected to the redistribution layer.

17. The method for forming the packaging structure as described in claim 16, characterized in that, In the step of providing the glass substrate, the glass substrate has through-hole structures; In the step of forming the buffer adhesive layer, the buffer adhesive layer also extends to cover the edge regions of the front and back sides of the glass substrate, and the buffer adhesive layer exposes the interconnect via structure.

18. The method for forming the packaging structure as described in claim 17, characterized in that, The step of forming the buffer adhesive layer includes: coating the sidewalls of the glass substrate and the edge regions of the front and back sides of the glass substrate with a buffer adhesive material layer, and using the buffer adhesive material layer as the buffer adhesive layer.

19. The method for forming the packaging structure as described in claim 17, characterized in that, The process for forming the buffer adhesive layer includes dispensing or vapor deposition.

20. The method for forming the packaging structure as described in claim 16, characterized in that, The material of the buffer adhesive layer includes organic materials, metals, or metal oxides.

21. The method for forming the packaging structure as described in claim 16 or 20, characterized in that, The material of the buffer adhesive layer includes one or more of titanium, chromium, palladium, zinc oxide, and organic adhesives.

22. The method for forming the packaging structure as described in claim 16, characterized in that, After forming the buffer adhesive layer and before forming the redistribution layer, the method further includes: forming a reinforcing layer surrounding the glass substrate; or, After forming the redistribution layer and before setting the chip, the method further includes forming a reinforcing layer surrounding the glass substrate.

23. The method for forming the packaging structure as described in claim 22, characterized in that, In the step of forming the reinforcing layer, the reinforcing layer surrounds the edge region of the front side of the glass substrate; or, In the step of forming the reinforcing layer, the reinforcing layer surrounds the edge region of the back side of the glass substrate; or, In the step of forming the reinforcing layer, the reinforcing layer surrounds the edge regions of the front and back sides of the glass substrate; or, In the step of forming the reinforcing layer, the reinforcing layer surrounds the edge regions of the front and back sides of the glass substrate, as well as the sidewalls of the glass substrate.

24. The method for forming the packaging structure as described in claim 22, characterized in that, The reinforcing layer is made of metallic materials.

25. The method for forming the packaging structure as described in claim 22 or 24, characterized in that, The reinforcing layer is made of one or more of molybdenum, tungsten, chromium, titanium, and copper.

26. The method for forming the packaging structure as described in claim 16, characterized in that, The step of forming redistribution layers on the front and back sides of the glass substrate includes: The glass substrate is bonded to the first temporary carrier through a first temporary bonding layer, and the front side of the glass substrate is opposite to the first temporary carrier. A first dielectric layer and one or more conductive lines are formed on the back side of the glass substrate, and the bottom conductive line is electrically connected to the glass substrate. The first dielectric layer exposes the top conductive line, and the first dielectric layer and one or more conductive lines constitute a redistribution layer on the back side of the glass substrate. Remove the first temporary carrier board and the first temporary bonding layer; The glass substrate is bonded to the second temporary carrier through a second temporary bonding layer, and the back side of the glass substrate is opposite to the second temporary carrier. A second dielectric layer and one or more conductive lines are formed on the front side of the glass substrate, and the bottom conductive line is electrically connected to the glass substrate. The second dielectric layer exposes the top conductive line, and the second dielectric layer and one or more conductive lines constitute a redistribution layer on the front side of the glass substrate.

27. The method for forming the packaging structure as described in claim 26, characterized in that, In the step of setting the chip, a first conductive bump is formed between the chip and the redistribution layer, and the chip is electrically connected to the conductive line through the first conductive bump.

28. The method for forming the packaging structure as described in claim 27, characterized in that, After setting the chip, the method further includes: An underfill layer is formed between the chip and the redistribution layer on the front side of the glass substrate, and the underfill layer covers the first conductive bump; A first molding compound is formed on the redistribution layer to surround and cover the bottom filler layer and the chip, and the first molding compound exposes the top surface of the chip; After the first molding layer is formed, the second temporary carrier and the second temporary bonding layer are removed. A second conductive bump is formed on the conductive line exposed in the first dielectric layer, and the second conductive bump is electrically connected to the conductive line.

29. The method for forming the packaging structure as described in claim 16, characterized in that, The glass substrate includes a wafer-level glass substrate, a chip-level glass substrate, or a glass adapter board.

30. The method for forming the packaging structure as described in claim 29, characterized in that, In the step of providing the glass substrate, when the glass substrate is a chip-level glass substrate, the number of glass substrates is multiple; After forming the buffer adhesive layer and before forming the redistribution layer, the method further includes: forming a second molding layer between adjacent glass substrates, wherein a plurality of glass substrates are reconstructed into unit-level glass substrates through the second molding layer, the second molding layer covering the sidewalls of the buffer adhesive layer, and the top of the second molding layer being flush with the front and back sides of the glass substrates; After setting the chip, the method further includes: forming a molding compound layer covering the chip on the redistribution layer, and cutting the unit-level glass substrate along the second molding compound layer.

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