Doherty power amplifier with reconfigurable output impedance converter

Abstract

The invention relates to a Doherty power amplifier with a reconfigurable output impedance converter. A Doherty power amplifier includes a combining node coupled to a carrier amplifier output and a peaking amplifier output, and a reconfigurable output impedance transformer coupled between the combining node and a radio frequency (RF) output. The combining node is configured to combine the amplified carrier signal and the amplified peak signal to produce a combined amplified signal. The reconfigurable output impedance transformer includes a phase shift element, a first variable capacitor, and a second variable capacitor. The phase shift element has an input end coupled to the combination node and an output end coupled to an RF output, and the phase shift element is configured to apply a phase shift to the combined amplified signal. A first variable capacitor is coupled to the input end of a first phase shift element, and a second variable capacitor is coupled to the output end of the first phase shift element.

Description

TECHNICAL FIELD

[0001] Embodiments of the subject matter described herein relate generally to Doherty power amplifiers. BACKGROUND

[0002] To facilitate radio frequency (RF) communication with mobile units, a cellular base station typically includes one or more fixed RF transceivers coupled to one or more antennas. In some cases, the transmitter and receiver of each RF transceiver are coupled to the antenna through a circulator or RF switch. The circulator or switch is used to direct signals received from the transmitter to the antenna and signals received from the antenna to the receiver.

[0003] Doherty power amplifiers are often used in cellular infrastructure transmitters due to their ability to accommodate signals with high peak-to-average power ratios and have potentially superior RF performance (e.g., high gain, high efficiency, good linearity). To achieve optimal performance, certain aspects of the Doherty power amplifier should be specifically designed based on the expected (or known) load impedance of the base station. For example, the load impedance can depend on the circulator impedance, the antenna impedance, and other factors (e.g., circuit board layout, filter impedance, environmental factors, etc.).

[0004] That is, a particular Doherty power amplifier design can have good RF performance when coupled to the load impedance for which it was designed, but the RF performance of the same Doherty power amplifier design can be diminished if the Doherty power amplifier is coupled to a load having a different load impedance (e.g., when the Doherty power amplifier is coupled to a different circulator or antenna). As a result, amplifier vendors should tailor each Doherty power amplifier design to the known or expected impedance associated with the base station load. This tailoring can consume a significant amount of engineering time for the amplifier vendor. SUMMARY

[0005] According to a first aspect of the present invention, there is provided a Doherty power amplifier comprising:

[0006] a carrier amplifier having a carrier amplifier input and a carrier amplifier output, wherein the carrier amplifier is configured to amplify a carrier signal received at the carrier amplifier input and to produce an amplified carrier signal at the carrier amplifier output;

[0007] a peak amplifier having a peak amplifier input and a peak amplifier output, wherein the peak amplifier is configured to amplify a peak signal received at the peak amplifier input and to produce an amplified peak signal at the peak amplifier output;

[0008] a combining node coupled to the carrier amplifier output and the peak amplifier output, wherein the combining node is configured to combine the amplified carrier signal and the amplified peak signal to produce a combined amplified signal;

[0009] a radio frequency (RF) output; and

[0010] a reconfigurable output impedance transformer coupled between the combining node and the RF output, wherein the reconfigurable output impedance transformer includes

[0011] a first phase shift element having an input terminal coupled to the combining node and an output terminal coupled to the RF output, wherein the first phase shift element is configured to apply a first phase shift to the combined amplified signal,

[0012] a first variable capacitor coupled to the input terminal of the first phase shift element, and

[0013] a second variable capacitor coupled to the output terminal of the first phase shift element.

[0014] In one or more embodiments, the first phase shift is in a range of 15 degrees to 45 degrees.

[0015] In one or more embodiments, the reconfigurable output impedance transformer additionally includes:

[0016] an intermediate node connected to the input terminal of the first phase shift element; and

[0017] a second phase shift element having an input terminal coupled to the combining node, and an output terminal coupled to the intermediate node and the input terminal of the first phase shift element, wherein the second phase shift element is configured to apply a second phase shift to the combined amplified signal.

[0018] In one or more embodiments, the second phase shift is in a range of 0 degrees to 15 degrees.

[0019] In one or more embodiments, the first variable capacitor has a first end coupled to the input terminal of the first phase shift element, and a second end coupled to a ground reference node; and

[0020] the second variable capacitor has a first end coupled to the output terminal of the first phase shift element, and a second end coupled to the ground reference node.

[0021] In one or more embodiments, the reconfigurable output impedance transformer additionally includes:

[0022] a first inductor coupled between the first end of the first variable capacitor and the ground reference node; and

[0023] a second inductor coupled between the first end of the second variable capacitor and the ground reference node.

[0024] In one or more embodiments, the reconfigurable output impedance transformer additionally includes:

[0025] a first fixed capacitor coupled in series with the first variable capacitor between the input terminal of the first phase shift element and the ground reference node; and

[0026] a second fixed capacitor coupled in series with the second variable capacitor between the output terminal of the first phase shift element and the ground reference node.

[0027] In one or more embodiments, the reconfigurable output impedance transformer additionally includes:

[0028] a first inductor coupled between the first end of the first variable capacitor and the ground reference node; and

[0029] a second inductor coupled between the first end of the second variable capacitor and the ground reference node.

[0030] In one or more embodiments, each of the first variable capacitor and the second variable capacitor is a capacitor selected from the group of voltage-controlled variable capacitors, digitally-controlled variable capacitors, and fuse-programmable capacitors.

[0031] In one or more embodiments, each of the first variable capacitor and the second variable capacitor features a tuning ratio of 5.0 or less.

[0032] In one or more embodiments, the RF output is configured to be coupled to a load, the load featuring a load impedance; and

[0033] the combined node features a combined node impedance that is one half or less of the load impedance.

[0034] In one or more embodiments, the RF output is configured to be coupled to a load, the load featuring a load impedance in a range of 40 ohms to 60 ohms; and

[0035] The combining node is characterized by a combining node impedance in the range of 10 ohms to 30 ohms.

[0036] In one or more embodiments, the Doherty power amplifier additionally includes:

[0037] a signal splitter having a splitter input, a first splitter output coupled to the carrier amplifier input, and a second splitter output coupled to the peaking amplifier input, wherein the signal splitter is configured to receive an input RF signal and divide the input RF signal into a carrier RF signal and a peaking RF signal, wherein the carrier RF signal is provided to the carrier amplifier input and the peaking RF signal is provided to the peaking amplifier input; and

[0038] a phase shift and impedance inversion element coupled between the carrier amplifier output and the combining node.

[0039] These and other aspects of the present invention will become evident to those skilled in the art, upon the reading of the following embodiments, and reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0040] A more complete understanding of the subject matter can be obtained by reference to the following detailed description when taken in conjunction with the accompanying drawings, wherein like reference numerals indicate like elements throughout the figures.

[0041] Figure 1 is a simplified block diagram of an example RF transceiver system;

[0042] Figure 2 is a simplified block diagram of another example RF transceiver system;

[0043] Figure 3 is a schematic diagram of a Doherty power amplifier having a reconfigurable output impedance transformer according to an example embodiment;

[0044] Figure 4 is a Smith chart illustrating a tuning diagram for an embodiment of a reconfigurable output transformer according to an example embodiment;

[0045] Figure 5A is a plot charting return loss versus reflection coefficient for an example embodiment of a Doherty power amplifier;

[0046] Figure 5B is a plot charting insertion loss versus phase shift for an example embodiment of a Doherty power amplifier;

[0047] Figure 5C is a plot charting capacitance tuning ratio versus phase shift for an example embodiment of a Doherty power amplifier;

[0048] Figure 6 is a schematic diagram of a Doherty power amplifier with a reconfigurable output impedance transformer according to another example embodiment;

[0049] Figure 7 is a schematic diagram of a Doherty power amplifier with a reconfigurable output impedance transformer according to yet another example embodiment;

[0050] Figure 8 is a schematic diagram of a Doherty power amplifier with a reconfigurable output impedance transformer according to yet another example embodiment;

[0051] Figure 9 is a top view of a physical implementation of a Doherty power amplifier module with a reconfigurable output impedance transformer according to an example embodiment;

[0052] Figure 10 includes two graphs comparing RF performance metrics of a Doherty power amplifier with a fixed output impedance transformer to embodiments of a Doherty power amplifier with a reconfigurable output impedance transformer; and

[0053] Figure 11 is a flowchart of a method for configuring embodiments of a reconfigurable output impedance transformer. DETAILED DESCRIPTION

[0054] Embodiments of the inventive subject matter include Doherty power amplifiers having a reconfigurable output impedance transformer (e.g., impedance transformer 380, 680, 780, 880, 980) coupled between a combining node of an amplifier and an RF output. The reconfigurable output impedance transformer is designed to transform a target load impedance range to a target impedance at the combining node. Figure 3 , 6 -9. The reconfigurable output impedance transformer is designed to transform a target load impedance range to a target impedance at the combining node.

[0055] In one or more embodiments, the reconfigurable output impedance transformer includes a phase shift element (e.g., an inductor and / or a transmission line having a particular electrical length), a first variable capacitor, and a second variable capacitor. The phase shift element has an input terminal coupled to the combining node and an output terminal coupled to the RF output. The first variable capacitor is coupled to the input terminal of the phase shift element, and the second variable capacitor is coupled to the output terminal of the phase shift element. By adjusting the capacitance values of the first and second variable capacitors, the reconfigurable output impedance transformer can be tuned to provide good impedance matching between the combining node (e.g., characterized by an impedance between about 10 ohms and 30 ohms) and a load coupled to the RF output (e.g., characterized by an impedance between about 40 ohms and 60 ohms).

[0056] Compared to conventional Dougherty amplifiers with fixed output impedance transformers, embodiments that include a reconfigurable output impedance transformer between the combination node and the RF output offer several advantages. For example, the ability to adjust the capacitance value of the reconfigurable output impedance transformer allows the Dougherty amplifier to adapt to a range of load impedances. By including two tunable capacitors separated by phase-shifting elements, a nearly orthogonal two-dimensional impedance tuning profile can be implemented, which covers substantially all phases of the target load VSWR (Variable Standing Wave Ratio). Furthermore, the reconfigurable output impedance transformer can be designed with a variable capacitor having a relatively small capacitance tuning ratio. Additionally, the reconfigurable output impedance transformer can be designed with relatively low insertion loss. Therefore, the embodiments of the Dougherty power amplifier disclosed herein are adaptable to RF signals with high peak-to-average power ratios and possess potentially superior RF performance (e.g., high gain, high efficiency, good linearity).

[0057] Figure 1 This is a simplified block diagram of an example RF transceiver system 100, which includes an RF switch 110, a transmitter 120, a receiver 130, an antenna 140, and an RF switch controller 150. The transceiver system 100 is a half-duplex transceiver, wherein at any given time, only one of the transmitter 120 or the receiver 130 is coupled to the antenna 140 via the RF switch 110. More specifically, the state of the RF switch 110 is controlled by the RF switch controller 150 to alternate between coupling an RF transmit signal generated by the transmitter 120 to the antenna 140 or coupling an RF receive signal received by the antenna 140 to the receiver 130.

[0058] Transmitter 120 may include, for example, a transmit (TX) signal processor 122 and a power amplifier 124 (e.g., Figure 3 and 6 -8 (any one of the Dougherty power amplifiers 300, 600, 700, 800). Transmit signal processor 122 is configured to generate a transmit signal and provide it to power amplifier 124. Power amplifier 124 amplifies the transmit signal and provides the amplified transmit signal to RF switch 110. Receiver 130 may include, for example, receive amplifier 132 (e.g., a low-noise amplifier) ​​and receive (RX) signal processor 134. Receive amplifier 132 is configured to amplify the relatively low-power received signal from RF switch 110 and provide the amplified received signal to receive signal processor 134. Receive signal processor 134 is configured to consume or process the received signal.

[0059] During each transmission time interval, when transceiver 100 is in "transmit mode", RF switch controller 150 controls RF switch 110 to be in the first or "transmit" state, such as...Figure 1 depicted, a conductive transmit signal path is established between the transmitter node 128 and the antenna node 148, and wherein the receive signal path between the antenna node 148 and the receiver node 138 is in a high impedance state (e.g., open circuit). Conversely, during each receive time interval, when the transceiver 100 is in a "receive mode," the RF switch controller 150 controls the RF switch 110 to be in a second or "receive" state, in which a conductive receive signal path is established between the antenna node 148 and the receiver node 138, as indicated by the dashed line in FIG. 1, and wherein the transmit signal path between the transmitter node 128 and the antenna node 148 is in a high impedance state (e.g., open circuit). Figure 1 depicted, a conductive transmit signal path is established between the transmitter node 128 and the antenna node 148, and wherein the receive signal path between the antenna node 148 and the receiver node 138 is in a high impedance state (e.g., open circuit). Conversely, during each receive time interval, when the transceiver 100 is in a "receive mode," the RF switch controller 150 controls the RF switch 110 to be in a second or "receive" state, in which a conductive receive signal path is established between the antenna node 148 and the receiver node 138, as indicated by the dashed line in FIG. 1, and wherein the transmit signal path between the transmitter node 128 and the antenna node 148 is in a high impedance state (e.g., open circuit).

[0060] Figure 2 is a simplified block diagram of another example of an RF transceiver system 200 that includes an RF switch 210, a circulator 216, a transmitter 220, a receiver 230, an antenna 240, and an RF switch controller 250. The transmitter 220 and the receiver 230 are coupled to the antenna 240 through the circulator 216. More specifically, the circulator 216 is a three-port device in which a first port 217 is coupled to the transmitter 220, a second port 218 is coupleable to the receiver 230 through the RF switch 210, and a third port 219 is coupled to the antenna 240. The RF switch 210 is also a three-port device in which a first port 248 is coupled to the receiver port 218 of the circulator 216, a second port 238 is coupled to the receiver 230, and a third port 228 is coupled to a ground reference node 254 through a resistor 256.

[0061] Likewise, the transmitter 220 can include, for example, a TX signal processor 222 and a power amplifier 224 (e.g., a Doherty power amplifier 300, 600, 700, 800 of FIGS. 8-8). The TX signal processor 222 is configured to generate a transmit signal and provide the transmit signal to the power amplifier 224. The power amplifier 224 amplifies the transmit signal and provides the amplified transmit signal to the antenna 240 through the circulator 216. The receiver 230 can include, for example, a receive amplifier 232 (e.g., a low noise amplifier) and a RX signal processor 234. The receive amplifier 232 is configured to amplify a relatively low power received signal received from the antenna 240 (through the circulator 216 and the RF switch 210) and provide the amplified received signal to the RX signal processor 234. The RX signal processor 234 is configured to consume or process the received signal. Figure 3 and 6 Likewise, the transmitter 220 can include, for example, a TX signal processor 222 and a power amplifier 224 (e.g., a Doherty power amplifier 300, 600, 700, 800 of FIGS. 8-8). The TX signal processor 222 is configured to generate a transmit signal and provide the transmit signal to the power amplifier 224. The power amplifier 224 amplifies the transmit signal and provides the amplified transmit signal to the antenna 240 through the circulator 216. The receiver 230 can include, for example, a receive amplifier 232 (e.g., a low noise amplifier) and a RX signal processor 234. The receive amplifier 232 is configured to amplify a relatively low power received signal received from the antenna 240 (through the circulator 216 and the RF switch 210) and provide the amplified received signal to the RX signal processor 234. The RX signal processor 234 is configured to consume or process the received signal.

[0062] Circulator 216 is characterized by signal conduction directionality, indicated by arrows within a drawing of circulator 216. Essentially, RF signals can be transmitted between circulator ports 217-219 in the indicated direction (counter-clockwise), rather than in the opposite direction (clockwise). Therefore, during normal operation, signals can be transmitted through circulator 216 from transmitter port 217 to antenna port 219, and from antenna port 219 to receiver port 218, rather than directly from transmitter port 217 to receiver port 218 or from receiver port 218 to antenna port 219.

[0063] In some cases, when transceiver 200 is in transmit mode, circulator 216 may be unable to transfer signal energy received from transmitter 220 via transmitter port 217 to antenna 240 through antenna port 219. For example, antenna 240 may be disconnected from antenna port 219 or may otherwise be in a state of extremely high impedance. In such cases, circulator 216 may transfer signal energy from transmitter 220 (i.e., signal energy received through transmitter port 217) through antenna port 219 to receiver port 218. To avoid transferring transmitter signal energy to receiver 230 when transceiver 200 is in transmit mode, RF switch controller 250 uses RF switch 210 as a fault-protected switch by coupling first port 248 to ground reference node 254.

[0064] More specifically, when transceiver 200 is in receive mode, RF switch controller 250 controls RF switch 210 to be in receive state, such as... Figure 2 As shown. In receive mode, receiver port 218 of circulator 216 is coupled to receiver 230 via RF switch 210 (i.e., RF switch controller 250 configures RF switch 210 to have a conductive path between ports 248 and 238, and a high-impedance open-circuit condition between ports 248 and 228). Conversely, when transceiver 200 is in transmit mode, RF switch controller 250 controls RF switch 210 to be in transmit mode, wherein receiver port 218 of circulator 216 is coupled to ground terminal 254 via RF switch 210 through resistor 256 (i.e., RF switch controller 250 configures RF switch 210 to have a conductive path between ports 248 and 228). Figure 2 The conduction path is indicated by the dashed line in the diagram, and there is a high impedance open-circuit condition between ports 248 and 238. Therefore, if the transmitter signal energy bypasses the antenna port 219 when the transceiver 200 is in transmit mode, any signal energy delivered to the RF switch 210 via the receiver port 218 of the circulator 216 will be shunted to the ground terminal 254 via port 228 of the RF switch 210.

[0065] As indicated above, a wireless transmitter (e.g., Figure 1 , 2 The transmit power amplifier in the transmitter 120, 220) (e.g., Figure 1 , 2 Amplifiers 124, 224) may be Dougherty power amplifiers. According to one or more embodiments, the Dougherty power amplifier may include a reconfigurable output impedance transformer (e.g., Figure 3 , 6 -8 Reconfigurable output impedance transformers (380, 680, 780, 880). As will be explained in more detail below, the reconfigurable output impedance transformers allow the Dougherty power amplifier to be "tuned" to ensure good RF performance over the target load impedance range.

[0066] For example, Figure 3 A simplified schematic diagram of a Dougherty power amplifier 300 according to an embodiment is shown. The Dougherty power amplifier 300 can be used in... Figure 1 , 2 It can be used in transmitters 120 and 220, or in other types of RF transmitters.

[0067] The Dougherty power amplifier 300 includes an RF input 302, an RF output 304, a signal splitter 310, a carrier amplification path 320, a peak amplification path 350, a combination node 370, and a reconfigurable output impedance transformer 380. The carrier amplification path 320 includes an input impedance matching network (IMN) 324, a carrier amplifier 330, and phase shift and impedance inversion elements 340. The peak amplification path 350 includes a phase shift element 352, an input impedance matching network (IMN) 354, and a peak amplifier 360.

[0068] In short, during operation of the Dougherty power amplifier 300, the power of the input RF signal provided at RF input 302 is split into a carrier RF signal and a peak RF signal by the signal splitter 310. The carrier RF signal is amplified along carrier amplification path 320, and the peak RF signal is amplified along peak amplification path 350. Typically, carrier amplifier 330 and peak amplifier 360 are primary active components that provide signal amplification along carrier amplification path 320 and peak amplification path 350, respectively. The amplified carrier RF signal and peak RF signal are combined at combination node 370 and delivered to RF output 304 via reconfigurable output impedance transformer 380.

[0069] When incorporated into a larger system (e.g., a wireless communication system), the load is coupled to RF output 304. For example, as combined with... Figure 1 and 2 The load discussed may include an RF switch (e.g.,Figure 1 RF switch 110) and antenna (e.g., Figure 1 Antenna 140). Alternatively, the load may include a circulator (e.g., Figure 2 Circulator 216) and antenna (e.g., Figure 2 Antenna 240) or another type of load. In short, the load is characterized by its load impedance, which is in Figure 3 The middle indicator is the Z at RF output 304. L Note here the impedance Z at the combined node 370. N Not equal to load impedance Z L Typically, the combined node impedance Z N Depending on the amplifier power, transistor technology, and drain voltage, during operation of the Dougherty power amplifier 300, the reconfigurable output impedance transformer 380 is configured to convert the load impedance Z at output 304. L Transformed into impedance Z at composite node 370 N .

[0070] The Dougherty power amplifier 300 is considered a “bidirectional” Dougherty power amplifier, which includes a carrier amplification path 320 and a peak amplification path 350. In other embodiments, the Dougherty power amplifier 300 may include one or more additional peak amplification paths (not shown) connected in parallel with the peak amplification path 350.

[0071] Furthermore, in various embodiments, the Dougherty power amplifier 300 can be a "symmetric" or "asymmetric" amplifier. When the Dougherty power amplifier 300 is a "symmetric" amplifier, the relative sizes of the carrier power amplifier 330 and the peak power amplifier 360 are approximately equal. Conversely, when the Dougherty power amplifier 300 is an "asymmetric" amplifier, the relative sizes of the carrier power amplifier 330 and the peak power amplifier 360 are different. Typically, in an asymmetric Dougherty power amplifier, the peak power amplifier 360 is larger than the carrier power amplifier 330.

[0072] More specifically, as used herein, when referring to the physical characteristics of a power amplifier or power transistor, the term "size" refers to the peripheral device or current-carrying capacity of the transistor associated with said amplifier or transistor. When referring to the relative sizes of the carrier amplifier 330 and the peak amplifier 360, the term "symmetric" means that the size of the power transistor forming the carrier amplifier 330 is substantially equal to the size of the power transistor forming the peak amplifier 360 (i.e., the difference is within 5%). Conversely, the term "asymmetric" means that the size of the power transistor forming the carrier amplifier 330 is significantly different from the size of the power transistor forming the peak amplifier 360 (e.g., the size of the power transistor forming the peak amplifier 360 is 50% to 100% or greater than the size of the power transistor forming the carrier amplifier). Thus, for example, when the ratio of the carrier amplifier size to the peak amplifier size (or "carrier to peak ratio") is expressed as x:y (where x corresponds to the relevant carrier amplifier size and y corresponds to the relevant peak amplifier size), according to the above definition, a 1:1 ratio would be symmetric, and a 1:2 ratio would be asymmetric.

[0073] The configuration of the Dougherty power amplifier 300 will now be discussed in more detail. The RF input 302 is configured (e.g., from...) Figure 1 , 2 The TX signal processors 122 and 222 receive the input RF signal and provide the input RF signal to the signal splitter 310.

[0074] Signal splitter 310 can have any of a variety of configurations. For example, signal splitter 310 can be a splitter selected from Wilkinson type splitters, hybrid quadrature splitters, or other suitable types of splitters. In summary, signal splitter 310 has an input 312 coupled to RF input 302 and two outputs 313, 314. A first signal splitter output 313 is coupled to carrier amplification path 320, and a second signal splitter output 314 is coupled to peak amplification path 350. Signal splitter 310 is configured to receive the input RF signal from RF input 302 at input 312 and divide the power of the input RF signal into a carrier input RF signal and a peak input RF signal. Signal splitter 310 is further configured to provide the carrier input RF signal to carrier amplification path 320 at the first signal splitter output 313 and to provide the peak input RF signal to peak amplification path 350 at the second signal splitter output 314.

[0075] During operation of the amplifier 300 in a relatively low power mode (i.e., when the power of the input RF signal is below a threshold), only the carrier amplification path 320 supplies current to the load (through the RF output 304). In such cases, the RF signal level at the peak amplifier input 361 is below the threshold to turn on the peak amplifier 360. Thus, the combined power from the carrier amplifier 330 and the peak amplifier 360 is substantially from the carrier amplification path 320. Conversely, during operation of the amplifier 300 in a relatively high power mode (i.e., when the power of the input RF signal is above a threshold), both the carrier amplification path 320 and the peak amplification path 350 supply current to the load (through the RF output 304). In such cases, the RF signal level at the peak amplifier input 361 is above the threshold to turn on the peak amplifier 360. Thus, both the carrier amplifier path 320 and the peak amplifier path 350 contribute to the combined power.

[0076] The signal splitter 310 divides the power of the input RF signal according to the carrier-to-peak size ratio. For example, when the Doherty power amplifier 300 has a symmetric configuration in which the sizes of the carrier amplifier 330 and the peak amplifier 360 are substantially equal (i.e., the carrier-to-peak size ratio of the Doherty power amplifier 300 is 1 : 1), the signal splitter 310 can divide the power of the input RF signal such that about half of the input RF signal power is provided to the carrier amplification path 320 and about half of the input RF signal power is provided to the peak amplification path 350. Conversely, when the Doherty power amplifier 300 has an asymmetric configuration (e.g., when the carrier-to-peak size ratio of the Doherty power amplifier 300 is 1 : x, where x > 1), the signal splitter 310 can divide the power unequally. For example, when the carrier-to-peak size ratio of the Doherty power amplifier 300 is 1 : 2, the signal splitter 310 can divide the power of the input RF signal such that one-third of the input signal power is provided to the carrier amplification path 320 and two-thirds of the input signal power is provided to the peak amplification path 350.

[0077] The carrier amplification path 320 is coupled between the first splitter output 313 and the combining node 370. The carrier amplification path 320 includes a carrier input matching network (IMN) 334, a carrier amplifier 330, and a phase shift and impedance inversion element 340. The carrier IMN 324 is configured to increase circuit impedance in an incremental manner. For example, and without limitation, the carrier IMN 324 can include a low-pass or bandpass circuit, e.g., configured as a T-type or a pi-type impedance matching network.

[0078] The carrier amplifier 330 has a carrier amplifier input 331 (e.g., a gate terminal) and two current-carrying terminals (e.g., a drain terminal and a source terminal). The carrier amplifier input 331 is coupled to the carrier IMN 324. One current-carrying terminal of the carrier amplifier 330 (e.g., the drain terminal) serves as a carrier amplifier output 332 at which the carrier amplifier 330 produces an amplified carrier signal. The other current-carrying terminal of the carrier amplifier 330 (e.g., the source terminal) can be coupled to a ground reference node.

[0079] The carrier amplifier 330 can include a single-stage amplifier (i.e., an amplifier having a single amplification stage or power transistor). In other embodiments, the carrier amplifier 330 can include a two-stage amplifier that includes a relatively low-power driver amplifier (e.g., amplifier 936 of FIG. 9) and a relatively high-power final amplifier (e.g., amplifier 937 of FIG. 9) connected in a cascaded (or series) arrangement between the carrier amplifier input and the carrier amplifier output. Figure 9 Figure 9 In the carrier amplifier cascaded arrangement, the output (e.g., drain terminal) of the driver amplifier is electrically coupled to the input (e.g., gate terminal) of the final amplifier.

[0080] The output 332 (e.g., drain terminal) of the carrier amplifier 330 is electrically coupled to the combining node 370 through a phase shift and impedance inversion element 340. The output 332 of the carrier amplifier 330 features an impedance Z C .

[0081] According to embodiments, the phase shift and impedance inversion element 340 is configured to apply a phase shift to the amplified carrier signal and also supply impedance inversion to ensure proper Doherty amplifier operation. For example, the phase shift and impedance inversion element 340 can include a transmission line and one or more passive electrical components that produce the desired phase shift and impedance inversion. According to one or more embodiments, the phase shift and impedance inversion element 340 can have an electrical length of about 90 degrees.

[0082] The peak amplification path 350 is coupled between the second splitter output 314 and the combining node 370. The peak amplification path 350 includes a phase shift element 352, a peak IMN 354, and a peak amplifier 360.

[0083] ​As a control rule, the electrical length of the carrier amplification path 320 should equal the electrical length of the peak amplification path 350. Accordingly, the phase shift element 352 is configured to compensate for the phase shift imposed along the carrier amplification path 320 (e.g., by the phase shift and impedance inversion element 340) to ensure that the amplified carrier signal and the peak signal arrive at the combination node 370 in phase. For example, the phase shift element 352 can include a transmission line and / or various passive components configured to impose a particular phase shift on the peak signal, thereby causing the in-phase combination of the carrier signal and the peak signal at the combination node 370. For example, the phase shift element 352 can include a transmission line and one or more passive electrical components that produce a desired phase shift. According to one or more embodiments, the phase shift element 352 can have an electrical length of about 90 degrees.

[0084] The peak IMN 354 is configured to increase the circuit impedance in an incremental manner. For example, and without limitation, the peak IMN 354 can include a low-pass or band-pass circuit, e.g., configured as a T-type or a pi-type impedance matching network.

[0085] The peak amplifier 360 has a peak amplifier input 361 (e.g., a gate terminal) and two current carrying terminals (e.g., a drain terminal and a source terminal). The peak amplifier input 361 is coupled to the peak IMN 354. One current carrying terminal of the peak amplifier 360 (e.g., the drain terminal) serves as a peak amplifier output 362 at which the peak amplifier 360 produces an amplified peak signal. The other current carrying terminal of the peak amplifier 360 (e.g., the source terminal) can be coupled to a ground reference node.

[0086] The peak amplifier 360 can include a single stage amplifier (i.e., an amplifier having a single amplification stage or power transistor). In other embodiments, the peak amplifier 360 can include a two-stage amplifier that includes a relatively low power driver amplifier (e.g., an amplifier 956 of Figure 9 ) and a relatively high power final stage amplifier (e.g., an amplifier 957 of Figure 9 ) connected in a cascaded (or series) arrangement between the peak amplifier input and the peak amplifier output. In the peak amplifier cascaded arrangement, the output (e.g., the drain terminal) of the driver amplifier is electrically coupled to the input (e.g., the gate terminal) of the final stage amplifier.

[0087] The output 362 (e.g., the drain terminal) of the peak amplifier 360 is electrically coupled to the combination node 370. The combination node 370 is configured to combine the amplified carrier signal and the amplified peak signal to produce a combined amplified signal. The output 362 of the peak amplifier 360 is characterized by an impedance Z P .

[0088] Although Figure 3DC bias circuits are not shown, but various DC bias circuits are coupled to the inputs 331, 361 and outputs 332, 362 of the carrier amplifier 330 and the peaking amplifier 360 to deliver DC bias voltages that will ensure proper operation of the Doherty power amplifier 300. More specifically, during operation of the Doherty power amplifier 300, the carrier amplifier 330 is biased to operate in an AB class mode or a deep AB class mode, and the peaking amplifier 360 is biased to operate in a class C mode or a deep class C mode.

[0089] At low to moderate input signal power levels (i.e., where the power of the input signal at the RF input 302 is below the turn-on threshold level of the peaking amplifier 360), the Doherty power amplifier 300 operates in a low power mode in which the carrier amplifier 330 is used to amplify the input signal and the peaking amplifier 360 is minimally turned on (e.g., the peaking amplifier 360 is substantially in an off state). Conversely, as the input signal power increases to a level at which the carrier amplifier 330 reaches voltage saturation, the signal splitter 310 divides the energy of the input signal between the carrier amplifier path 320 and the peaking amplifier path 350, and both amplifiers 330, 360 are used to amplify their respective portions of the input signal.

[0090] As the input signal level increases beyond the level at which the carrier amplifier 330 operates in compression, the degree to which the peaking amplifier 360 is turned on also increases, thereby supplying more current to the reconfigurable output impedance transformer 380 and the load. In response, the load line impedance of the carrier amplifier output decreases. In effect, an impedance modulation effect occurs in which the load line of the carrier amplifier 330 dynamically changes in response to the input signal power (i.e., the peaking amplifier 360 provides an active load that pulls on the carrier amplifier 330). The phase shift and impedance inversion element 340 transforms the carrier amplifier load line impedance to a high value at backoff, thereby allowing the carrier amplifier 330 to efficiently power the reconfigurable output impedance transformer 380 and the load over an extended output power range.

[0091] As mentioned above, the impedance Z N at the combining node 370 is generally not equal to the load impedance Z L at the RF output 304. The reconfigurable output impedance transformer 380 is used to transform the load impedance Z L at the output 304 to the combining node impedance Z N at the combining node 370. In addition, the transformer 380 can be reconfigured to reduce the impedance variation (e.g., from -14 dB return loss to -35 dB return loss), as will be discussed below.

[0092] The Doherty power amplifier 300 is designed to operate with loads having a specific nominal load impedance (e.g., 50 ohms at RF output 304 or some other value). However, the actual load impedance Z at output 304 is... L It may vary significantly (e.g., with antenna impedance, filter impedance, circulator impedance, board layout, etc.). During operation of the Dougherty power amplifier 300, the reconfigurable output impedance transformer 380 is configured to change the load impedance Z at output 304. L The target range is transformed into the target impedance Z at the combined node 370. N .

[0093] According to one or more embodiments, the reconfigurable output impedance transformer 380 is configured to convert the load impedance Z at output 304. L Transformed into the combined node impedance Z at combined node 370 N The combined node impedance Z N It can be the load impedance Z L Half or less. For example, the load impedance Z L Typically, it can be in the range of approximately 40 ohms to approximately 60 ohms (e.g., approximately 50 ohms), and the combined node impedance Z N The impedance can be in the range of about 10 ohms to about 30 ohms (e.g., about 12 ohms or about 20 ohms), but the load impedance and / or combined node impedance can also be lower or higher. In some embodiments, the reconfigurable output impedance transformer 380 can be configured to reduce the load impedance Z at output 304. L Transformed into the combined node impedance Z at combined node 370 N The combined node impedance Z N Greater than the load impedance Z L Half of it. In some cases, Z N It can be greater than 50 ohms.

[0094] Conventional Dougherty power amplifiers have a fixed output converter optimized for a specific load impedance (e.g., 50 ohms). The Dougherty power amplifier experiences its optimal RF performance when the actual load has an impedance equal to the load impedance for which it is designed. However, the RF performance of a conventional Dougherty power amplifier may be degraded when the actual load has a different impedance than the load impedance for which it is designed. In some systems, an impedance tuner can be inserted between the Dougherty power amplifier output and the load to correct the impedance so that the amplifier experiences 50 ohms. However, such impedance tuners are characterized by relatively high insertion losses (e.g., >0.3 dB), which degrade RF performance. Furthermore, such impedance tuners are not part of the output converter.

[0095] In contrast, according to one or more embodiments, the reconfigurable output impedance transformer 380 includes fixed and variable components that enable the transformer 380 to transform a range of load impedances to an impedance at the combining node 370 without significant insertion loss. More specifically, the reconfigurable output impedance transformer 380 includes a first phase shift element 381 and a second phase shift element 386 coupled in series between the combining node 370 and the RF output 304, with an intermediate node 382 between the first phase shift element 381 and the second phase shift element 386. In addition, the reconfigurable output impedance transformer 380 includes a first variable capacitor 383 (or capacitor network) coupled in a shunt configuration between the intermediate node 382 and a ground reference node, and a second variable capacitor 387 (or capacitor network) coupled in a shunt configuration between the RF output 304 and the ground reference node. More specifically, a first end of the first variable capacitor 383 is coupled to (e.g., indirectly or directly connected to) the intermediate node 382 (i.e., the output terminal of the phase shift element 381 and the input terminal of the phase shift element 386), and a second end of the first variable capacitor 383 is coupled to (e.g., indirectly or directly connected to) the ground reference node. Similarly, a first end of the second variable capacitor 387 is coupled to (e.g., indirectly or directly connected to) the RF output 304 (i.e., the output terminal of the phase shift element 386), and a second end of the second variable capacitor 387 is coupled to (e.g., indirectly or directly connected to) the ground reference node.

[0096] As used herein, the term "shunt" means electrically coupled between a circuit node and a ground reference node (or other DC voltage reference). The ground reference node can be, for example, a conductive feature of a physical implementation of the Doherty power amplifier 300 configured to be coupled to a system ground.

[0097] Each of the first phase shift element 381 and the second phase shift element 386 can include a transmission line segment and / or an inductor. The first phase shift element 381 is characterized by a first impedance Z1 and a first phase shift Θ1 between the combined node 370 and the intermediate node 382 (or between the input terminal and the output terminal of the element 381) at the center operating frequency f0 of the amplifier 300. The second phase shift element 386 is characterized by a second impedance Z2 and a second phase shift Θ2 between the intermediate node 382 and the RF output 304 (or between the input terminal and the output terminal of the element 386) at the center operating frequency f0 of the amplifier 300. According to one or more embodiments, the first impedance Z1 can be in a range of about 20 to about 100, and the second impedance Z2 can be in a range of about 20 to about 100. The first phase shift Θ1 and the second phase shift Θ2 correspond to a first electrical length and a second electrical length of the phase shift elements 381, 386 (between the input terminal and the output terminal) at the operating fundamental frequency f0. According to an embodiment, the first phase shift Θ1 can be in a range of about 0 degrees to about 15 degrees, and the second phase shift Θ2 can be in a range of about 15 degrees to about 45 degrees.

[0098] Each of the first variable capacitor 383 and the second variable capacitor 387 can be implemented with a tunable capacitor such as, but not limited to, a voltage variable capacitor (VVAC), a digitally variable capacitor (DVC) (also known as a digitally programmable capacitor or a digitally tunable capacitor), a fuse programmable capacitor bank, or another suitable tunable / variable capacitor. The capacitance values of the first variable capacitor 383 and the second variable capacitor 387 can be adjusted by performing an appropriate tuning process. For example, a VVAC is a component that has a capacitance value between a first terminal and a second terminal that can be varied according to a control voltage applied to a tuning input (not shown). A DVC is a component that has a capacitance value between a first terminal and a second terminal that can be varied based on a digital value programmed into a digital register of the DVC (e.g., via a serial interface not shown). For example, a DVC can be implemented with a switched capacitor array. The RF switches in the DVC can be semiconductor switches such as gallium arsenide (GaAs), gallium nitride (GaN), or silicon on insulator (SOI) switches, or, alternatively, the RF switches can be switching devices that use a phase change material (PCM) such as germanium telluride (GeTe) or germanium antimony telluride (GeSbTe). Any other suitable RF switching technology can be used instead. Finally, a fuse programmable capacitor bank is a component that includes a network of capacitors and fuses (not shown), and adjusting the capacitance value includes blowing certain ones of the fuses to obtain a desired capacitance value.

[0099] Regardless of the type of variable capacitor used for the first variable capacitor 383 and the second variable capacitor 387, each of the variable capacitors 383, 387 is characterized by a range of capacitance tuning and a corresponding ratio of capacitance tuning. The range of capacitance tuning specifies a range of capacitances (between a minimum capacitance and a maximum capacitance) that each variable capacitor 383, 387 can provide, and the ratio of capacitance tuning corresponds to the ratio of the maximum capacitance to the minimum capacitance. For example, the first variable capacitor 383 has a range of capacitance tuning between a minimum capacitance C MIN1 and a maximum capacitance C MAX1 , where the ratio of capacitance tuning is C MAX1 / C MIN1 . Similarly, the second variable capacitor 387 has a range of capacitance tuning between a minimum capacitance C MIN2 and a maximum capacitance C MAX2 , where the ratio of capacitance tuning is C MAX2 / C MIN2 . Generally, a variable capacitor with a relatively small ratio of capacitance tuning (e.g., 5.0 or less) can have lower insertion loss, or can be smaller and less expensive than a variable capacitor with a relatively large range of capacitance (e.g., 8 or more). Thus, it can be desirable to configure the reconfigurable output impedance transformer 380 such that the relatively small ratios of capacitance tuning of the first variable capacitor 383 and the second variable capacitor 387 can be utilized to achieve the targeted tunable impedance range of the reconfigurable output impedance transformer 380.

[0100] In one or more embodiments, each of the first variable capacitor 383 and the second variable capacitor 387 can be tunable to a plurality of discrete capacitance values between its minimum capacitance value and its maximum capacitance value. In other words, each of the first variable capacitor 383 and the second variable capacitor 387 can have a predetermined number of different tuning states. For example, in some embodiments, each of the first variable capacitor 383 and the second variable capacitor 387 can have 8 to 32 different tuning states (capacitance values). In other embodiments, each of the first variable capacitor 383 and the second variable capacitor 387 can have fewer or more different tuning states, or each of the first variable capacitor 383 and the second variable capacitor 387 can be continuously variable to any capacitance value between its minimum capacitance and its maximum capacitance.

[0101] The impedance range that the converter 380 can tune between is related to the capacitance tuning range of capacitors 383 and 387 and the phase shift θ2 associated with the second phase shift element 386. When properly selected, the two variable capacitors 383 and 387, separated by the second phase shift θ2, can achieve adequate compensation for load gamma variation over the entire 360-degree reflection coefficient. According to one or more embodiments, the characteristic phase shift θ2 of the second phase shift element 386 is selected such that when the capacitance values ​​of the two variable capacitors 383 and 387 are adjusted, the variable capacitors 383 and 387 are tuned in an approximately orthogonal manner to map the desired impedance range. According to one or more embodiments, and as mentioned above, the phase shift θ2 associated with the phase shift element 386 can be selected to be in the range of about 15 degrees to about 45 degrees. Alternatively, selecting the phase shift element 386 with a phase shift θ2 in a narrower range of about 25 degrees to about 35 degrees may result in a nearly orthogonal tuning capability with respect to the variable capacitors 383 and 387.

[0102] For example, now refer to Figure 4 , Figure 4 It is the Smith chart 400, which shows a second phase-shifting element (e.g., Figure 3 The reconfigurable output impedance converter (e.g., component 386) Figure 3 The load reflection coefficient (or S22 or gamma) tuning diagram of the reconfigurable converter 380) is shown, with the second phase shift element characterized by a phase shift of approximately 30 degrees θ2. The Smith chart 400 is normalized to the load impedance Z. L (That is, the center 402 of the Smith chart 400 corresponds to the load impedance Z) L ).

[0103] According to one or more embodiments, the reconfigurable output impedance transformer 380 is designed to adapt to a load impedance Z with a reflection coefficient (S22) up to 0.2 (approximately -14 dB return loss). L The reflection coefficient can be corrected for approximately -35 dB of return loss or less over the entire 360-degree reflection coefficient range (S11). In the Smith chart 400, the target reflection coefficient range (gamma range) of 0.2 is indicated by the target gamma circle 410.

[0104] By adjusting the variable capacitor (e.g., Figure 3 Impedance adjustment is achieved by adjusting the capacitance values ​​of capacitors 383 and 387. A grid 420 superimposed on the target gamma circle 410 indicates the load impedance Z. L The reconfigurable output impedance transformer 380 can be adjusted within the range of Z to adjust the load impedance Z. L Transformed into combined node impedance Z NIn grid 420, the 16 roughly vertical impedance arcs correspond to the first variable capacitor (e.g., Figure 3 The capacitor 383) has 16 different tuning states (capacitance values), and 16 roughly horizontal impedance arcs correspond to the second variable capacitor (e.g., Figure 3 The capacitor 387 has 16 different tuning states (capacitance values). In other words, when the first variable capacitor and the second variable capacitor (e.g., Figure 3 When each of the capacitors 383 and 387 has 16 tuning states (i.e., each capacitor 383 and 387 can be tuned to any of 16 different capacitance values), the grid 420 reflects the tuning capability.

[0105] To achieve the combined node impedance Z N Adjust the given load impedance Z at any position falling within the target gamma circle 410. L The first variable capacitor can be adjusted (e.g., Figure 3 The capacitance value of capacitor 383 is adjusted to move the impedance in a desired direction along a horizontal arc (e.g., as indicated by arrow 422), and the capacitance value of the second variable capacitor (e.g., Figure 3 The capacitance value of capacitor 387 is adjusted to move the impedance in the desired direction along a vertical arc (e.g., as indicated by arrow 424).

[0106] refer to Figure 5A The magnitude of the impedance correction can be observed more intuitively. Figure 5A It describes the load impedance Z L The combined node impedance is approximately 50 ohms. N For a converter with approximately 12 ohms (e.g., Figure 3 The load pulling results of the converter 380 are shown in Figure 500. For all phases, the load pulling is performed at approximately 0.2 gamma, and the first and second variable capacitors (e.g., Figure 3 The capacitance values ​​of capacitors 383 and 387 are scanned within the range required to achieve an input return loss of less than approximately -35 dB for each load phase at the combined node 370. In Figure 500, the first curve 510 corresponds to the return loss of a load with a gamma of 0.2, and the associated load return loss (S11) of approximately -14 dB over the entire 360-degree reflection coefficient (horizontal axis) (vertical axis). The second curve 520 shows the return loss for each load relative to the first and second variable capacitors (e.g., Figure 3 The capacitance values ​​of capacitors 383 and 387 are optimized to enable the use of combination nodes with an impedance of approximately 12 ohms (e.g., Figure 3 The input return loss of node 370 is corrected to approximately -35 dB or less, a much lower input return loss.

[0107] As Figure 5A indicated, embodiments of the reconfigurable output impedance transformer 380 enable a fairly high load return loss (e.g., about -14 dB) to be corrected to a significantly lower input return loss (e.g., <-35 dB) simply by adjusting the capacitance values of the capacitors within the reconfigurable output impedance transformer (e.g., by adjusting the capacitances of the first variable capacitor 383 and the second variable capacitor 387). Figure 3 In addition, by selecting an appropriate phase shift θ2 for the phase shift element 386, an almost orthogonal tuning adjustment capability can be achieved, enabling the selection of variable capacitors 383, 387 with a relatively small capacitance tuning ratio (e.g., < 5.0).

[0108] Various embodiments of the reconfigurable output impedance transformer 380 are configured to transform any load impedance Z L within a -14 dB return loss of a nominal load impedance of 50 ohms to a combined load impedance Z N within a -35 dB return loss of a targeted nominal combined node impedance of 12 ohms. As discussed above, in order to reduce the impedance variation (e.g., from -14 dB return loss to -35 dB return loss) using the first variable capacitor 383 and the second variable capacitor 387, Figure 3 a certain amount of capacitance tuning ratio is required. Also as discussed above, it can be desirable to configure the reconfigurable output impedance transformer 380 such that a relatively small capacitance tuning ratio of the first variable capacitor 383 and the second variable capacitor 387 can be utilized to achieve the targeted tunable impedance range of the reconfigurable output impedance transformer 380.

[0109] For example, Figure 5B is a graph 530 plotting the correlation of insertion loss (vertical axis) versus the phase shift θ2 (horizontal axis) associated with the phase shift element 386. In addition, Figure 5C is a graph 560 plotting the capacitance tuning ratio of the first variable capacitor 383 and the second variable capacitor 387 (vertical axis) versus the phase shift θ2. Figure 5B and 5C Each of Figure 3 is an example embodiment of a Doherty power amplifier (e.g., the amplifier 300 of

[0110] In Figure 5B and 5C the relationships between the phase shift, insertion loss, and capacitance tuning ratio requirements are summarized in the following table:

[0111]

[0112]

[0113] In graph 530( Figure 5B ), trace 540 associates insertion loss with the phase shift θ2 associated with phase shift element 386. As mentioned above, the phase shift θ2 associated with phase shift element 386 can desirably be selected to be in the range of about 15 degrees to about 45 degrees. Additionally, selecting a phase shift element 386 with a phase shift θ2 in the narrower range of about 25 degrees to about 35 degrees can result in relatively low return loss (e.g., about -0.14 dB or less), as well as nearly orthogonal tuning adjustment capability with respect to variable capacitors 383, 387. Thus, it can be desirable to include a phase shift element 386 with a phase shift in this range.

[0114] Graph 560( Figure 5C ) indicates the capacitance tuning ratios required for first variable capacitor 383 and second variable capacitor 387 to meet the performance indicated in Figure 5A . This shows that when the phase shift θ2 is selected to have a value between about 25 degrees to about 35 degrees, relatively small required capacitance tuning ratios can be achieved for both capacitors 383, 387. In graph 560, curve 570 corresponds to the tuning ratio versus phase shift for first variable capacitor 383, and curve 580 corresponds to the tuning ratio versus phase shift for second variable capacitor 387. Referring first to curve 570, and when phase shift element 386 is designed to have a phase shift θ2 of about 30 degrees, first variable capacitor 383 can be selected to have a minimum capacitance C MIN1 of about 0.47 picoFarads (pF) and a maximum capacitance C MAX1 of about 1.77 pF, which corresponds to a relatively small capacitance tuning ratio C MAX1 / C MIN1 of about 4.05. Additionally, and referring to curve 580, second variable capacitor 387 can be selected to have a minimum capacitance C MIN2 of about 0.30 pF and a maximum capacitance C MAX2 of about 0.95 pF, which corresponds to a relatively small capacitance tuning ratio C MAX2 / C MIN2 of about 3.20. It is noted here that the capacitance ranges for first variable capacitor 383 and second variable capacitor 387 can be different for different operating fundamental frequencies, as well as different transformer impedances Z L and Z N . Selecting capacitors with relatively small capacitance tuning ratios can result in tunable capacitors, as well as reconfigurable output impedance transformers 380, with minimized insertion loss, size, and / or cost by appropriately selecting the second phase shift θ2.

[0115] Figure 3A reconfigurable output impedance transformer 380 is depicted having two shunt variable capacitors 383, 387. In some cases, it can be desirable to increase the effective tuning range beyond that achievable with two shunt capacitors 383, 387. One such case is when the tuning range of the tunable capacitors is insufficient to meet the impedance tuning range objectives of the reconfigurable output impedance transformer 380. Figure 6 An embodiment of a Doherty power amplifier 600 is shown having a reconfigurable output impedance transformer 680 that can provide an increased tuning range by including a shunt impedance 684, 688 in parallel with each of the variable capacitors 383, 387.

[0116] As with the amplifier 300 Figure 3 ), the Doherty power amplifier 600 includes an RF input 302, an RF output 304, a signal splitter 310, a carrier amplification path 320, a peak amplification path 350, and a combining node 370. The carrier amplification path 320 includes a first input IMN 324, a carrier amplifier 330, and a phase shift and impedance inversion element 340. The peak amplification path 350 includes a phase shift element 352, a second input IMN 354, and a peak amplifier 360. Each of the components listed above can be substantially the same as the components of the same number in Figure 3 and all details described above for these components are intended to be incorporated into this description of Figure 6 .

[0117] The difference between the Doherty power amplifier 300 and the Doherty power amplifier 600 can be in the configuration of the reconfigurable output impedance transformer 380, 680. The reconfigurable transformers 380, 680 each include a first phase shift element 381 and a second phase shift element 386 coupled in series between the combining node 370 and the RF output 304, with an intermediate node 382 between the first phase shift element 381 and the second phase shift element 386. In addition, the reconfigurable output impedance transformers 380, 680 each include a first variable capacitor 383 (or capacitor network) coupled in a shunt configuration between the intermediate node 382 and a ground reference node, and a second variable capacitor 387 (or capacitor network) coupled in a shunt configuration between the RF output 304 and the ground reference node. Again, each of the components listed above can be substantially the same as the components of the same number in Figure 3 and all details described above for these components are intended to be incorporated into this description of Figure 6 .

[0118] As mentioned above, the reconfigurable output impedance transformer 680 can be configured to provide an increased tuning range over the reconfigurable output impedance transformer 380 Figure 3The difference lies in the inclusion of a first shunt inductor 684 connected in parallel with the first variable capacitor 383, and a second shunt inductor 688 connected in parallel with the second variable capacitor 387. The first shunt inductor 684 has a first end coupled to (e.g., indirectly or directly connected to) the variable capacitor 383 and an intermediate node 382 (i.e., the output terminal of element 381 and the input terminal of element 386), and a second end coupled to (e.g., indirectly or directly connected to) a ground reference node. The second shunt inductor 688 has a first end coupled to (e.g., indirectly or directly connected to) the variable capacitor 387 and an RF output 304 (i.e., the output terminal of element 386), and a second end coupled to (e.g., indirectly or directly connected to) a ground reference node. In various embodiments, the first shunt inductor 684 and the second shunt inductor 688 may be implemented using discrete surface mount assemblies, printed coils, bonding wires, or combinations thereof.

[0119] Based on the example given above, when the Dougherty power amplifier 600 is designed to operate at a fundamental frequency f0 of approximately 3.6 GHz, when the phase shift element 386 is designed to have a phase shift θ2 of approximately 30 degrees, and when the first variable capacitor 383 and the second variable capacitor 387 are designed to have reconfigurable capacitance values ​​in the range of approximately 0.47 pF to approximately 1.77 pF or approximately 0.30 pF to approximately 0.95 pF, respectively, the first shunt inductor 684 can be selected to have an inductance in the range of approximately 2 nanohenries (nH) to approximately 20 nH, and the second shunt inductor 688 can be selected to have an inductance in the range of approximately 2 nH to approximately 20 nH. It should be noted here that the inductance ranges of the first inductor 684 and the second inductor 688 may differ for different operating fundamental frequencies.

[0120] When comparing the reconfigurable output impedance transformers 380 and 680, it may be apparent that the parallel combination of the first variable capacitor 383 and the first shunt inductor 684 may have an increased tuning range, and the parallel combination of the second variable capacitor 387 and the second shunt inductor 688 may also have an increased tuning range. When the capacitance tuning range of the first variable capacitor 383 and the second variable capacitor 387 is less than desired or required, Figure 6 The configuration shown may be specifically desired.

[0121] In other cases, when Figure 3 If the tuning range of the two shunt capacitors 383 and 387 is greater than required, it may be desirable to modify them. Figure 3 The reconfigurable output impedance transformer 380 can reduce insertion loss. For example, Figure 7An embodiment of a Doherty power amplifier 700 is shown having a reconfigurable output impedance transformer 780 that can have lower insertion loss by including a high quality (Q) fixed capacitor 785, 789 in series with each of the variable capacitors 383, 387.

[0122] As with the amplifier 300( Figure 3 ), the Doherty power amplifier 700 includes an RF input 302, an RF output 304, a signal splitter 310, a carrier amplification path 320, a peak amplification path 350, and a combining node 370. The carrier amplification path 320 includes a first input IMN 324, a carrier amplifier 330, and a phase shift and impedance inversion element 340. The peak amplification path 350 includes a phase shift element 352, a second input IMN 354, and a peak amplifier 360. Each of the components listed above can be substantially the same as the components of the same number in Figure 3 and all details described above for these components are intended to be incorporated into this description of Figure 7 .

[0123] The difference between the Doherty power amplifier 300 and the Doherty power amplifier 700 can be in the configuration of the reconfigurable output impedance transformers 380, 780. The reconfigurable transformers 380, 780 each include a first phase shift element 381 and a second phase shift element 386 coupled in series between the combining node 370 and the RF output 304, with an intermediate node 382 between the first phase shift element 381 and the second phase shift element 386. In addition, the reconfigurable output impedance transformers 380, 780 each include a first variable capacitor 383 (or capacitor network) coupled in a shunt configuration between the intermediate node 382 and a ground reference node, and a second variable capacitor 387 (or capacitor network) coupled in a shunt configuration between the RF output 304 and the ground reference node. Again, each of the components listed above can be substantially the same as the components of the same number in Figure 3 and all details described above for these components are intended to be incorporated into this description of Figure 7 .

[0124] As mentioned above, the reconfigurable output impedance transformer 780 and the reconfigurable output impedance transformer 380( Figure 3The difference between the reconfigurable output impedance transformer 380 and the reconfigurable output impedance transformer 780 is that the reconfigurable output impedance transformer 780 includes a first high-Q fixed capacitor 785 in series with the first variable capacitor 383, and includes a second high-Q fixed capacitor 789 in series with the second variable capacitor 387. The first fixed capacitor 785 has a first end coupled to (e.g., indirectly or directly connected to) the intermediate node 382 (i.e., the output terminal of element 381 and the input terminal of element 386), and a second end coupled to (e.g., indirectly or directly connected to) the first end of the first variable capacitor 383 (where the second end of the first variable capacitor 383 is coupled to the ground reference node, as previously indicated). The second fixed capacitor 789 has a first end coupled to (e.g., indirectly or directly connected to) the RF output 304 (i.e., the output terminal of element 386), and a second end coupled to (e.g., indirectly or directly connected to) the first end of the second variable capacitor 387 (where the second end of the second variable capacitor 387 is coupled to the ground reference node, as previously indicated). According to other embodiments, the series order of the fixed capacitors 785, 789 and the variable capacitors 383, 387 can be reversed (i.e., the variable capacitors 383, 387 can be directly connected to the node 382 and the RF output 304, respectively, and the fixed capacitors 785, 789 can be directly connected to the ground reference node). In various embodiments, the first fixed capacitor 785 and the second fixed capacitor 789 can be implemented with discrete surface mount components or other suitable types of capacitors.

[0125] According to the examples given above, when the Doherty power amplifier 700 is designed to operate at a fundamental frequency fo of about 3.6 GHz, when the phase shifting element 386 is designed to have a phase shift 02 of about 30 degrees, and when the first variable capacitor 383 and the second variable capacitor 387 are designed to have reconfigurable capacitance values in the range of about 0.47 pF to about 1.77 pF or about 0.30 pF to about 0.95 pF, respectively, the first fixed capacitor 785 can be selected to have a capacitance in the range of about 1.5 pF to about 8.0 pF, and the second fixed capacitor 789 can be selected to have a capacitance in the range of about 1.5 pF to about 8.0 pF. It is noted here that the capacitance ranges for the first fixed capacitor 785 and the second fixed capacitor 789 can be different for different operating fundamental frequencies.

[0126] When comparing the reconfigurable output impedance transformer 380 to the reconfigurable output impedance transformer 780, it can be apparent that the series combination of the first fixed capacitor 785 and the first variable capacitor 383 can have reduced insertion loss, and that the series combination of the second fixed capacitor 789 and the second variable capacitor 387 can also have reduced insertion loss. When it is desired to reduce the overall insertion loss of the reconfigurable output impedance transformer 780, Figure 7 The configuration shown can be particularly desirable.

[0127] In yet other embodiments, it can be desirable to realize the additional benefits of two alternative reconfigurable output impedance transformers 680, 780 Figure 6 , 7 ). For example, Figure 8 An embodiment of a Doherty power amplifier 800 is shown having a reconfigurable output impedance transformer 880 that can provide an increased tuning range compared to the reconfigurable transformer 380 of Figure 3 , and can also have lower insertion loss. Specifically, similar to transformer 680 Figure 6 ), the reconfigurable output impedance transformer 880 includes a shunt inductor 684, 688 in parallel with each of the variable capacitors 383, 387, and similar to transformer 780 Figure 7 ), the reconfigurable output impedance transformer 880 includes a high-Q fixed capacitor 785, 789 in series with each of the variable capacitors 383, 387.

[0128] As with amplifier 300 Figure 3 ), the Doherty power amplifier 800 includes an RF input 302, an RF output 304, a signal splitter 310, a carrier amplification path 320, a peak amplification path 350, and a combining node 370. The carrier amplification path 320 includes a first input IMN 324, a carrier amplifier 330, and a phase shift and impedance inversion element 340. The peak amplification path 350 includes a phase shift element 352, a second input IMN 354, and a peak amplifier 360. Each of the components listed above can be substantially the same as the components of the same number in Figure 3 , and all of the details described above for these components are intended to be incorporated into this description of Figure 8 .

[0129] The difference between the Doherty power amplifier 300 and the Doherty power amplifier 800 can be in the configuration of the reconfigurable output impedance transformers 380, 880. Both reconfigurable transformers 380, 880 include a first phase shift element 381 and a second phase shift element 386 coupled in series between the combining node 370 and the RF output 304, with an intermediate node 382 between the first phase shift element 381 and the second phase shift element 386. In addition, both reconfigurable output impedance transformers 380, 880 include a first variable capacitor 383 (or capacitor network) coupled in a shunt configuration between the intermediate node 382 and a ground reference node, and a second variable capacitor 387 (or capacitor network) coupled in a shunt configuration between the RF output 304 and the ground reference node. Again, each of the components listed above can be substantially the same as the components of the same number in Figure 3components of the same number are substantially the same, and all details described above for these components are intended to be incorporated into Figure 8 this description.

[0130] As mentioned above, the reconfigurable output impedance transformer 880 differs from the reconfigurable output impedance transformer 380 Figure 3 ) in that it includes a first shunt inductor 684 in parallel with the first variable capacitor 383, and includes a second shunt inductor 688 in parallel with the second variable capacitor 387. In addition, the transformer 880 differs from the transformer 380 in that it includes a first high-Q fixed capacitor 785 in series with the first variable capacitor 383, and includes a second high-Q fixed capacitor 789 in series with the second variable capacitor 387. The first shunt inductor 684 and the second shunt inductor 688 can be substantially the same as their counterparts of the same number in Figure 6 this description. In addition, the first fixed capacitor 785 and the second fixed capacitor 789 can be substantially the same as their counterparts of the same number in Figure 6 this description. In addition, the first fixed capacitor 785 and the second fixed capacitor 789 can be substantially the same as their counterparts of the same number in Figure 8 this description. In addition, the first fixed capacitor 785 and the second fixed capacitor 789 can be substantially the same as their counterparts of the same number in Figure 7 this description. In addition, the first fixed capacitor 785 and the second fixed capacitor 789 can be substantially the same as their counterparts of the same number in Figure 7 this description. In addition, the first fixed capacitor 785 and the second fixed capacitor 789 can be substantially the same as their counterparts of the same number in Figure 8 this description.

[0131] When comparing the reconfigurable output impedance transformers 380, 880, it can be apparent that the parallel combination of the first variable capacitor 383 and the first shunt inductor 684 can have an increased tuning range, and that the parallel combination of the second variable capacitor 387 and the second shunt inductor 688 can have an increased tuning range. In addition, the series combination of the first fixed capacitor 785 and the first variable capacitor 383 can have a reduced insertion loss, and the series combination of the second fixed capacitor 789 and the second variable capacitor 387 can also have a reduced insertion loss. When the capacitance tuning range of the first variable capacitor 383 and the second variable capacitor 387 is less than desired or required, and also when it is desired to reduce the overall insertion loss of the reconfigurable output impedance transformer 880, Figure 8 the configuration shown can be particularly desirable.

[0132] The Doherty power amplifiers 300, 600, 700, 800 Figure 3 , 6 -8) can be physically implemented using a variety of active and passive electrical devices, which can be housed in one or more device packages and / or on one or more printed circuit boards (PCBs) and / or other substrates. More specifically, the Doherty power amplifiers 300, 600, 700, 800Figure 3 、 6 Various components of the system 100, 200 of FIGS. 1-2 can be implemented in independent modules or electrical devices that can be coupled to a substrate that electrically connects the modules / devices to other portions of the RF transceiver system (e.g., the system 100, 200 of FIGS. 1-2). Figure 1 、 2 As used herein, the term "module" means a set of active and / or passive electrical devices (e.g., ICs and components) physically contained in a single housing (e.g., the devices are coupled to a common "module substrate" or are coupled within a single device package). A "module" also includes a plurality of electrically conductive terminals for electrically connecting the set of devices to external circuitry forming other portions of an electrical system. Essentially, the module substrate configuration, the method of coupling the devices to the terminals of the module, and the number of devices within the module define the module type. For example, in various embodiments, a module can be in the form of a PCB-based system, a surface mount device, a chip carrier device, a ball, pin, or grid array package device, a flat package device (e.g., a quad or dual flat no-lead package), a chip scale package device, a system in a package (SIP) device, or in the form of some other type of integrated circuit package. Although one particular type of module / device is described below in connection with the system 100, 200 of FIGS. 1-2, it should be understood that embodiments of the inventive subject matter can also be included in other types of modules / devices. Figure 9

[0133] Figure 9 is a top view of a power amplifier module 900 embodying a Doherty power amplifier 901 (e.g., the amplifier 800 of FIG. 8) according to example embodiments. Various components of the power amplifier module 900 correspond to components depicted in Figure 8 FIG. 8, and it should be noted that the last two digits of the corresponding components between Figure 8 and Figure 8 are the same (e.g., components 880 and 980 are corresponding circuitry). Figure 9

[0134] The power amplifier module 900 includes a module substrate 908 in the form of a multi-layer printed circuit board (PCB) or other suitable substrate. The module substrate 908 has a top surface 909 (also referred to as a "mounting surface") and a bottom surface (not shown). During manufacturing, a plurality of components and terminals are coupled to the mounting surface 909 of the module substrate 908, and a non-conductive encapsulation material (e.g., a plastic encapsulant, not shown) can be disposed over the mounting surface 909 and the components and terminals to define a top surface of the module 900. Additionally, a plurality of electrically conductive terminals (e.g., terminals 902, 904) can extend through the module substrate 908 to provide an array of terminals at the bottom surface of the module 900. This enables the module 900 to be surface mounted to a system substrate (not shown).

[0135] ​​The module substrate 908 includes multiple dielectric layers (e.g., formed of FR-4, ceramic, or other PCB dielectric materials) arranged alternately with multiple conductive layers. The uppermost conductive layer may be patterned to include multiple conductive features at the top surface 909 of the module substrate 908. For example, the uppermost conductive layer may include multiple conductive pads serving as attachment points for various discrete components, as well as additional conductive features (e.g., conductive traces and transmission line segments) providing electrical connections between various features and components of the module 900. Other underlying patterned conductive layers may serve as signal routing layers, ground layers, bias voltage conduction layers, heat sink attachment layers, etc.

[0136] According to an embodiment, the module substrate 908 further includes one or more heat dissipation structures 916 extending between a top surface and a bottom surface of the module substrate 908. Power amplifier dies 933, 934, 953, 954 associated with the carrier amplifier 930 and the peak amplifier 960 are physically coupled and electrically coupled to the surface of the heat dissipation structure 916 exposed at the top surface 909 of the module substrate 908. The bottom surface (not shown) of the heat dissipation structure 916 may be exposed at the bottom surface of the module substrate 908, or the bottom surface of the heat dissipation structure 916 may be covered by a bottom conductive layer (not shown). In summary, the heat dissipation structure 916 is configured to provide a thermal path between the dies 933, 934, 953, 954 and the bottom surface of the heat dissipation structure 916 (and therefore the bottom surface of the module substrate 908). In various embodiments, the heat dissipation structure 916 may include a conductive and thermally conductive metal coin block, a thermal via, or other suitable structure. When integrated into a larger electrical system, the bottom surface of the heat dissipation structure 916 (or portions of the conductive layer covering these surfaces) is physically and thermally coupled to a heat sink (not shown).

[0137] The Dougherty power amplifier 901 embodied in the power amplifier module 900 includes an RF input 902 (e.g., Figure 3 , 6 -8 RF input 302), RF output 904 (e.g., Figure 3 , 6 -8 RF output 304), signal splitter 910 (e.g., Figure 3 , 6 -8 signal splitter 310), carrier amplification path 920 (e.g., Figure 3 , 6 -8 carrier amplifier path 320), peak amplifier path 950 (e.g., Figure 3 , 6 -8 peak amplification path 350), combined node 970 (e.g., Figure 3 , 6 -8 combined node 370), and reconfigurable output impedance transformer 980 (e.g.,Figure 8 (Reconfigurable converter 880).

[0138] Terminal 902 serves as the RF signal input terminal of the Dougherty power amplifier 901. The RF signal input terminal 902 is electrically coupled to a signal splitter 910. The signal splitter 910, coupled to the mounting surface 909 of the module substrate 908, may include one or more discrete dies and / or components, but said dies and / or components are in... Figure 9 The signal splitter 910 is represented as a single element. It includes an input terminal and two output terminals (unnumbered, but corresponding to...). Figure 3 , 6 -8 terminals 312-314). The splitter input is electrically coupled to the RF signal input 902 via one or more conductive structures (e.g., traces and / or bonding lines, as shown), and is therefore configured to receive input RF signals.

[0139] Signal splitter 910 is configured to separate the power of the input RF signal received through RF input terminal 902 into a first RF signal and a second RF signal (referred to as a carrier signal and a peak signal, respectively) generated at the output terminal of signal splitter 910. When Dougherty power amplifier 901 is a symmetrical amplifier, the carrier signal and peak signal generated at the output of signal splitter 910 may have equal power. Conversely, when Dougherty power amplifier 901 is an asymmetrical amplifier, the carrier signal and peak signal generated at the output of signal splitter 910 may have unequal power.

[0140] The first output of the signal splitter is electrically coupled to the carrier amplification path 920 (e.g., Figure 3 , 6 -8 path 320), and the second output of the signal splitter is electrically coupled to the peak amplification path 950 (e.g., Figure 3 , 6 -8 path 350). Carrier amplification path 920 includes input impedance matching network (IMN) 924 (e.g., Figure 3 , 6 -8 input IMN 324), carrier amplifier 930 (e.g., Figure 3 , 6 -8 amplifier 330) and phase shift and impedance inversion element 940 (e.g., Figure 3 , 6 -8 element 340). According to some embodiments, the peak amplification path 950 includes a phase shift element 952 (e.g., element 340). Figure 3 , 6 -8 component 352), input impedance matching network (IMN) 954 (e.g., Figure 3 , 6-8 input IMN 354) and a peak amplifier 960 (e.g., Figure 3 , 6 -8 amplifier 360). As previously discussed, the phase shift element 952 is configured to apply a phase shift (e.g., about 90 degrees) to the peak signal in order to compensate for the phase shift applied along the carrier amplification path 920 (e.g., by the phase shift and impedance inversion element 940). In alternative embodiments, the phase shift element 952 can be omitted, and the signal splitter 910 can include one or more phase shift elements configured to apply a phase difference of about 90 degrees between the carrier signal and the peak signal provided at the splitter outputs. For example, the peak signal generated at the second signal splitter output can be delayed by about 90 degrees relative to the carrier signal generated at the first signal splitter output. In other words, the RF signal provided to the peak amplifier path can be delayed by about 90 degrees relative to the RF signal provided to the carrier amplifier path.

[0141] In particular embodiments of the Figure 9 amplifier path and the peak amplifier path each include two stages of power amplifiers 930, 960, with driver amplifier transistors 936, 956 implemented on a driver amplifier die 933, 953 and final stage amplifier transistors 937, 957 implemented on a separate final stage amplifier die 934, 954. For example, each of the transistors 936, 937, 956, 957 can be a field effect transistor (FET), such as a laterally diffused metal oxide semiconductor (LDMOS) FET or a high electron mobility transistor (HEMT). The description can refer to each transistor as including a control terminal and two conductive terminals. For example, using terminology associated with FET devices, the “control terminal” refers to the gate terminal of the transistor, and the first and second conductive terminals refer to the drain and source terminals of the transistor (or vice versa). Although the following description can use terminology commonly associated with FET devices, the various embodiments are not limited to implementations utilizing FET devices, but are meant to also apply to implementations utilizing bipolar junction transistor (BJT) devices or other suitable types of transistors.

[0142] In some embodiments, the carrier amplifier 930 more specifically includes a silicon driver stage die 933 and a gallium nitride (GaN) final stage die 934. According to some embodiments, the peak amplifier 960 also includes a silicon driver stage die 953 and a GaN final stage die 954. In other embodiments, each of the carrier amplifier 930 and the peak amplifier 960 may include a two-stage power amplifier implemented on a single die, or each of the carrier amplifier 930 and the peak amplifier 960 may include a single-stage power amplifier implemented on a single die. In still other embodiments, each of the carrier amplifier and the peak amplifier may include a two-stage power amplifier implemented on separate driver stage dies and final stage dies, but may use the same semiconductor technology to form the driver stage die and the final stage die (e.g., both the driver stage die and the final stage die may be silicon dies or GaN dies), or may use semiconductor technologies different from those described above to form the driver stage die and / or the final stage die (e.g., the driver stage die and / or the final stage die may be formed from silicon germanium (SiGe) and / or gallium arsenide (GaAs)).

[0143] Carrier amplifier path 920 includes the aforementioned driver stage die 933, final stage die 934, and phase shift and impedance inversion element 940 (e.g., Figure 3 , 6 -8 component 340). The driver stage die 933 and the final stage die 934 of the carrier amplifier path 920 are electrically coupled together in a cascaded arrangement between the input terminal 935 of the driver stage die 933 (corresponding to the carrier amplifier input) and the output terminal 938 of the final stage die 934 (corresponding to the carrier amplifier output).

[0144] The driver-stage die 933 includes multiple integrated circuits. In one embodiment, the integrated circuit system of die 933 includes a series-coupled arrangement of an input terminal 935, an input impedance matching circuit (unnumbered), a silicon power transistor 936, an integrated portion of an interstage impedance matching circuit (unnumbered), and an output terminal (unnumbered). More specifically, the gate of transistor 936 is electrically coupled to input terminal 935 via the input impedance matching circuit, and the drain of transistor 936 is electrically coupled to the output terminal of die 933 via the output impedance matching circuit. The source of transistor 936 is electrically coupled to a conductive layer on the bottom surface of die 933, and the bottom conductive layer is physically coupled, electrically coupled, and thermally coupled to an exposed top surface of one of the heat dissipation structures 916.

[0145] The output of driver stage die 933 is electrically coupled to the input of final stage die 934 through an array of bond wires (not numbered) or another type of electrical connection. Final stage die 934 also includes multiple integrated circuits. In an embodiment, the integrated circuitry of die 934 includes a series-coupled arrangement of an input (not numbered), GaN power transistor 937, and output 938. More specifically, the gate of transistor 937 is electrically coupled to the input of die 934, and the drain of transistor 937 is electrically coupled to output 938 of die 934. The source of transistor 937 is electrically coupled to a conductive layer on the bottom surface of die 934, and the bottom conductive layer is physically, electrically, and thermally coupled to the exposed top surface of heat spreading structure 916.

[0146] The peak amplifier path includes driver stage die 953 and final stage die 954 mentioned above. Driver stage die 953 and final stage die 954 of peak amplifier path 950 are electrically coupled together in a cascaded arrangement between an input 955 of driver stage die 953 (corresponding to a peak amplifier input) and an output 958 of final stage die 954 (corresponding to a peak amplifier output).

[0147] Driver stage die 953 includes multiple integrated circuits. In an embodiment, the integrated circuitry of die 953 includes a series-coupled arrangement of input 955, input impedance matching circuit (not numbered), silicon power transistor 956, an integrated portion of interstage impedance matching circuit (not numbered), and output (not numbered). More specifically, the gate of transistor 956 is electrically coupled to input 955 through input impedance matching circuit, and the drain of transistor 956 is electrically coupled to the output of die 953 through output impedance matching circuit. The source of transistor 956 is electrically coupled to a conductive layer on the bottom surface of die 953, and the bottom conductive layer is physically, electrically, and thermally coupled to an exposed top surface of one of heat spreading structures 916.

[0148] The output of driver stage die 953 is electrically coupled to the input of final stage die 954 through an array of bond wires (not numbered) or another type of electrical connection. Final stage die 954 also includes multiple integrated circuits. In an embodiment, the integrated circuitry of die 954 includes a series-coupled arrangement of an input (not numbered), GaN power transistor 957, and output 958. More specifically, the gate of transistor 957 is electrically coupled to the input of die 954, and the drain of transistor 957 is electrically coupled to output 958 of die 954. The source of transistor 957 is electrically coupled to a conductive layer on the bottom surface of die 954, and the bottom conductive layer is physically, electrically, and thermally coupled to the exposed top surface of heat spreading structure 916.

[0149] An amplified carrier signal is generated at the output terminal 938 of the final stage die 934, and an amplified peak signal is generated at the output terminal 958 of the final stage die 954. In the illustrated embodiment, the output terminal 958 of the final stage die 954 also serves as a combination node 970 of the amplifier 901 (e.g., Figure 3 , 6 -8 node 370). According to an embodiment, the output terminal 938 of the carrier final stage die 934 (e.g., via a bonding line (unnumbered) or another type of electrical connection) is electrically coupled to the first end of the phase shift and impedance inversion element 940, and the second end of the phase shift and impedance inversion element 940 (e.g., via a bonding line (unnumbered) or another type of electrical connection) is electrically coupled to the output terminal 958 of the peak final stage die 954, and thus electrically coupled to the combination node 970.

[0150] According to an embodiment, the phase shift and impedance inversion element 940 can be implemented using a quarter-wavelength or lambda / 4 (λ / 4) or shorter transmission line (e.g., a microstrip transmission line with an electrical length of up to about 90 degrees). As used herein, lambda is the wavelength of the RF signal at the amplifier's operating fundamental frequency (e.g., a frequency in the range of about 600 MHz to about 10 GHz or higher). The combination of the phase shift and impedance inversion element 940 and the junction (or other) connection to the outputs 938, 958 of the dies 934, 954 can apply a relative phase shift of about 90 degrees to the amplified carrier signal as the signal travels from output 938 to output 958 / combination node 970. When the various phase shifts applied individually to the carrier RF signal and the peak RF signal through the carrier path and the peak path, respectively, are substantially equal, the amplified carrier RF signal and the peak RF signal are combined substantially in phase at output 958 / combination node 970.

[0151] Output terminal 958 / combination node 970 (e.g., via a bonding wire or another type of electrical connection) is electrically coupled to a reconfigurable output impedance transformer 980 (e.g., Figure 8 The reconfigurable converter 880). Figure 9 In the illustrated embodiment, the component of the reconfigurable output impedance converter 980 corresponds to the reconfigurable output impedance converter 880. Figure 8 Based on the description herein, those skilled in the art will understand that alternative embodiments of module 900 may alternatively have components corresponding to reconfigurable output impedance transformers 380, 680, or 780. Figure 3 , 6 A reconfigurable output impedance transformer of either (7) or (8). In summary, the reconfigurable output impedance transformer 980 is coupled to the RF output 904 (e.g., Figure 3 , 6-8 RF output 304). As discussed in detail previously, the output impedance matching transformer 980 can be reconfigured to present the appropriate load impedance to the combination node 970 (and therefore to each of the carrier final stage die 934 and the peak final stage die 954).

[0152] According to one or more embodiments, the reconfigurable output impedance transformer 980 may include a first phase shift element 981 and a second phase shift element 986 (e.g., ...) series coupled between the combined node 970 and the RF output 904. Figure 3 , 6 -8 components 381, 386), with an intermediate node 982 between the first phase shift element 981 and the second phase shift element 986 (e.g., Figure 3 , 6 -8 (node ​​382). For example, the first phase shift element 981 may be implemented as a first conductive trace or a first transmission line having a first end coupled to the combined node 970 (e.g., via a bonding line, not numbered) and a second end corresponding to the intermediate node 982. The second phase shift element 986 may be implemented as a second conductive trace or a second transmission line, which may be an extension of the first conductive trace or the first transmission line. In summary, the second phase shift element 986 has a first end corresponding to the intermediate node 982 and a second end coupled to the RF output terminal 904. In some embodiments, a decoupling capacitor 992 may be coupled between the second end of the second phase shift element 986 and the RF output terminal 904.

[0153] Additionally, according to one or more embodiments, the reconfigurable output impedance transformer 980 includes a first variable capacitor 983 coupled between an intermediate node 982 and a ground reference node 990 in a shunt configuration (e.g., Figure 3 , 6 -8 capacitor 383 (or capacitor network), and a second variable capacitor 987 (e.g., ) coupled in a shunt configuration between RF output 904 and ground reference node 990. Figure 3 , 6 -8 capacitor 387 (or capacitor network). For example, ground reference node 990 may be implemented as one or more conductive traces on the top surface 909 of module substrate 908, which are electrically connected to one or more ground terminals (not shown) on the bottom surface of module substrate 908 (e.g., terminals configured to be coupled to system ground).

[0154] Additionally, according to one or more embodiments, the reconfigurable output impedance converter 980 includes a first shunt inductor 984 coupled in parallel with a first variable capacitor 983 (e.g., Figure 6 , 8The inductor 684) and the second shunt inductor 988 (e.g., coupled in parallel with the second variable capacitor 987) are also connected in parallel. Figure 6 , 8 (Inductor 688). The first shunt inductor 984 and the second shunt inductor 988 may be combined with Figure 6 The inductors 684 and 688 discussed are basically the same, and the above text is combined with... Figure 6 The details of inductors 684 and 688 discussed are incorporated into Figure 9 In this description, in other embodiments, inductors 984 and 988 can be excluded from module 900.

[0155] Additionally, according to one or more embodiments, the reconfigurable output impedance transformer 980 includes a first high-Q fixed capacitor 985 coupled in series with a first variable capacitor 983 (e.g., Figure 7 , 8 The capacitor 785) and the second high-Q fixed capacitor 989 (e.g., the capacitor 785) coupled in series with the second variable capacitor 987. Figure 7 , 8 (Capacitor 789). The first fixed capacitor 985 and the second fixed capacitor 989 may be combined with Figure 7 The capacitors 785 and 789 discussed are basically the same, and the above text is combined with... Figure 7 The details of capacitors 785 and 789 discussed are incorporated into Figure 9 In this description, capacitors 785 and 789 can be excluded from module 900, in which case variable capacitors 983 and 987 will be directly coupled between intermediate node 982 or RF output 904 and ground reference node 990, respectively.

[0156] As previously discussed, this is achieved by including a reconfigurable output impedance converter (e.g., Figure 3 , 6 -9 converters 380, 680, 780, 880, and 980, converter 980 is suitable for transforming a load impedance range to the impedance at the combined node 970 while maintaining excellent RF performance and without significant insertion loss. Additionally, when the reconfigurable output impedance converter includes variable shunt capacitors 983 and 987 (e.g., ...), Figure 3 , 6 The shunt inductors 984 and 988 (e.g., capacitors 383 and 387) are connected in parallel. Figure 6 , 8 When inductors 684 and 688 are used, the tuning range of the reconfigurable output impedance converter can be increased. Furthermore, when the reconfigurable output impedance converter includes high-Q capacitors 985 and 989 connected in series with variable shunt capacitors 983 and 987 (e.g., ...), ...Figure 3 , 7 When using capacitors 785 and 789 (8), the reconfigurable output impedance converter can have further reduced insertion loss.

[0157] Figure 10 This includes combining a conventional Dougherty amplifier with a fixed output impedance transformer with a reconfigurable output impedance transformer (e.g., Figure 3 Two graphs 1010 and 1020 compare the load-pulling results of various RF performance characteristics of embodiments of the Dougherty power amplifier (converter 380). More specifically, graph 1010 includes a first trace 1012 and a second trace 1014, the first trace 1012 tracking the efficiency (vertical axis) of a conventional Dougherty amplifier with a fixed output impedance converter as a function of load phase (horizontal axis), and the second trace 1014 tracking the efficiency (vertical axis) of a Dougherty amplifier with a reconfigurable output impedance converter (e.g., Figure 3 The efficiency of the Dougherty power amplifier embodiment (converter 380) varies with the load phase. Trace 1012, corresponding to the Dougherty power amplifier with a fixed output impedance converter, shows that for some load phases (i.e., for different load impedances), the amplifier efficiency is significantly lower than the maximum efficiency (e.g., about 47% lower). However, trace 1014, corresponding to the embodiment of the Dougherty amplifier with a reconfigurable output impedance converter, shows that by appropriately adjusting the variable capacitor of the reconfigurable output impedance converter (e.g., ...), ... Figure 3 , 6 With capacitors of -9 (383, 387, 983, 987), the amplifier efficiency can be maintained near maximum efficiency on all load phases.

[0158] Graph 1020 includes a first trace 1022 and a second trace 1024. The first trace 1022 tracks the peak power (vertical axis) of a conventional Dougherty amplifier with a fixed output impedance transformer, which varies with load phase (horizontal axis). The second trace 1024 tracks an amplifier with a reconfigurable output impedance transformer (e.g., Figure 3 The peak power of the Dougherty power amplifier embodiment (converter 380) varies with the load phase. Trace 1022 corresponding to the Dougherty power amplifier with a fixed output impedance converter shows that for some load phases (i.e., for different load impedances), the peak power is significantly lower than the maximum peak power (e.g., about 48.55 dBm lower). However, trace 1024 corresponding to the embodiment of the Dougherty amplifier with a reconfigurable output impedance converter shows that by appropriately adjusting the variable capacitor of the reconfigurable output impedance converter (e.g., ...), Figure 3 , 6-9 capacitors (383, 387, 983, 987) can maintain peak power near the maximum peak power on all load phases.

[0159] Figure 11 It is used to configure Dougherty power amplifiers (e.g., Figure 3 , 6 -9 amplifiers 300, 600, 700, 800, 900) reconfigurable output impedance transformers (e.g., Figure 3 , 6 A flowchart of a method for an embodiment of a reconfigurable converter (any one of 380, 680, 780, 880, 980) of -9. The method begins at block 1102 by coupling a load to a Dougherty amplifier (e.g., Figure 3 , 6 -9 amplifiers 300, 600, 700, 800, 901) RF output (e.g., Figure 3 , 6 -9 RF output 304, 904). As previously discussed, the load is at the load impedance Z L Features include, and the load may include, an RF switch (e.g., Figure 1 , 2 Switches 110, 210), antenna (e.g., Figure 1 , 2 Antennas 140, 240), circulators (e.g., Figure 1 , 2 (The circulator 216) or another load.

[0160] In box 1104, one or more shunt capacitors can then be controlled and / or adjusted (e.g., Figure 3 , 6 The capacitance values ​​of capacitors (383, 387, 983, 987) are selected to optimally achieve the RF output (e.g., Figure 3 , 6 The load impedance Z at the RF output of -9 (at points 304 and 904) L Transformed into a composite node (e.g., Figure 3 , 6 The impedance Z at the combined nodes 370 and 970 of -9 N The capacitance value. As previously mentioned, variable capacitors (e.g., Figure 3 , 6Each of the capacitors 383, 387, 983, 987 of -9 can be implemented with a tunable capacitor, such as but not limited to a VVAC, a DVC, a fuse programmable capacitor bank, or another suitable tunable / variable capacitor. The capacitance values of the first and second variable capacitors can be adjusted by performing an appropriate tuning procedure. For example, when the first and second variable capacitors are VVACs, adjusting the capacitance values includes changing the first and second control voltages applied to the tuning inputs of the VVACs. Conversely, when the first and second variable capacitors are DVCs, adjusting the capacitance values includes clocking a digital code into the capacitors through the digital interfaces of the capacitors, which causes the capacitors to have the desired capacitance values. Finally, when the first and second variable capacitors are fuse programmable capacitor banks, adjusting the capacitance values includes blowing certain ones of the fuses to set the desired capacitance values.

[0161] In some embodiments, the reconfigurable output impedance transformer can be controlled in an open loop manner. For example, when the load impedance Z L This can be appropriate when it is not likely to change significantly over time. In such cases, the above-described approach can be used to "set" the variable capacitors to a capacitance value that achieves an impedance transformation that results in the lowest forward-to-reflected power ratio and optimal RF performance "in a set-and-forget manner." In other embodiments, the reconfigurable output impedance transformer can be dynamically controlled in a closed loop manner during operation of the amplifier. In such embodiments, the reflected power of the amplifier can be measured continuously or periodically, and the above-described approach can be used to change the capacitance values of the variable capacitors to optimally transform the load impedance Z L to the combined node impedance Z N (e.g., to keep the forward-to-reflected power ratio at or below a threshold value).

[0162] Embodiments of a Doherty power amplifier include a carrier amplifier, a peaking amplifier, a combining node, an RF output, and a reconfigurable output impedance transformer. The carrier amplifier has a carrier amplifier input and a carrier amplifier output, and the carrier amplifier is configured to amplify a carrier signal received at the carrier amplifier input and produce an amplified carrier signal at the carrier amplifier output. The peaking amplifier has a peaking amplifier input and a peaking amplifier output, and the peaking amplifier is configured to amplify a peaking signal received at the peaking amplifier input and produce an amplified peaking signal at the peaking amplifier output. The combining node is coupled to the carrier amplifier output and the peaking amplifier output, and the combining node is configured to combine the amplified carrier signal and the amplified peaking signal to produce a combined amplified signal. The reconfigurable output impedance transformer is coupled between the combining node and the RF output. The reconfigurable output impedance transformer includes a first phase shift element, a first variable capacitor, and a second variable capacitor. The first phase shift element has an input terminal coupled to the combining node and an output terminal coupled to the RF output, and the first phase shift element is configured to apply a first phase shift to the combined amplified signal. The first variable capacitor is coupled to the input terminal of the first phase shift element. The second variable capacitor is coupled to the output terminal of the first phase shift element.

[0163] Another embodiment of a Doherty power amplifier includes a carrier amplifier, a peaking amplifier, a combining node, an RF output, and a reconfigurable output impedance transformer. The carrier amplifier has a carrier amplifier input and a carrier amplifier output, and the carrier amplifier is configured to amplify a carrier signal received at the carrier amplifier input and produce an amplified carrier signal at the carrier amplifier output. The peaking amplifier has a peaking amplifier input and a peaking amplifier output, and the peaking amplifier is configured to amplify a peaking signal received at the peaking amplifier input and produce an amplified peaking signal at the peaking amplifier output. The combining node is coupled to the carrier amplifier output and the peaking amplifier output, and the combining node is configured to combine the amplified carrier signal and the amplified peaking signal to produce a combined amplified signal. The reconfigurable output impedance transformer is coupled between the combining node and the RF output. The reconfigurable output impedance transformer includes an intermediate node, first and second phase shift elements, and first and second variable capacitors. The first phase shift element has an input terminal coupled to the combining node and an output terminal coupled to the intermediate node, and the first phase shift element is configured to apply a first phase shift to the combined amplified signal. The second phase shift element has an input terminal coupled to the intermediate node and an output terminal coupled to the RF output, and the second phase shift element is configured to apply a second phase shift to the combined amplified signal. The first variable capacitor is coupled between the input terminal of the second phase shift element and a ground reference node, and the second variable capacitor is coupled between the output terminal of the second phase shift element and the ground reference node.

[0164] In one or more embodiments, the first phase shift is in a range of 0 degrees to 15 degrees; and the second phase shift is in a range of 15 degrees to 45 degrees.

[0165] In one or more embodiments, the reconfigurable output impedance transformer further comprises: a first inductor coupled between the first end of the first variable capacitor and the ground reference node; and a second inductor coupled between the first end of the second variable capacitor and the ground reference node.

[0166] In one or more embodiments, the reconfigurable output impedance transformer further comprises: a first fixed capacitor coupled in series with the first variable capacitor between the input terminal of the first phase shift element and the ground reference node; and a second fixed capacitor coupled in series with the second variable capacitor between the output terminal of the first phase shift element and the ground reference node.

[0167] Embodiments of a method of reconfiguring a Doherty power amplifier include coupling a load to an RF of the Doherty power amplifier, where the load is characterized by a load impedance. The Doherty power amplifier includes a carrier amplifier, a peaking amplifier, a combining node, an RF output, and a reconfigurable output impedance transformer. The carrier amplifier has a carrier amplifier input and a carrier amplifier output, and the carrier amplifier is configured to amplify a carrier signal received at the carrier amplifier input and produce an amplified carrier signal at the carrier amplifier output. The peaking amplifier has a peaking amplifier input and a peaking amplifier output, and the peaking amplifier is configured to amplify a peaking signal received at the peaking amplifier input and produce an amplified peaking signal at the peaking amplifier output. The combining node is coupled to the carrier amplifier output and the peaking amplifier output, and the combining node is configured to combine the amplified carrier signal and the amplified peaking signal to produce a combined amplified signal. The reconfigurable output impedance transformer is coupled between the combining node and the RF output. The reconfigurable output impedance transformer includes a first phase shift element, a first variable capacitor, and a second variable capacitor. The first phase shift element has an input terminal coupled to the combining node and an output terminal coupled to the RF output, and the first phase shift element is configured to apply a first phase shift to the combined amplified signal. The first variable capacitor is coupled to the input terminal of the first phase shift element. The second variable capacitor is coupled to the output terminal of the first phase shift element. The method further includes adjusting a first capacitance value of the first variable capacitor and a second capacitance value of the second variable capacitor to transform the load impedance to a combining node impedance.

[0168] In one or more embodiments: the load impedance is in a range of 40 ohms to 60 ohms; and the combining node impedance is in a range of 10 ohms to 30 ohms.

[0169] In one or more embodiments, each of the first and second variable capacitors is a capacitor selected from the group of voltage-controlled variable capacitors, digitally-controlled variable capacitors, and fuse-programmable capacitors; and adjusting the first capacitance value of the first variable capacitor and the second capacitance value of the second variable capacitor comprises performing a tuning process selected from changing first and second control voltages applied to the first and second variable capacitors, clocking digital codes into the first and second variable capacitors, and blowing fuses to set the first and second capacitance values.

[0170] The connecting lines shown in the various figures included herein are intended to represent exemplary functional relationships and / or physical couplings between the various elements. It should be noted that many alternative or additional functional relationships or physical connections can be present in an embodiment of the subject matter. Moreover, some terms can be used herein simply for the purpose of reference and, accordingly, are not intended to limit the scope of the disclosure to a description provided in which each term is used. Furthermore, the terms "first", "second", and other such numerical terms referring to structures do not imply a sequence or order unless the context clearly dictates such.

[0171] As used herein, a "node" means any internal or external reference point, connection point, junction point, signal line, conductive element, and the like, at which a given signal, logic level, voltage, data pattern, current, or quantity exists. Moreover, two or more nodes can be implemented by one physical element (and although received or output at a common node, two or more signals can still be multiplexed, modulated, or distinguished).

[0172] The foregoing description recites elements or nodes or features as being "connected" or "coupled" together. As used herein, "connected" means that one element is directly joined to another element (or directly in communication with another element), and not necessarily mechanically. Likewise, "coupled" means that one element is either directly or indirectly joined to another element (or directly or indirectly in electrical or other communication with another element), and not necessarily mechanically. Thus, although the schematics shown in the figures depict one exemplary arrangement of elements, additional intervening elements, devices, features, or components can be present in an embodiment of the depicted subject matter.

[0173] As used herein, the words "exemplary" and "example" mean "serving as an example, instance, or illustration." Any implementation described herein as exemplary or as an example is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, the foregoing description of various aspects of the subject matter discloses the best mode contemplated by the inventors. It is anticipated that modifications and / or corrections will occur to others skilled in the art based on the recognition of the functional and / or structural aspects of the subject matter. It is the intent, therefore, to defect only the broadest scope of the subject matter in accordance with the principles and features disclosed in this disclosure, including the best modes contemplated by the inventors. Furthermore, any recited reference is maintained, but its accuracy and the reliability of its results are not guaranteed.

[0174] While at least one exemplary embodiment has been presented in the foregoing detailed description of the application, it should be appreciated that a vast number of modifications can be made to the exemplary embodiments without departing from the scope of the claimed subject matter. It should also be appreciated that the exemplary embodiments described herein are not intended to limit the scope of the claimed subject matter in any way but rather are intended to provide a convenient guide to the features set forth in the claims. It should be understood that various changes can be made to the function and arrangement of elements without departing from the scope of the claims, which is defined by the following claims, including any equivalents within the scope of the claims.

Claims

1. A Dougherty power amplifier, characterized in that, include: A carrier amplifier having a carrier amplifier input and a carrier amplifier output, wherein the carrier amplifier is configured to amplify a carrier signal received at the carrier amplifier input and generate an amplified carrier signal at the carrier amplifier output; A peak amplifier having a peak amplifier input and a peak amplifier output, wherein the peak amplifier is configured to amplify a peak signal received at the peak amplifier input and generate an amplified peak signal at the peak amplifier output; A combining node coupled to the carrier amplifier output and the peak amplifier output, wherein the combining node is configured to combine the amplified carrier signal and the amplified peak signal to generate a combined amplified signal; Radio frequency (RF) output; as well as A reconfigurable output impedance transformer coupled between the combined node and the RF output, wherein the reconfigurable output impedance transformer includes... A first phase-shifting element has an input terminal coupled to the combined node and an output terminal coupled to the RF output, wherein the first phase-shifting element is configured to apply a first phase shift to the combined amplified signal. A first variable capacitor, coupled to the input terminal of the first phase shift element, and A second variable capacitor is coupled to the output terminal of the first phase-shifting element.

2. The Dougherty power amplifier according to claim 1, characterized in that, The first phase shift is in the range of 15 degrees to 45 degrees.

3. The Dougherty power amplifier according to claim 1 or 2, characterized in that, The reconfigurable output impedance transformer further includes: Intermediate node, the intermediate node being connected to the input end of the first phase shift element; and A second phase shift element has an input terminal coupled to the combined node and an output terminal coupled to the input terminal of the intermediate node and the first phase shift element, wherein the second phase shift element is configured to apply a second phase shift to the combined amplified signal.

4. The Dougherty power amplifier according to claim 3, characterized in that, The second phase shift is in the range of 0 to 15 degrees.

5. The Dougherty power amplifier according to any one of the preceding claims, characterized in that: The first variable capacitor has a first end coupled to the input terminal of the first phase shift element, and a second end coupled to a ground reference node; and The second variable capacitor has a first end coupled to the output terminal of the first phase shift element and a second end coupled to the ground reference node.

6. The Dougherty power amplifier according to claim 5, characterized in that, The reconfigurable output impedance transformer further includes: A first inductor, the first inductor being coupled between the first terminal of the first variable capacitor and the ground reference node; and A second inductor is coupled between the first terminal of the second variable capacitor and the ground reference node.

7. The Dougherty power amplifier according to claim 5 or 6, characterized in that, The reconfigurable output impedance transformer further includes: A first fixed capacitor, which is coupled in series with a first variable capacitor between the input terminal of the first phase shift element and the ground reference node; and A second fixed capacitor is coupled in series with the second variable capacitor between the output terminal of the first phase shift element and the ground reference node.

8. The Dougherty power amplifier according to claim 7, characterized in that, The reconfigurable output impedance transformer further includes: A first inductor, the first inductor being coupled between the first terminal of the first variable capacitor and the ground reference node; and A second inductor is coupled between the first terminal of the second variable capacitor and the ground reference node.

9. The Dougherty power amplifier according to any one of the preceding claims, characterized in that, Each of the first variable capacitor and the second variable capacitor is characterized by a tuning ratio of 5.0 or less.

10. The Dougherty power amplifier according to any one of the preceding claims, characterized in that, In addition, including: A signal splitter having a splitter input, a first splitter output coupled to a carrier amplifier input, and a second splitter output coupled to a peak amplifier input, wherein the signal splitter is configured to receive an input RF signal and split the input RF signal into a carrier RF signal and a peak RF signal, wherein the carrier RF signal is provided to the carrier amplifier input, and the peak RF signal is provided to the peak amplifier input; and A phase-shifting and impedance-inverting element is coupled between the carrier amplifier output and the combined node.

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