Low-phase-noise voltage-controlled oscillator
By introducing a resonant module, an automatic amplitude control module, and a tail current source module into the voltage-controlled oscillator, a closed-loop amplitude control circuit is formed, and the oscillation amplitude is dynamically adjusted, solving the problem of difficult phase noise control in the voltage-controlled oscillator and realizing the stability and integrated optimization of the oscillator.
Patent Information
- Application Number
- CN202511106567.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-08
- Publication Date
- 2025-11-18
AI Technical Summary
The phase noise of existing voltage-controlled oscillators is difficult to control effectively, especially at frequencies outside the loop bandwidth of the phase-locked loop, which affects the performance of the phase-locked loop system.
A low-phase-noise voltage-controlled oscillator was designed, comprising a resonant module, an automatic amplitude control module, and a tail current source module. By forming a closed-loop amplitude control circuit, the oscillation amplitude is dynamically adjusted, avoiding cross-coupling from entering the linear region and optimizing phase noise.
The phase noise performance of the voltage-controlled oscillator is significantly optimized, the stability of the oscillator is improved, and the structure is easy to integrate, reducing manufacturing costs.
Smart Images
Figure CN120979423A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of integrated circuit design, in particular to a low phase noise voltage controlled oscillator. BACKGROUND
[0002] With the continuous progress of integrated circuit technology, the demand for high-precision, low-jitter clock of electronic system is increasing. Frequency synthesizer is a circuit for providing high-precision clock source for various systems, and the phase-locked loop (PLL) is the most commonly used frequency synthesizer at present because of its wide tuning range, low phase noise, high stability and high integration.
[0003] The core of the phase-locked loop circuit is the voltage controlled oscillator (VCO), which is an oscillation circuit whose output signal frequency can be continuously adjusted by changing the input control voltage. It plays a crucial role in the performance of the phase-locked loop. In the phase-locked loop loop, the phase-locked loop loop negative feedback suppresses the phase noise within the loop bandwidth, while at higher frequencies outside the loop bandwidth, the phase noise of the voltage controlled oscillator cannot be effectively controlled, so the voltage controlled oscillator directly affects the phase noise of the phase-locked loop system to a great extent. SUMMARY
[0004] In view of the above problems of the prior art, the technical problem to be solved by the present application is to provide a voltage controlled oscillator which can significantly optimize the phase noise of the voltage controlled oscillator.
[0005] To solve the above technical problems, one technical solution adopted by the present application is to provide a low phase noise voltage controlled oscillator, comprising:
[0006] a resonance module for generating a differential oscillation signal of the voltage controlled oscillator and expanding the oscillation amplitude limit, the differential oscillation signal comprising a negative phase oscillation signal and a positive phase oscillation signal;
[0007] an automatic amplitude control module for detecting the maximum value of the amplitude of the differential oscillation signal output by the resonance module, and comparing it with a preset reference voltage, and outputting a corresponding trimming current according to the comparison result; and
[0008] a tail current source module for receiving the trimming current and a first reference current, and dynamically outputting a corresponding tail current to the resonance module according to the trimming current and the first reference current; the resonance module adjusts the amplitude of the differential oscillation signal according to the tail current, thereby forming a closed loop amplitude control loop and realizing self-calibration of the oscillation amplitude.
[0009] Further, the resonance module comprises:
[0010] a resonant cavity for generating a differential oscillation signal with adjustable frequency; and
[0011] a negative resistance network for providing negative resistance to counteract a parasitic positive resistance in the resonant cavity while extending the oscillation amplitude limit.
[0012] Further, the resonant cavity comprises:
[0013] a switched capacitor array for realizing frequency coarse adjustment under the control of a coarse control signal, the coarse control signal comprising a first control signal and a second control signal which are complementary to each other;
[0014] a variable capacitor array for realizing frequency fine adjustment under the control of a fine control signal; and
[0015] an inductive component for providing energy storage resonance and exchanging energy with the switched capacitor array and the variable capacitor array to maintain oscillation;
[0016] the negative resistance network comprises:
[0017] a cross-coupled pair for providing negative resistance to counteract a parasitic positive resistance in the resonant cavity; and
[0018] a capacitive voltage divider for increasing the oscillation amplitude under the condition that the cross-coupled pair is prevented from operating in the linear region.
[0019] Further, the switched capacitor array comprises a plurality of parallel connected switched capacitor units, each of the switched capacitor units comprising a first mos transistor M1, a second mos transistor M2, a third mos transistor M3, a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2; a gate of the first mos transistor M1, a gate of the second mos transistor M2 and a gate of the third mos transistor M3 are electrically connected and connected to a first control signal A, a drain of the first mos transistor M1 and a drain of the second mos transistor M2 are electrically connected and connected to a second control signal A_N, a source of the first mos transistor M1 and a source of the third mos transistor M3 are electrically connected, a source of the second mos transistor M2 and a drain of the third mos transistor M3 are electrically connected; one end of the first resistor R1 is electrically connected to the drain of the first mos transistor M1, the other end of the first resistor R1 is electrically connected to the source of the third mos transistor M3; a positive pole of the first capacitor C1 is electrically connected to a positive phase oscillation signal VOUT_P output node, a negative pole of the first capacitor C1 is electrically connected to the source of the third mos transistor M3; one end of the second resistor R2 is electrically connected to the drain of the second mos transistor M2, the other end of the second resistor R2 is electrically connected to the drain of the third mos transistor M3; a negative pole of the second capacitor C2 is electrically connected to the drain of the third mos transistor M3, a positive pole of the second capacitor C2 is electrically connected to a negative phase oscillation signal VOUT_N output node.
[0020] The variable capacitance array includes several parallel variable capacitance units, the variable capacitance units include a first variable capacitance C V1 and a second variable capacitance C V2 ; the negative electrode of the first variable capacitance C V1 is electrically connected with the negative electrode of the second variable capacitance C V2 and accesses a fine adjustment control signal V Ctr , the positive electrode of the first variable capacitance C V1 is electrically connected with the negative phase oscillation signal VOUT_N output node, and the positive electrode of the second variable capacitance C V2 is electrically connected with the positive phase oscillation signal VOUT_P output node.
[0021] The inductance component includes a first inductance L1 and a second inductance L2; the first end of the first inductance L1 is electrically connected with the first end of the second inductance L2 and accesses the power signal VDD, the second end of the first inductance L1 is electrically connected with the negative phase oscillation signal VOUT_N output node, and the second end of the second inductance L2 is electrically connected with the positive phase oscillation signal VOUT_P output node.
[0022] Further, the cross-coupled pair includes a fourth mos tube M4 and a fifth mos tube M5, the gate of the fourth mos tube M4, the source of the fourth mos tube M4 and the source of the fifth mos tube M5 are electrically connected and access the tail current I Tail output by the tail current source module, the drain of the fourth mos tube M4 is electrically connected with the negative phase oscillation signal VOUT_N output node, the gate of the fourth mos tube M4 is electrically connected with the first output end of the capacitor voltage divider, the gate of the fifth mos tube M5 is electrically connected with the second output end of the capacitor voltage divider, and the drain of the fifth mos tube M5 is electrically connected with the positive phase oscillation signal VOUT_P output node.
[0023] The capacitor voltage divider includes a third capacitor C3, a fourth capacitor C4, a third resistor R3 and a fourth resistor R4, the positive electrode of the third capacitor C3 is electrically connected with the drain of the fourth mos tube M4, and the negative electrode of the third capacitor C3 is electrically connected with the gate of the fifth mos tube M5 as the second output end of the capacitor voltage divider; the positive electrode of the fourth capacitor C4 is electrically connected with the drain of the fifth mos tube M5, and the negative electrode of the fourth capacitor C4 is electrically connected with the gate of the fourth mos tube M4 as the first output end of the capacitor voltage divider; one end of the third resistor R3 is electrically connected with one end of the fourth resistor R4 and accesses a first bias voltage V B1The other end of the third resistor R3 is electrically connected to the gate of the fourth MOSFET M4; the other end of the fourth resistor R4 is electrically connected to the gate of the fifth MOSFET M5.
[0024] Furthermore, the automatic amplitude control module includes:
[0025] A peak detection unit is used to detect the maximum value of the amplitude of the differential oscillation signal output by the resonant module and generate a corresponding amplitude voltage; and
[0026] A transconductance amplifier is used to compare the amplitude voltage output by the peak detection unit with a preset reference voltage, and output a corresponding adjustment current based on the comparison result.
[0027] Furthermore, the peak detection circuit includes a sixth MOSFET M6, a seventh MOSFET M7, an eighth MOSFET M8, a ninth MOSFET M9, a tenth MOSFET M10, an eleventh MOSFET M11, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a fifth resistor R5, and a sixth resistor R6. The positive terminal of the fifth capacitor C5 receives a negative-phase oscillation signal, and the negative terminal of the fifth capacitor C5 is electrically connected to the positive terminal of the seventh capacitor C7 through the fifth resistor R5. The positive terminal of the sixth capacitor C6 receives a positive-phase oscillation signal, and the negative terminal of the sixth capacitor C6 is electrically connected to the positive terminal of the seventh capacitor C7 through the sixth resistor R6. The positive terminal of the seventh capacitor C7 is connected to a second bias voltage V. B2 The negative terminal of the seventh capacitor C7 is grounded; the source of the sixth MOSFET M6 is connected to the power supply signal VDD; the gate of the sixth MOSFET M6 is electrically connected to the gate of the seventh MOSFET M7 and the gate of the eighth MOSFET M8; and the drain of the sixth MOSFET M6 is connected to the second reference current I. ref The source of the seventh MOSFET M7 is connected to the power supply signal VDD, and the drain of the seventh MOSFET M7 is grounded through the eighth capacitor C8; the source of the eighth MOSFET M8 is connected to the power supply signal VDD, and the drain of the eighth MOSFET M8 is electrically connected to the source of the eleventh MOSFET M11; the drain of the eleventh MOSFET M11 is grounded, and the source of the eleventh MOSFET M11 is connected to the third bias voltage V. B3 The gate of the ninth MOSFET M9 is electrically connected to the negative terminal of the sixth capacitor C6, the source of the ninth MOSFET M9 is electrically connected to the source of the tenth MOSFET M10 and the positive terminal of the eighth capacitor C8, and the drain of the ninth MOSFET M9 is grounded; the gate of the tenth MOSFET M10 is electrically connected to the negative terminal of the fifth capacitor C5, and the drain of the tenth MOSFET M10 is grounded.
[0028] Furthermore, the transconductance amplifier includes a twelfth MOSFET M12, a thirteenth MOSFET M13, a fourteenth MOSFET M14, a fifteenth MOSFET M15, a sixteenth MOSFET M16, a seventeenth MOSFET M17, an eighteenth MOSFET M18, a nineteenth MOSFET M19, a twentieth MOSFET M20, a twenty-first MOSFET M21, and a tenth capacitor C10. The gate of the thirteenth MOSFET M13 is electrically connected to the positive terminal of the eighth capacitor C8 to receive an amplitude voltage Va. The drain of the thirteenth MOSFET M13 is electrically connected to the source of the eighteenth MOSFET M18. The source of the thirteenth MOSFET M13 is electrically connected to the source of the fourteenth MOSFET M14 and the drain of the twelfth MOSFET M12. The source of the twelfth MOSFET M12 is grounded, and its gate is connected to a fourth bias voltage V. B4 The gate of the fourteenth MOSFET M14 is electrically connected to the positive terminal of the ninth capacitor C9 to access the reference voltage V. REF The drain of the fourteenth capacitor M14 is electrically connected to the drain of the fifteenth MOSFET M15; the source of the fifteenth MOSFET M15 is connected to the power supply voltage VDD; the drain of the fifteenth MOSFET M15 is electrically connected to the source of the seventeenth MOSFET M17; and the gate of the fifteenth MOSFET M15 is electrically connected to the gate of the sixteenth MOSFET M16 and connected to the fifth bias voltage VDD. B5 The source of the sixteenth MOSFET M16 is connected to the power supply voltage VDD, and the drain of the sixteenth MOSFET M16 is electrically connected to the source of the eighteenth MOSFET M18; the drain of the eighteenth MOSFET M18 is electrically connected to the positive terminal of the tenth capacitor C10, and the gate of the eighteenth MOSFET M18 is electrically connected to the gate of the seventeenth MOSFET M17 and connected to the sixth bias voltage VDD. B6 The drain of the seventeenth MOSFET M17 is electrically connected to the drain of the nineteenth MOSFET M19, the source of the nineteenth MOSFET M19 is grounded, and the gate of the nineteenth MOSFET M19 is electrically connected to the gate of the twentieth MOSFET M20. The gate of the twentieth MOSFET M20 is also electrically connected to the drain of the nineteenth MOSFET M19, the source of the twentieth MOSFET M20 is grounded, and the drain of the twentieth MOSFET M20 is electrically connected to the drain of the eighteenth MOSFET M18. The positive terminal of the tenth capacitor C10 is electrically connected to the gate of the twenty-first MOSFET M21, and the negative terminal of the tenth capacitor C10 is grounded. The source of the twenty-first MOSFET M21 is grounded, and the drain of the twenty-first MOSFET M21 outputs a trimming current I. AAC .
[0029] Furthermore, the tail current source module includes a third inductor L3, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a twenty-second MOSFET M22, a twenty-third MOSFET M23, a twenty-fourth MOSFET M24, a twenty-fifth MOSFET M25, a twenty-sixth MOSFET M26, and a tail current source array connected in parallel with the twelfth capacitor C12; the source of the twenty-second MOSFET M22 is connected to the power supply signal VDD, and the drain of the twenty-second MOSFET M22 is connected to the source of the twenty-fourth MOSFET. Electrically connected, the gate of the 22nd MOSFET M22 is also electrically connected to the drain of the 24th MOSFET M24, and the gate of the 22nd MOSFET M22 is also electrically connected to the gate of the 23rd MOSFET M23; the source of the 23rd MOSFET M23 is connected to the power supply signal VDD, and the drain of the 23rd MOSFET M23 is electrically connected to the drain of the 25th MOSFET M25; the gate of the 24th MOSFET M24 is grounded, and the drain of the 24th MOSFET M24 is connected to the adjustment current I. AAC and the first reference current I REF The drain of the 24th MOSFET M24 is also electrically connected to the gate of the 23rd MOSFET M23; the source of the 25th MOSFET M25 is grounded, and its drain and gate are electrically connected. The gate of the 25th MOSFET M25 is also electrically connected to the source of the 26th MOSFET M26, whose drain is grounded, and its gate and drain are electrically connected. One end of the seventh resistor R7 is electrically connected to the gate of the 25th MOSFET M25, and the other end is electrically connected to the positive terminal of its 11th capacitor C11. The negative terminal of the eleventh capacitor C11 is grounded, and the positive terminal of the eleventh capacitor C11 is also electrically connected to the input terminal of the tail current source array. The output terminal of the tail current source array is electrically connected to the first terminal of the third inductor L3, and the bias terminal of the tail current source array is grounded. The positive terminal of the twelfth capacitor C12 is electrically connected to the negative terminal of the thirteenth capacitor C13, and the negative terminal of the twelfth capacitor C12 is grounded. The negative terminal of the thirteenth capacitor C13 is electrically connected to the first terminal of the third inductor L3. The positive terminal of the thirteenth capacitor C13 is electrically connected to the second terminal of the third inductor L3. The second terminal of the third inductor L3 outputs a tail current I. Tail .
[0030] Furthermore, the tail current source array includes several parallel tail current source units, each tail current source unit including a 27th MOSFET M27 and a switch K1; the gate of the 27th MOSFET M27 serves as the input terminal of the tail current source array and is electrically connected to the positive terminal of the 11th capacitor C11; the source of the 27th MOSFET M27 is grounded through the switch K1; and the drain of the 27th MOSFET M27 serves as the output terminal of the tail current source array and is electrically connected to the first terminal of the third inductor L3.
[0031] The low-phase-noise voltage-controlled oscillator of the present invention has at least the following beneficial effects: The present invention achieves self-calibration of the oscillation amplitude by setting an automatic amplitude control module to form a closed-loop amplitude control circuit, avoiding cross-coupled pairs from operating in the linear region, thereby significantly optimizing the phase noise generated by the cross-coupled pairs; by dynamically adjusting the tail current through the automatic amplitude control module, the oscillation amplitude is increased without allowing the cross-coupled pairs to enter the linear region, which can significantly optimize the phase noise; the tail current source module dynamically outputs the corresponding tail current to the resonant module under the control of the automatic amplitude control module, and the resonant module adjusts the amplitude of the differential oscillation signal according to the tail current, forming a closed-loop amplitude control circuit to achieve self-calibration of the oscillation amplitude, stabilizing the oscillation amplitude within a suitable range and improving the stability of the oscillator; the additional structure introduced by the oscillator of the present invention, based on the structure of a basic oscillator, is easy to integrate and has a lower manufacturing cost. Attached Figure Description
[0032] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0033] Figure 1 This is a schematic diagram of one embodiment of the low phase noise voltage-controlled oscillator of the present invention.
[0034] Figure 2 for Figure 1 The circuit schematic of the resonant module in the image.
[0035] Figure 3 for Figure 1 The circuit diagram of the automatic amplitude control module in the image.
[0036] Figure 4 for Figure 1 The circuit schematic of the tail current source module.
[0037] Figure 5 This is a functional simulation diagram of the low phase noise voltage-controlled oscillator of the present invention. Detailed Implementation
[0038] The invention will now be further described with reference to the accompanying drawings.
[0039] Noise sources in a voltage-controlled oscillator (VCO) can be broadly categorized into device noise and external noise. Device noise primarily includes thermal noise and flicker noise, while external noise mainly consists of power supply noise and noise on the control lines. Device noise in a VCO primarily originates from cross-coupled pairs, parasitic resistance within the resonant cavity, and tail current sources. Increasing the tail current source increases the oscillation amplitude of the oscillator. When the oscillator operates in the current-limited region, the amplitude depends on the size of the tail current source. However, as the tail current source gradually increases to a certain value, the cross-coupled pairs enter the linear region due to the increased amplitude, eventually leading to a near-saturation output voltage amplitude, at which point the oscillator operates in the voltage-limited region. The phase noise generated by the cross-coupled pairs is optimized as the amplitude increases, but it worsens the flicker noise when the cross-coupled pairs enter the linear region. Therefore, operating the oscillator at the boundary between the current-limited and voltage-limited regions can significantly optimize its phase noise. Thus, this paper proposes a low-phase-noise VCO with amplitude self-calibration. Increasing the amplitude without the transistors entering the linear region can significantly optimize the phase noise of the VCO.
[0040] Please see Figure 1 The low-phase-noise voltage-controlled oscillator of the present invention includes a resonant module 100, an automatic amplitude control module 200, and a tail current source module 300. The resonant module 100 generates a differential oscillation signal for the voltage-controlled oscillator and extends the oscillation amplitude limit. The differential oscillation signal includes a negative-phase oscillation signal VOUT_N and a positive-phase oscillation signal VOUT_P. In this embodiment, extending the oscillation amplitude limit means increasing the oscillation amplitude without allowing the cross-coupled pair 121 to operate in the linear region. The automatic amplitude control module 200 detects the maximum value of the differential oscillation signal output by the resonant module 100 and compares it with a preset reference voltage V. REF The comparison is performed, and the corresponding adjustment current I is output based on the comparison result. AAC The tail current source module 300 is used to receive the adjustment current I. AAC and the first reference current I REF And according to the adjustment current I AAC and the first reference current I REF Dynamically output corresponding tail current I Tail The current is supplied to the resonant module 100 during operation, and the resonant module 100 operates according to the tail current I. Tail The amplitude of the differential oscillation signal is adjusted to form a closed-loop amplitude control loop, thereby achieving self-calibration of the oscillation amplitude.
[0041] Please see Figure 2The resonant module 100 includes a resonant cavity 110, which generates a frequency-adjustable differential oscillation signal. The resonant cavity 110 includes a switched capacitor array 111, a variable capacitor array 112, and an inductor assembly 113. The switched capacitor array 111 is used to achieve coarse frequency adjustment under the control of a coarse adjustment control signal, which includes complementary first control signal A and second control signal A_N, both of which are digital signals. The switched capacitor array 111 includes several switched capacitor units connected in parallel; multiple switched capacitor units connected in parallel can expand the resonant range of the voltage-controlled oscillator. In this embodiment, only one switched capacitor unit is provided in the switched capacitor array 111. Specifically, the switched capacitor unit includes a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2. The gates of the first MOSFET M1, the second MOSFET M2, and the third MOSFET are electrically connected and connected to a first control signal A. The drain of the first MOSFET M1 is electrically connected to the drain of the second MOSFET M2 and connected to a second control signal A_N. The source of the first MOSFET M1 is electrically connected to the source of the third MOSFET M3, and the source of the second MOSFET M2 is electrically connected to the drain of the third MOSFET M3. One end of the first resistor R1 is electrically connected to the drain of the first MOSFET M1, and the other end of the first resistor R1 is electrically connected to the source of the third MOSFET M3. The positive terminal of the first capacitor C1 is electrically connected to the output node of the negative phase oscillation signal VOUT_N, and the negative terminal of the first capacitor C1 is electrically connected to the source of the third MOSFET M3. One end of the second resistor R2 is electrically connected to the drain of the second MOSFET M2, and the other end of the second resistor R2 is electrically connected to the drain of the third MOSFET M3. The negative terminal of the second capacitor C2 is electrically connected to the drain of the third MOSFET M3, and the positive terminal of the second capacitor C2 is electrically connected to the output node of the positive-phase oscillation signal VOUT_P. In this embodiment, the first MOSFET M1, the second MOSFET M2, and the third MOSFET M3 are all N-type MOSFETs.
[0042] In the switched capacitor unit, when the first control signal A is high, the first capacitor C1 and the second capacitor C2 are connected to the resonant cavity 110, increasing the resonant capacitance and thus reducing the oscillation frequency. When the first control signal A is low, the first capacitor C1, the second capacitor C2, and the parasitic capacitance of the first MOSFET M1 are connected in series to ground. The capacitance connected to the resonant cavity 110 is very small, which is equivalent to the capacitor being turned off, and the oscillation frequency increases. By connecting multiple switched capacitor units in parallel, a large capacitance variation range can be formed, avoiding the problem of insufficient tuning range.
[0043] The variable capacitor array 112 is used for fine-tuning the control signal V.Ctr Fine-tuning of the frequency is achieved under the control of the fine-tuning control signal V. Ctr The signal is a voltage signal. The variable capacitor array 112 includes several variable capacitor units connected in parallel. Multiple variable capacitor units connected in parallel can change the gain of the voltage-controlled oscillator (KVCO). Each variable capacitor unit includes a first variable capacitor C. V1 With the second variable capacitor C V2 The first variable capacitor C V1 The negative terminal of the second variable capacitor C V2 The negative terminal is electrically connected and connected to the fine-tuning control signal V. Ctr The first variable capacitor C V1 The positive terminal of the second variable capacitor C is electrically connected to the output node of the negative phase oscillation signal VOUT_N. V2 The positive terminal is electrically connected to the output node of the positive phase oscillation signal VOUT_P. The first variable capacitor C... V1 Second variable capacitor C V2 The capacitance value is subject to fine-tuning control signal V Ctr The frequency is continuously adjusted by the constant change in voltage, thus enabling continuous fine-tuning. Fine-tuning ensures precise frequency positioning within each step of coarse-tuning through continuous voltage control, and the lower gain of fine-tuning helps reduce phase noise.
[0044] Inductor assembly 113 provides energy storage resonance, exchanging energy with the switched capacitor array 111 and the variable capacitor array 112 to maintain oscillation. Inductor assembly 113 includes a first inductor L1 and a second inductor L2. A first terminal of the first inductor L1 is electrically connected to the first terminal of the second inductor L2 and connected to a power supply signal VDD. A second terminal of the first inductor L1 is electrically connected to the output node of the negative-phase oscillation signal VOUT_N, and a second terminal of the second inductor L2 is electrically connected to the output node of the positive-phase oscillation signal VOUT_P.
[0045] The resonant module 100 further includes a negative resistance network 120, which provides negative resistance to counteract the parasitic positive resistance in the resonant cavity 110 and simultaneously expands the oscillation amplitude limit. The negative resistance network 120 includes a cross-coupling pair 121 and a capacitive voltage divider 122. The cross-coupling pair 121 provides negative resistance to counteract the parasitic positive resistance in the resonant cavity 110, thereby enabling the voltage-controlled oscillator to operate continuously. Specifically, the cross-coupling pair 121 includes a fourth MOSFET M4 and a fifth MOSFET M5. The gate and source of the fourth MOSFET M4 are electrically connected to the source of the fifth MOSFET M5 and connected to the tail current I output by the tail current source module 300. TailThe drain of the fourth MOSFET M4 is electrically connected to the output node of the negative-phase oscillation signal VOUT_N, and the gate of the fourth MOSFET M4 is electrically connected to the first output terminal of the capacitor voltage divider 122. The gate of the fifth MOSFET M5 is electrically connected to the second output terminal of the capacitor voltage divider 122, and the drain of the fifth MOSFET M5 is electrically connected to the output node of the positive-phase oscillation signal VOUT_P. In this embodiment, both the fourth MOSFET M4 and the fifth MOSFET M5 are N-type MOSFETs.
[0046] The capacitor voltage divider 122 is used to increase the oscillation amplitude while preventing the cross-coupled transistor from operating in the linear region. Specifically, the capacitor voltage divider 122 includes a third capacitor C3, a fourth capacitor C4, a third resistor R3, and a fourth resistor R4. The positive terminal of the third capacitor C3 is electrically connected to the drain of the fourth MOSFET M4, and the negative terminal of the third capacitor C3 serves as the second output terminal of the capacitor voltage divider 122 and is electrically connected to the gate of the fifth MOSFET M5. The positive terminal of the fourth capacitor C4 is electrically connected to the drain of the fifth MOSFET M5, and the negative terminal of the fourth capacitor C4 serves as the first output terminal of the capacitor voltage divider 122 and is electrically connected to the gate of the fourth MOSFET M4. One end of the third resistor R3 is electrically connected to one end of the fourth resistor R4 and is connected to a first bias voltage V. B1 The other end of the third resistor R3 is electrically connected to the gate of the fourth MOSFET M4. The other end of the fourth resistor R4 is electrically connected to the gate of the fifth MOSFET M5.
[0047] The noise within the resonant module 100 is mainly generated by the inductance within the resonant cavity 110 and the cross-coupled pair 121. The noise from the inductance is primarily related to the manufacturing process and layout. When the cross-coupled pair 121 operates in the ideal saturation region, its flicker noise will not be converted into phase noise. The thermal noise of the cross-coupled pair 121... It is obtained through the following formula:
[0048]
[0049] Where γ represents the MOS tube effect coefficient, k represents the Boltzmann constant, T represents the absolute temperature, and I represents the tube effect coefficient. ss Here, V0 represents the tail current, V0 represents the peak-to-peak value of the single-ended oscillation of the voltage-controlled oscillator, f0 is the resonant frequency, Q is the quality factor of the resonant cavity, and f represents the frequency offset. This equation shows that, under the condition that the cross-coupled pair 121 does not enter the linear region, increasing the tail current and the oscillation amplitude can optimize the phase noise. The relationship between the tail current and the peak-to-peak value of the single-ended oscillation in the current-limited region can be expressed by the following formula:
[0050]
[0051] Among them, R p This represents the equivalent parallel resistance of the parasitic resistance of the inductor in the resonant cavity. According to the above equation, increasing the tail current and improving the oscillation amplitude when the cross-coupled pair 121 does not operate in the linear region can optimize the phase noise. The capacitor divider 122 can increase the oscillation amplitude while preventing the cross-coupled pair 121 from entering the linear region. This is because to prevent the cross-coupled pair 121 from entering the linear region, the peak-to-peak value V0 of the single-ended oscillation needs to be less than the threshold voltage V of the cross-coupled pair 121. TH When the capacitor divider 122 is introduced, the third capacitor C3 and the parasitic capacitance at the gate of the fifth MOSFET M5 form a capacitor voltage divider, reducing the voltage swing at the gate from V0 to V. a V a The calculation formula is as follows:
[0052]
[0053] Where C3 represents the capacitance value of the third capacitor C3, C a This represents the parasitic capacitance of the gate of the fifth MOSFET M5. If a first bias voltage V, equal to the power supply VDD, is selected... B1 Then the single-ended swing amplitude rises to (2V) TH -2V a ), reduce the first bias voltage V B1 This allows for a larger voltage swing.
[0054] Please see Figure 3 The automatic amplitude control module 200 includes a peak detection unit 210, which detects the maximum amplitude of the differential oscillation signal output by the resonant module 100 and generates a corresponding amplitude voltage Va. The peak detection circuit includes a sixth MOSFET M6, a seventh MOSFET M7, an eighth MOSFET M8, a ninth MOSFET M9, a tenth MOSFET M10, an eleventh MOSFET M11, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a fifth resistor R5, and a sixth resistor R6. The positive terminal of the fifth capacitor C5 receives a negative-phase oscillation signal, and the negative terminal of the fifth capacitor C5 is electrically connected to the positive terminal of the seventh capacitor C7 through the fifth resistor R5. The positive terminal of the sixth capacitor C6 receives a positive-phase oscillation signal, and the negative terminal of the sixth capacitor C6 is electrically connected to the positive terminal of the seventh capacitor C7 through the sixth resistor R6. The positive terminal of the seventh capacitor C7 is connected to a second bias voltage V. B2 The negative terminal of the seventh capacitor C7 is grounded. The source of the sixth MOSFET M6 is connected to the power supply signal VDD. The gate of the sixth MOSFET M6 is electrically connected to the gate of the seventh MOSFET M7 and the gate of the eighth MOSFET M8. The drain of the sixth MOSFET M6 is connected to the second reference current I.ref The source of the seventh MOSFET M7 is connected to the power supply signal VDD, and the drain of the seventh MOSFET M7 is grounded through the eighth capacitor C8. The source of the eighth MOSFET M8 is connected to the power supply signal VDD, and the drain of the eighth MOSFET M8 is electrically connected to the source of the eleventh MOSFET M11. The drain of the eleventh MOSFET M11 is grounded, and the source of the eleventh MOSFET M11 is connected to the third bias voltage V. B3 The gate of the ninth MOSFET M9 is electrically connected to the negative terminal of the sixth capacitor C6. The source of the ninth MOSFET M9 is electrically connected to the source of the tenth MOSFET M10 and the positive terminal of the eighth capacitor C8. The drain of the ninth MOSFET M9 is grounded. The gate of the tenth MOSFET M10 is electrically connected to the negative terminal of the fifth capacitor C5. The drain of the tenth MOSFET M10 is grounded. In this embodiment, the sixth MOSFET M6, the seventh MOSFET M7, the eighth MOSFET M8, the ninth MOSFET M9, the tenth MOSFET M10, and the eleventh MOSFET M11 are all P-type MOSFETs.
[0055] The fifth capacitor C5 and the sixth capacitor C6 act as DC blocking and AC passing. The fifth resistor R5, the sixth resistor R6, and the seventh capacitor C7 form a low-pass filter. The input second bias voltage VB2 is used to ensure the static operating point of the input differential pair transistors, the ninth MOSFET M9 and the tenth MOSFET M10. The sixth MOSFET M6, the seventh MOSFET M7, and the eighth MOSFET M8 form a current mirror structure. When the peak detection unit 210 starts working, the differential oscillation signal input to the peak detection unit 210 changes the current flowing into the ninth MOSFET M9 and the tenth MOSFET M10. The eighth capacitor C8 is a charging and discharging capacitor. The remaining current of the current mirror flows into the eighth capacitor C8 for charging, obtaining the amplitude voltage Va corresponding to the peak value of the differential oscillation signal. The peak-to-peak value of the differential oscillation signal refers to the maximum value of the amplitude of the differential oscillation signal. The input third bias voltage V B3 The principle of controlling the amplitude of the preset voltage is similar to that of generating the amplitude voltage Va, ultimately yielding the preset reference voltage V. REF .
[0056] The automatic amplitude control module 200 also includes a transconductance amplifier 220, which is used to compare the amplitude voltage output by the peak detection unit 210 with a preset reference voltage V. REF The comparison is performed, and the corresponding adjustment current I is output based on the comparison result. AACThe transconductance amplifier 220 includes a twelfth MOSFET M12, a thirteenth MOSFET M13, a fourteenth MOSFET M14, a fifteenth MOSFET M15, a sixteenth MOSFET M16, a seventeenth MOSFET M17, an eighteenth MOSFET M18, a nineteenth MOSFET M19, a twentieth MOSFET M20, a twenty-first MOSFET M21, and a tenth capacitor C10. The gate of the thirteenth MOSFET M13 is electrically connected to the positive terminal of the eighth capacitor C8 to receive an amplitude voltage Va. The drain of the thirteenth MOSFET M13 is electrically connected to the source of the eighteenth MOSFET M18. The source of the thirteenth MOSFET M13 is electrically connected to the source of the fourteenth MOSFET M14 and the drain of the twelfth MOSFET M12. The source of the twelfth MOSFET M12 is grounded, and its gate is connected to a fourth bias voltage V. B4 The gate of the fourteenth MOSFET M14 is electrically connected to the positive terminal of the ninth capacitor C9 to access the reference voltage V. REF The drain of the fourteenth capacitor M14 is electrically connected to the drain of the fifteenth MOSFET M15. The source of the fifteenth MOSFET M15 is connected to the power supply voltage VDD, the drain of the fifteenth MOSFET M15 is electrically connected to the source of the seventeenth MOSFET M17, and the gate of the fifteenth MOSFET M15 is electrically connected to the gate of the sixteenth MOSFET M16 and connected to the fifth bias voltage VDD. B5 The source of the sixteenth MOSFET M16 is connected to the power supply voltage VDD, and the drain of the sixteenth MOSFET M16 is electrically connected to the source of the eighteenth MOSFET M18. The drain of the eighteenth MOSFET M18 is electrically connected to the positive terminal of the tenth capacitor C10, and the gate of the eighteenth MOSFET M18 is electrically connected to the gate of the seventeenth MOSFET M17 and connected to the sixth bias voltage VDD. B6 The drain of the seventeenth MOSFET M17 is electrically connected to the drain of the nineteenth MOSFET M19. The source of the nineteenth MOSFET M19 is grounded, and its gate is electrically connected to the gate of the twentieth MOSFET M20. The gate of the twentieth MOSFET M20 is also electrically connected to the drain of the nineteenth MOSFET M19. The source of the twentieth MOSFET M20 is grounded, and its drain is electrically connected to the drain of the eighteenth MOSFET M18. The positive terminal of the tenth capacitor C10 is electrically connected to the gate of the twentieth MOSFET M21, and its negative terminal is grounded. The source of the twentieth MOSFET M21 is grounded, and its drain outputs a trimming current I. AACIn this embodiment, the twelfth MOSFET M12, the thirteenth MOSFET M13, the fourteenth MOSFET M14, the nineteenth MOSFET M19, the twentieth MOSFET M20, and the twenty-first MOSFET M21 are all N-type MOSFETs; the fifteenth MOSFET M15, the sixteenth MOSFET M16, the seventeenth MOSFET M17, and the eighteenth MOSFET M18 are all P-type MOSFETs.
[0057] The amplitude voltage Va obtained by the peak detection unit 210 and the reference voltage V REF All outputs are sent to transconductance amplifier 220. The first stage of transconductance amplifier 220 is a folded common-source common-gate amplifier with differential input and single-ended output, and the second stage is a single-transistor amplifier. Specifically, the tenth capacitor C10 and the twenty-first MOSFET M21 constitute the single-transistor amplifier, and the remaining components constitute the folded common-source common-gate amplifier. The twelfth MOSFET M12 provides the tail current of the input pair; the thirteenth MOSFET M13 and the fourteenth MOSFET M14 are the input pair of the operational amplifier; the fifteenth MOSFET M15 and the sixteenth MOSFET M16 provide the tail current source of the operational amplifier; the seventeenth MOSFET M17 and the eighteenth MOSFET M18 are connected to the circuit as a common-source common-gate structure; the nineteenth MOSFET M19 and the twentieth MOSFET M20 serve as load MOSFETs; the tenth capacitor C10 is introduced to adjust the phase margin of the operational amplifier and enhance stability; the output adjustment current I... AAC In the tail current source module 300, the adjustment current I AAC With the first reference current I REF The reference current constitutes the tail current source module 300. Therefore, the automatic amplitude control module 200 detects the amplitude of the differential oscillation signal output by the resonant module 100 and adjusts the reference current of the tail current source module 300 according to the amplitude to achieve the function of controlling the oscillation amplitude.
[0058] Please see Figure 4The tail current source module 300 includes a third inductor L3, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a twenty-second MOSFET M22, a twenty-third MOSFET M23, a twenty-fourth MOSFET M24, a twenty-fifth MOSFET M25, a twenty-sixth MOSFET M26, and a tail current source array 310 connected in parallel with the twelfth capacitor C12. The source of the twenty-second MOSFET M22 is connected to a power supply signal VDD. The drain of the twenty-second MOSFET M22 is electrically connected to the source of the twenty-fourth MOSFET. The gate of the twenty-second MOSFET M22 is also electrically connected to the drain of the twenty-fourth MOSFET M24. The gate of the twenty-second MOSFET M22 is also electrically connected to the gate of the twenty-third MOSFET M23. The source of the twenty-third MOSFET M23 is connected to a power supply signal VDD. The drain of the twenty-third MOSFET M23 is electrically connected to the drain of the twenty-fifth MOSFET M25. The gate of the 24th MOSFET M24 is grounded, and the drain of the 24th MOSFET M24 is connected to the adjustment current I. AAC and the first reference current I REF The drain of the 24th MOSFET M24 is also electrically connected to the gate of the 23rd MOSFET M23. The source of the 25th MOSFET M25 is grounded, and its drain and gate are electrically connected. The gate of the 25th MOSFET M25 is also electrically connected to the source of the 26th MOSFET M26, whose drain is grounded and whose gate and drain are electrically connected. One end of the seventh resistor R7 is electrically connected to the gate of the 25th MOSFET M25, and the other end is electrically connected to the positive terminal of its corresponding 11th capacitor C11. The negative terminal of the 11th capacitor C11 is grounded, and its positive terminal is also electrically connected to the input terminal of the tail current source array 310. The output terminal of the tail current source array 310 is electrically connected to the first terminal of the third inductor L3, and the bias terminal of the tail current source array 310 is grounded. The positive terminal of the twelfth capacitor C12 is electrically connected to the negative terminal of the thirteenth capacitor C13, and the negative terminal of the twelfth capacitor C12 is grounded. The negative terminal of the thirteenth capacitor C13 is electrically connected to the first terminal of the third inductor L3, and the positive terminal of the thirteenth capacitor C13 is electrically connected to the second terminal of the third inductor L3. The second terminal of the third inductor L3 outputs a tail current ITai l. In this embodiment, the twenty-second MOSFET M22, the twenty-third MOSFET M23, the twenty-fourth MOSFET M24, and the twenty-sixth MOSFET M26 are all P-type MOSFETs, and the twenty-fifth MOSFET M25 is an N-type MOSFET.
[0059] The tail current source array 310 includes several parallel tail current source units, each including a 27th MOSFET M27 and a switch K1. The gate of the 27th MOSFET M27 serves as the input terminal of the tail current source array 310 and is electrically connected to the positive terminal of the 11th capacitor C11. The source of the 27th MOSFET M27 is grounded through the switch, and the drain of the 27th MOSFET M27 serves as the output terminal of the tail current source array 310 and is electrically connected to the first terminal of the third inductor L3. In this embodiment, the 27th MOSFET M27 is an N-type MOSFET.
[0060] Among them, the 22nd MOSFET M22, the 23rd MOSFET M23, and the 24th MOSFET M24 constitute a single-ended output differential current amplifier. The addition of the cascode 24th MOSFET M24 improves the voltage margin. The 26th MOSFET M26 is connected as a diode. When the gate voltage V of the tail current transistor... Tail When the current is too large, the 26th MOSFET M26 conducts to conduct the current, thus limiting the amplitude. The 7th resistor R7 and the 11th capacitor C11 form a low-pass filter to filter out some of the thermal noise from the left bias circuit. The 27th MOSFET M27 and switch K1 constitute a tail current source unit in the tail current source array 310. The switching of each tail current source unit is controlled by the code value (i.e., an n-bit binary number, each bit can control the switching of one tail current source unit), thereby controlling the magnitude of the tail current of the resonant module 100. The 12th capacitor C12 is connected in parallel with the tail current source array 310. Its large capacitance value is used to filter out noise. The inductor-capacitor resonant cavity 110, composed of the 3rd inductor L3 and the 13th capacitor C13, resonates at twice the oscillation frequency of the oscillator, thus acting as a high impedance to reduce the tail current I. Tail The resulting second harmonic current.
[0061] Please see Figure 5 In the figure, VOUT_N and VOUT_P represent the negative-phase oscillation signal and the positive-phase oscillation signal in the differential voltage signal output by the resonant module 100, respectively. The resonant module 100 starts oscillating under a large tail current, at which point the oscillation amplitude is very large, and the entire resonant module 100 operates in the voltage-limited region (approximately the first 100 ns). In the figure, Va represents the peak value (i.e., the maximum amplitude voltage) of the differential oscillation signal detected by the peak detection unit 210, and V... REF The reference voltage for the preset oscillator operation is set. The peak detection unit 210 detects the peak value of the differential oscillation signal output by the resonant module 100 and outputs an amplitude voltage Va. After oscillation starts, the amplitude voltage Va is pulled low, and through the feedback effect of the entire loop, it eventually stabilizes at the preset reference voltage V. REF In the diagram, I TailThe tail current signal, after the large current oscillation starts, through the feedback of the entire loop, the tail current eventually stabilizes at about 8.7mA. At this time, the amplitude of the differential oscillation signal output by the resonant module 100 also stabilizes at the preset reference voltage (after about 800ns). The entire oscillator works in the ideal operating range, and the phase noise is optimized.
[0062] This invention achieves self-calibration of the oscillation amplitude by setting an automatic amplitude control module to form a closed-loop amplitude control circuit, thus preventing cross-coupled pairs from operating in the linear region and significantly optimizing the phase noise generated by the cross-coupled pairs. By dynamically adjusting the tail current through the automatic amplitude control module, the oscillation amplitude is increased without allowing the cross-coupled pairs to enter the linear region, which can significantly optimize the phase noise. Under the control of the automatic amplitude control module, the tail current source module dynamically outputs the corresponding tail current to the resonant module. The resonant module adjusts the amplitude of the differential oscillation signal according to the tail current, forming a closed-loop amplitude control circuit to achieve self-calibration of the oscillation amplitude, stabilizing the oscillation amplitude within a suitable range and improving the stability of the oscillator. The oscillator of this invention, based on the structure of a basic oscillator, introduces additional structures that are easy to integrate and have lower manufacturing costs.
[0063] The above description merely illustrates preferred embodiments of the present invention and is quite specific and detailed; however, it should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept, and these all fall within the scope of protection of the present invention. Therefore, the scope of protection of this invention should be determined by the appended claims.
Claims
1. A low-phase-noise voltage-controlled oscillator, characterized in that, include: A resonant module is used to generate a differential oscillation signal for a voltage-controlled oscillator and extend the oscillation amplitude limit. The differential oscillation signal includes a negative phase oscillation signal and a positive phase oscillation signal. An automatic amplitude control module is used to detect the maximum value of the amplitude of the differential oscillation signal output by the resonant module, compare it with a preset reference voltage, and output a corresponding adjustment current based on the comparison result. as well as The tail current source module is used to receive the adjustment current and the first reference current, and dynamically output the corresponding tail current to the resonant module according to the adjustment current and the first reference current. The resonant module adjusts the amplitude of the differential oscillation signal according to the tail current, thereby forming a closed-loop amplitude control circuit and realizing self-calibration of the oscillation amplitude.
2. The low phase noise voltage-controlled oscillator as described in claim 1, characterized in that, The resonant module includes: A resonant cavity, used to generate a frequency-tunable differential oscillation signal; and A negative resistance network is used to provide negative resistance to counteract the parasitic positive resistance in the resonant cavity, while extending the oscillation amplitude limit.
3. The low phase noise voltage-controlled oscillator as described in claim 2, characterized in that, The resonant cavity includes: A switched capacitor array is used to achieve coarse frequency tuning under the control of a coarse tuning control signal, the coarse tuning control signal including a complementary first control signal and a second control signal; A variable capacitor array is used to achieve fine frequency tuning under the control of a fine-tuning control signal; and An inductor component is used to provide energy storage resonance, exchanging energy with the switched capacitor array and the variable capacitor array to maintain oscillation; The negative resistance network includes: Cross-coupled pairs are used to provide negative resistance to counteract the parasitic positive resistance in the resonant cavity; and A capacitor voltage divider is used to increase the oscillation amplitude while preventing the cross-coupled transistor from operating in the linear region.
4. The low phase noise voltage-controlled oscillator as described in claim 3, characterized in that: The switched capacitor array includes several switched capacitor units connected in parallel. Each switched capacitor unit includes a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2. The gates of the first MOSFET M1, the second MOSFET M2, and the third MOSFET are electrically connected and connected to a first control signal A. The drains of the first MOSFET M1 and the second MOSFET M2 are electrically connected and connected to a second control signal A_N. The sources of the first MOSFET M1 and the third MOSFET M3 are electrically connected, and the sources of the second MOSFET M2 and the drains of the third MOSFET M3 are electrically connected. The first resistor R1 is connected to the drain of the first MOSFET M1, and the other end of the first resistor R1 is connected to the source of the third MOSFET M3. The positive terminal of the first capacitor C1 is connected to the output node of the negative phase oscillation signal VOUT_N, and the negative terminal of the first capacitor C1 is connected to the source of the third MOSFET M3. The second resistor R2 is connected to the drain of the second MOSFET M2, and the other end of the second resistor R2 is connected to the drain of the third MOSFET M3. The negative terminal of the second capacitor C2 is connected to the drain of the third MOSFET M3, and the positive terminal of the second capacitor C2 is connected to the output node of the positive phase oscillation signal VOUT_P. The variable capacitor array includes several variable capacitor units connected in parallel, and each variable capacitor unit includes a first variable capacitor C. V1 With the second variable capacitor C V2 The first variable capacitor C V1 The negative terminal of the second variable capacitor C V2 The negative terminal is electrically connected and connected to the fine-tuning control signal V. Ctr The first variable capacitor C V1 The positive terminal of the second variable capacitor C is electrically connected to the output node of the negative phase oscillation signal VOUT_N. V2 The positive terminal is electrically connected to the output node of the positive phase oscillation signal VOUT_P; The inductor assembly includes a first inductor L1 and a second inductor L2; the first end of the first inductor L1 is electrically connected to the first end of the second inductor L2 and connected to the power supply signal VDD; the second end of the first inductor L1 is electrically connected to the output node of the negative phase oscillation signal VOUT_N; and the second end of the second inductor L2 is electrically connected to the output node of the positive phase oscillation signal VOUT_P.
5. The low phase noise voltage-controlled oscillator as described in claim 3, characterized in that: The cross-coupling pair includes a fourth MOSFET M4 and a fifth MOSFET M5. The gate and source of the fourth MOSFET M4 are electrically connected to the source of the fifth MOSFET M5 and are connected to the tail current I output by the tail current source module. Tail The drain of the fourth MOSFET M4 is electrically connected to the output node of the negative phase oscillation signal VOUT_N, and the gate of the fourth MOSFET M4 is electrically connected to the first output terminal of the capacitor voltage divider; the gate of the fifth MOSFET M5 is electrically connected to the second output terminal of the capacitor voltage divider, and the drain of the fifth MOSFET M5 is electrically connected to the output node of the positive phase oscillation signal VOUT_P. The capacitor voltage divider includes a third capacitor C3, a fourth capacitor C4, a third resistor R3, and a fourth resistor R4. The positive terminal of the third capacitor C3 is electrically connected to the drain of the fourth MOSFET M4, and the negative terminal of the third capacitor C3 serves as the second output terminal of the capacitor voltage divider and is electrically connected to the gate of the fifth MOSFET M5. The positive terminal of the fourth capacitor C4 is electrically connected to the drain of the fifth MOSFET M5, and the negative terminal of the fourth capacitor C4 serves as the first output terminal of the capacitor voltage divider and is electrically connected to the gate of the fourth MOSFET M4. One end of the third resistor R3 is electrically connected to one end of the fourth resistor R4 and is connected to a first bias voltage V. B1 The other end of the third resistor R3 is electrically connected to the gate of the fourth MOSFET M4; the other end of the fourth resistor R4 is electrically connected to the gate of the fifth MOSFET M5.
6. The low phase noise voltage-controlled oscillator as described in claim 1, characterized in that: The automatic amplitude control module includes: A peak detection unit is used to detect the maximum value of the amplitude of the differential oscillation signal output by the resonant module and generate a corresponding amplitude voltage; and A transconductance amplifier is used to compare the amplitude voltage output by the peak detection unit with a preset reference voltage, and output a corresponding adjustment current based on the comparison result.
7. The low phase noise voltage-controlled oscillator as described in claim 6, characterized in that: The peak detection circuit includes a sixth MOSFET M6, a seventh MOSFET M7, an eighth MOSFET M8, a ninth MOSFET M9, a tenth MOSFET M10, an eleventh MOSFET M11, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a fifth resistor R5, and a sixth resistor R6. The positive terminal of the fifth capacitor C5 receives a negative-phase oscillation signal, and the negative terminal of the fifth capacitor C5 is electrically connected to the positive terminal of the seventh capacitor C7 through the fifth resistor R5. The positive terminal of the sixth capacitor C6 receives a positive-phase oscillation signal, and the negative terminal of the sixth capacitor C6 is electrically connected to the positive terminal of the seventh capacitor C7 through the sixth resistor R6. The positive terminal of the seventh capacitor C7 is connected to a second bias voltage V. B2 The negative terminal of the seventh capacitor C7 is grounded; the source of the sixth MOSFET M6 is connected to the power supply signal VDD; the gate of the sixth MOSFET M6 is electrically connected to the gate of the seventh MOSFET M7 and the gate of the eighth MOSFET M8; and the drain of the sixth MOSFET M6 is connected to the second reference current I. ref The source of the seventh MOSFET M7 is connected to the power supply signal VDD, and the drain of the seventh MOSFET M7 is grounded through the eighth capacitor C8; the source of the eighth MOSFET M8 is connected to the power supply signal VDD, and the drain of the eighth MOSFET M8 is electrically connected to the source of the eleventh MOSFET M11; the drain of the eleventh MOSFET M11 is grounded, and the source of the eleventh MOSFET M11 is connected to the third bias voltage V. B3 The gate of the ninth MOSFET M9 is electrically connected to the negative terminal of the sixth capacitor C6, the source of the ninth MOSFET M9 is electrically connected to the source of the tenth MOSFET M10 and the positive terminal of the eighth capacitor C8, and the drain of the ninth MOSFET M9 is grounded; the gate of the tenth MOSFET M10 is electrically connected to the negative terminal of the fifth capacitor C5, and the drain of the tenth MOSFET M10 is grounded.
8. The low phase noise voltage-controlled oscillator as described in claim 7, characterized in that: The transconductance amplifier includes a twelfth MOSFET M12, a thirteenth MOSFET M13, a fourteenth MOSFET M14, a fifteenth MOSFET M15, a sixteenth MOSFET M16, a seventeenth MOSFET M17, an eighteenth MOSFET M18, a nineteenth MOSFET M19, a twentieth MOSFET M20, a twenty-first MOSFET M21, and a tenth capacitor C10. The gate of the thirteenth MOSFET M13 is electrically connected to the positive terminal of the eighth capacitor C8 to receive an amplitude voltage Va. The drain of the thirteenth MOSFET M13 is electrically connected to the source of the eighteenth MOSFET M18. The source of the thirteenth MOSFET M13 is electrically connected to the source of the fourteenth MOSFET M14 and the drain of the twelfth MOSFET M12. The source of the twelfth MOSFET M12 is grounded, and the gate of the twelfth MOSFET M12 is connected to a fourth bias voltage V. B4 The gate of the fourteenth MOSFET M14 is electrically connected to the positive terminal of the ninth capacitor C9 to access the reference voltage V. REF The drain of the fourteenth capacitor M14 is electrically connected to the drain of the fifteenth MOSFET M15; the source of the fifteenth MOSFET M15 is connected to the power supply voltage VDD; the drain of the fifteenth MOSFET M15 is electrically connected to the source of the seventeenth MOSFET M17; and the gate of the fifteenth MOSFET M15 is electrically connected to the gate of the sixteenth MOSFET M16 and connected to the fifth bias voltage VDD. B5 The source of the sixteenth MOSFET M16 is connected to the power supply voltage VDD, and the drain of the sixteenth MOSFET M16 is electrically connected to the source of the eighteenth MOSFET M18; the drain of the eighteenth MOSFET M18 is electrically connected to the positive terminal of the tenth capacitor C10, and the gate of the eighteenth MOSFET M18 is electrically connected to the gate of the seventeenth MOSFET M17 and connected to the sixth bias voltage VDD. B6 The drain of the seventeenth MOSFET M17 is electrically connected to the drain of the nineteenth MOSFET M19, the source of the nineteenth MOSFET M19 is grounded, and the gate of the nineteenth MOSFET M19 is electrically connected to the gate of the twentieth MOSFET M20. The gate of the twentieth MOSFET M20 is also electrically connected to the drain of the nineteenth MOSFET M19, the source of the twentieth MOSFET M20 is grounded, and the drain of the twentieth MOSFET M20 is electrically connected to the drain of the eighteenth MOSFET M18. The positive terminal of the tenth capacitor C10 is electrically connected to the gate of the twenty-first MOSFET M21, and the negative terminal of the tenth capacitor C10 is grounded. The source of the twenty-first MOSFET M21 is grounded, and the drain of the twenty-first MOSFET M21 outputs a trimming current I. AAC .
9. The low phase noise voltage-controlled oscillator as described in claim 1, characterized in that: The tail current source module includes a third inductor L3, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a twenty-second MOSFET M22, a twenty-third MOSFET M23, a twenty-fourth MOSFET M24, a twenty-fifth MOSFET M25, a twenty-sixth MOSFET M26, and a tail current source array connected in parallel with the twelfth capacitor C12. The source of the 22nd MOSFET M22 is connected to the power supply signal VDD. The drain of the 22nd MOSFET M22 is electrically connected to the source of the 24th MOSFET. The gate of the 22nd MOSFET M22 is also electrically connected to the drain of the 24th MOSFET M24. The gate of the 22nd MOSFET M22 is also electrically connected to the gate of the 23rd MOSFET M23. The source of the 23rd MOSFET M23 is connected to the power supply signal VDD. The drain of the 23rd MOSFET M23 is electrically connected to the drain of the 25th MOSFET M25. The gate of the 24th MOSFET M24 is grounded, and the drain of the 24th MOSFET M24 is connected to the adjustment current I. AAC and the first reference current I REF The drain of the 24th MOSFET M24 is also electrically connected to the gate of the 23rd MOSFET M23; the source of the 25th MOSFET M25 is grounded, and its drain and gate are electrically connected. The gate of the 25th MOSFET M25 is also electrically connected to the source of the 26th MOSFET M26, whose drain is grounded, and its gate and drain are electrically connected. One end of the seventh resistor R7 is electrically connected to the gate of the 25th MOSFET M25, and the other end is electrically connected to the positive terminal of its 11th capacitor C11. The negative terminal of the eleventh capacitor C11 is grounded, and the positive terminal of the eleventh capacitor C11 is also electrically connected to the input terminal of the tail current source array. The output terminal of the tail current source array is electrically connected to the first terminal of the third inductor L3, and the bias terminal of the tail current source array is grounded. The positive terminal of the twelfth capacitor C12 is electrically connected to the negative terminal of the thirteenth capacitor C13, and the negative terminal of the twelfth capacitor C12 is grounded. The negative terminal of the thirteenth capacitor C13 is electrically connected to the first terminal of the third inductor L3. The positive terminal of the thirteenth capacitor C13 is electrically connected to the second terminal of the third inductor L3. The second terminal of the third inductor L3 outputs a tail current I. Tail .
10. The low phase noise voltage-controlled oscillator as described in claim 9, characterized in that: The tail current source array includes several parallel tail current source units, each tail current source unit including a 27th MOSFET M27 and a switch K1; the gate of the 27th MOSFET M27 serves as the input terminal of the tail current source array and is electrically connected to the positive terminal of the 11th capacitor C11; the source of the 27th MOSFET M27 is grounded through the switch K1; and the drain of the 27th MOSFET M27 serves as the output terminal of the tail current source array and is electrically connected to the first terminal of the third inductor L3.