Bit error rate optimization method and device and related equipment

Abstract

The invention provides a bit error rate optimization method and device and related equipment, and the method comprises the steps: building an optimization model of a target system, the target system comprises a first terminal, a second terminal and a base station, the first terminal and the second terminal share the same spectrum resource, and the first terminal and the second terminal communicate with the base station through corresponding channels, the input of the optimization model comprises channel information, rate constraint and power constraint, and the output of the optimization model is sending power corresponding to the first terminal and the second terminal; and solving the optimization model by taking the minimum value of the bit error rates as an optimization target of the optimization model, the bit error rates including the bit error rate of the first terminal and the bit error rate of the second terminal. By establishing the optimization model, the error rate optimization problem of communication between the first terminal and the second terminal sharing the frequency spectrum and the base station is converted into the optimization model for solving by taking the error rate minimization as the target, and on the premise of meeting rate and power constraints, the calculation overhead is reduced to adapt to the ultra-low delay demand of URLLC (Uniform Resource Logical Link Control).

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a bit error rate optimization method, apparatus and related equipment. Background Technology

[0002] With the development of communication technology, future mobile communications will primarily target three major scenarios: Enhanced Mobile Broadband (eMBB), Massive Machine Type Communications (mMTC), and Ultra Reliable and Low Latency Communications (URLLC). Among these, URLLC services, characterized by ultra-reliability and low latency, have become a hot research area in communications, widely applied in critical fields such as high-speed rail scheduling, telemedicine, and smart factories. Bit error rate (BER) is the core indicator for measuring the reliability of URLLC. How to reduce the BER while controlling computation latency in spectrum-sharing scenarios has become a key technical challenge.

[0003] Existing solutions often rely on complex algorithms such as deep learning and reinforcement learning to search for optimal resource allocation, which incurs high computational overhead and leads to additional latency, failing to meet the low latency requirements of URLLC. Furthermore, in order to improve spectrum utilization, URLLC often reuses spectrum resources with other services, and the interference between services seriously affects transmission reliability.

[0004] It is evident that existing bit error rate optimization methods suffer from long latency issues. Summary of the Invention

[0005] This application provides a bit error rate optimization method, apparatus, and related equipment that can reduce latency and thus improve optimization results.

[0006] To solve the above-mentioned technical problems, this application is implemented as follows:

[0007] In a first aspect, embodiments of this application provide a bit error rate optimization method, the method comprising:

[0008] An optimization model for a target system is established. The target system includes a first terminal, a second terminal, and a base station. The first terminal and the second terminal share the same spectrum resources, and the first terminal and the second terminal communicate with the base station through corresponding channels. The inputs of the optimization model include channel information, rate constraints, and power constraints. The outputs of the optimization model are the transmission powers of the first terminal and the second terminal, respectively.

[0009] The optimization objective of the optimization model is to take the minimum bit error rate as the optimization objective, and the optimization model is solved. The bit error rate includes the bit error rate of the first terminal and the bit error rate of the second terminal.

[0010] Optionally, the step of using the minimum bit error rate as the optimization objective of the optimization model and solving the optimization model includes:

[0011] During the first transmission process, the signal-to-interference-plus-noise ratios (SINRs) of the first terminal and the second terminal are obtained respectively, wherein the first transmission is either uplink transmission or downlink transmission.

[0012] Based on the signal-to-interference-plus-noise ratio, the bit error rate is solved by inversely using the finite block length rate formula.

[0013] The transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective.

[0014] Optionally, the step of inversely solving the bit error rate using the finite block length rate formula based on the signal-to-interference-plus-noise ratio includes:

[0015] By inversely solving the finite block length rate formula, the first expression for the bit error rate is obtained;

[0016] The first expression is approximated by a piecewise linear function to obtain a second expression for the bit error rate;

[0017] The first expression for the bit error rate is as follows:

[0018]

[0019] The second expression for the bit error rate is as follows:

[0020]

[0021] Where ε is the bit error rate, Q is the complementary function of the Gaussian error function, N is the transmitted code block length, SINR (i.e., Γ) is the signal-to-interference-plus-noise ratio, R is the transmission rate, χ is the slope parameter of the bit error rate in the segmented approximation, τ is the threshold reference in the segmented approximation of the bit error rate, and θ1 and θ2 are the thresholds of the segmented approximation of the bit error rate.

[0022] Where χ is defined as:

[0023] Wherein, τ is defined as: τ = 2 R -1;

[0024] in,

[0025] Optionally, when the first transmission is an uplink transmission, the transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective, including:

[0026] With the goal of minimizing the bit error rate, the second expression for the bit error rate is converted into a first optimization target expression;

[0027] Based on the range of the transmission power of the second terminal, the first optimization objective expression is solved to obtain the transmission power corresponding to the first terminal and the second terminal respectively. The range of the transmission power of the second terminal is determined according to the rate constraint.

[0028] The first optimization objective expression is as follows:

[0029] minimize 1-χ1(Γ1-τ1)-χ2(Γ2-τ2);

[0030] Remove the constants from the first optimization objective expression and change the optimization direction. The first optimization objective expression is as follows:

[0031] Maximize χ1Γ1+χ2Γ2;

[0032] Wherein, χ1 is the slope parameter of the bit error rate corresponding to the first terminal in the segmented approximation, χ2 is the slope parameter of the bit error rate corresponding to the second terminal in the segmented approximation, τ1 is the threshold benchmark of the bit error rate corresponding to the first terminal in the segmented approximation, τ2 is the threshold benchmark of the bit error rate corresponding to the second terminal in the segmented approximation, Γ1 is the signal-to-interference-plus-noise ratio corresponding to the first terminal, and Γ2 is the signal-to-interference-plus-noise ratio corresponding to the second terminal.

[0033] Optionally, when the first transmission is a downlink transmission, the transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective, including:

[0034] With the goal of minimizing the bit error rate, the second expression for the bit error rate is transformed into a second optimization target expression;

[0035] The second optimization objective expression is transformed into a third optimization objective expression based on the non-closed lower bound approximation, or the second optimization objective expression is transformed into a fourth optimization objective expression based on the approximation bound, or the second optimization objective expression is transformed into a fifth optimization objective expression based on the Lagrange function;

[0036] Solve the third optimization objective expression, the fourth optimization objective expression, or the fifth optimization objective expression to obtain the transmission power corresponding to the first terminal and the second terminal respectively;

[0037] The second optimization objective is expressed as follows:

[0038]

[0039] The third optimization objective is expressed as follows:

[0040]

[0041] The fourth optimization objective is expressed as follows:

[0042]

[0043] The fifth optimization objective is expressed as follows:

[0044]

[0045] Wherein, χ1 is the slope parameter of the bit error rate corresponding to the first terminal in the segmented approximation, χ2 is the slope parameter of the bit error rate corresponding to the second terminal in the segmented approximation, Γ1 is the signal-to-interference-plus-noise ratio (SINR) corresponding to the first terminal, Γ2 is the SINR corresponding to the second terminal, g1 is the channel power attenuation coefficient corresponding to the first terminal, and g2 is the channel power attenuation coefficient corresponding to the second terminal. P1 is the power of additive white Gaussian noise, P2 is the transmission power corresponding to the first terminal, and P2 is the transmission power corresponding to the second terminal.

[0046] Optionally, after solving the optimization model with the minimum bit error rate as the optimization objective, the method further includes:

[0047] The transmission power corresponding to the first terminal output by the optimization model is sent to the first terminal, and the transmission power corresponding to the second terminal output by the optimization model is sent to the second terminal.

[0048] Secondly, embodiments of this application provide a bit error rate optimization apparatus, the apparatus comprising:

[0049] A construction module is used to establish an optimization model of a target system. The target system includes a first terminal, a second terminal, and a base station. The first terminal and the second terminal share the same spectrum resources, and the first terminal and the second terminal communicate with the base station through corresponding channels. The input of the optimization model includes channel information, rate constraints, and power constraints. The output of the optimization model is the transmission power of the first terminal and the second terminal, respectively.

[0050] The solution module is used to solve the optimization model with the minimum bit error rate as the optimization objective, wherein the bit error rate includes the bit error rate of the first terminal and the bit error rate of the second terminal.

[0051] Thirdly, embodiments of this application provide an electronic device, including: a processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the steps of the method described in the first aspect.

[0052] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method described in the first aspect.

[0053] Fifthly, embodiments of this application provide a computer program product including computer instructions that, when executed by a processor, implement the steps of the method described in the first aspect.

[0054] In this embodiment, by establishing an optimization model covering channel information, rate constraints, and power constraints, the bit error rate optimization problem of the first and second terminals sharing spectrum and communicating with the base station is transformed into an optimization model with the goal of minimizing the bit error rate. Under the premise of satisfying the rate and power constraints, the computational overhead is reduced to adapt to the ultra-low latency requirements of URLLC. Furthermore, it can suppress inter-device interference through optimal power allocation, improve transmission reliability, and achieve efficient reuse of spectrum resources. This effectively solves the contradiction between insufficient reliability and high computational latency in the prior art, and provides efficient support for URLLC services in key scenarios such as industrial control and telemedicine. Attached Figure Description

[0055] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0056] Figure 1 This is a flowchart of a bit error rate optimization method provided in an embodiment of this application;

[0057] Figure 2 This is a schematic diagram of the structure of a bit error rate optimization device provided in an embodiment of this application;

[0058] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0059] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0060] See Figure 1 , Figure 1 This is a flowchart of a bit error rate optimization method provided in an embodiment of this application, such as... Figure 1 As shown, the method includes the following steps:

[0061] Step 101: Establish an optimization model for the target system. The target system includes a first terminal, a second terminal, and a base station. The first terminal and the second terminal share the same spectrum resources, and the first terminal and the second terminal communicate with the base station through corresponding channels. The input of the optimization model includes channel information, rate constraints, and power constraints. The output of the optimization model is the transmission power of the first terminal and the second terminal, respectively.

[0062] In this step, both the first terminal and the second terminal can be URLLC devices. These two URLLC devices share the same spectrum resource and communicate with the central base station. The first terminal is denoted as UE1, and the second terminal is denoted as UE2. That is, UE1 and UE2 share the same spectrum resource to improve spectrum utilization, and they communicate with the base station through independent channels. The channel corresponding to the first terminal is denoted as h1, the channel corresponding to the second terminal is denoted as h2, the power attenuation coefficient of the channel corresponding to the first terminal (i.e., h1) is denoted as g1, and the power attenuation coefficient of the channel corresponding to the second terminal (i.e., h2) is denoted as g2. Assuming that the channel noise is additive white Gaussian noise, its power is denoted as... The URLLC devices (i.e., UE1 and UE2) have a rate of R i The minimum rate is limited to r i The transmit power of URLLC device i is P. i The bit error rate is ε i Based on this, an optimization model for the target system is established:

[0063]

[0064] In this way, the optimization model abstracts these physical characteristics into quantifiable parameters and relationships through mathematical symbols and formulas. The inputs of the optimization model include channel information, rate constraints, and power constraints, and the outputs of the optimization model are the transmission powers of the first terminal and the second terminal, respectively.

[0065] Among them, channel information refers to the channel characteristics between the URLLC device and the base station, which reflects the degree of signal attenuation. The channels corresponding to UE1 and UE2 are h1 and h2 respectively, and the power attenuation of h1 and h2 is g1 and g2 respectively. Clearly, we have:

[0066] The rate constraint refers to the minimum rate requirement for URLLC devices to ensure basic business communication needs, such as the transmission efficiency of industrial control commands, and to meet R... i ≥r i .

[0067] The power constraint, expressed as f(P1, P2, P) = 0, limits the upper limit of the transmission power of the URLLC device. This limit can be adjusted depending on the uplink and downlink transmission scenarios. For example:

[0068] During uplink transmission, the constraint is that the transmission power of a single URLLC device does not exceed the maximum limit P (i.e., P1≤P, P2≤P);

[0069] During downlink transmission, the constraint is that the total transmission power of the base station is fixed at P (i.e., P1 + P1 = P).

[0070] Furthermore, the output of the optimization model is the transmission power corresponding to the first terminal and the second terminal, respectively. The magnitude of the transmission power determines the signal strength at the receiving end (affecting the signal-to-interference-plus-noise ratio (SINR)), which in turn affects the bit error rate. Therefore, the bit error rate can be minimized directly by optimizing the power allocation.

[0071] Step 102: Using the minimum bit error rate as the optimization objective of the optimization model, solve the optimization model. The bit error rate includes the bit error rate of the first terminal and the bit error rate of the second terminal.

[0072] In this step, the optimization objective of the optimization model is to minimize the bit error rate (BER). The lower the BER, the higher the transmission reliability, thus meeting the ultra-high reliability requirements of URLLC equipment. By solving the optimization model, the optimal power allocation scheme is obtained, ultimately achieving the core requirements of high reliability and low latency for URLLC services.

[0073] For details on how to solve the optimization model, please refer to the following embodiments.

[0074] In this embodiment, by establishing an optimization model that covers channel information, rate constraints, and power constraints, the bit error rate optimization problem of the first and second terminals sharing spectrum and communicating with the base station is transformed into an optimization model with the goal of minimizing the bit error rate. Under the premise of meeting the rate and power constraints, the computational overhead is reduced to adapt to the ultra-low latency requirements of URLLC. Furthermore, it can suppress inter-device interference through optimal power allocation, improve transmission reliability, and achieve efficient reuse of spectrum resources. This effectively solves the contradiction between insufficient reliability and high computational latency in the prior art, and provides efficient support for URLLC services in key scenarios such as industrial control and telemedicine.

[0075] Optionally, the step of using the minimum bit error rate as the optimization objective of the optimization model and solving the optimization model includes:

[0076] During the first transmission process, the signal-to-interference-plus-noise ratios (SINRs) of the first terminal and the second terminal are obtained respectively, wherein the first transmission is either uplink transmission or downlink transmission.

[0077] Based on the signal-to-interference-plus-noise ratio, the bit error rate is solved by inversely using the finite block length rate formula.

[0078] The transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective.

[0079] In this embodiment, the signal-to-interference-plus-noise ratio (SINR) of the first terminal and the second terminal respectively during the first transmission process is first obtained to determine the signal quality and interference status in the communication scenario, providing basic data that conforms to the real channel characteristics for subsequent optimization. Then, the bit error rate is solved by inversely solving the finite block long rate formula, which can adapt to the short packet transmission characteristics of URLLC services, avoid the deviation of the traditional long packet model in bit error rate estimation, and improve the accuracy of reliability assessment. Finally, the transmission power is determined with the goal of minimizing the bit error rate, and the interference between devices is effectively suppressed by precisely controlling the power allocation. The whole process does not rely on complex deep learning algorithms, has low computational overhead, and can meet the ultra-low latency requirements, ultimately realizing the coordinated optimization of reliability and latency of URLLC services in the spectrum sharing scenario.

[0080] In some optional embodiments, the step of inversely solving the bit error rate using the finite block length rate formula based on the signal-to-interference-plus-noise ratio includes:

[0081] By inversely solving the finite block length rate formula, the first expression for the bit error rate is obtained;

[0082] The first expression is approximated by a piecewise linear function to obtain a second expression for the bit error rate;

[0083] The first expression for the bit error rate is as follows:

[0084]

[0085] The second expression for the bit error rate is as follows:

[0086]

[0087] Where ε is the bit error rate, Q is the complementary function of the Gaussian error function, N is the transmitted code block length, SINR (i.e., Γ) is the signal-to-interference-plus-noise ratio, R is the transmission rate, χ is the slope parameter of the bit error rate in the segmented approximation, τ is the threshold reference in the segmented approximation of the bit error rate, and θ1 and θ2 are the thresholds of the segmented approximation of the bit error rate.

[0088] Where χ is defined as:

[0089] Wherein, τ is defined as: τ = 2 R -1;

[0090] in,

[0091] The formula for the rate of finite block length can be expressed as:

[0092]

[0093] In this embodiment, URLLC services employ short packet transmission (block length N is relatively small, typically tens to hundreds of bits). Traditional long packet transmission models cannot accurately describe its bit error rate (BER) characteristics. Therefore, by inversely solving the BER using the finite block long rate formula, the intrinsic relationship between block length, rate, signal-to-interference-plus-noise ratio (SINNR), and BER in short packet scenarios can be accurately captured, avoiding the bias in BER estimation caused by long packet models. This ensures that the optimization model's objective (i.e., minimizing BER) matches the actual transmission characteristics of URLLC, providing a reliable evaluation benchmark for subsequent power allocation optimization and thus improving the effectiveness of the optimization process. Furthermore, the BER expression derived from the finite block long rate formula involves a complex Q-function (Gaussian error complementation function). Its nonlinear characteristics lead to a complex optimization model solution process and high computational overhead, making it difficult to meet the ultra-low latency requirements of URLLC (e.g., ≤10ms). Therefore, by approximating the first expression with a piecewise linear function, a second expression for the BER is obtained, transforming the nonlinear BER model into a linear relationship, thereby improving computational efficiency and reducing latency.

[0094] In some specific implementations, when the first transmission is an uplink transmission, the transmission power corresponding to the first terminal and the second terminal is determined with the goal of minimizing the bit error rate, including:

[0095] With the goal of minimizing the bit error rate, the second expression for the bit error rate is converted into a first optimization target expression;

[0096] Based on the range of the transmission power of the second terminal, the first optimization objective expression is solved to obtain the transmission power corresponding to the first terminal and the second terminal respectively. The range of the transmission power of the second terminal is determined according to the rate constraint.

[0097] The first optimization objective expression is as follows:

[0098] minimize 1-χ1(Γ1-τ1)-χ2(Γ2-τ2);

[0099] Remove the constants from the first optimization objective expression and change the optimization direction. The first optimization objective expression is as follows:

[0100] Maximize χ1Γ1+χ2Γ2;

[0101] Wherein, χ1 is the slope parameter of the bit error rate corresponding to the first terminal in the segmented approximation, χ2 is the slope parameter of the bit error rate corresponding to the second terminal in the segmented approximation, τ1 is the threshold benchmark of the bit error rate corresponding to the first terminal in the segmented approximation, τ2 is the threshold benchmark of the bit error rate corresponding to the second terminal in the segmented approximation, Γ1 is the signal-to-interference-plus-noise ratio corresponding to the first terminal, and Γ2 is the signal-to-interference-plus-noise ratio corresponding to the second terminal.

[0102] In this embodiment, the maximum transmit power of the URLLC devices (i.e., UE1 and UE2) can be taken as P. Without loss of generality, it is assumed that the base station first decodes UE1. After UE1's data is recovered, the signal of UE1 is eliminated through successive interference cancellation (SIC), and then UE2 is decoded and recovered. According to the above definition, the signal-to-interference-plus-noise ratios of UE1 and UE2 are respectively:

[0103]

[0104] The power constraint can be written as:

[0105] After removing constants from the first optimization objective expression and changing the optimization direction, the first optimization objective expression becomes: maximize χ1Γ1 + χ2Γ2. Thus, based on R... i ≥r i The obtained power domain (i.e., the range of transmit power values) of UE2 is [P 2，min P 2，max If ], then the following expression holds true:

[0106]

[0107] The transmission power corresponding to the first terminal and the second terminal can be obtained from the above expression. Thus, by dynamically adjusting the transmission power P2 of UE2... * For example, based on its power feasible region [P] 2，min P 2max Adaptively selecting the minimum, maximum, or optimal value within the interval directly optimizes the signal-to-interference-plus-noise ratio (SIR) of the two devices; furthermore, the optimal solution fully considers the dynamic characteristics of URLLC services, and the power feasible region [P]... 2，min P 2，max [By rate constraint R] i ≥r i This is derived from the fact that rate and power constraints can change with the environment in real-world scenarios, thus enabling real-time response to channel fluctuations and changes in rate demand, and outputting optimal power allocation in different scenarios. This provides accurate, efficient, and practical technical support for URLLC communication with shared uplink spectrum.

[0108] In some specific implementations, when the first transmission is a downlink transmission, the transmission power corresponding to the first terminal and the second terminal is determined with the goal of minimizing the bit error rate, including:

[0109] With the goal of minimizing the bit error rate, the second expression for the bit error rate is transformed into a second optimization target expression;

[0110] The second optimization objective expression is transformed into a third optimization objective expression based on the non-closed lower bound approximation, or the second optimization objective expression is transformed into a fourth optimization objective expression based on the approximation bound, or the second optimization objective expression is transformed into a fifth optimization objective expression based on the Lagrange function;

[0111] Solve the third optimization objective expression, the fourth optimization objective expression, or the fifth optimization objective expression to obtain the transmission power corresponding to the first terminal and the second terminal respectively;

[0112] The second optimization objective is expressed as follows:

[0113]

[0114] The third optimization objective is expressed as follows:

[0115]

[0116] The fourth optimization objective is expressed as follows:

[0117]

[0118] The fifth optimization objective is expressed as follows:

[0119]

[0120] Wherein, χ1 is the slope parameter of the bit error rate corresponding to the first terminal in the segmented approximation, χ2 is the slope parameter of the bit error rate corresponding to the second terminal in the segmented approximation, Γ1 is the signal-to-interference-plus-noise ratio (SINR) corresponding to the first terminal, Γ2 is the SINR corresponding to the second terminal, g1 is the channel power attenuation coefficient corresponding to the first terminal, and g2 is the channel power attenuation coefficient corresponding to the second terminal. P1 is the power of additive white Gaussian noise, P2 is the transmission power corresponding to the first terminal, and P2 is the transmission power corresponding to the second terminal.

[0121] In this embodiment, the maximum transmit power of the base station can be taken as P. Without loss of generality, it is assumed that UE1 directly decodes and recovers the data, while UE2 first decodes UE1. After UE1's data is recovered, the signal of UE1 is eliminated using SIC technology, and then UE2 is decoded and recovered. According to the above definition, the signal-to-interference-plus-noise ratios of UE1 and UE2 are respectively:

[0122]

[0123] The power constraint can be written as: P1 + P2 = P.

[0124] For UE1, its bit error rate depends solely on the decoding and recovery of the UE1 signal. However, for UE2, its reliability depends not only on the accuracy of its own signal but also on the accuracy of SIC elimination of the UE1 signal. That is:

[0125] ε2=ε 1，2 +(1-ε 1，2 )ε 2，alone ≈ε 1，2 +ε 2，alone ;

[0126] Where, ε 1，2 To recover the bit error rate of UE1 during decoding on UE2. ε 2，alone This is the bit error rate of UE2 itself.

[0127] Similarly, considering a piecewise linear approximation of the bit error rate (BER), with the goal of minimizing the BER, the second expression for the BER is transformed into a second optimization objective expression. This converts the nonlinear BER model into a linear relationship, thereby improving computational efficiency and reducing latency. The second optimization objective expression is as follows:

[0128]

[0129] Then, the second optimization objective expression is transformed into the third optimization objective expression based on the non-closed lower bound approximation, or into the fourth optimization objective expression based on the approximation bound, or into the fifth optimization objective expression based on the Lagrangian function. Transforming the second optimization objective expression into the third or fourth optimization objective expression simplifies the computation process to basic algebraic operations, avoiding the time-consuming high-dimensional search or iterative solution; alternatively, constructing the Lagrangian function transforms the constrained optimization problem into an unconstrained extremum solution. Although binary search is required, its complexity is far lower than traditional methods such as deep learning, ensuring that the decision delay is controlled within the tolerance range of URLLC. Specifically, the lower bound approximation and the approximate limit are not only simplified by reasonable function transformations (such as introducing constant terms for adjustment and merging like terms), but also ensure that the optimization objective remains focused on improving the signal-to-interference-plus-noise ratio (SINR) weighting and is directly related to the optimization objective of minimizing the bit error rate. This avoids deviation from the optimization direction due to oversimplification. The Lagrange function transformation strictly follows the constraints (such as total power P1 + P2 = P), and the effectiveness of the optimal solution is guaranteed through mathematical rigor, ensuring that the power allocation scheme can effectively reduce the bit error rate.

[0130] For example, when the system has high requirements for computational latency, an approximation with no tight lower bound or an approximation limit can be selected, and the analytical solution can be directly called to quickly output the power allocation scheme; when the channel conditions are complex (such as large interference fluctuations) and higher optimization accuracy is required, the Lagrange function transformation can be selected, and a more accurate optimal solution can be obtained by exchanging slightly higher computational overhead.

[0131] Solving the third optimization objective expression yields the transmission power corresponding to the first and second terminals, as shown below:

[0132]

[0133] Solving the fourth optimization objective expression yields the transmission power corresponding to the first and second terminals, as shown below:

[0134]

[0135] After solving the fifth optimization objective expression to obtain the transmission power P2 corresponding to the second terminal, according to the power constraint: P1 = P - P2, the transmission power P1 corresponding to the first terminal can be obtained.

[0136] In this way, by transforming and optimizing the target expression through different methods, the optimization accuracy and computational efficiency are balanced while meeting the ultra-low latency requirements of URLLC, and the scenario flexibility is also achieved. Ultimately, the collaborative optimization of URLLC services with high reliability, low latency, and high efficiency in downlink shared spectrum scenarios is realized.

[0137] In some optional embodiments, after solving the optimization model with the minimum bit error rate as the optimization objective, the method further includes:

[0138] The transmission power corresponding to the first terminal output by the optimization model is sent to the first terminal, and the transmission power corresponding to the second terminal output by the optimization model is sent to the second terminal.

[0139] In this embodiment, by issuing power commands in real time, the terminal can dynamically adjust its transmission power according to the current channel conditions and service requirements, flexibly adapting to changes in the wireless environment (such as channel attenuation fluctuations and changes in interference intensity), ensuring that it can maintain low bit error rate and low latency characteristics even in dynamic scenarios. When designing to obtain the minimum bit error rate, no large amount of computational overhead is required, ensuring that the latency requirements of URLLC service transmission are met. At the same time, it avoids the increased interference or waste of resources caused by each terminal blindly adjusting its power, improving the overall spectrum utilization efficiency and communication consistency of the system, and providing end-to-end guarantee from decision-making to execution for the stable operation of URLLC services in key scenarios such as industrial control and telemedicine.

[0140] See Figure 2 , Figure 2 This is a schematic diagram of the structure of a bit error rate optimization device provided in an embodiment of this application, as shown below. Figure 2 As shown, the bit error rate optimization device 200 includes:

[0141] The construction module 201 is used to establish an optimization model of the target system. The target system includes a first terminal, a second terminal, and a base station. The first terminal and the second terminal share the same spectrum resources, and the first terminal and the second terminal communicate with the base station through corresponding channels. The input of the optimization model includes channel information, rate constraints, and power constraints. The output of the optimization model is the transmission power of the first terminal and the second terminal, respectively.

[0142] The solution module 202 is used to solve the optimization model with the minimum bit error rate as the optimization objective, wherein the bit error rate includes the bit error rate of the first terminal and the bit error rate of the second terminal.

[0143] Optionally, the solver module 202 is specifically used for:

[0144] During the first transmission process, the signal-to-interference-plus-noise ratios (SINRs) of the first terminal and the second terminal are obtained respectively, wherein the first transmission is either uplink transmission or downlink transmission.

[0145] Based on the signal-to-interference-plus-noise ratio, the bit error rate is solved by inversely using the finite block length rate formula.

[0146] The transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective.

[0147] Optionally, the step of inversely solving the bit error rate using the finite block length rate formula based on the signal-to-interference-plus-noise ratio includes:

[0148] By inversely solving the finite block length rate formula, the first expression for the bit error rate is obtained;

[0149] The first expression is approximated by a piecewise linear function to obtain a second expression for the bit error rate;

[0150] The first expression for the bit error rate is as follows:

[0151]

[0152] The second expression for the bit error rate is as follows:

[0153]

[0154] Where ε is the bit error rate, Q is the complementary function of the Gaussian error function, N is the transmitted code block length, SINR (i.e., Γ) is the signal-to-interference-plus-noise ratio, R is the transmission rate, χ is the slope parameter of the bit error rate in the segmented approximation, τ is the threshold reference in the segmented approximation of the bit error rate, and θ1 and θ2 are the thresholds of the segmented approximation of the bit error rate.

[0155] Where χ is defined as:

[0156] Wherein, τ is defined as: τ = 2 R -1;

[0157] in,

[0158] Optionally, when the first transmission is an uplink transmission, the transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective, including:

[0159] With the goal of minimizing the bit error rate, the second expression for the bit error rate is converted into a first optimization target expression;

[0160] Based on the range of the transmission power of the second terminal, the first optimization objective expression is solved to obtain the transmission power corresponding to the first terminal and the second terminal respectively. The range of the transmission power of the second terminal is determined according to the rate constraint.

[0161] The first optimization objective expression is as follows:

[0162] minimize 1-χ1(Γ1-τ1)-χ2(Γ2-τ2);

[0163] Remove the constants from the first optimization objective expression and change the optimization direction. The first optimization objective expression is as follows:

[0164] maximize χ1Γ1 + χ2Γ2;

[0165] Wherein, χ1 is the slope parameter of the bit error rate corresponding to the first terminal in the segmented approximation, χ2 is the slope parameter of the bit error rate corresponding to the second terminal in the segmented approximation, τ1 is the threshold benchmark of the bit error rate corresponding to the first terminal in the segmented approximation, τ2 is the threshold benchmark of the bit error rate corresponding to the second terminal in the segmented approximation, Γ1 is the signal-to-interference-plus-noise ratio corresponding to the first terminal, and Γ2 is the signal-to-interference-plus-noise ratio corresponding to the second terminal.

[0166] Optionally, when the first transmission is a downlink transmission, the transmission power corresponding to the first terminal and the second terminal is determined with the minimum bit error rate as the objective, including:

[0167] With the goal of minimizing the bit error rate, the second expression for the bit error rate is transformed into a second optimization target expression;

[0168] The second optimization objective expression is transformed into a third optimization objective expression based on the non-closed lower bound approximation, or the second optimization objective expression is transformed into a fourth optimization objective expression based on the approximation bound, or the second optimization objective expression is transformed into a fifth optimization objective expression based on the Lagrange function;

[0169] Solve the third optimization objective expression, the fourth optimization objective expression, or the fifth optimization objective expression to obtain the transmission power corresponding to the first terminal and the second terminal respectively;

[0170] The second optimization objective is expressed as follows:

[0171]

[0172] The third optimization objective is expressed as follows:

[0173]

[0174] The fourth optimization objective is expressed as follows:

[0175]

[0176] The fifth optimization objective is expressed as follows:

[0177]

[0178] Wherein, χ1 is the slope parameter of the bit error rate corresponding to the first terminal in the segmented approximation, χ2 is the slope parameter of the bit error rate corresponding to the second terminal in the segmented approximation, Γ1 is the signal-to-interference-plus-noise ratio (SINR) corresponding to the first terminal, Γ2 is the SINR corresponding to the second terminal, g1 is the channel power attenuation coefficient corresponding to the first terminal, and g2 is the channel power attenuation coefficient corresponding to the second terminal. P1 is the power of additive white Gaussian noise, P2 is the transmission power corresponding to the first terminal, and P2 is the transmission power corresponding to the second terminal.

[0179] Optionally, the device further includes:

[0180] The transmitting module is used to transmit the transmitting power corresponding to the first terminal output by the optimization model to the first terminal, and to transmit the transmitting power corresponding to the second terminal output by the optimization model to the second terminal.

[0181] It should be noted that the bit error rate optimization device 200 is capable of implementing each process of the above-mentioned bit error rate optimization method, with one-to-one correspondence of technical features and achieving the same technical effect. To avoid repetition, it will not be described again here.

[0182] This application also provides an electronic device, including: a processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the above-described functionality. Figure 1 The various processes of the method embodiments shown can achieve the same technical effect, and will not be described again here to avoid repetition.

[0183] For details, see Figure 3 As shown in the figure, this application embodiment also provides an electronic device, including a bus 301, a transceiver 302, an antenna 303, a bus interface 304, a processor 305, and a memory 306.

[0184] In this embodiment, the electronic device further includes a computer program stored in the memory 306 and executable on the processor 305. When executed by the processor 305, the computer program implements each process of the aforementioned bit error rate optimization method and achieves the same technical effect; therefore, to avoid repetition, it will not be described in detail here.

[0185] exist Figure 3In this document, a bus architecture (represented by bus 301) is used. Bus 301 can include any number of interconnected buses and bridges, linking various circuits including one or more processors represented by processor 305 and memory represented by memory 306. Bus 301 can also link various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. Bus interface 304 provides an interface between bus 301 and transceiver 302. Transceiver 302 can be a single element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices over a transmission medium. Data processed by processor 305 is transmitted over a wireless medium via antenna 303, which further receives data and transmits it to processor 305.

[0186] Processor 305 manages bus 301 and general processing, and also provides various functions, including timing, peripheral interface, voltage regulation, power management, and other control functions. Memory 306 can be used to store data used by processor 305 during operation.

[0187] Optionally, the processor 305 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD).

[0188] This application also provides a computer-readable storage medium storing a computer program. When executed by a processor, this computer program implements the various processes of the above-described bit error rate optimization method embodiments and achieves the same technical effect. To avoid repetition, it will not be described again here. The computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0189] This application also provides a computer program product, including computer instructions. When these computer instructions are executed by a processor, they implement the various processes of the above-described bit error rate optimization method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0190] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0191] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0192] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A method for optimizing bit error rate, characterized by, The method comprises: establishing an optimization model of a target system, the target system comprising a first terminal, a second terminal and a base station, the first terminal and the second terminal sharing a same frequency spectrum resource, and the first terminal and the second terminal respectively communicating with the base station through corresponding channels, an input of the optimization model comprising channel information, rate constraints and power constraints, and an output of the optimization model being corresponding transmission powers of the first terminal and the second terminal respectively; solving the optimization model with a minimum value of a bit error rate as an optimization objective of the optimization model, the bit error rate comprising a bit error rate of the first terminal and a bit error rate of the second terminal.

2. The method of claim 1, wherein, The solving of the optimization model with the minimum value of the bit error rate as the optimization objective of the optimization model comprises: obtaining corresponding signal-to-interference-and-noise ratios of the first terminal and the second terminal in a first transmission, the first transmission being uplink transmission or downlink transmission; solving the bit error rate by using a finite block length rate formula inversely based on the signal-to-interference-and-noise ratios; determining the corresponding transmission powers of the first terminal and the second terminal with the minimum value of the bit error rate as an objective.

3. The method of claim 2, wherein, The solving of the bit error rate by using the finite block length rate formula inversely based on the signal-to-interference-and-noise ratios comprises: obtaining a first expression of the bit error rate by inversely solving the finite block length rate formula; obtaining a second expression of the bit error rate by approximately processing the first expression through a piecewise linear function; wherein the first expression of the bit error rate is as follows: wherein the second expression of the bit error rate is as follows: wherein ε is the bit error rate, Q is a complementary function of a Gaussian error function, N is a code block length of transmission, SINR (Γ) is the signal-to-interference-and-noise ratio, R is a transmission rate, χ is a slope parameter of the bit error rate in piecewise approximation, τ is a threshold reference in bit error rate piecewise approximation, θ1 and θ2 are threshold values in bit error rate piecewise approximation; where χ is defined as: where τ is defined as: τ = 2 R -1; wherein 4. The method of claim 3, wherein, in a case where the first transmission is uplink transmission, the determination of the corresponding transmission powers of the first terminal and the second terminal with the minimum value of the bit error rate as the objective comprises: conversion of the second expression of the bit error rate into a first optimization objective expression with the minimum value of the bit error rate as the objective; solving of the first optimization objective expression according to a value range of the transmission power of the second terminal, to obtain the corresponding transmission powers of the first terminal and the second terminal, the value range of the transmission power of the second terminal being determined according to the rate constraints; wherein the first optimization objective expression is as follows: minimize 1-χ1(Γ1-τ1)-χ2(Γ2-τ2); removal of constants in the first optimization objective expression and change of an optimization direction, the first optimization objective expression being as follows: maximize χ1Γ1+χ2Γ2; Wherein, χ1 is the slope parameter of the first terminal corresponding to the error rate in the piecewise approximation, χ2 is the slope parameter of the second terminal corresponding to the error rate in the piecewise approximation, τ1 is the threshold reference of the first terminal corresponding to the error rate piecewise approximation, τ2 is the threshold reference of the second terminal corresponding to the error rate piecewise approximation, Γ1 is the signal-to-noise ratio of the first terminal, Γ2 is the signal-to-noise ratio of the second terminal.

5. The method of claim 3, wherein, In the case of the first transmission being a downlink transmission, the sending power corresponding to the first terminal and the second terminal is determined by taking the minimum value of the error rate as the target, comprising: Converting the second expression of the error rate into a second optimization target expression by taking the minimum value of the error rate as the target; Converting the second optimization target expression into a third optimization target expression according to the non-tight lower bound approximation, or converting the second optimization target expression into a fourth optimization target expression according to the approximation bound, or converting the second optimization target expression into a fifth optimization target expression according to the Lagrange function; Solving the third optimization target expression, the fourth optimization target expression or the fifth optimization target expression to obtain the sending power corresponding to the first terminal and the second terminal; Wherein, the second optimization target expression is as follows: Wherein, the third optimization target expression is as follows: Wherein, the fourth optimization target expression is as follows: Wherein, the fifth optimization target expression is as follows: wherein χ1 is a slope parameter of the first terminal corresponding to the bit error rate in the piecewise approximation, χ2 is a slope parameter of the second terminal corresponding to the bit error rate in the piecewise approximation, Γ1 is a signal-to-interference-plus-noise ratio corresponding to the first terminal, Γ2 is a signal-to-interference-plus-noise ratio corresponding to the second terminal, g1 is a channel power attenuation coefficient corresponding to the first terminal, g2 is a channel power attenuation coefficient corresponding to the second terminal, is a power of an additive white Gaussian noise, P1 is a transmission power corresponding to the first terminal, and P2 is a transmission power corresponding to the second terminal.

6. The method according to any one of claims 1 to 5, characterized in that, After solving the optimization model with the minimum error rate as the optimization target of the optimization model, the method further comprises: Sending the sending power corresponding to the first terminal output by the optimization model to the first terminal, and sending the sending power corresponding to the second terminal output by the optimization model to the second terminal.

7. A bit error rate optimization apparatus characterized by comprising: The apparatus comprises: A construction module for establishing an optimization model of a target system, the target system comprising a first terminal, a second terminal and a base station, the first terminal and the second terminal sharing the same frequency spectrum resource, and the first terminal and the second terminal respectively communicating with the base station through corresponding channels, the input of the optimization model comprising channel information, rate constraints and power constraints, and the output of the optimization model being the sending power corresponding to the first terminal and the second terminal respectively; A solving module for solving the optimization model with the minimum error rate as the optimization target of the optimization model, the error rate comprising the error rate of the first terminal and the error rate of the second terminal.

8. An electronic device, comprising: Comprise: A processor, a memory and a program stored on the memory and executable on the processor, the program being executed by the processor to implement the steps of the method of any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer program is stored on the computer readable storage medium, and the computer program is executed by the processor to implement the steps of the method of any one of claims 1 to 6.

10. A computer program product, characterised in that, The computer program is stored on the computer readable storage medium, and the computer program is executed by the processor to implement the steps of the method of any one of claims 1 to 6.

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