Multi-core heterogeneous SOC resource optimization method and system

Abstract

The invention provides a multi-core heterogeneous SOC resource optimization method and system, and belongs to the technical field of multi-core heterogeneous system.The multi-core heterogeneous SOC resource optimization method comprises the steps that according to the real-time resource requirement of a to-be-processed task, the CPU time slice quota and the AI accelerator computing power unit quota corresponding to the to-be-processed task are determined; dynamically allocating a CPU time slice quota and an AI accelerator computing power unit quota to a container for executing a to-be-processed task through a container scheduling layer; determining a delay demand and a bandwidth demand of communication between the containers according to a communication demand of data transmission between the containers; and selecting a communication protocol for data transmission between the containers according to the delay demand and the bandwidth demand, and completing data transmission between the containers through the inter-core communication layer. According to the invention, through dynamic allocation of task resources in the multi-core heterogeneous SOC and adaptive selection of a communication protocol, high-efficiency data transmission for a multi-task scene in the multi-core heterogeneous SOC is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of multi-core heterogeneous system design, and in particular to a multi-core heterogeneous SOC resource optimization method and system. BACKGROUND

[0002] With the rapid development of artificial intelligence and edge computing, multi-core heterogeneous system-on-chip (SOC) is widely used in industrial Internet of Things, smart cities and other complex scenarios. Such SOC systems usually integrate general-purpose processors, artificial intelligence accelerators and embedded controllers to support parallel processing of multiple types of tasks and multi-level perception and inference requirements.

[0003] However, in actual deployment, various tasks have significant differences in computing intensity, response time and communication mode, and the task load changes dynamically over time, which puts higher requirements on resource scheduling. Under the current technical background, traditional heterogeneous system resource management usually adopts a static allocation strategy, that is, a fixed CPU or accelerator resource quota is preset for the container at the task deployment stage. In terms of communication, a unified protocol or fixed bandwidth channel is used to transmit various data regardless of data attributes and priorities. This kind of static and unified scheduling method fails to consider the dynamic fluctuations of resource demand during task execution, and also fails to differentiate the real-time and bandwidth requirements of communication tasks. As a result, some containers may be blocked due to insufficient resource allocation, or the overall system utilization rate may be reduced due to redundant resource occupation, resulting in low data transmission efficiency.

[0004] Therefore, how to achieve efficient data transmission in a multi-core heterogeneous SOC for multi-task scenarios has become a technical problem to be solved. SUMMARY

[0005] The present application provides a multi-core heterogeneous SOC resource optimization method, system, electronic device, storage medium and computer program product to solve the defects of static resource allocation, single communication protocol and low task coordination efficiency in the prior art, and to achieve efficient data transmission in a multi-core heterogeneous SOC for multi-task scenarios.

[0006] The present application provides a multi-core heterogeneous SOC resource optimization method, which includes a container scheduling layer and an inter-core communication layer, and the method comprises: According to the real-time resource demand of the to-be-processed task, the CPU time slice quota and the AI accelerator computing unit quota corresponding to the to-be-processed task are determined; The CPU time slice quota and the AI accelerator computing unit quota are dynamically allocated to the container executing the to-be-processed task through the container scheduling layer; determining delay requirement and bandwidth requirement of communication between the containers according to communication requirement of data transmission between the containers; selecting a communication protocol for data transmission between the containers according to the delay requirement and the bandwidth requirement, and completing data transmission between the containers through the inter-core communication layer.

[0007] According to the application, a multi-core heterogeneous SOC resource optimization method is provided, which comprises: monitoring resource utilization, task response delay and task queue length of the to-be-processed task in real time; inputting the resource utilization, the task response delay and the task queue length into a reinforcement learning model to obtain a policy result output by the reinforcement learning model; determining the CPU time slice quota and the AI accelerator computing unit quota according to the policy result.

[0008] According to the application, a multi-core heterogeneous SOC resource optimization method is provided, which comprises: managing the CPU time slice quota of the container by using a control group mechanism of an operating system; dividing AI accelerator computing units into a plurality of independent virtual computing units by a hardware virtualization method; allocating the CPU time slice quota and at least one virtual computing unit to the container during startup or running of the container, and establishing a binding relationship between the container and the allocated virtual computing unit, wherein the binding relationship can be reconfigured when task load changes.

[0009] According to the application, a multi-core heterogeneous SOC resource optimization method is provided, which comprises: analyzing data type and data size transmitted between the containers, and determining a model level to which the communication requirement belongs according to an analysis result; when the model level is shallow and the data size is less than or equal to a preset threshold, setting the delay requirement to be less than or equal to a preset delay threshold; when the model level is deep and the data size is greater than a preset threshold, setting the bandwidth requirement to be greater than or equal to a preset bandwidth threshold.

[0010] According to the application, a multi-core heterogeneous SOC resource optimization method is provided, the communication protocol for inter-container data transmission is selected according to the delay requirement and the bandwidth requirement, and the inter-container data transmission is completed through the inter-core communication layer, comprising: When the delay requirement is less than or equal to a preset delay threshold, a first communication protocol is selected to transmit the data between the containers, the first communication protocol being a lightweight instruction communication protocol; When the bandwidth requirement is greater than or equal to a preset bandwidth threshold, a second communication protocol is selected to transmit the data between the containers, the second communication protocol being a high-speed data transmission protocol; The data transmission is performed through a communication channel in the inter-core communication layer matched with the first communication protocol or the second communication protocol.

[0011] According to the application, a multi-core heterogeneous SOC resource optimization method is provided, further comprising: Before the container is started, the memory resource corresponding to the to-be-processed task is pre-allocated according to the resource requirement of the to-be-processed task; After the to-be-processed task is executed, the memory resource is released, and the released memory area is defragmented.

[0012] According to the application, a multi-core heterogeneous SOC resource optimization method is provided, the multi-core heterogeneous SOC further comprising a hardware abstraction layer; The container scheduling layer and the inter-core communication layer respectively call the unified interface provided by the hardware abstraction layer to shield the difference between different types of computing units in the bottom layer in the resource allocation and communication process.

[0013] The application further provides a multi-core heterogeneous SOC resource optimization system, comprising the following modules: The first processing module is used for determining the CPU time slice quota and the AI accelerator computing unit quota corresponding to the to-be-processed task according to the real-time resource requirement of the to-be-processed task; The second processing module is used for dynamically allocating the CPU time slice quota and the AI accelerator computing unit quota to the container executing the to-be-processed task through the container scheduling layer; The third processing module is used for determining the delay requirement and the bandwidth requirement of the communication between the containers according to the communication requirement of the data transmission between the containers; The fourth processing module is used for selecting the communication protocol for the inter-container data transmission according to the delay requirement and the bandwidth requirement, and completing the inter-container data transmission through the inter-core communication layer.

[0014] The application further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the multi-core heterogeneous SOC resource optimization method according to any one of the above when executing the program.

[0015] The application further provides a non-transitory computer-readable storage medium, which stores a computer program, wherein the computer program is executed by a processor to implement the multi-core heterogeneous SOC resource optimization method according to any one of the above.

[0016] The application further provides a computer program product, comprising a computer program, wherein the computer program is executed by a processor to implement the multi-core heterogeneous SOC resource optimization method according to any one of the above.

[0017] To sum up, the one or more technical solutions provided in the embodiments of the application have at least the following technical effects or advantages: By determining the CPU time slice quota and the AI accelerator computing power unit quota corresponding to the to-be-processed task according to the real-time resource requirement of the to-be-processed task, and dynamically allocating the quotas to the container executing the task through the container scheduling layer, each type of task can obtain precisely matched computing power resources according to the actual running state, so that the resource allocation is avoided to be excessive or insufficient, and the resource utilization rate and the task response efficiency of the overall system are improved. Further, by determining the delay requirement and the bandwidth requirement of communication according to the communication requirement of data transmission between containers, and selecting an adaptive communication protocol based on the requirement, and then completing the data transmission between containers through the inter-core communication layer, the low-delay, high-bandwidth, and high-stability transmission of different types of data in the multi-core heterogeneous SOC is realized, and the data transmission efficiency between each type of task is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the application or prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0019] Figure 1 is one of the flowcharts of the multi-core heterogeneous SOC resource optimization method provided by the application.

[0020] Figure 2 is another flowchart of the multi-core heterogeneous SOC resource optimization method provided by the application.

[0021] Figure 3 is a third flowchart of the multi-core heterogeneous SOC resource optimization method provided by the application.

[0022] Figure 4 Figure 4 is a flowchart of a fourth embodiment of a method for optimizing resources of a multi-core heterogeneous SOC according to the present application.

[0023] Figure 5 Figure 5 is a flowchart of a fifth embodiment of a method for optimizing resources of a multi-core heterogeneous SOC according to the present application.

[0024] Figure 6 Figure 6 is a flowchart of a sixth embodiment of a method for optimizing resources of a multi-core heterogeneous SOC according to the present application.

[0025] Figure 7 Figure 7 is a schematic diagram of a system for optimizing resources of a multi-core heterogeneous SOC according to the present application.

[0026] Figure 8 Figure 8 is a schematic diagram of an electronic device according to the present application. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely below with reference to the drawings in the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0028] It should be noted that in the description of the present application, the terms "comprise", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "comprises a" does not exclude the presence of another identical element in the process, method, article or device comprising the element. The terms "upper", "lower" and the like indicate the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present application and simplify the description, and do not indicate or imply that the indicated system or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. For those of ordinary skill in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0029] The terms "first", "second", and the like in the present disclosure are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present disclosure can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally a class and do not limit the number of objects, for example, the first object can be one or more. In addition, "and / or" means at least one of the connected objects, and the character " / ", generally indicates that the objects before and after are in a "or" relationship.

[0030] The following will be described in detail Figures 1-8 The multi-core heterogeneous SOC resource optimization method, system, electronic device and storage medium provided by the present application are described.

[0031] Referring to Figure 1 , Figure 1 is one of the flowcharts of the multi-core heterogeneous SOC resource optimization method provided by the present application, as shown in Figure 1 , comprising steps 101 to 104: Step 101: According to the real-time resource requirement of the to-be-processed task, the CPU time slice quota and the AI accelerator computing unit quota corresponding to the to-be-processed task are determined.

[0032] In this embodiment, step 101 aims to allocate appropriate heterogeneous resource quota for the to-be-processed task, so as to guarantee the real-time performance and resource utilization of various computing tasks in the multi-core heterogeneous SOC system during execution. Since the to-be-processed tasks have dynamic differences in type, computing density and delay tolerance, etc., a single static resource allocation strategy cannot effectively adapt to diversified scheduling scenarios, but may cause waste of computing power, increase of response delay, and even cause task blocking. Therefore, it is necessary to dynamically identify and quantitatively estimate the resource requirement of the task before scheduling, and then determine the CPU time slice quota and the AI accelerator computing unit quota corresponding thereto.

[0033] In this step, the CPU time slice quota refers to the slice scheduling budget of the processor core time at the operating system level, which is used to measure the general computing resources occupied by the container during task execution; the AI accelerator computing unit quota represents the heterogeneous accelerator resource budget required by the AI inference task, which includes but is not limited to the computing core, memory channel or execution engine quota on the neural network processing unit (NPU), tensor processing unit (TPU) or graphics processing unit (GPU).

[0034] In implementation, the system can estimate the CPU processing capability and AI acceleration capability required by the task to be processed according to the current running environment, task type and scheduling context and the like of the task, and determine the resource quota that the task should obtain based on the estimation. The resource requirement estimation can be based on the characteristics of the task itself (such as inference model structure, computational complexity, expected latency) and the current system resource state (such as resource occupancy rate, idle degree and the like), to ensure that the quota allocation meets the requirements of task execution and avoids redundant configuration of overall resources. The obtained CPU time slice quota and AI accelerator computing power unit quota will be used as input parameters for subsequent resource scheduling and binding, to guide the container scheduling layer to implement corresponding resource allocation operations.

[0035] Step 102: dynamically allocate the CPU time slice quota and the AI accelerator computing power unit quota to the container executing the task to be processed through the container scheduling layer.

[0036] In the embodiment, the core of step 102 is to dynamically allocate the CPU time slice quota and the AI accelerator computing power unit quota determined in step 101 to a specific task container, so as to realize container-level management and on-demand supply of heterogeneous resources. Since the task to be processed is usually run in the form of a container in a multi-core heterogeneous SOC environment, and the resource types in the environment are highly heterogeneous, including general-purpose computing cores and multiple types of AI accelerator resources, a container scheduling mechanism with dynamic adaptation capability needs to be designed to ensure that the resource scheduling during task running is controllable and real-time.

[0037] In this step, the container scheduling layer is a logical layer responsible for scheduling and management functions in the multi-core heterogeneous SOC, which coordinates the relationship between the container and the underlying computing power resources according to the resource allocation strategy, specifically including scheduling control of the CPU time slice and binding management of the AI accelerator computing power unit. The CPU time slice quota is used to describe how many general-purpose processor resources the container can occupy in a unit of time; the AI accelerator computing power unit quota is used to identify the number or range of AI dedicated acceleration resources that the container can use. The dynamic allocation of these two types of quotas not only requires the system to identify the correspondence between the container and the task, but also needs to flexibly adjust the resource allocation strategy during running to adapt to the fluctuations of task load and changes in system resource state.

[0038] In the implementation process, the system dynamically configures the required computing resources for the container according to the resource quota preset for the target task in step 101 during the container startup or running stage through the container scheduling layer. During the container life cycle, if the task load rises, the response time is delayed, or the resource utilization rate does not match, and the like, the container scheduling layer can adjust the original quota based on the real-time monitoring result to realize the redistribution of resources. The scheduling behavior not only covers the allocation and control of general CPU resources, but also includes controllable binding of AI accelerators to ensure that the task always runs under the optimal resource configuration.

[0039] Step 103: According to the communication demand of data transmission between containers, the delay demand and bandwidth demand of communication between containers are determined.

[0040] In this embodiment, the purpose of step 103 is to evaluate the performance requirements of the communication behavior of the data interaction scene between multiple containers in a multi-core heterogeneous SOC architecture, and then to provide key parameter basis for the selection of subsequent communication protocols and channel configuration. Since the inter-container communication may involve different types of data streams such as control signaling, model parameter transmission, or intermediate feature data exchange, and the requirements of these data streams in real-time and bandwidth are significantly different, it is necessary to identify the performance indicators corresponding to each type of communication demand, especially the communication delay demand and bandwidth demand, before data transmission, so as to lay a foundation for the system to develop appropriate communication path strategies.

[0041] In this step, the communication demand is a description of the performance requirements of the data exchange behavior between any two containers in terms of delay and throughput, usually including two dimensions of delay demand and bandwidth demand. Among them, the delay demand is used to reflect that the data must be transmitted within a short time to meet the processing time limit, for example, it has a high priority in low-delay scenarios such as task scheduling, state control, etc.; the bandwidth demand is used to measure the resource occupation degree in the transmission process of large-scale data (such as deep neural network feature maps, model weights, etc.), and its priority is usually determined by the data volume.

[0042] In the specific implementation process, the system collects the current or expected inter-container communication tasks through the container scheduling layer or the communication monitoring module, and quantitatively evaluates the required communication performance in combination with the data characteristics, application scenarios, or model levels associated with each task. Based on this evaluation, the system can determine the acceptable maximum delay and minimum bandwidth indicators for different communication paths, and then select the most matched communication strategy in combination with the currently available communication protocols and inter-core channel resources. This operation provides clear and executable performance targets for the specific communication protocol selection in step 104, avoiding blind configuration or resource waste in communication path scheduling.

[0043] Step 104: Select a communication protocol for inter-container data transmission according to the delay requirement and bandwidth requirement, and complete the inter-container data transmission through the inter-core communication layer.

[0044] In this embodiment, the purpose of step 104 is to select a suitable communication protocol based on the known delay requirement and bandwidth requirement of inter-container communication, and to complete the inter-container data transmission through the inter-core communication layer, so as to realize an efficient communication scheduling mechanism that meets the performance requirement. Since there are multiple inter-core communication channels and protocol implementation paths in a multi-core heterogeneous SOC system, different protocols have significant differences in control overhead, bandwidth carrying capacity and delay response. Therefore, it is impossible to meet the transmission requirements of all tasks at the same time by using a unified communication strategy. Therefore, according to the communication performance indicators determined in step 103, the system dynamically selects an adaptive communication protocol and reasonably configures the inter-core communication resources to realize low-delay, high-throughput, safe and reliable transmission of data.

[0045] In this step, the selection of the communication protocol needs to consider factors such as protocol stack overhead, transmission rate and control complexity; in typical cases, the communication protocol suitable for control signaling transmission and the communication protocol suitable for model data or intermediate feature map transmission have essential differences in structure design and resource dependence. If a certain protocol is used without distinction, it may lead to communication resource overload, task scheduling blockage or system response delay.

[0046] In the specific implementation process, the system selects a matching scheme from a plurality of preset communication protocols according to the delay requirement and bandwidth requirement of each pair of inter-container communication requests; the module can be based on a rule table, a condition tree or a dynamic mapping mechanism to ensure that the protocol corresponds to the communication performance requirement. After selecting the protocol, the system further calls the communication channel matched with the protocol through the inter-core communication layer, and performs channel initialization and binding process to realize the actual transmission of data between containers. The inter-core communication layer can directly rely on the interface provided by the hardware abstraction layer, thereby shielding the differences in communication capability, memory access mode or interrupt mechanism of the underlying heterogeneous computing units, and ensuring the consistency of communication calling and system compatibility.

[0047] In one possible implementation, the multi-core heterogeneous SOC includes a container scheduling layer, an inter-core communication layer and a hardware abstraction layer; the container scheduling layer and the inter-core communication layer call the unified interface provided by the hardware abstraction layer to shield the differences between different types of computing units in the underlying layer in the process of resource allocation and communication.

[0048] Specifically, to realize dynamic adaptation of communication protocols and compatible communication across heterogeneous platforms, the system constructs a layered resource and communication scheduling architecture composed of a container scheduling layer, an inter-core communication layer and a hardware abstraction layer, and each layer cooperates to ensure that the communication behavior can be stably and efficiently executed between different underlying computing units.

[0049] Among them, the container scheduling layer is a logical component located at the top of the system scheduling strategy, responsible for dynamically configuring the CPU time slice quota and AI accelerator computing unit quota of the container according to the resource requirements of the to-be-processed task, and coordinating the resource binding relationship and communication demand distribution. This layer focuses on the resource scheduling logic itself and is independent of the differences of the underlying physical computing unit.

[0050] The inter-core communication layer is an intermediate layer module between scheduling and hardware, whose responsibility is to select the appropriate communication protocol based on the communication performance indicators (such as delay or bandwidth requirements) specified by the upper layer, and complete the path matching, protocol docking and channel scheduling of data between containers. The inter-core communication layer manages multiple communication channel types at the same time, such as lightweight control protocol channels and high-bandwidth data transmission channels.

[0051] The hardware abstraction layer serves as a shielding interface between the system and the heterogeneous underlying computing resources, responsible for unified packaging of the scheduling and communication control capabilities of different types of CPU, GPU, NPU and other computing units, abstracting them into a general API interface set for the upper layer module to call. This layer shields the differences between various hardware modules in terms of register access methods, data alignment requirements, DMA channel structures, communication protocol stacks, etc. through abstract resource descriptors and interface standardization.

[0052] In the specific execution of step 104, when the container scheduling layer needs to implement data interaction between two containers according to the scheduling result, it will first select the to-be-used communication protocol by combining the delay requirement and bandwidth requirement of the current communication task through the communication strategy mapping relationship, and submit this information to the inter-core communication layer. After receiving the instruction, the inter-core communication layer will call the corresponding channel creation function (such as creating an IPC channel or a high-speed DMA channel) from the hardware abstraction layer based on the protocol type, and return the available communication handle. In this process, the inter-core communication layer does not directly perceive the communication control differences of heterogeneous computing units such as NPU, TPU or DSP, but through the unified interface provided by the hardware abstraction layer, it completes the configuration of the communication path and the adaptation of the protocol.

[0053] Similarly, when the container scheduling layer performs resource quota allocation and computing unit binding operations, it also binds the CPU core time slice and AI accelerator virtual computing unit to the container instance through the unified resource management interface provided in the hardware abstraction layer, realizing transparent interaction with the underlying heterogeneous devices.

[0054] Through the above structural design and interface mechanism, the container scheduling layer and the inter-core communication layer can complete unified scheduling and efficient communication without needing to pay attention to the underlying computing unit manufacturer implementation, resource structure, and communication interface standard, thereby achieving the goal of shielding the differences between different types of computing units in the resource allocation and communication process, and improving the adaptation capability, maintainability, and running efficiency of the entire multi-core heterogeneous SOC platform.

[0055] In a possible implementation, with reference to Figure 2 , Figure 2 is a second flowchart of the multi-core heterogeneous SOC resource optimization method provided by the application, and step 101 specifically includes steps 201-203. Step 201: Real-time monitoring of resource utilization, task response delay, and task queue length of the to-be-processed task.

[0056] Step 202: Inputting the resource utilization, task response delay, and task queue length into the reinforcement learning model to obtain a policy result output by the reinforcement learning model.

[0057] Step 203: Determining the CPU time slice quota and AI accelerator computing unit quota according to the policy result.

[0058] In this embodiment, steps 201 to 203 are further refinement of step 101, and are mainly used to realize intelligent perception and accurate quantification of resource demand of the to-be-processed task, thereby providing a decision basis for subsequent resource scheduling and quota allocation. Since the tasks in the multi-core heterogeneous SOC platform have dynamically changing resource utilization behaviors, the traditional static allocation method cannot effectively cope with task load fluctuations and diversified computing demands, and is prone to cause resource waste or task delay. Therefore, it is necessary to introduce a resource evaluation mechanism with adaptive capability to realize dynamic modeling and prediction of resource demand.

[0059] In step 201, the system first performs real-time monitoring on the running state of the to-be-processed task in the execution process, and the key indicators collected include resource utilization, task response delay, and task queue length. Among them, the resource utilization reflects the proportion of computing resources occupied by the task in the current scheduling period, and can include CPU usage and AI accelerator usage; the task response delay is used to measure the time delay from the task request trigger to the first result output, and is an important measure basis for task real-time performance; and the task queue length reflects the backlog of tasks to be scheduled or to be processed, and indirectly represents the system load and resource tightness. These indicators together constitute the time sequence feature input of the task resource state, and provide necessary data support for the subsequent intelligent allocation strategy.

[0060] In step 202, the system inputs the collected resource utilization, task response delay and queue length as a state vector into the trained reinforcement learning model. Based on the pre-defined state-action mapping strategy, the model continuously learns and optimizes through historical scheduling results and performance feedback, and can output the optimal resource allocation strategy result according to different state combinations. Compared with the traditional rule-based allocation method, the model has generalization ability and rapid adaptive ability to complex dynamic environment, and can adjust the resource allocation strategy in time according to the system load fluctuation.

[0061] In step 203, the system calculates and determines the corresponding CPU time slice quota and AI accelerator computing unit quota according to the strategy result output by the reinforcement learning model. Specifically, the strategy result contains allocation proportion or level prediction for different resource types, and the system can map it with the available resources in the current resource pool to finally form accurate and executable quota values. These quotas will be passed as input to the container scheduling layer for resource allocation operation of container instances in the actual scheduling process.

[0062] Through the above steps 201 to 203, the system can realize dynamic identification, autonomous decision and accurate configuration of task resource demand, effectively avoid excessive redundancy in resource allocation, and significantly improve resource utilization and task response performance.

[0063] In one possible implementation, referring to Figure 3 , Figure 3 is a third flowchart of the multi-core heterogeneous SOC resource optimization method provided by the application, and step 102 specifically includes steps 301-303: Step 301: manage the CPU time slice quota of the container by using the control group mechanism of the operating system.

[0064] Step 302: divide the AI accelerator computing unit into multiple independent virtual computing units by hardware virtualization.

[0065] Step 303: allocate CPU time slice quota and at least one virtual computing unit to the container during the startup or running process of the container, and establish a binding relationship between the container and the allocated virtual computing unit, wherein the binding relationship can be reconfigured when the task load changes.

[0066] In this embodiment, steps 301 to 303 are further refinements of step 102, mainly for accurately and dynamically allocating the determined CPU time slice quota and AI accelerator computing unit quota to the target container, so as to achieve controllable scheduling of container running resources and on-demand binding of heterogeneous computing resources. Since a multi-core heterogeneous SOC system contains a variety of processing cores and accelerator resources at the bottom layer, and the resource requirements of containerized tasks may change significantly during running, a resource allocation mechanism with resource isolation, dynamic binding, and elastic adjustment capabilities needs to be built to ensure the stability of task scheduling and the overall running efficiency of the system.

[0067] In step 301, the system manages the CPU time slice quota of the container by using the control group mechanism (control groups, cgroups for short) of the operating system. This mechanism allows fine control of the time slice of different containers in terms of CPU resource usage. In specific implementation, the system writes the pre-determined CPU time slice quota into the scheduling parameters of the cgroup to which the container belongs, thereby limiting the proportion of CPU time used by the container during actual execution, preventing resource preemption or long-term occupation of processor cores by low-priority tasks.

[0068] In step 302, in order to achieve multi-tenant isolation and fine-grained scheduling of AI accelerator resources, the system divides the AI accelerator computing unit into multiple independent virtual computing units through hardware virtualization. Each virtual computing unit can be regarded as an independent scheduling unit abstracted from physical NPU, TPU, or GPU resources, with independent task queues, execution contexts, and partial resource isolation capabilities. The system can achieve partition mapping of the accelerator based on virtualization support (such as SR-IOV, VIRTIO, or a custom scheduling module), so that each container can only access the virtual computing unit it is bound to, avoiding task interference.

[0069] In step 303, when the container is started or in a running state, the system allocates a corresponding number of CPU time slices and at least one virtual computing unit to the container according to the quota results determined in steps 101 and 203, and establishes a binding relationship. This binding relationship can be initialized and configured when the container is started, or it can be dynamically rebound during running according to load changes. For example, when detecting that the AI inference delay in the container rises, the NPU utilization rate decreases, or the system overall load rebalances, the scheduling layer can issue an adjustment instruction to trigger binding relationship reconstruction, achieving reallocation of computing resources.

[0070] Through the cooperative execution of steps 301-303, the system not only realizes the container-level independent allocation of general-purpose CPUs and AI accelerator resources, but also supports dynamic adjustment of resource binding modes according to task state changes, effectively improving resource utilization efficiency and real-time performance guarantee capability of task running.

[0071] In a possible implementation, with reference to Figure 4 , Figure 4 Fig. 4 is a fourth flowchart of the method for optimizing multi-core heterogeneous SOC resources provided by the application, and step 103 specifically includes steps 401-403. Step 401: Analyze the data type and data size transmitted between containers, and determine the model level to which the communication demand belongs according to the analysis result.

[0072] Step 402: When the model level is shallow and the data size transmitted is less than or equal to a preset threshold, set the delay requirement to be less than or equal to a preset delay threshold.

[0073] Step 403: When the model level is deep and the data size transmitted is greater than the preset threshold, set the bandwidth requirement to be greater than or equal to a preset bandwidth threshold.

[0074] In this embodiment, steps 401-403 are further refinement of step 103, aiming to accurately identify the model level corresponding to the communication task according to the actual data transmission characteristics between containers, and quantify the delay requirement and bandwidth requirement accordingly, to support accurate selection of communication protocols and optimized allocation of inter-core communication paths. Since a multi-core heterogeneous SOC system usually carries multiple types of task containers at the same time, the data transmitted between these containers may be control signaling or large-scale intermediate feature maps in deep networks, and different types of data have significantly different requirements for communication performance, so it is necessary to establish a communication demand evaluation mechanism based on task characteristics and data attributes.

[0075] In step 401, the system analyzes the data type and data size transmitted between containers, and determines the model level to which the communication task belongs based on the analysis result. The model level is used to reflect the position of the data in the entire AI inference process, such as input preprocessing, feature extraction, deep inference, or result output, etc. The system can determine whether the current communication task is in the shallow stage or the deep stage of the model by analyzing the content label, structure dimension, source container and context information of the transmitted data. Generally speaking, shallow tasks involve control signaling, activation signals or a small amount of parameters, have small data size, high model calculation sensitivity and strict response delay requirements; while deep tasks often contain large-size feature tensors or model weights, which have high bandwidth requirements.

[0076] In step 402, when the system determines that the model level of a certain inter-container communication task is a shallow level, and the data size of the communication task is less than or equal to a preset threshold, the system sets the delay requirement of the communication task to be less than or equal to a preset delay threshold. The setting reflects that the communication operation is extremely sensitive to the response time of the system, for example, scenarios such as trigger condition, task wake-up, or state feedback need to ensure millisecond-level or even microsecond-level response capability.

[0077] In step 403, when the model level of the communication task is determined to be a deep level, and the data size is greater than the preset threshold, the system sets the bandwidth requirement to be greater than or equal to a preset bandwidth threshold. Such a communication task is often used to transmit large amounts of data such as intermediate feature maps, weight matrices, or output tensors in a deep neural network, and has high requirements for throughput performance. If sufficient bandwidth is not allocated, it will cause an execution bottleneck or even system blocking.

[0078] In one possible implementation, with reference to Figure 5 , Figure 5 is the fifth flowchart of the multi-core heterogeneous SOC resource optimization method provided by the application, and step 104 specifically includes steps 501-503. Step 501: when the delay requirement is less than or equal to a preset delay threshold, a first communication protocol is selected to transmit data between containers, and the first communication protocol is a lightweight instruction communication protocol.

[0079] Step 502: when the bandwidth requirement is greater than or equal to a preset bandwidth threshold, a second communication protocol is selected to transmit data between containers, and the second communication protocol is a high-speed data transmission protocol.

[0080] Step 503: data transmission is performed through a communication channel in the inter-core communication layer that matches the first communication protocol or the second communication protocol.

[0081] In this embodiment, steps 501 to 503 are further refinement of step 104, which aims to select the most suitable protocol type from a plurality of optional communication protocols according to the delay requirement and the bandwidth requirement determined in step 103, and to complete protocol binding and configuration of the data transmission path in combination with the available channel resources of the inter-core communication layer. Since there are various communication channels and protocol implementation forms in the multi-core heterogeneous SOC system, for example, lightweight protocols for low-delay control transmission, high-speed data channels for large-scale data transmission, and these protocols have different coding and decoding overheads, system call complexities, and resource dependencies, it is necessary to perform targeted protocol matching according to the communication performance requirements of different tasks.

[0082] In step 501, when the system detects that the delay requirement of a certain inter-container communication task is less than or equal to a preset delay threshold, the system selects a first communication protocol to complete the data transmission of the communication task. The first communication protocol is a lightweight instruction communication protocol, which is suitable for task scheduling instructions, state synchronization signals, model control information and the like. The characteristics of this type of protocol are simple protocol stack structure, low transmission control overhead, fast response speed, and the ability to meet microsecond-level instruction round-trip requirements, which is suitable for state synchronization and distributed computing power collaborative control scenarios in model reasoning process.

[0083] In step 502, when the bandwidth requirement is determined to be greater than or equal to a preset bandwidth threshold, the system selects a second communication protocol to transmit data in the communication task. The second communication protocol is a high-speed data transmission protocol, which is suitable for transmitting large-size intermediate feature maps, model parameters or raw image data and the like. This type of protocol is usually implemented based on DMA (Direct Memory Access) or shared memory mechanism, and has high bandwidth utilization and low CPU intervention overhead, and can support data throughput requirements of hundreds of megabytes per second or even gigabytes per second.

[0084] In step 503, the system schedules the communication channel resources matched with the protocol type from the inter-core communication layer according to the selected communication protocol type, and completes channel initialization, task binding and data flow triggering through a unified communication control interface. The inter-core communication layer abstractly manages physical communication resources, and each type of communication protocol corresponds to a group of schedulable physical or virtual channels, for example, the lightweight protocol is bound to a fast interrupt channel, and the high-speed protocol is bound to a DMA link or a shared bus on the chip. Through this way, the system can decouple between the protocol type and the physical channel, improve flexibility while maintaining fine control of the communication path.

[0085] Through the execution of steps 501 to 503, the system can dynamically select the most suitable communication protocol based on task perception and model layering principles, and complete efficient docking in the inter-core communication layer, so that different types of data transmission behaviors are accurately scheduled and resource adapted, and the communication efficiency is significantly improved.

[0086] Since AI reasoning tasks often require a large amount of memory, and factors such as model structure and input data dimension will cause the memory usage of different tasks to change dynamically, if the memory is not allocated reasonably before the container is started, or not recovered in time after the task is completed, it is easy to cause system memory fragmentation, memory allocation failure or performance jitter, especially in resource-limited edge devices. Therefore, in one possible implementation, with reference to Figure 6 , Figure 6is a sixth flowchart of the multi-core heterogeneous SOC resource optimization method provided by the application. The method further comprises steps 601 and 602, which are used for pre-configuring and releasing management of the memory resources required by the container in the pre-stage and post-stage of the task execution life cycle, so as to realize fine scheduling and fragmentation suppression of the memory resources in the multi-core heterogeneous SOC system.

[0087] Step 601: Before starting the container, pre-allocate the memory resources corresponding to the to-be-processed task according to the resource requirements of the to-be-processed task.

[0088] Step 602: After the to-be-processed task is executed, release the memory resources and perform fragmentation consolidation on the released memory area.

[0089] In step 601, the system pre-allocates the memory resources matched with the to-be-processed task according to the resource requirements of the to-be-processed task determined in step 101 before starting the container. The pre-allocation operation includes initialization configuration of general memory (such as DDR) and AI accelerator related video memory area. Specifically, the container scheduling layer can call the memory management module to lock the required memory area in advance according to the task model type, inference stage characteristics and historical resource occupation data before the task is scheduled and run. The pre-allocation process supports hierarchical management, for example, only a small block of cache is allocated for a lightweight control task, and a continuous block of video memory is allocated for a large model inference task, so as to ensure that the container can quickly load the model and intermediate cache after starting, thereby greatly reducing the cold start delay.

[0090] In step 602, when the to-be-processed task is executed, the system actively releases the pre-allocated memory resources and performs fragmentation consolidation operation on the released area. Specifically, the system first marks the recycling state of the task binding memory block, and performs fragmentation consolidation by merging adjacent idle blocks, rearranging memory pages or updating memory mapping table, etc., to improve memory continuity. This operation not only recovers the available space of the resource pool, but also creates reusable high-quality memory blocks for subsequent task scheduling, avoiding long-term occupation or scattered blocks of memory leading to ineffective reuse.

[0091] By implementing steps 601 to 602, the system can realize accurate preparation of memory resources before starting the container and orderly recycling after the task is completed, solving the performance uncertainty problem caused by dynamic allocation lag or recycling not in time in the traditional container scheduling.

[0092] In an alternative embodiment, the multi-core heterogeneous SOC resource optimization method of the present application can be applied to an industrial Internet of Things multi-tenant intelligent monitoring system and a smart city multi-modal edge node system. Through the cooperative control of the container scheduling layer, the inter-core communication layer, and the hardware abstraction layer, this embodiment realizes the on-demand allocation of heterogeneous resources for multiple types of tasks and the dynamic adaptation of communication behavior, improving the operating performance of the overall system in terms of resource utilization, real-time responsiveness, and communication efficiency.

[0093] In an industrial Internet of Things scenario, a multi-core heterogeneous SOC platform includes a 4-core ARM Cortex-A72 processor module (supporting 8 GB LPDDR4 shared memory) and 4 dedicated NPUs (each containing 32 tensor cores), and also integrates an MCU module based on ARM Cortex-M7 for high-speed communication with an industrial sensor network. By executing step 101, the system obtains the resource requirements of various tasks in real time, such as the MCU container processing 200 sensor signals, completing collection every 50 ms; CPU container 1 needs to process 100 KB of normalized data per second; AI containers perform different tasks such as LSTM prediction, CNN image defect recognition, Transformer load prediction, and YOLOv5 personnel detection. The system dynamically determines the CPU time slice quota and NPU computing unit quota for each container based on the historical behavior and running load of the tasks.

[0094] In step 102, the container scheduling layer dynamically allocates resources to each container based on the above quota results, such as binding each AI container to an exclusive NPU and limiting its video memory address space range (e.g., the AI-0 container binds the address space 0x20000000-0x20800000), achieving hardware-level isolation; at the same time, the cgroups limit the CPU usage quota of each container, and priority tasks can dynamically increase the CPU share from 1024 to 2048. This scheduling strategy can guarantee the predictability and computing power of AI tasks under different scheduling periods.

[0095] In steps 103 and 104, the system evaluates the communication performance requirements based on the data flow characteristics of the communication between containers, and accordingly selects the matching communication protocol and channel. For example, the MCU container sends the 50 ms sampling period sensor raw data to the pre-allocated shared memory area of the CPU container through the DATABUF protocol, ensuring the bandwidth stability of high-frequency transmission data; the inference result synchronization between AI containers can use the lightweight IPCMSG protocol to achieve fast feedback, with a response delay controlled within 5 ms, meeting the emergency shutdown control requirements. The inter-core communication layer calls the unified interface provided by the hardware abstraction layer during resource scheduling, realizing the heterogeneous shielding of the protocol selection and channel binding process.

[0096] In steps 105 and 106, by analyzing the fused resource quota and communication channel selection result, the system optimizes the entire task flow execution path to ensure high real-time response of the MCU task (such as Modbus control link delay ≤ 100 μs) and high bandwidth requirement of the AI task, further improving the industrial-level multi-task parallel processing capability.

[0097] In another embodiment, the method of the present application is applied to the multi-modal edge node scenario of smart city. The SOC platform includes a 4-core ARM Cortex-A76 CPU (supporting NEON coprocessor), a 4-way INT8 / FP16 mixed-precision NPU, and an MCU subsystem based on RISC-V. The platform processes multiple data sources from high-definition cameras and noise sensors in a parallel manner, supporting AI tasks such as traffic flow analysis, noise positioning, facility identification, and emergency detection.

[0098] When the system executes steps 101 to 104, it can dynamically perceive the task load demand in different time periods and adapt the resource scheduling strategy, for example, during the morning rush hour, the CPU time slice of the AI-0 container is increased from 1024 to 1536, and the memory bandwidth is increased from 500 MB / s to 800 MB / s to ensure the real-time performance of high-density traffic video processing; during the night low peak period, the non-critical task AI container automatically enters the low power consumption mode, and 50% of the computing power units are turned off, so that the system power consumption is controlled within 45W, balancing performance and energy efficiency.

[0099] To avoid the problem of memory fragmentation caused by frequent task switching, the system further executes steps 601 to 602 in the above two scenarios: before the container starts, the system dynamically allocates memory resources according to the model structure and historical data of the to-be-processed task, and the allocation structure supports high-speed shared memory mapping and DMA alignment optimization; after the task is executed, the system immediately releases the related memory block and performs a fragmentation operation to ensure that the next round of container deployment process has continuous and reusable high-quality memory blocks.

[0100] Referring to Figure 7 , Figure 7 is a structural diagram of a multi-core heterogeneous SOC resource optimization system provided by the present application, which comprises: The first processing module is configured to determine the CPU time slice quota and the AI accelerator computing power unit quota corresponding to the to-be-processed task according to the real-time resource requirement of the to-be-processed task; The second processing module is configured to dynamically allocate the CPU time slice quota and the AI accelerator computing power unit quota to the container executing the to-be-processed task through the container scheduling layer; The third processing module is configured to determine the delay requirement and bandwidth requirement of the communication between the containers according to the communication requirement of the data transmission between the containers; The fourth processing module is configured to select a communication protocol for inter-container data transmission according to the delay requirement and the bandwidth requirement, and complete the inter-container data transmission through the inter-core communication layer.

[0101] In a possible implementation, the first processing module is further configured to: monitor resource utilization, task response delay, and task queue length of the to-be-processed task in real time; input the resource utilization, the task response delay, and the task queue length into the reinforcement learning model to obtain a policy result output by the reinforcement learning model; determine the CPU time slice quota and the AI accelerator computing unit quota according to the policy result.

[0102] In a possible implementation, the second processing module is further configured to: manage the CPU time slice quota of the container by using a control group mechanism of the operating system; divide the AI accelerator computing unit into a plurality of independent virtual computing units by using a hardware virtualization manner; allocate the CPU time slice quota and at least one virtual computing unit to the container during startup or running of the container, and establish a binding relationship between the container and the allocated virtual computing unit, wherein the binding relationship can be reconfigured when a task load changes.

[0103] In a possible implementation, the third processing module is further configured to: analyze a data type and a data size transmitted between the containers, and determine a model level to which a communication requirement belongs according to an analysis result; when the model level is a shallow level and the data size is less than or equal to a preset threshold, set the delay requirement to be less than or equal to a preset delay threshold; when the model level is a deep level and the data size is greater than the preset threshold, set the bandwidth requirement to be greater than or equal to a preset bandwidth threshold.

[0104] In a possible implementation, the fourth processing module is further configured to: when the delay requirement is less than or equal to the preset delay threshold, select a first communication protocol to transmit data between the containers, the first communication protocol being a lightweight instruction communication protocol; when the bandwidth requirement is greater than or equal to the preset bandwidth threshold, select a second communication protocol to transmit data between the containers, the second communication protocol being a high-speed data transmission protocol; execute the data transmission through a communication channel matched with the first communication protocol or the second communication protocol in the inter-core communication layer.

[0105] In a possible implementation, the system further includes a fifth processing module configured to: Before the container is started, memory resources corresponding to the to-be-processed task are pre-allocated according to resource requirements of the to-be-processed task; After the to-be-processed task is executed, the memory resources are released, and the released memory area is defragmented.

[0106] It should be noted that the multi-core heterogeneous SOC resource optimization system provided by the present application can execute the multi-core heterogeneous SOC resource optimization method of any of the above embodiments during actual operation, and the present embodiment will not be described in detail.

[0107] Figure 8 is a structural schematic diagram of an electronic device provided by the present application, as Figure 8 shown, the electronic device can include a processor 810 (processor), a communications interface 820 (Communications Interface), a memory 830 (memory), and a communications bus 840, wherein the processor 810, the communications interface 820, and the memory 830 complete mutual communication through the communications bus 840. The processor 810 can invoke logical instructions in the memory 830 to execute a multi-core heterogeneous SOC resource optimization method, which includes: determining CPU time slice quotas and AI accelerator computing power unit quotas corresponding to a to-be-processed task according to real-time resource requirements of the to-be-processed task; dynamically allocating the CPU time slice quotas and the AI accelerator computing power unit quotas to a container executing the to-be-processed task through a container scheduling layer; determining delay requirements and bandwidth requirements of communication between containers according to communication requirements of data transmission between the containers; selecting a communication protocol for data transmission between the containers according to the delay requirements and the bandwidth requirements, and completing data transmission between the containers through an inter-core communication layer.

[0108] In addition, the logical instructions in the memory 830 described above can be implemented in the form of a software functional unit and sold or used as an independent product, which can be stored in a computer-readable storage medium. According to such understanding, the technical solutions of the present application or parts of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method of each embodiment of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0109] In another aspect, the present application also provides a computer program product, which comprises a computer program stored on a non-transitory computer-readable storage medium, and the computer program comprises program instructions, and the computer program instructions can enable a computer to execute the multi-core heterogeneous SOC resource optimization method provided by the above-mentioned embodiments when the computer program instructions are executed by the computer.

[0110] In another aspect, the present application also provides a non-transitory computer-readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the multi-core heterogeneous SOC resource optimization method provided by the above-mentioned embodiments.

[0111] The system embodiments described above are only schematic, and the units shown as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment. Those skilled in the art can understand and implement without creative labor.

[0112] From the above description of the embodiments, those skilled in the art can clearly understand that the embodiments can be realized by means of software plus necessary universal hardware platforms, and of course can also be realized by hardware. According to such understanding, the above technical solutions, essentially or in other words, the part of the prior art that makes a contribution, can be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as a ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the methods of the embodiments or some parts of the embodiments.

[0113] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the above-mentioned embodiments of the present application have been described in detail, those skilled in the art should understand that: it can still modify the technical solutions recorded in the above-mentioned embodiments, or make equivalent replacement to some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for optimizing resources in a multi-core heterogeneous SOC, characterized in that, The multi-core heterogeneous SOC includes a container scheduling layer and an inter-core communication layer, and the method includes: Based on the real-time resource requirements of the task to be processed, determine the CPU time slice quota and AI accelerator computing power unit quota corresponding to the task to be processed. The container scheduling layer dynamically allocates the CPU time slice quota and the AI ​​accelerator computing power unit quota to the container executing the task to be processed. Based on the communication requirements for data transmission between the containers, determine the latency and bandwidth requirements for communication between the containers. Based on the latency and bandwidth requirements, a communication protocol for inter-container data transmission is selected, and inter-container data transmission is completed through the inter-core communication layer.

2. The multi-core heterogeneous SOC resource optimization method according to claim 1, characterized in that, The step of determining the CPU time slice quota and AI accelerator computing unit quota corresponding to the task to be processed based on the real-time resource requirements of the task to be processed includes: Real-time monitoring of resource utilization, task response latency, and task queue length of the tasks to be processed; The resource utilization rate, the task response latency, and the task queue length are input into the reinforcement learning model to obtain the policy result output by the reinforcement learning model. Based on the results of the strategy, the CPU time slice quota and the AI ​​accelerator computing power unit quota are determined.

3. The multi-core heterogeneous SOC resource optimization method according to claim 1, characterized in that, The step of dynamically allocating the CPU time slice quota and the AI ​​accelerator computing power unit quota to the container executing the task to be processed through the container scheduling layer includes: The CPU time slice quota of the container is managed using the control group mechanism of the operating system; The AI ​​accelerator computing power unit is divided into multiple independent virtual computing power units through hardware virtualization. During the startup or operation of the container, the CPU time slice quota and at least one virtual computing unit are allocated to the container, and a binding relationship is established between the container and the allocated virtual computing unit, wherein the binding relationship can be reconfigured when the task load changes.

4. The multi-core heterogeneous SOC resource optimization method according to claim 1, characterized in that, The step of determining the latency and bandwidth requirements for communication between containers based on the communication needs for data transmission between the containers includes... The data types and scales transmitted between the containers are analyzed, and the model level to which the communication requirement belongs is determined based on the analysis results; When the model level is shallow and the transmitted data size is less than or equal to a preset threshold, the latency requirement is set to be less than or equal to the preset latency threshold. When the model is deep and the amount of data transmitted is greater than a preset threshold, the bandwidth requirement is set to be greater than or equal to the preset bandwidth threshold.

5. The multi-core heterogeneous SOC resource optimization method according to claim 1, characterized in that, The step of selecting a communication protocol for inter-container data transmission based on the latency and bandwidth requirements, and completing the inter-container data transmission through the inter-core communication layer, includes: When the latency requirement is less than or equal to a preset latency threshold, a first communication protocol is selected to transmit data between the containers. The first communication protocol is a lightweight instruction communication protocol. When the bandwidth requirement is greater than or equal to a preset bandwidth threshold, a second communication protocol is selected to transmit data between the containers. The second communication protocol is a high-speed data transmission protocol. The data transmission is performed through a communication channel in the inter-core communication layer that matches the first communication protocol or the second communication protocol.

6. The multi-core heterogeneous SOC resource optimization method according to claim 1, characterized in that, Also includes: Before the container starts, memory resources corresponding to the task to be processed are pre-allocated according to the resource requirements of the task to be processed. After the pending task is completed, the memory resources are released, and the released memory area is defragmented.

7. The multi-core heterogeneous SOC resource optimization method according to claim 1, characterized in that, The multi-core heterogeneous SoC also includes a hardware abstraction layer; The container scheduling layer and the inter-core communication layer respectively call the unified interface provided by the hardware abstraction layer to shield the differences between different types of computing power units at the underlying level during resource allocation and communication.

8. A multi-core heterogeneous SOC resource optimization system, characterized in that, include: The first processing module is used to determine the CPU time slice quota and AI accelerator computing power unit quota corresponding to the task to be processed based on the real-time resource requirements of the task to be processed. The second processing module is used to dynamically allocate the CPU time slice quota and the AI ​​accelerator computing power unit quota to the container executing the task to be processed through the container scheduling layer. The third processing module is used to determine the latency and bandwidth requirements for communication between the containers based on the communication requirements for data transmission between the containers. The fourth processing module is used to select a communication protocol for inter-container data transmission based on the latency requirements and the bandwidth requirements, and to complete the inter-container data transmission through the inter-core communication layer.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the multi-core heterogeneous SOC resource optimization method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the multi-core heterogeneous SOC resource optimization method as described in any one of claims 1 to 7.

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