Parametric amplifier with inductive input coupling for quantum computing systems

Abstract

The invention relates to a parametric amplifier with inductive input coupling for a quantum computing system. One example aspect of the present disclosure relates to a quantum computing system including a first qubit, a first measurement device, and a first amplifier. The first measurement device is configured to generate a first qubit signal corresponding to a first quantum state of a first qubit. The first amplifier is configured to amplify the first qubit signal. The first amplifier includes a first transmission line resonator. The first transmission line resonator provides inductive reactance for the electrical coupling between the first measurement device and the first amplifier. The inductive reactor used for electrical coupling realizes transmission of the first quantum bit signal.

Description

[0001] CLAIM OF PRIORITY

[0002] This application is based on and claims priority to U.S. Application No. 18 / 176,394, filed February 28, 2023, which is incorporated by reference herein. TECHNICAL FIELD

[0003] The present disclosure relates generally to quantum computing and information processing systems, and more specifically, to parametric amplifiers with inductive input coupling for quantum computing systems. BACKGROUND

[0004] Quantum computing is a method of computing that leverages quantum effects, such as superposition of basis states and entanglement, to perform certain computations more efficiently than classical digital computers. In contrast to digital computers, which store and manipulate information in the form of bits (e.g., “1” or “0”), quantum computing systems can use qubits to manipulate information. A qubit can refer to a quantum device that can superpose multiple states (e.g., data in both “0” and “1” states), and / or to the superposition of data itself in multiple states. According to conventional terminology, the superposition of “0” and “1” states in a quantum system can be represented as, for example, + b The “0” and “1” states of a digital computer are analogous to the and basis states of a qubit, respectively. SUMMARY

[0005] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or can be learned from the description, or can be learned through practice of the embodiments.

[0006] One example aspect of the present disclosure relates to a quantum computing system comprising a first qubit, a first measurement device, and a first amplifier. The first measurement device is configured to generate a first qubit signal corresponding to a first quantum state of the first qubit. The first amplifier is configured to amplify the first qubit signal. The first amplifier comprises a first transmission line resonator. The first transmission line resonator provides an inductive reactance for an electrical coupling between the first measurement device and the first amplifier. The inductive reactance for the electrical coupling enables transmission of the first qubit signal.

[0007] Other aspects of the present disclosure relate to various systems, methods, apparatuses, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0008] These and other features, aspects, and advantages of the various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain related principles. BRIEF DESCRIPTION OF DRAWINGS

[0009] With reference to the accompanying drawings, a detailed discussion of embodiments oriented to one of ordinary skill in the art is set forth in this specification, in which:

[0010] Figure 1 A schematic of a parametric amplifier is provided.

[0011] Figure 2 An example quantum computing system according to example embodiments of the present disclosure is depicted;

[0012] Figure 3 A schematic of a parametric amplifier according to various embodiments is provided;

[0013] Figure 4 A circuit level diagram of a parametric amplifier according to various embodiments is provided; Figure 3 indicating the quantities used in calculating the capacitance value of the second pole coupling capacitor of the parametric amplifier;

[0014] Figure 5 Another example quantum computing system according to example embodiments of the present disclosure is depicted; and

[0015] Figure 6 A non-limiting frequency response curve of a parametric amplifier according to various embodiments is shown; Figure 3 and Figure 5 DETAILED DESCRIPTION

[0016] ​Example aspects of the present disclosure relate to methods, architectures, and hardware configurations for resetting a quantum state of a multi-state device (e.g., a qubit) via a tunable energy transfer device (e.g., a tunable qubit coupler) within a quantum computing system. In a quantum computing system, a qubit has two or more possible “pure” quantum states, where a “pure” state is defined with respect to an eigenstate of a particular qubit measurement device (or an eigenstate of a matrix operator corresponding to the measurement device). At least two of the possible quantum states are used as information-bearing states, and are thus referred to as the computational states of the qubit. A qubit can have more possible pure states in addition to its computational states. For example, a quantum state of a qubit can include non-computational states. It is also noted that a qubit can be in any possible “superposition” of its pure states (e.g., defined by complex-valued amplitudes for each pure state, subject to an overall normalization constraint and independence of any overall phase on the amplitudes) prior to a significant “collapse” of its wave function upon entanglement with a wave function of a measurement device (e.g., a qubit measurement is performed).

[0017] A Josephson parametric amplifier (JPA) can be used in a quantum computing system (e.g., a quantum computing system employing superconducting qubits (e.g., transmon qubits)). Such systems can rely on a dispersive readout operation of their qubits. A JPA can be used to provide a first gain stage with near-quantum-limited noise, enabling fast and accurate detection of a low-power readout signal. A low-noise cryogenic amplifier and a room-temperature receiver can follow the JPA. In such applications, it is advantageous for the JPA to have both: (1) a high instantaneous bandwidth for accommodating sufficient spectral separation between readout tones; and (2) a high dynamic range for avoiding loss of readout fidelity due to gain compression and intermodulation distortion.

[0018] Embodiments include a JPA that satisfies both of the above design goals (e.g., high instantaneous bandwidth and high dynamic range), such that the JPA of embodiments can be used to implement various quantum computing systems. More specifically, the JPA of embodiments has a multi-pole matching network (e.g., an impedance matching network) and a quarter- wavelength resonator along a transmission line that is an input to the multi-pole matching network (and thus an input to the JPA). The multi-pole network of the JPA increases the bandwidth of the JPA, while the resonator is used to invert the input coupling reactance from a capacitive reactance to an inductive reactance. Since the coupling of the JPA to the input signal is inductive (rather than capacitive), unwanted resonances within the JPA are mitigated.

[0019] Some JPA designs can use a multi-pole matching network (e.g., an impedance matching network) to increase the bandwidth of the JPA. However, such JPA’s are typically designed with lumped-element LC resonators that have capacitive mutual coupling, which can lead to unwanted resonances with other components of the JPA or components in electrical contact with the JPA (e.g., circuit elements external to the JPA).

[0020] Figure 1 A schematic of a parametric amplifier 02 is provided. The parametric amplifier 02 can be a JPA and can include a matching network 08. The matching network 08 can be a multi-pole matching network that includes three poles: a first pole, a second pole, and a third pole. The first pole can include a first LC resonator 10, the second pole can include a second LC resonator 20, and the third pole can include a third LC resonator 30. As a lumped-element LC resonator, the first LC resonator 10 includes a first resonator inductor 12 (e.g., with a variable first inductance LI) and a first resonator capacitor 14 (e.g., with a first capacitance CI). Similarly, the second LC resonator 20 includes a second resonator inductor 22 (e.g., with a second inductance L2) and a second resonator capacitor 24 (e.g., with a second capacitance C2). The third LC resonator 30 includes a third resonator inductor 32 (e.g., with a third inductance L3) and a third resonator capacitor 34 (e.g., with a third capacitance C3). The first LC resonator 10 is electrically coupled to the second LC resonator 20 via a first pole coupling capacitor 18 (e.g., with a capacitance C 12 ) to the third LC resonator 30 via a second pole coupling capacitor 28 (e.g., with a capacitance C 23 ). The first resonator inductor 12, which has a variable inductance, at least partially enables amplification of the parametric amplifier 02. For example, when the variable inductance of the first resonator inductor 12 is modulated at a certain frequency (the “pump frequency”), the parametric amplifier 02 can amplify signals that are close to half the pump frequency.

[0021] The parametric amplifier 02 has an input terminal 50. In the parametric amplifier 02, the input terminal 50 is coupled to the matching network 08 via an input capacitor 38 (e.g., with a capacitance C 34 ) and an input feedline 40 (e.g., with an input impedance magnitude (or resistance), denoted as Z0). It should be noted that the input capacitor 38 causes the input coupling reactance of the parametric amplifier 02 to be a capacitive input coupling reactance. Capacitive reactance can lead to unwanted resonances within the parametric amplifier 02. In particular, the input capacitor 38 tends to be large (e.g., where w0is the center frequency of the parametric amplifier 02), and which itself can resonate with other reactances external to the parametric amplifier 02 (e.g., bond wires and multi-segment traces on the chip or package). The additional resonances in the circuit are uncontrolled and ultimately degrade the performance of the parametric amplifier 02, e.g., resulting in out-of-spec gain ripple.

[0022] In various embodiments, the capacitance of the input capacitor 38 can be much larger (e.g., ). For example, when the amplifier 02 is designed for a center frequency of 4.5 GHz and a bandwidth of 500 MHz, C 34 may be greater than 1 pF. Although Figure 1 not shown in FIG. 1, the input capacitor 38 can also be connected to a 50-ohm (Ω) transmission line on the chip that is several mm in length to connect from the amplifier to the bond pads. This length, in combination with the inductance of the wire bonds, can create spurious resonances whose frequencies are close to the frequencies of the amplifier, which can cause degradation in the gain or ripple of the amplifier. With the capacitive input coupling to the lumped-element resonator (e.g., at the lumped-element resonator of the parametric amplifier 02), there can be frequency-dependent reactance. That is, the parametric amplifier 02 can only be employed at a narrow band of input frequencies. Since the target coupling only occurs at a single frequency, the applicability of the parametric amplifier 02 to quantum computing systems can be limited.

[0023] To address these problems, as well as other problems of the parametric amplifier 02, and as noted above, embodiments replace the third LC resonator 30 in the matching network 08 with a quarter- wavelength transmission line resonator. See, e.g., Figure 3 The quarter-wavelength transmission line resonator of the embodiments reverses the input coupling reactance from capacitive to inductive. Thus, the JPA of the embodiments can be inductively coupled to the input terminal of the JPA. Since the reactance is inductive, this reduces the likelihood of spurious resonances occurring near the operating frequencies of the amplifier. The quarter-wavelength transmission line resonator additionally helps to cover the physical distance on the chip from the bond pads to the device, thus further reducing spurious resonances associated with the wiring over that distance.

[0024] Aspects of the present disclosure provide a number of technical effects and benefits. For example, as noted above, the JPA of the embodiments achieves at least two design goals (e.g., high instantaneous bandwidth and high dynamic range) associated with JPAs employed in quantum computing systems, while mitigating spurious resonances. More specifically, the JPA of the embodiments can be employed to reliably amplify quantum bit readout signals in quantum computing systems, while mitigating unwanted resonances. The variable inductance included in the embodiments further helps to achieve these design goals. Thus, the described embodiments can be employed to implement a variety of quantum computing systems.

[0025] Figure 2 An example quantum computing system 100 is depicted. System 100 is an example of a system of one or more classical computers and / or quantum computing devices located in one or more locations in which the systems, components, and techniques described below can be implemented. Using the disclosure provided herein, those of ordinary skill in the art will appreciate that other quantum computing devices or systems can be used without departing from the scope of the present disclosure.

[0026] System 100 includes quantum hardware 102 in data communication with one or more classical processors 104. Classical processor 104 can be configured to execute computer-readable instructions stored in one or more memory devices to perform operations, such as any of the operations described herein. Quantum hardware 102 includes components for performing quantum computations. For example, quantum hardware 102 includes a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). Quantum system 110 can include one or more multi-level quantum subsystems, such as a register of qubits (e.g., qubit 120). In some implementations, the multi-level quantum subsystems can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, spin-based qubits, and the like.

[0027] The type of multi-level quantum subsystems used by system 100 can vary. For example, in some cases, it can be convenient to include one or more readout devices 114 attached to one or more superconducting qubits (e.g., transmon qubits, flux qubits, gmon qubits, xmon qubits, or other qubits). In other cases, ion traps, photonic devices, or superconducting cavities can be used (e.g., with which it can not be necessary to prepare states using qubits). Additional examples of implementations of multi-level quantum subsystems include fluxmon qubits, silicon quantum dots, or phosphorus-doped quantum bits. One of readout devices 114 can be referred to as a qubit measurement device. For example, readout device 114 can include a qubit measurement device 510 of Figure 5

[0028] ​A quantum circuit can be constructed and applied to a register of qubits included in the quantum system 110 via a plurality of control lines coupled to one or more control devices 112. An example control device 112 operating on a register of qubits can be used to implement a quantum gate or a quantum circuit having a plurality of quantum gates, such as a Pauli gate, an Hadamard gate, a controlled not (CNOT) gate, a controlled phase gate, a T gate, a multi-qubit quantum gate, a coupler quantum gate, and the like. The one or more control devices 112 can be configured to operate on the quantum system 110 by one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem can be a superconducting qubit, and the control device 112 can be configured to provide a control pulse to a control line to produce a magnetic field to adjust the frequency of the qubit.

[0029] The quantum hardware 102 can also include a readout device 114 (e.g., a readout resonator). Measurement results 108 obtained via the measurement device can be provided to the classical processor 104 for processing and analysis. In some implementations, the quantum hardware 102 can include a quantum circuit, and the control device 112 and the readout device 114 can implement one or more quantum logic gates that operate on the quantum computing system 100 by physical control parameters (e.g., microwave pulses) sent through wires included in the quantum hardware 102. Further examples of control devices include an arbitrary waveform generator, where a DAC (digital-to-analog converter) creates the signal.

[0030] The readout device 114 can be configured to perform a quantum measurement on the quantum system 110 and send measurement results 108 to the classical processor 104. In some embodiments, the measurement results are encoded in the form of a qubit output signal (e.g., a qubit output signal 512 of Figure 5 In such embodiments, a parametric amplifier (e.g., a parametric amplifier 300 of Figure 3 and / or a parametric amplifier 400 of Figure 5Such signals can be amplified by a parametric amplifier (e.g., parametric amplifier 520) positioned, for example, on a transmission line that sends measurement results 108 from readout devices 114 to classical processor 104. Additionally, quantum hardware 102 can be configured to receive data from classical processor 104 that specifies physical control qubit parameter values 106. Quantum hardware 102 can use received physical control qubit parameter values 106 to update actions of control devices 112 and readout devices 114 on quantum system 110. For example, quantum hardware 102 can receive data that specifies new values for voltage strengths of one or more DACs included in control devices 112, and the quantum hardware can update actions of the DACs on quantum system 110 accordingly. Classical processor 104 can be configured to initialize quantum system 110 in an initial quantum state, for example, by sending data to quantum hardware 102 that specifies initial parameter set 106.

[0031] In some implementations, readout devices 114 can measure states of elements (e.g., qubits) using impedance differences of states of quantum system elements (such as qubits). For example, due to nonlinearity of qubits, a resonance frequency of a readout resonator can take on different values when a qubit is in state and For example, due to nonlinearity of qubits, a resonance frequency of a readout resonator can take on different values when a qubit is in state or state Accordingly, microwave pulses reflected from readout devices 114 carry amplitude and phase shifts that depend on qubit states. In some implementations, a Purcell filter can be used in conjunction with readout devices 114 to block microwave propagation at qubit frequencies.

[0032] In some embodiments, quantum system 110 can include a plurality of qubits 120, for example, arranged in a two-dimensional grid 122. For clarity, Figure 2 Two-dimensional grid 122 depicted in FIG. 1 includes 4x4 qubits, however in some implementations, system 110 can include fewer or greater numbers of qubits. In some embodiments, the plurality of qubits 120 can interact with one another through a plurality of qubit couplers (e.g., qubit coupler 124). Qubit couplers can define nearest-neighbor interactions between the plurality of qubits 120. In some implementations, strengths of the plurality of qubit couplers are tunable parameters. In some cases, the plurality of qubit couplers included in quantum computing system 100 can be couplers with fixed coupling strengths.

[0033] In some implementations, the plurality of qubits 120 can include data qubits (such as qubits 126) and measurement qubits (such as qubits 128). Data qubits are qubits that participate in computations performed by the system 100. Measurement qubits are qubits that can be used to determine the results of computations performed by the data qubits. That is, during a computation, the unknown states of the data qubits are transferred to the measurement qubits using appropriate physical operations, and measured via appropriate measurement operations performed on the measurement qubits.

[0034] In some implementations, each qubit in the plurality of qubits 120 can be operated using a respective operating frequency (such as an idle frequency and / or an interaction frequency and / or a readout frequency and / or a reset frequency). The operating frequencies of different qubits can be different. For example, each qubit can idle at a different operating frequency. The operating frequencies of the qubits 120 can be selected prior to performing a computation.

[0035] Figure 2 An example quantum computing system that can be used to implement methods and operations in accordance with example aspects of the present disclosure is depicted. Other quantum computing systems can be used without departing from the scope of the present disclosure.

[0036] Figure 3 A schematic of a parametric amplifier 300 according to various embodiments is provided. The parametric amplifier 300 can be a Josephson parametric amplifier (JPA). The parametric amplifier 300 can include a matching network 308 (e.g., an impedance matching network). The matching network 308 can be a multi-pole matching network including three poles: a first pole, a second pole, and a third pole. The first pole can include a first LC resonator 310 and the second pole can include a second LC resonator 320. The third pole can include a first transmission line resonator (e.g., transmission line resonator 330). The transmission line resonator 330 can be characterized by an impedance (e.g., Z). The transmission line resonator 330 can be a quarter wavelength transmission line resonator (e.g., theta represents the electrical length of the transmission line of the transmission line resonator 330). In some embodiments, τ is the frequency, the length is specified at said frequency, and τ is the electrical delay of that transmission line length. The parametric amplifier 300 may additionally include a shunt inductor 338. As a lumped-element LC resonator, the first LC resonator 310 includes a first resonator inductor 312 (e.g., having a variable first inductance L1) and a first resonator capacitor 314 (e.g., having a first capacitance C1). In some embodiments, the first resonator inductor 312 may be constructed from a Josephson junction or an array of Josephson junctions. In other embodiments, the first resonator inductor 312 may be constructed from a superconducting quantum interference device (SQUID) or an array of SQUIDs (e.g., a radio frequency (RF) SQUID array). In some embodiments, a DC-SQUID may be used in the construction of the first resonator inductor 312. In other embodiments, an RF-SQUID may be used in the construction of the first resonator inductor 312. When using an RF-SQUID array, the parametric amplifier 300 can achieve the high dynamic range discussed above.

[0037] Similarly, the second LC resonator 320 includes a second resonator inductor 322 (e.g., having a second inductance L2) and a second resonator capacitor 324 (e.g., having a second capacitance C2). With Figure 1 Compared to the third LC resonator 30, the third pole of the parametric amplifier includes a transmission line resonator 330. The first LC resonator 310 is coupled via a first-pole capacitor 318 (e.g., having a capacitance C). 12 The second LC resonator 320 is electrically coupled to the second LC resonator 320 via a second-pole coupling capacitor 328 (e.g., having a capacitance C). 23 Electrically coupled to transmission line resonator 330. A first resonator inductor 312 with variable inductance at least partially amplifies the parametric amplifier 300. For example, when the variable inductance of the first resonator inductor 312 is modulated at a certain frequency (“pump frequency”), the parametric amplifier 300 can amplify a signal close to half the pump frequency.

[0038] The parametric amplifier 300 has one or more input terminals, such as input terminal 350. A matching network 308 is connected via input feed 340 and a shunt inductor 338 (e.g., with inductance L). 34 Electrically coupled to input terminal 350. Note that... Figure 1The electrical coupling between the input terminal 350 of the parametric amplifier 300 and the matching network 308 is inductive, as compared to the capacitive coupling between the input terminal 50 of the amplifier 02 and the matching network 08, and is at least partially realized via the transmission line resonator 330 and the shunt inductor 338. In some embodiments, the input feed line 340 is an input feed line, while in other embodiments, the input feed line 340 is a feed line (e.g., having an impedance modulus (or resistance) Z0).

[0039] Comparing Figure 1 the amplifier 02 and Figure 3 the parametric amplifier 300, in Figure 3 , the third LC resonator 30 in the matching network 08 (of the amplifier 02) has been replaced by the transmission line resonator 330 in the matching network 308 of the parametric amplifier 300. The transmission line resonator 330 can be a quarter- wavelength transmission line resonator that reverses the input coupling reactance from capacitive (e.g., as in Figure 1 ) to inductive (e.g., as in Figure 3 ). Thus, the parametric amplifier 300 can be inductively coupled to the signal input circuit (e.g., via the input terminal 350). Since the reactance is now inductive, this mitigates against accidental resonances. The transmission line resonator 330 additionally helps cover the physical distance on-chip from the bond pad to the device, thus further reducing spurious resonances associated with the routing over this distance. It should also be noted that the input capacitor 38 of the amplifier 02 has been replaced by the shunt inductor 330 in the parametric amplifier 300.

[0040] The inductive coupling (facilitated by the use of the quarter- wavelength transmission line resonator 330) can at least partially mitigate resonances between the bond wire and the input of the parametric amplifier 300. Additionally, the length of the transmission line resonator 330 can be sufficient to cover any physical distance between the amplifier and the bond pad, removing the need for additional routing transmission lines and any spurious resonances associated with this extra length.

[0041] As noted in the discussion above in connection with Figure 1 , the input capacitor 38 (or amplifier 02) can be connected to a 50 Ω feed. Referring to Figure 1The coupling between the lumped parallel LC (e.g., the third LC resonator 30) and the 50 Ω feed. The coupling between the input capacitor 38 and the 50 Ω feed may need to be approximated because the admittance inverter should have a negative compensation capacitor, which may not be absorbed on the 50 Ω side. This approximation tends to increase the significant frequency dependence of the coupling and may limit the bandwidth of the design. Therefore, using the transmission line resonator 330 has another advantage because the coupling is now inductive (rather than as in Figure 1 (As shown in the image, it is capacitive) because when a transmission line resonator 330 is used in the parametric amplifier 300, it is not necessary to absorb the negative reactance on the 50 Ω side. The symmetry between the transmission line resonator 330 and the input feed 340 makes it easier to absorb the negative reactance. Both the input feed 340 and the transmission line resonator 330 can be shortened to absorb this negative reactance.

[0042] exist Figure 3 In the non-limiting embodiment shown, the matching network has three matching segments (or poles). However, the embodiments are not limited to this, and the matching network 308 can have any number of matching segments (or poles). For example, the parametric amplifier 300 can also be easily generalized to have two or four segments. Additionally, other resonators can be implemented as transmission line resonators 330, such as quarter-wavelength or half-wavelength resonators. Advantages of using transmission line resonators 330 include the fact that they can be easily implemented with modest fabrication resources (e.g., using a single-layer planar fabrication process). According to Richard's transformation, the coupled shunt inductor 338 can also be implemented using a short-circuited transmission line with an electrical length of 45 degrees.

[0043] Compare Figure 1 and Figure 3 ,because( Figure 3 The second-pole coupling capacitor 328 couples a lumped element LC resonator (e.g., a second LC resonator 320) on one side and a transmission line resonator 330 on the other side, therefore its capacitance value (e.g., C) is... 23 ) can be with Figure 1 The expression used to calculate the capacitance value of the second-pole coupling capacitor 28 is calculated in different ways. Figure 4 Provided according to various embodiments Figure 3 A circuit diagram of a portion of the parametric amplifier 300, indicating the quantities used in calculating the capacitance value of the second-pole coupling capacitor 328 of the parametric amplifier 300. Figure 4 In this context, B0 can be the reactance of the second-stage coupling capacitor 328, B1 can be the negative reactance of the coupling capacitor B0 that needs to be compensated, and θ can be the transmission length of the transmission line resonator 330. inY is the input admittance (e.g., the inverse of impedance) and can be calculated as:

[0044] .

[0045] If the structure is used as an admittance inverter with value J, we can constrain to get Y = J 2 / Y L . Substituting this constraint into the above equation, we find:

[0046] .

[0047] The reactances B0and B1may be written in terms of J as:

[0048]

[0049]

[0050] The compensation line length of the transmission line resonator 330 can be calculated as:

[0051] .

[0052] The capacitance (e.g., C 23 ) of the second pole coupling capacitor 328 is related to B0, and the compensation capacitance related to B1may be written as:

[0053]

[0054]

[0055] Figure 5 Another example quantum computing system 500 according to example embodiments of the present disclosure is depicted. The quantum computing system 500 can be similar to the quantum computing system 100 Figure 2 . Thus, the quantum computing system 500 can include a qubit including at least a first qubit (e.g., qubit 526). The qubit 526 has a quantum state. The qubit 526 can be a superconducting transmon qubit. The quantum state of the qubit 526 can be encoded in a wave function represented as a projection on a surface of a Bloch sphere, as Figure 5The quantum computing system 500 also includes at least a first qubit measurement device (e.g., the qubit measurement device 510). The qubit measurement device 510 is capable of measuring (or observing) the quantum state of the qubit 526 (via the received signal 502). The qubit measurement device 510 can be a readout device included in the readout device 114 of the quantum computing system 100. The qubit measurement device 510 can receive the received signal 502 from the qubit 526. Accordingly, the qubit measurement device 510 is configured to generate a first qubit signal (e.g., the qubit signal 512) corresponding to the quantum state of the qubit 526. The qubit signal 512 can be an embodiment of the measurement result 108 in the quantum computing system 100. It should be noted that when the quantum state of the qubit 526 is measured by the qubit measurement device 510, the wave function of the quantum state can collapse to a single eigenstate of the qubit measurement device 510.

[0056] The quantum computing system 500 can additionally include a first amplifier (e.g., the parametric amplifier 520). It should be noted that the parametric amplifier 520 can be employed in the amplifier device 530. The parametric amplifier 520 can be similar (or equivalent) to the parametric amplifier 300 of Figure 3 The amplifier device 530 can include, in addition to the parametric amplifier 520, a circulator 528. The circulator 538 can be a 3-port circulator such that the amplifier device 530 operates as a reflective amplifier.

[0057] There is an electrical coupling between the qubit measurement device 510 and the parametric amplifier 520 (e.g., via the circulator 528). Accordingly, the parametric amplifier 520 can be configured to amplify the qubit signal 512 via the electrical coupling. Thus, when the qubit signal 512 is provided as an input to the parametric amplifier 520, the parametric amplifier 520 can provide an amplified qubit signal 522 as an output. It should be noted that in the quantum computing system 100 of Figure 2 The amplifier device 530 (e.g., including the parametric amplifier 520) can be positioned along a transmission line that transmits the measurement result 108. For example, the parametric amplifier 520 can be positioned along a transmission line that couples the readout device 114 of the quantum computing system 100 and the classical processor 104. Via the circulator 528, the probe signal 502 can be fed back to the qubit 526.

[0058] As noted above, the parametric amplifier 520 can be similar (or equivalent) to the parametric amplifier 300 of Figure 3 Accordingly, the parametric amplifier 520 can be a Josephson parametric amplifier (JPA). Thus, the parametric amplifier 520 can include a first transmission line resonator (e.g., the transmission line resonator 330 of Figure 3 As incorporated above, the transmission line resonator 330 can be a superconducting transmission line resonator. Thus, the transmission line resonator 330 can include a first superconducting transmission line (e.g., the first superconducting transmission line 332 of Figure 3The transmission line resonator provides inductive reactance for the electrical coupling between the qubit measurement device 510 and the parametric amplifier 520. The inductive coupling between the qubit measurement device 510 and the parametric amplifier 520 enables the transmission of the qubit signal 512.

[0059] Similar (or equivalent) to the parametric amplifier 300 of Figure 3 Although not explicitly shown in Figure 5 , the parametric amplifier 520 can include a multi-pole impedance matching network (e.g., the matching network 308 of Figure 3 ). Accordingly, the multi-pole impedance matching network of the parametric amplifier 520 can include a first pole, a second pole, and a third pole. The third pole can include a transmission line resonator. The third pole of the parametric amplifier 520 can also include a terminal transmission line. The terminal transmission line of the third pole can include a shunt inductor (e.g., the shunt inductor 338 of Figure 3 ). The transmission line resonator can electrically (e.g., inductively) couple a terminal line (e.g., the input terminal 350 of Figure 3 ) of the parametric amplifier 520 to one or more poles of the impedance matching network of the parametric amplifier 520.

[0060] The first pole of the multi-pole impedance matching network includes a first inductive-capacitive (LC) resonant circuit (e.g., the first LC resonator 310 of Figure 3 ) and a second LC resonant circuit (e.g., the second LC resonator 320 of Figure 3 ). A capacitor (e.g., the second pole coupling capacitor 328 of Figure 3 ) can electrically (e.g., capacitively) couple the transmission line resonator to the second LC resonant circuit. A second capacitor (e.g., the first pole coupling capacitor 318 of Figure 3 ) can electrically (e.g., capacitively) couple the first LC resonant circuit and the second LC resonant circuit.

[0061] Although not explicitly shown in Figure 5 , the quantum computing system 500 can include a set of qubits, a set of transmission lines, and a set of Josephson parametric amplifiers (JPAs). Each JPA of the set of JPAs can be similar (or equivalent) to the parametric amplifier 300 of Figure 3 and / or the parametric amplifier 520 of Figure 5 . Accordingly, the set of JPAs can include Figure 3The parametric amplifiers 300 and / or 520 are included. The set of qubits may include qubits 526. Therefore, each qubit in the set of qubits may be a superconducting transmon qubit. Each transmission line in the set of transmission lines may be configured to transmit a qubit signal (e.g., qubit signal 512) that encodes a measurement of the quantum state of the corresponding qubit in the set of qubits (e.g., a measurement performed by a qubit measurement device (such as, but not limited to, qubit measurement device 510)). Each JPA in the set of JPAs may include a transmission line resonator (e.g., Figure 3 The transmission line resonator 330 of the JPA can inductively couple the JPA to the corresponding transmission line of the transmission line via inductive reactance. The transmission line corresponding to the JPA can inductively provide the quantum bit signal to the JPA for amplification.

[0062] Figure 6 Various embodiments are shown. Figure 3 and Figure 5 The non-restricted frequency response curve 600 of the parametric amplifier. That is, the frequency response curve 600 can be similar to... Figure 3 Parametric amplifier 300 and / or Figure 5 The frequency response curve of the parametric amplifier 500 is shown. The frequency response curve 600 can characterize the bandwidth of the parametric amplifier. Figure 6 An amplifier gain 602 of approximately 20 dB is shown for the parametric amplifier. In some embodiments, the amplifier gain 602 is in the range of 15 dB to 25 dB. The bandwidth of the parametric amplifier may have an average frequency 604 of approximately 4.6 GHz and a full width at half maximum (FWHM) of approximately 400 MHz (e.g., FWHM 606). In other non-limiting embodiments, the average frequency 604 may be approximately 10 GHz. In some embodiments, the parametric amplifier of the embodiment may be designed to have an average frequency 604 somewhere in the range of 4 GHz to 10 GHz. The FWHM 606 may be in the range of 200 MHz to 600 MHz.

[0063] The implementations of the digital, classical, and / or quantum themes, as well as digital function operations and quantum operations described in this specification, may be implemented in digital electronic circuit systems, suitable quantum circuit systems, or more generally, quantum computing systems, in tangibly implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of these. The term "quantum computing system" may include, but is not limited to, quantum computers / computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[0064] The digital, classical and / or quantum themes described in this specification and implementations of digital function operations and quantum operations can be implemented in digital electronic circuitry, suitable quantum circuitry or more generally quantum computing systems, in tangibly-embodied digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term “quantum computing system” can include, without limitation, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0065] Implementations of the digital and / or quantum themes described in this specification can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible non-transitory storage medium for execution by, or to control the operation of, data processing apparatus. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits / qubit structures, or a combination of one or more of them. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode digital and / or quantum information for transmission to a suitable receiver device for execution by a data processing apparatus.

[0066] The terms quantum information and quantum data refer to information or data carried, held, or stored by a quantum system, where the smallest non-trivial system is a qubit, i.e., a system that defines a unit of quantum information. It should be understood that the term “qubit” encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems can include multi-level systems, e.g., having two or more energy levels. By way of example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis states are identified as the ground state and the first excited state, however it should be understood that other arrangements are possible in which the computational states are identified as higher energy level excited states, e.g., qubits.

[0067] The term“data processing apparatus” refers to digital and / or quantum data processing hardware and encompasses all kinds of apparatus, devices, and machines for processing digital and / or quantum data, including by way of example a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or multiple digital and quantum processors or computers, and combinations thereof. The apparatus can also be, or further include, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus designed to simulate or produce quantum data about a particular quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the ability to perform general quantum computation. The apparatus can optionally include, in addition to the hardware, code that creates an execution environment for digital and / or quantum computer programs, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[0068] A digital or classical computer program, which can also be referred to or described as a program, software, software application, module, software module, script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which can also be referred to or described as a program, software, software application, module, software module, script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or can be written in a quantum programming language such as QCL, Quipper, Cirq, etc.

[0069] A digital and / or quantum computer program can, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A digital and / or quantum computer program can be deployed to be executed on one digital or one quantum computer or on multiple digital and / or quantum computers working in coordination, that can be located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using quantum systems (e.g., qubits). Generally, a digital data communication network cannot transmit quantum data, however, a quantum data communication network can transmit both quantum data and digital data.

[0070] The processes and logic flows described in this specification can be performed by one or more programmable digital and / or quantum computers, which can operate with one or more digital and / or quantum processors to execute one or more digital and / or quantum computer programs to perform functions by operating on input digital and quantum data and generating output. The processes and logic flows can also be performed by, or in combination with, special- purpose logic circuitry, e.g., an FPGA or an ASIC or quantum simulator, and the devices can also be implemented as such special-purpose logic circuitry or combinations of special-purpose logic circuitry and one or more programmed digital and / or quantum computers.

[0071] For a system of one or more digital and / or quantum computers or processors “configured to” or “operable to” perform particular operations or actions means that the system has installed on it software, firmware, hardware, or a combination thereof that in operation cause the system to perform the operations or actions. For one or more digital and / or quantum computer programs to be configured to perform particular operations or actions means that the one or more programs include instructions that cause a digital and / or quantum data processing apparatus to perform the operations or actions when executed by the digital and / or quantum data processing apparatus. A quantum computer can receive instructions from a digital computer that, when executed by the quantum computing device, cause the device to perform operations or actions.

[0072] Digital and / or quantum computers suitable for the execution of a digital and / or quantum computer program can be based on general or special purpose digital and / or quantum microprocessors or both, or any other kind of central digital and / or quantum processing unit. Generally, a central digital and / or quantum processing unit will receive instructions and digital and / or quantum data from a read only memory or from a random access memory or a quantum system suitable for transmitting quantum data (e.g., photons) or both, or combinations thereof.

[0073] Some example elements of a digital and / or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory can be supplemented by, or incorporated in, special-purpose logic circuitry or quantum simulators. Generally, a digital and / or quantum computer will also include, or be operatively coupled to receive digital and / or quantum data from or transfer digital and / or quantum data to, one or more mass storage devices for storing digital and / or quantum data, e.g., magnetic, magneto optical or optical disks, or quantum systems suitable for storing quantum information, or combinations thereof. However, a digital and / or quantum computer need not have such devices.

[0074] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, e.g., trapped atoms or electrons. It is understood that quantum memory is a device capable of storing quantum data for long periods of time with high fidelity and high efficiency, e.g., an optical-matter interface that uses light to transmit and matter to store and preserve quantum features such as superposition or quantum coherence.

[0075] The control of the various systems described in this specification, or portions thereof, can be implemented in a digital and / or quantum computer program product, including instructions stored on one or more tangible non-transitory machine-readable storage media that are executable by one or more digital and / or quantum processing devices. The systems described in this specification, or portions thereof, can each be implemented as a device, method, or electronic system that can include one or more digital and / or quantum processing devices and memory for storing executable instructions to perform the operations described in this specification.

[0076] Although this specification contains many specific implementation details, these should not be construed as limiting the scope of what can be claimed, but as descriptions of features that can be particular to particular implementations. Certain features described in this specification in the context of separate implementations can also be implemented in combinations. Conversely, various features described in the context of a single implementation can also be implemented separately or in any suitable subcombination. Moreover, although features can be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination and the claimed combination can be directed to a subcombination or variation of a subcombination.

[0077] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring such an order, nor that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing can be advantageous. Moreover, the separation of various system modules and components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0078] Particular implementations of the subject matter have been described. Other implementations are within the scope of the following claims. For example, the acts recited in the claims can be performed in a different order and still achieve desirable results. As one example, the processes depicted in the accompanying figures can not necessarily require the particular order shown, or sequential order, to achieve the desired results. In some instances, multitasking and parallel processing can be advantageous.

Claims

1. A quantum computing system, comprising: First quantum bit; A first measuring device, configured to generate a first qubit signal corresponding to a first quantum state of the first qubit; as well as A first amplifier, configured to amplify the first qubit signal, wherein the first amplifier includes a first transmission line resonator that provides inductive reactance for electrical coupling between the first measuring device and the first amplifier, and the inductive reactance for the electrical coupling enables the transmission of the first qubit signal.

2. The quantum computing system of claim 1, wherein the first amplifier is a Josephson parametric amplifier.

3. The quantum computing system of claim 1, wherein the first amplifier further comprises a multipole impedance matching network, the multipole impedance matching network comprising a first pole, a second pole, and a third pole.

4. The quantum computing system of claim 3, wherein the third pole comprises the first transmission line resonator.

5. The quantum computing system of claim 4, wherein the terminal transmission line of the third pole includes a shunt inductor.

6. The quantum computing system of claim 3, wherein the first pole comprises a first inductive-capacitive (LC) resonant circuit, and the second pole comprises a second LC resonant circuit.

7. The quantum computing system of claim 6, wherein the first capacitor electrically couples the first transmission line resonator to the second LC resonant circuit.

8. The quantum computing system of claim 7, wherein the second capacitor electrically couples the first LC resonant circuit to the second LC resonant circuit.

9. The quantum computing system of claim 1, wherein the nonlinear inductor of the first amplifier comprises at least one of a Josephson junction, a direct current (DC) superconducting quantum interference device (SQUID), or a radio frequency (RF) SQUID.

10. The quantum computing system of claim 1, wherein the first transmission line resonator lines-couples the terminals of the first amplifier to one or more poles of the impedance matching network of the first amplifier.

11. The quantum computing system of claim 1, wherein the first amplifier has a gain in the range of 15 dB to 25 dB.

12. The quantum computing system of claim 1, wherein the bandwidth of the first amplifier has an average frequency in the range of 4 GHz to 10 GHz.

13. The quantum computing system of claim 1, wherein the bandwidth of the first amplifier has a full width at half maximum (FWHM) in the range of 200 MHz to 600 MHz.

14. An amplifier device, comprising: The first pole includes a first inductive-capacitive (LC) resonant circuit; as well as The second pole includes a transmission line resonator that provides inductive reactance to the input of the amplifier device.

15. The amplifier device of claim 14, further comprising: A multi-pole impedance matching network, the multi-pole impedance matching network comprising a first pole and a second pole.

16. The amplifier device of claim 15, wherein the multipole impedance matching network further comprises: The third electrode includes a second LC resonant circuit.

17. The amplifier device of claim 16, wherein the amplifier device further comprises a capacitor that electrically couples the first pole and the third pole.

18. The amplifier device of claim 14, wherein the second pole further comprises a shunt inductor.

19. The amplifier device of claim 14, wherein the first inductor of the first LC resonant circuit has a variable inductance.

20. A quantum computing system, comprising: A set of qubits; A set of transmission lines, wherein each transmission line in the set of transmission lines is configured to transmit a quantum bit signal, the quantum bit signal encoding a measurement of the quantum state of the corresponding quantum bit in the set of quantum bits; as well as A set of Josephson parametric amplifiers (JPAs), wherein each JPA in the set includes a transmission line resonator that electrically couples the JPA to a corresponding transmission line in the set via inductive reactance, such that the corresponding transmission line inductively provides its qubit signal to the JPA for amplification.

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