Association analysis and calculation method for backward voltage and forward current of diode

Abstract

The invention discloses a correlation analysis and calculation method for backward voltage and forward current of a diode, and the method comprises the steps: calculating the parasitic oscillation frequency fr of a C-CR buffer turn-off peak circuit through a power conversion basic power supply equivalent parasitic circuit; measuring the parasitic inductance 100nH of a bus inductance loop, the generated voltage ringing peak value 154V and the instantaneous energy J generated on the parasitic inductance through a double-pulse test; the value of the CCR is calculated, all ringing energy is absorbed by a CCR loop, the voltage of a voltage capacitor cannot be suddenly changed, voltage spikes appear on a resistor R, and selection of the resistor R needs to adapt to a proper oscillation damping coefficient; and after R is calculated, CC is calculated according to the damping oscillation cut-off frequency. The invention belongs to the technical field of electronics, and particularly relates to a correlation analysis and calculation method for backward voltage and forward current of a diode.

Description

Technical Field

[0001] This invention belongs to the field of electronic technology, and in particular relates to a method for analyzing and calculating the correlation between the reverse voltage and forward current of a diode. Background Technology

[0002] Currently, the industry has not paid attention to the reverse breakdown risk posed by the reverse voltage when a diode switches from the on-state to the off-state, especially the magnitude of the forward conduction current and... Analysis of the reverse voltage stress generated by the diode.

[0003] like Figure 1 As shown, the circuit topology is a basic building block in power supply design. We use this basic unit circuit in the power electronic conversion topology to analyze the physical effects of diodes.

[0004] In practical applications, when any MOSFET in a half-bridge is turned off, it will cause the anti-parallel diode opposite to it to conduct and freewheel. The current flow path in the circuit cycles between the diode and the MOSFET. The overcurrent process is described below, assuming the inductor current i L It is a certain value.

[0005] Current path commutation process 1: During the dead time, the MOSFET anti-parallel diode conducts, at which point iL = iD. After the dead time passes, the upper MOSFET turns on, and the current flow path switches from diode current to MOSFET current. SW The voltage will gradually increase with the diode freewheeling current i D The gradual decline, such as Figure 2 As shown.

[0006] Current path commutation process 2: The upper MOSFET remains on, while the diode has entered the reverse recovery region. At this time, the diode current has reversed. R =i SW +i R ,

[0007] This is achieved through formulas. This serves as background for the main point of this article: the rate of change of the MOSFET's turn-on current determines the reverse recovery current of the diode.

[0008] The reverse recovery current of a diode arises because, during forward conduction, diffused "majority carriers" accumulate near the PN junction. When the voltage across the diode reverses, these "majority carriers" rapidly detach from the PN junction and return to their respective doped atomic regions, thus forming a reverse current. The slope of this current is entirely determined by... Decide.

[0009] When the diode reverse current reaches its maximum, IRRM The slope of the diode's reverse current gradually recovering to zero determines the MOSFET's i. SW The descent slope:

[0010] During the aforementioned diode reverse recovery process, the upper MOSFET is actually always in the conducting state, and its voltage drop does not decrease to the normal level. SW The load current i drops to normal. L Only when the MOSFET is truly turned on does the voltage drop drop to a normal level, which also significantly affects the switching power consumption of the MOSFET.

[0011] like Figure 3 As shown, the following analysis addresses a topic rarely discussed in the industry: the reverse recovery current reaching... Figure 3 Point P in RRM Then until the diode is truly cut off, i R2 Is the slope affected by the circuit or an inherent property of the diode itself?

[0012] like Figure 4 As shown, at point P, the diode voltage begins to rise—entering the cutoff state, and the MOSFET's V... DS It begins to descend—entering the variable resistance region and becoming fully conductive.

[0013] At this point, the current completely switches from the initial diode freewheeling state to MOSFET carrying, i.e., i SW =i L .

[0014] During the process of the diode's reverse recovery current approaching 0 from the highest point P (actually the diode's leakage current) Figure 3 i in R2 The rapid release of stored charge in a diode, the continuous widening of the potential barrier region, and the constant change in equivalent capacitance—these three factors decisively reflect the rate of rise of the diode's reverse voltage, voltage overshoot, and ringing degree. Undoubtedly, these ringing and overshoot conditions affect the switching waveform quality of the MOSFET.

[0015] like Figure 5 As shown, for the same diode, the amount of charge stored is entirely determined by the degree of diffusion between its two types of "majority carriers," that is, the load current flowing through the diode. The larger the load current, the more charge accumulates in the barrier region; the smaller the load current, the less charge accumulates in the barrier region.

[0016] The less charge stored during the forward conduction of a diode, the closer its reverse recovery current approaches zero. The larger the value, the faster the diode voltage rises. The larger the voltage, the greater the voltage rise, causing extreme voltage overshoot and ringing during the diode voltage rise process, which may even damage the diode.

[0017] Meanwhile, the parasitic inductance in the circuit containing the MOSFET and its anti-parallel diode affects V. R The degree of overshoot voltage is also crucial.

[0018] The conclusion drawn from this observation is that in power switch-mode power supply applications, the smaller the forward current of the anti-parallel diode of the power device, the larger the voltage overshoot and the greater the ringing during the reverse recovery transition to cutoff. Conversely, the larger the forward current, the smaller the voltage overshoot and the smaller the ringing during the reverse recovery transition to cutoff. Summary of the Invention

[0019] The technical problem to be solved by this invention is that when a diode transitions from reverse recovery to cutoff, the larger the voltage overshoot, the greater the ringing; conversely, when the forward current is larger, the smaller the voltage overshoot and the smaller the ringing.

[0020] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: a correlation analysis and calculation method for diode reverse voltage and forward current, firstly calculating CC through the equivalent parasitic circuit of the basic power supply of power conversion. R The parasitic oscillation frequency f of the buffer turn-off spike circuit r ;

[0021] The parasitic inductance of the bus inductor circuit was measured by a double pulse test. The generated voltage ringing peak was 154V, and the instantaneous energy J generated on the parasitic inductance was measured.

[0022] Calculate CC R The value of C indicates that all the ringing energy is consumed by the ringing energy. c In the R-loop absorption, since the voltage capacitor voltage cannot change abruptly, voltage spikes appear on resistor R. The selection of R needs to be adapted to a suitable oscillation damping coefficient.

[0023] After calculating R, calculate C based on the damped oscillation cutoff frequency. c .

[0024] Furthermore, the ringing energy flow circuit includes diode one and diode two, diode one and diode two forming a closed-loop branch one, and diode one and diode two are connected to a parallel circuit at both ends, the parallel circuit including capacitor one and load resistor forming a closed-loop branch two and capacitor two forming a closed-loop branch three.

[0025] Furthermore, one end of the second capacitor is connected to the origin point via a wire, and the other end of the second capacitor is connected to the zero potential reference point via a wire.

[0026] Furthermore, the parallel circuit has two operating states: 1) Surge voltage generated by parasitic inductance in the bus current flow path, capacitor two suppresses the surge voltage; 2) When ringing energy is generated in the ringing loop, capacitor one and the load resistor attenuate the ringing energy.

[0027] Furthermore, the instantaneous energy generated by the parasitic inductance is entirely absorbed by capacitor C, causing the surge voltage across the capacitor to rise by only 10V.

[0028] The advantages of this invention, achieved by adopting the above structure, are as follows: It avoids the complexity of conventional circuit layouts and the significant power loss of resistors in high-voltage, high-power applications, which necessitates larger package sizes and makes installation difficult. Simultaneously, it avoids the risk of excessive pulse current from capacitor discharge to the MOSFET when it is turned on. Attached Figure Description

[0029] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof.

[0030] Figure 1 It is a basic building block in a circuit;

[0031] Figure 2 This is a schematic diagram of the current path commutation process;

[0032] Figure 3 For point P in the reverse recovery current I RRM A schematic diagram showing the slope of iR2 after the diode turns off;

[0033] Figure 4 At point P, the diode voltage begins to rise—entering the cutoff state; the MOSFET's V... DS Schematic diagram;

[0034] Figure 5 For i R1 The corresponding V R1 Schematic diagram;

[0035] Figure 6 This is the equivalent parasitic circuit of the basic power conversion unit;

[0036] Figure 7 This is the design and testing circuit proposed in this invention.

[0037] In the attached diagram: RC1, diode one; RC2, diode; C1, capacitor one; R1, load resistor; C2, capacitor two. Detailed Implementation

[0038] like Figure 6 As shown, the correlation analysis and calculation method of diode reverse voltage and forward current is first performed through the equivalent parasitic circuit of the basic power supply of power conversion. Calculate CC R The parasitic oscillation frequency f of the buffer turn-off spike circuit r ;

[0039] like Figure 7 As shown, the parasitic inductance of the bus inductor circuit is 100nH, and the resulting voltage ringing peak is 154V, which is the instantaneous energy generated on the parasitic inductance, determined by the double pulse test.

[0040] Calculate C C The value of R, all the ringing energy is absorbed by C. C In the R-loop absorption, since the voltage capacitor voltage cannot change abruptly, voltage spikes appear on resistor R. The selection of R needs to be adapted to a suitable oscillation damping coefficient.

[0041] After calculating R, calculate C based on the damped oscillation cutoff frequency. c

[0042] The two-ringing energy flow circuit includes a closed-loop branch consisting of diode RC1, diode RC1, and diode RC2. A parallel circuit is connected between the two ends of diode RC1 and diode RC2. The parallel circuit includes a closed-loop branch consisting of capacitor C1 and load resistor R1, and a closed-loop branch consisting of capacitor C2.

[0043] In this circuit, one end of capacitor C2 is connected to the origin via a wire, and the other end of capacitor C2 is connected to the zero potential reference point via a wire. The parallel circuit has two operating states: 1) When the surge voltage generated by the parasitic inductance of the bus current flow path is generated, capacitor C2 suppresses the surge voltage; 2) When ringing energy is generated in the ringing loop, capacitor C1 and load resistor R1 attenuate the ringing energy.

[0044] The instantaneous energy generated by the parasitic inductance is entirely absorbed by the capacitor C, causing the surge voltage across the capacitor to rise by only 10V.

[0045] Working principle:

[0046] When the surge voltage generated by the parasitic inductance of the bus current flow path is suppressed by capacitor C2;

[0047] When ringing energy is generated in the ringing loop, capacitor C1 and load resistor R1 attenuate the ringing energy;

[0048] The specific calculation process is as follows:

[0049] Through the equivalent parasitic circuit of the basic power conversion unit and its parasitic oscillation frequency

[0050] A double-pulse test was conducted to determine that the parasitic inductance of the bus inductor circuit, with a value of 100nH, generated a ringing peak voltage of 154V. The instantaneous energy generated on the parasitic inductance...

[0051]

[0052] If all this energy is absorbed by capacitor C, causing the surge voltage across the capacitor to rise by only 10V, then

[0053] All ringing energy is absorbed by the C1R1 loop. Since the voltage across the capacitor cannot change abruptly, voltage spikes appear across the load resistor R1. The choice of R1 needs to accommodate a suitable oscillation damping factor. Let the damping factor be 1.

[0054]

[0055] After calculating R1, calculate C based on the damped oscillation cutoff frequency. c

[0056]

[0057] This design sets the voltage overshoot of the ringing to be consumed in an absorption circuit with a damping coefficient of 1, which can achieve a suitable degree of attenuation of ringing energy, while avoiding an excessive margin design that would make the package size of C1R1 too large.

[0058] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents. In conclusion, if those skilled in the art, inspired by this description, design similar structural methods and embodiments without departing from the inventive spirit of the invention, such designs should fall within the protection scope of the present invention.

Claims

1. A method for analyzing and calculating the correlation between diode reverse voltage and forward current, characterized in that: S1, equivalent parasitic circuit of power conversion base power supply computing c-c R damping the parasitic oscillation frequency fr of the turn-off spike circuit S2, the bus inductance loop parasitic inductance 100nH is measured by double pulse test, the voltage ring peak value is 154V, and the instantaneous energy generated on the parasitic inductance; S3, compute CC R the value of C according to the damped oscillation cut-off frequency C .

2. The proposed ring energy flow path circuit according to claim 1, characterized in that: The ring energy flow loop comprises diode one and diode two, the closed loop branch one formed by the diode one and the diode two, a parallel circuit connected between the diode one and the diode two, the closed loop branch two comprising a capacitor one and a load resistor, and the closed loop branch three comprising a capacitor two.

3. Ringing energy flow path circuit according to claim 2, characterized in that: One end of the capacitor two is connected to the original point through a wire, and the other end of the capacitor two is connected to the zero potential reference point through a wire.

4. The ring energy flow-through loop circuit of claim 2, wherein: The parallel circuit has two working states: 1) the surge voltage generated by the parasitic inductance of the bus current flow path, and the capacitor two suppresses the surge voltage; 2) when the ring energy is generated in the ring loop, the capacitor one and the load resistor attenuate the ring energy.

5. The method of claim 1, wherein: The instantaneous energy generated by the parasitic inductance is completely absorbed by the capacitor C, and the surge voltage across the capacitor is only raised by 10V.

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