Synchronous rectification detection circuit and control method

Abstract

The invention relates to the technical field of power electronic synchronous rectification, in particular to a synchronous rectification detection circuit and a control method, and the circuit comprises a current detection circuit which is used for detecting the current of a synchronous rectification MOSFET in real time, and outputting a zero-crossing current signal when the current of the MOSFET is detected to be zero-crossing; the latch logic circuit is connected with the current detection circuit and is used for performing trigger latch on the zero-crossing current signal, generating a wave sealing pulse signal and outputting a corresponding pulse rising edge signal; and the voltage detection circuit is used for detecting voltages at two ends of a middle bridge arm where the MOSFET is located, and outputting a zero voltage signal when the voltages at the two ends of the middle bridge arm reach a zero voltage condition. Compared with the prior art, the synchronous rectification detection circuit and the control method are not influenced by stray inductance, can realize soft switching control under high frequency, can greatly reduce the size and the cost of magnetic elements, and improve the conversion efficiency of the whole machine at the same time.

Description

TECHNICAL FIELD The present application relates to the technical field of power electronic synchronous rectification, and particularly relates to a synchronous rectification detection circuit and a control method. BACKGROUND With the rapid development of AI artificial intelligence technology, people's demand for energy is increasing day by day, and the demand for high power density, high frequency and high efficiency energy is becoming more and more urgent. Obviously, the high-frequency synchronous rectification soft switching technology can greatly improve the conversion efficiency of the whole machine, and can also reduce the volume of the heat sink and the cost of the whole machine. The traditional synchronous rectification scheme generally uses a synchronous rectification special chip, that is, by detecting the voltage drop across the switch tube, judging that the voltage drop threshold reaches the set point, and controlling the drive to realize synchronous control.

[0003] In the application process of the traditional synchronous rectification special chip, when the switching frequency is too high, on the one hand, there is a problem of phase shift and asynchronization between the main tube current and the synchronous tube drive, and on the other hand, there is a problem of ringing caused by the combination of the MOSFET pin stray inductance and the PCB leakage inductance together with the MOSFET junction capacitor, which causes the synchronous chip to repeatedly turn on the weak voltage Vds. In addition, there is a problem that the synchronous tube drive level is high when the current flowing through the Vsd is large and is low when the current flowing through the Vsd is small. These problems will cause the risk of MOSFET shoot-through damage and affect the product reliability. SUMMARY In order to overcome the above problems, the present application provides a synchronous rectification detection circuit and a control method which can effectively solve the above problems.

[0005] A technical solution provided by the present application to solve the above technical problems is to provide a synchronous rectification detection circuit and a control method, comprising: a current detection circuit, configured to detect the device current of a synchronous rectification MOSFET in real time, and output a first zero-crossing trigger when the device current crosses zero for the first time; a latch logic circuit, connected with the current detection circuit, configured to convert the first zero-crossing trigger into a fixed-width vibration suppression latch pulse and save only the first trigger, so as to suppress the repeated zero-crossing caused by ringing or noise; a voltage detection circuit, configured to sample the node voltage of the synchronous rectification MOSFET in the bridge arm and output a zero voltage window signal, and the zero voltage window is determined by a threshold voltage V_zv and a hysteresis ΔV; a dead zone judgment circuit, connected with the latch logic circuit and the voltage detection circuit respectively, configured to perform logical judgment according to the pulse rising edge signal and the zero voltage signal; a digital logic circuit, connected with the dead zone judgment circuit, configured to generate an opening authorization signal EN_on when the following cooperative conditions are met: Condition 1) the rising edge of the fixed-width vibration suppression latch pulse is time-coincident with the zero voltage window signal; and Condition 2) After the adaptive dead zone t_dead; It is also used to generate a turn-off authorization signal EN_off when either the current of the synchronous rectifier MOSFET device crosses zero again or the maximum on-time T_on_max is reached first. A driving circuit, connected to the digital logic circuit, is used to drive the gate of the synchronous rectifier MOSFET to turn on or off with a constant amplitude V_g in response to EN_on or EN_off. Preferably, the synchronous rectification detection circuit includes: a control unit, which is connected to the digital logic circuit and the driving circuit, for receiving the turn-on signal and the turn-off signal and triggering the driving circuit to perform a turn-on or turn-off operation on the synchronous rectification MOSFET.

[0006] Preferably, the current detection circuit includes a current sampling element and a comparator circuit. The comparator circuit is used to monitor the current signal of the MOSFET and outputs the zero-crossing current signal when the current is detected to cross zero in either the positive or negative direction.

[0007] Preferably, the latching logic circuit includes a trigger latch for latching the zero-crossing current signal into a fixed-width pulse-sealing signal upon receipt.

[0008] Preferably, the voltage detection circuit includes a voltage divider circuit and a voltage comparator, used to sample the voltage across the intermediate bridge arm where the MOSFET is located, and outputs the zero voltage signal when the voltage across the intermediate bridge arm is lower than a preset threshold, so as to indicate that the MOSFET has reached an approximately zero voltage state.

[0009] Preferably, the digital logic circuit includes a logic AND gate or a digital control unit, configured to generate an enable signal for the synchronous rectifier MOSFET within a predetermined time window after receiving the rising edge of the pulse signal and the zero voltage signal, and to generate an disable signal when the current of the synchronous rectifier MOSFET drops to zero again.

[0010] Preferably, the driving circuit is a gate drive amplifier circuit that provides a constant amplitude gate drive voltage to drive the MOSFET.

[0011] A synchronous rectification control method, which uses the synchronous rectification detection circuit of the present invention to control the synchronous rectification MOSFET, includes the following steps: Step S1: Real-time detection of the current waveform of the synchronous rectifier MOSFET; when the current crosses zero, a zero-crossing current signal is generated. Step S2: The zero-crossing current signal is triggered and latched to generate a blocking pulse signal with a defined pulse width, and the rising edge trigger information of the pulse signal is obtained. Step S3: Detect the voltage across the middle bridge arm where the MOSFET is located. When the voltage across the middle bridge arm reaches a preset zero voltage condition, generate a zero voltage signal. Step S4: Based on the rising edge trigger information of the pulse signal and the zero voltage signal, perform logical judgment to determine the turn-on time of the synchronous rectifier MOSFET, and output the corresponding turn-on control signal; Step S5: In response to the turn-on control signal, drive the synchronous rectifier MOSFET to turn on for rectification; after turning on, monitor the MOSFET current in real time, and output a turn-off control signal when the MOSFET current crosses zero again. Step S6: In response to the shutdown control signal, turn off the synchronous rectification MOSFET, thereby ending the current synchronous rectification cycle.

[0012] Preferably, in step S4, when the MOSFET current in the previous cycle is detected to have crossed zero and the voltage across the middle bridge arm in the current cycle reaches zero voltage, the turn-on control signal is output after a preset dead time.

[0013] Preferably, the synchronous rectification control method is applied in a critical mode power factor correction circuit. A soft-switching trigger signal is generated by detecting the zero-crossing of the PFC boost inductor current, and the soft-switching trigger signal is used to control the turn-on time of the PFC main switch, so that the main switch is turned on when the inductor current is zero, realizing zero-current soft-switching. At the same time, the soft-switching trigger signal is used to control the synchronous rectifier in the PFC circuit to turn off when the current crosses zero.

[0014] Compared with existing technologies, the synchronous rectification detection circuit and control method of the present invention avoid the problem of controlling the weak voltage Vsd across the MOSFET in traditional solutions, which is susceptible to interference; it is not affected by stray inductance, can meet the requirements of soft switching control at high frequencies, can greatly reduce the size and cost of magnetic components, and improve the overall conversion efficiency; it can realize frequency conversion control in discontinuous mode, such as critical mode PFC circuit, while realizing soft switching control. [Attached Image Description] Figure 1 This is a schematic block diagram of the synchronous rectification and detection circuit of the present invention; Figure 2 This is a flowchart of the synchronous rectification control method of the present invention.

Detailed Implementation Methods

[0017] It should be noted that in the embodiments of the present invention, all directional indications (such as up, down, left, right, front, back, etc.) are limited to relative positions on the specified view, rather than absolute positions.

[0018] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0019] Please see Figure 1 and Figure 2 The synchronous rectification detection circuit and control method of the present invention can be widely applied to various power supply application products, especially space-constrained application products that require high power conversion density and medium and high power output, such as high-frequency switching power supplies, resonant converters and critical mode power factor correction (PFC) circuits.

[0020] The synchronous rectification detection circuit of the present invention includes: The current detection circuit is used to detect the current of the synchronous rectifier MOSFET in real time, and outputs a zero-crossing current signal when the MOSFET current is detected to be crossing zero. A latching logic circuit, connected to the current detection circuit, is used to trigger and latch the zero-crossing current signal, generate a blocking pulse signal, and output the corresponding pulse rising edge signal. A voltage detection circuit is used to detect the voltage across the middle bridge arm where the MOSFET is located, and outputs a zero voltage signal when the voltage across the middle bridge arm reaches the zero voltage condition. The dead-time determination circuit is connected to the latch logic circuit and the voltage detection circuit respectively, and is used to make logical judgments based on the pulse rising edge signal and the zero voltage signal. A digital logic circuit, connected to the dead-time determination circuit, is used to generate the turn-on and turn-off signals of the synchronous rectifier MOSFET; A driving circuit, connected to the digital logic circuit, is used to drive the gate of the synchronous rectifier MOSFET according to the turn-on signal and the turn-off signal, thereby realizing the turn-on and turn-off control of the synchronous rectifier.

[0021] The synchronous rectification detection circuit of the present invention includes: a control unit, which is connected to the digital logic circuit and the driving circuit, and is used to receive the turn-on signal and the turn-off signal and trigger the driving circuit to perform a turn-on or turn-off operation on the synchronous rectification MOSFET. The control unit can be a digital control unit (DSP).

[0022] The driving circuit is a gate drive amplifier circuit that provides a constant amplitude gate drive voltage to drive the MOSFET.

[0023] The current detection circuit includes a current sampling element and a comparator circuit. The comparator circuit is used to monitor the current signal of the MOSFET and outputs the zero-crossing current signal when it detects that the current crosses the zero point in either the positive or negative direction.

[0024] The latching logic circuit includes a trigger latch, which latches the zero-crossing current signal into a fixed-width pulse blocking signal upon receipt, in order to avoid repeated triggering caused by current oscillation.

[0025] The voltage detection circuit includes a voltage divider circuit and a voltage comparator, which are used to sample the voltage across the middle bridge arm where the MOSFET is located. When the voltage across the middle bridge arm is lower than a preset threshold, the zero voltage signal is output to indicate that the MOSFET has reached an approximately zero voltage state.

[0026] The digital logic circuit includes a logic AND gate or a digital control unit, which generates an enable signal for the synchronous rectifier MOSFET within a predetermined time window after receiving the rising edge of the pulse signal and the zero voltage signal, and generates an disable signal when the current of the synchronous rectifier MOSFET drops to zero again, thereby providing dead time for the two switching cycles to avoid power device shoot-through.

[0027] The synchronous rectification detection circuit of the present invention generates a zero-crossing current signal by real-time detection of the MOSFET current waveform, generates a trigger blocking signal from the zero-crossing current signal, and converts it into a corresponding pulse width rising edge signal through a latching logic circuit. At the same time, it performs zero voltage detection by detecting the voltage across the middle bridge arm of the MOSFET, and then passes through a dead-time judgment circuit before and after processing by a digital logic circuit to convert the pulse width rising edge signal and the zero voltage signal into the start and end signals of the corresponding synchronous tube, thereby obtaining the synchronous rectification drive signal. Then, the corresponding synchronous rectifier tube is driven by a drive amplifier circuit to realize the synchronous rectification function.

[0028] Specifically, firstly, the synchronous rectification detection circuit of this invention avoids sampling the voltage drop across the drain and source of the secondary synchronous transistor (the voltage drop across the drain and source of the secondary synchronous transistor is often a very weak signal, which is easily affected by parasitic parameters such as stray inductance, introducing phase-shifting interference and errors). Instead, it directly samples the current signal flowing through the MOSFET and performs logic latching on the first zero-crossing trigger signal, so it is not affected even if the current oscillates repeatedly. At the same time, this invention detects the zero voltage detection (generally tens of volts) across the voltage across the middle bridge arm of the MOSFET, and has a dead-time judgment circuit to identify the zero-crossing signals of the turn-on and turn-off currents, thus avoiding false triggering. Secondly, since the voltage drop across the bridge arm detected by this invention is tens of volts, its anti-interference capability is greatly enhanced compared with the oscillation caused by the weak voltage drop across Vsd in the traditional solution.

[0029] Furthermore, the driving level of this invention remains constant and is independent of the magnitude of the current flowing through it.

[0030] This invention can be applied across the entire switching frequency range and is unaffected by the switching frequency, with its advantages being particularly pronounced in output short-circuit or light-load modes.

[0031] Specifically: 1. First, a zero-crossing current signal is generated by real-time detection of the MOSFET current waveform, and the zero-crossing current signal is triggered and latched to generate a blocking signal. Then, the latching logic circuit converts it into a corresponding pulse width rising edge signal. 2. Simultaneously, zero voltage detection is performed by detecting the voltage across the middle bridge arm of the MOSFET; 3. After passing through the dead zone detection circuit, the pulse width rising edge signal and zero voltage signal are processed by the digital logic circuit and converted into the start and end signals of the corresponding synchronous tube, thereby obtaining the drive signal for the start of synchronous rectification. This signal is given to the DSP for trigger processing. 4. Then, the synchronous rectification function is achieved by driving the corresponding synchronous rectifier tube through the driving amplifier circuit.

[0032] The synchronous rectification control method of the present invention utilizes the synchronous rectification detection circuit of the present invention to control the synchronous rectification MOSFET. The method includes the following steps: Step S1: Real-time detection of the current waveform of the synchronous rectifier MOSFET; when the current crosses zero, a zero-crossing current signal is generated. Step S2: The zero-crossing current signal is triggered and latched to generate a blocking pulse signal with a defined pulse width, and the rising edge trigger information of the pulse signal is obtained. Step S3: Detect the voltage across the middle bridge arm where the MOSFET is located. When the voltage across the middle bridge arm reaches a preset zero voltage condition, generate a zero voltage signal. Step S4: Based on the rising edge trigger information of the pulse signal and the zero voltage signal, perform logical judgment to determine the turn-on time of the synchronous rectifier MOSFET, and output the corresponding turn-on control signal; Step S5: In response to the turn-on control signal, drive the synchronous rectifier MOSFET to turn on for rectification; after turning on, monitor the MOSFET current in real time, and output a turn-off control signal when the MOSFET current crosses zero again. Step S6: In response to the shutdown control signal, turn off the synchronous rectification MOSFET, thereby ending the current synchronous rectification cycle.

[0033] In step S4, when the MOSFET current in the previous cycle is detected to be zero and the voltage across the middle bridge arm in the current cycle reaches the zero voltage condition, the turn-on control signal is output after a preset dead time delay, so as to avoid the synchronous rectifier tube in the previous cycle from being turned on and the main power tube in the next cycle from being turned on.

[0034] The synchronous rectification control method of the present invention is applied to a critical mode power factor correction (PFC) circuit. A soft-switching trigger signal is generated by detecting the zero-crossing of the PFC boost inductor current, and the turn-on time of the PFC main switch is controlled by the soft-switching trigger signal, so that the main switch turns on when the inductor current is zero, realizing zero-current soft-switching. At the same time, the soft-switching trigger signal controls the synchronous rectifier in the PFC circuit to turn off when the current crosses zero, avoiding reverse current and improving power conversion efficiency.

[0035] Specifically, the synchronous rectification detection circuit of the present invention includes: A current detection circuit is used to detect the device current of the synchronous rectifier MOSFET in real time, and output the first zero-crossing trigger when the device current first crosses zero. A latching logic circuit, connected to the current detection circuit, is used to convert the first zero-crossing trigger into a fixed-width damping latching pulse and save only the first trigger to suppress subsequent repeated zero crossings caused by ringing or noise. The voltage detection circuit is used to sample the voltage of the bridge arm node where the synchronous rectifier MOSFET is located and output a zero voltage window signal. The zero voltage window is determined by the threshold voltage V_zv and the hysteresis ΔV. The dead-time determination circuit is connected to the latch logic circuit and the voltage detection circuit respectively, and is used to make logical judgments based on the pulse rising edge signal and the zero voltage signal. A digital logic circuit, connected to the dead-time determination circuit, is used to generate an enable authorization signal EN_on when the following cooperative conditions are met: D1) The rising edge of the fixed-width vibration suppression latch pulse coincides with the timing of the zero-voltage window signal; and D2) After the adaptive dead zone t_dead; It is also used to generate a turn-off authorization signal EN_off when either the current of the synchronous rectifier MOSFET device crosses zero again or the maximum on-time T_on_max is reached first. A driving circuit, connected to the digital logic circuit, is used to drive the gate of the synchronous rectifier MOSFET to turn on or off with a constant amplitude V_g in response to EN_on or EN_off.

[0036] The synchronous rectification detection circuit of the present invention uses a strongly coupled chain of "first zero crossing → fixed-width latching → zero-voltage window overlap → adaptive dead zone → maximum conduction limiting or zero crossing turn-off" as a necessary condition, and has the following beneficial effects: 1. The "first zero crossing + fixed width latch" only recognizes the first zero crossing and uses a fixed pulse width to span subsequent ringing cycles, cutting off the root cause of repeated triggering caused by ringing; the false trigger rate is significantly reduced. 2. Turn-on is only authorized when the rising edge of the latch pulse coincides with the zero-voltage window, ensuring that turn-on occurs in the region where "voltage is low and current is just right"; ZVS / ZCS hit rate is improved, and switching losses and EMI decrease simultaneously; 3. Adaptive dead time allows timing to be automatically corrected with dV / dt, dI / dt and device / temperature / load drift, avoiding mismatch of "fixed dead time" under light load / high temperature / aging; 4. T_on_max limiting / zero-crossing shutdown provides a safety net: It can shut down in time when the control loop malfunctions or the measurement is abnormal, preventing shoot-through and suppressing reverse current, thus improving reliability and safety margin; 5. Fewer false triggers + stable soft switching → reduced turn-on / turn-off losses and reduced secondary circulating current, which usually leads to improved efficiency; 6. Stronger ringing robustness and more deterministic timing allow for higher frequencies, while reducing losses for the same amount of time → the size and cost of magnetic components can be further reduced, which is beneficial for high-frequency miniaturization.

[0037] Furthermore, the pulse width t_lock of the fixed-width damping latch pulse generated by the latch logic circuit satisfies the following condition with respect to the ringing period T_ring of the bridge arm node: 0.2·T_ring≤t_lock≤1.2·T_ring.

[0038] The zero voltage threshold V_zv of the voltage detection circuit and the DC bus voltage V_bus satisfy the following condition: V_zv ≤ 0.05·V_bus, and the hysteresis ΔV is 0.5%—3%·V_bus.

[0039] The adaptive dead time t_dead of the dead time determination circuit is calculated based on the bridge arm voltage slope dV / dt and / or the device current slope dI / dt, and is located in the range of 50 ns to 300 ns.

[0040] The digital logic circuit further includes a disable window control, which ignores any new zero-crossing triggers within the disable window duration t_inhibit after EN_on is triggered, and 0.5·T_ring≤t_inhibit≤ 2·T_ring.

[0041] The maximum on-time T_on_max relative to the switching period T_s satisfies: 0.10·T_s≤T_on_max≤0.50·T_s, preferably 0.20·T_s—0.35·T_s.

[0042] The constant amplitude V_g provided by the driving circuit is between 10 V and 15 V, and the gate rise time t_r ≤ 50 ns.

[0043] Specifically, the synchronous rectification control method of the present invention includes the following steps: Step Y1: Detect the device current of the synchronous rectifier MOSFET and output the first zero-crossing trigger when it first crosses zero; Step Y2: Convert the first zero-crossing trigger into a fixed-width damping latch pulse and record its rising edge; Step Y3: Detect the voltage at the bridge arm node where the synchronous rectifier MOSFET is located, and generate a zero-voltage window signal defined by the threshold V_zv and the hysteresis ΔV; Step Y4: Generate enable authorization EN_on only when the rising edge of the latch pulse coincides with the zero voltage window time and passes through the adaptive dead time t_dead; In step Y5, responding to EN_on, the synchronous rectifier MOSFET is driven to turn on with a constant amplitude V_g, and the newly added zero-crossing trigger is ignored within the inhibit window t_inhibit; Step Y6: When the device current is detected to cross zero again or T_on_max is reached, a shutdown authorization EN_off is generated and the synchronous rectifier MOSFET is driven to turn off.

[0044] In step Y4, the time overlap satisfies the minimum overlap duration t_ovlp_min ≥ 10 ns, and preferably 10 ns–80 ns.

[0045] t_dead is located between 50 ns and 300 ns and is monotonically adjusted with dV / dt or dI / dt.

[0046] The method is applied to a critical mode PFC boost topology. In step Y6, the turn-off condition is preferentially executed based on the inductor current crossing zero again criterion to suppress reverse current.

[0047] Compared with existing technologies, the synchronous rectification detection circuit and control method of the present invention avoid the problem of controlling the weak voltage Vsd across the MOSFET in traditional solutions, which is susceptible to interference; it is not affected by stray inductance, can meet the requirements of soft switching control at high frequencies, can greatly reduce the size and cost of magnetic components, and improve the overall conversion efficiency; it can realize frequency conversion control in discontinuous mode, such as critical mode PFC circuit, while realizing soft switching control.

[0048] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any modifications, equivalent substitutions and improvements made within the concept of the present invention should be included within the patent protection scope of the present invention.

Claims

1. A synchronous rectification detection circuit and control method, characterized in that, include: A current detection circuit is used to detect the device current of the synchronous rectifier MOSFET in real time, and output the first zero-crossing trigger when the device current first crosses zero. A latching logic circuit, connected to the current detection circuit, is used to convert the first zero-crossing trigger into a fixed-width damping latching pulse and save only the first trigger to suppress subsequent repeated zero crossings caused by ringing or noise. The voltage detection circuit is used to sample the voltage of the bridge arm node where the synchronous rectifier MOSFET is located and output a zero voltage window signal. The zero voltage window is determined by the threshold voltage V_zv and the hysteresis ΔV. The dead-time determination circuit is connected to the latch logic circuit and the voltage detection circuit respectively, and is used to make logical judgments based on the pulse rising edge signal and the zero voltage signal. A digital logic circuit, connected to the dead-time determination circuit, is used to generate an enable authorization signal EN_on when the following cooperative conditions are met: Condition 1) The rising edge of the fixed-width vibration suppression latch pulse coincides with the timing of the zero-voltage window signal; and Condition 2) After the adaptive dead zone t_dead; It is also used to generate a turn-off authorization signal EN_off when either the current of the synchronous rectifier MOSFET device crosses zero again or the maximum on-time T_on_max is reached first. A driving circuit, connected to the digital logic circuit, is used to drive the gate of the synchronous rectifier MOSFET to turn on or off with a constant amplitude V_g in response to EN_on or EN_off.

2. The synchronous rectification and detection circuit as described in claim 1, characterized in that, The synchronous rectification detection circuit includes a control unit, which is connected to the digital logic circuit and the driving circuit, and is used to receive the turn-on signal and the turn-off signal and trigger the driving circuit to perform a turn-on or turn-off operation on the synchronous rectification MOSFET.

3. The synchronous rectification and detection circuit as described in claim 1, characterized in that, The current detection circuit includes a current sampling element and a comparator circuit. The comparator circuit is used to monitor the current signal of the MOSFET and outputs the zero-crossing current signal when it detects that the current crosses the zero point in either the positive or negative direction.

4. The synchronous rectification and detection circuit as described in claim 1, characterized in that, The latching logic circuit includes a trigger latch for latching the zero-crossing current signal into a fixed-width pulse-sealing signal upon receipt.

5. The synchronous rectification and detection circuit as described in claim 1, characterized in that, The voltage detection circuit includes a voltage divider circuit and a voltage comparator, which are used to sample the voltage across the middle bridge arm where the MOSFET is located. When the voltage across the middle bridge arm is lower than a preset threshold, the zero voltage signal is output to indicate that the MOSFET has reached an approximately zero voltage state.

6. The synchronous rectification and detection circuit as described in claim 1, characterized in that, The digital logic circuit includes a logic AND gate or a digital control unit, which generates an enable signal for the synchronous rectifier MOSFET within a predetermined time window after receiving the rising edge of the pulse signal and the zero voltage signal, and generates an disable signal when the current of the synchronous rectifier MOSFET drops to zero again.

7. The synchronous rectification and detection circuit as described in claim 1, characterized in that, The driving circuit is a gate drive amplifier circuit that provides a constant amplitude gate drive voltage to drive the MOSFET.

8. A synchronous rectification control method, characterized in that, The method of controlling a synchronous rectification MOSFET using the synchronous rectification detection circuit of the present invention includes the following steps: Step S1: Real-time detection of the current waveform of the synchronous rectifier MOSFET; when the current crosses zero, a zero-crossing current signal is generated. Step S2: The zero-crossing current signal is triggered and latched to generate a blocking pulse signal with a defined pulse width, and the rising edge trigger information of the pulse signal is obtained. Step S3: Detect the voltage across the middle bridge arm where the MOSFET is located. When the voltage across the middle bridge arm reaches a preset zero voltage condition, generate a zero voltage signal. Step S4: Based on the rising edge trigger information of the pulse signal and the zero voltage signal, perform logical judgment to determine the turn-on time of the synchronous rectifier MOSFET, and output the corresponding turn-on control signal; Step S5: In response to the turn-on control signal, drive the synchronous rectifier MOSFET to turn on for rectification; after turning on, monitor the MOSFET current in real time, and output a turn-off control signal when the MOSFET current crosses zero again. Step S6: In response to the shutdown control signal, turn off the synchronous rectification MOSFET, thereby ending the current synchronous rectification cycle.

9. The synchronous rectification control method as described in claim 8, characterized in that, In step S4, when the MOSFET current in the previous cycle is detected to be zero and the voltage across the middle bridge arm in the current cycle reaches the zero voltage condition, the turn-on control signal is output after a preset dead time.

10. The synchronous rectification control method as described in claim 1, characterized in that, The synchronous rectification control method is applied in the critical mode power factor correction circuit. A soft-switching trigger signal is generated by detecting the zero-crossing of the PFC boost inductor current. The soft-switching trigger signal is used to control the turn-on time of the PFC main switch, so that the main switch is turned on when the inductor current is zero, realizing zero-current soft-switching. At the same time, the soft-switching trigger signal is used to control the synchronous rectifier in the PFC circuit to turn off when the current crosses zero.

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