Solid state disk resource management method based on intelligent algorithm

Abstract

The invention discloses a solid state disk resource management method based on an intelligent algorithm, and relates to the technical field of computer systems and memorizing.Physical, logical and time three-dimensional evaluation values are generated by analyzing task metadata, and a time window resource topological graph is constructed by adopting a dual-port SRAM; and real-time management of resource occupation conflicts is realized by combining parallel conflict detection and a priority-driven resolution scheduling mechanism. Meanwhile, a dynamic judgment matrix is constructed based on NAND physical characteristics to evaluate the abrasion state of the blocks, and the blocks are distributed in real time and the service life of the blocks is predicted through a three-color block grading and elastic resource pool dynamic adjustment strategy. According to the invention, the resource scheduling efficiency of the storage system is improved, the aging of the NAND flash memory is delayed, and the reliability of system resource management is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of computer systems and storage technology, in particular to a solid state disk resource management method based on intelligent algorithm. BACKGROUND

[0002] With the wide application of solid state disks in the field of data storage, the resource management efficiency directly affects the system reliability, and in the prior art, the solid state disk resource management method mainly has the following defects: In the resource evaluation dimension, the traditional scheme relies on a single index, lacks comprehensive quantitative evaluation of physical hardware state, task characteristics and time urgency, and the priority calculation cannot consider performance optimization and hardware protection, which may cause high-value IO tasks to be delayed or hardware to be excessively worn out; The resource conflict detection and scheduling mechanism is inefficient, and the existing technology mainly uses software-level serial scanning, which cannot respond to high-speed IO requests in real time, especially in the multi-channel parallel access scene, the conflict detection delay is high, which may cause scheduling failure; The wear leveling management of NAND flash memory is relatively extensive, and the existing scheme only performs static block allocation based on the number of erasures, without dynamically evaluating the block health status in combination with threshold voltage drift, data retention capability and other multi-dimensional physical characteristics, which may cause inaccurate block wear and shorten the overall life of the SSD; Therefore, there is an urgent need for a resource management method integrating intelligent algorithm to improve the comprehensive performance and reliability of the SSD. SUMMARY

[0003] In view of the defects of the prior art, the present application provides a solid state disk resource management method based on intelligent algorithm, which solves the problems of single evaluation, slow conflict detection and inaccurate block wear judgment in solid state disk resource management.

[0004] To achieve the above purpose, the present application realizes the following technical scheme: a solid state disk resource management method based on intelligent algorithm, comprising: Step 1, parse the resource demand from the task metadata, collect the erase count of the NAND channel, the temperature sensor data to generate the physical evaluation value, generate the logical evaluation value according to the IO type and the data block size, and generate the time evaluation value by counting the waiting time fluctuation of the task n times, and generate the task priority by substituting the three-dimensional evaluation value into the three-dimensional space to calculate the projection distance; Step 2, a topology graph is constructed by using a dual-port SRAM, and a four-tuple record is constructed for each resource node, when a new task arrives, the topology table is searched according to the resource demand, if the resource is idle, a new record is written and the topology table is updated, if there is a conflict, the conflict is resolved; Step 3, based on the dynamic judgment matrix, the wear state of the NAND block is divided, and is stored into the bit map table BitMap, when a new task applies for resources, a three-color block scheduling strategy is triggered, and the resource pool is dynamically adjusted.

[0005] As a further scheme of the present application, the specific steps for generating the physical evaluation value are: The erase count EC and temperature T of each NAND channel are collected by the hardware sensing circuit every 100us; The erase count is normalized according to the formula EC_norm=EC / EC_max, wherein EC_max is the designed lifetime erase count of the channel; T is min-max normalized to obtain T_norm; The channel evaluation value is calculated according to the formula (1-EC_norm) x (1-T_norm); The physical evaluation value PS is min{channel 1 evaluation value, channel 2 evaluation value,..., channel N evaluation value}, wherein N is the number of channels; The specific operation for generating the logical evaluation value is: For IO type coding, if it is a read operation, 2 points are counted, if it is a write operation, 1 point is counted, and if it is a management operation, 0 point is counted; For data block size grading, if it is a small IO, 2 points are counted, if it is a medium IO, 1 point is counted, and if it is a large IO, 0 point is counted; The logical evaluation value LS is calculated according to the formula (IO type score + data block size score); The specific operation for generating the time evaluation value is: The waiting time of the last n times of task execution (t1, t2,..., tn) is recorded; The fluctuation range is calculated as max(t1, t2,..., tn)-min(t1, t2,..., tn); The time evaluation value TS is calculated according to the formula [1-(fluctuation range-base fluctuation value)], wherein the base fluctuation value is usually the average fluctuation range when the system is stably running.

[0006] As a further scheme of the present application, the specific steps for generating the task priority are: A three-dimensional coordinate point V=(PS, LS, TS) is defined; The square of the projection distance to each coordinate axis d PS 2 , d LS 2 , d TS 2 ; If d LS 2Min, according to the formula The priority is calculated; If d TS 2 Min, according to the formula The priority is calculated; If d PS 2 Min, according to the formula The priority is calculated, wherein round() is an integer function.

[0007] As a further scheme of the application, the specific format of the resource node corresponding to the four-tuple record is {resource ID, occupation start, occupation end, task priority}.

[0008] As a further scheme of the application, when a new task applies for a resource, a parallel comparator array scans the topology graph to check whether a time slot within the next 5ms is occupied, if the time interval applied for by the task overlaps with the time interval recorded in the topology graph and the resource ID is the same, a conflict is determined.

[0009] As a further scheme of the application, the specific operation of performing conflict resolution is: If the priority of the new task is high, the resource is preempted, and the occupied task is moved or migrated to other resources; If the priority of the new task is low, the new task is moved or migrated to a standby resource; The topology graph record is automatically modified by a state machine, and the time interval and resource ID of the task are updated; If the task execution time exceeds the 5ms window, the window is automatically expanded to 8ms; The standby resource capacity can be set to 10% of the total resource, and is sorted according to the physical evaluation value, and in use, the resource with a high physical evaluation value is preferentially selected.

[0010] As a further scheme of the application, the task that needs to expand the window is marked in the topology table, the task at the edge of the window is preferentially processed, and a 1-bit expansion flag is added to the task record in the topology table, which can be specifically set as {resource ID, occupation start, occupation end, task priority, expansion flag}.

[0011] As a further scheme of the application, the specific steps of dividing the wear state of the NAND block based on the dynamic judgment matrix are: The temperature T and working voltage Vcc are collected in real time according to the temperature sensor and voltage monitoring module; The base matrix Rs is constructed, and the element Rs[i][j] represents the influence degree of index i on index j, the base matrix is labeled by using the 1-9 scale method, 1 represents equal influence, and 9 represents absolute dominance, and the specific base matrix Rs is as follows: ; Based on the real-time temperature T and voltage Vcc, the matrix elements are adjusted using a hardware state transition function, with the specific formula as follows: ; The specific form of the temperature calibration function f(T) is as follows: ; The voltage calibration function g(Vcc) has the following specific form: ; For the adjusted dynamic judgment matrix Calculate its maximum eigenvalue in real time And according to the formula Calculate the consistency index CI. If CI < 0.1, it indicates that the matrix is ​​valid. If inconsistency is detected, it automatically reverts to the stable matrix of the previous 10ms. Find Maximum eigenvalue The corresponding eigenvector W; Construct a real-time indicator vector X=[EV 1-DR], according to the formula The health score S is calculated, where E is the erase count ratio, V is the threshold voltage Vth drift ratio, D is the data retention capability, and R is the read interference index. If S∈[0,0.2], the block is marked as green; if S∈(0.2,0.7], the block is marked as yellow; if S∈(0.7,1], the block is marked as red.

[0012] As a further aspect of the present invention, the specific operation for triggering the three-color block scheduling strategy is as follows: When a task request is written, the hardware search circuit prioritizes locating the green block and allocates it according to the principle of least recently unused; If the percentage of green blocks is less than 30%, a compromise strategy will be implemented: Write speed reduced by 20%; Force a refresh of the flash translation layer (FTL) mapping after each write operation; Regular tasks are prohibited from writing to the red block; only emergency system tasks are allowed to use it.

[0013] As a further aspect of the present invention, the specific steps for dynamically adjusting the resource pool are as follows: 10% of the green blocks are reserved as an elastic pool, which does not participate in regular allocation and is only used for emergency scheduling; When the proportion of red blocks exceeds 20%, the elastic pool needs to be automatically switched to wear leveling mode. The specific operation is as follows: Force 50% of write tasks to be redirected to the elastic pool, and allocate blocks in the elastic pool based on the minimum number of erases. When the proportion of red blocks is less than 15%, the elastic pool gradually releases blocks and restores the normal allocation mode.

[0014] This invention provides a solid-state drive resource management method based on intelligent algorithms, which has the following advantages compared with existing technologies: (1) This invention uses three-dimensional evaluation value and projection priority algorithm to quantify task requirements by integrating physical, logical and time dimensions, realize multi-objective scheduling optimization, avoid single index bias, and ensure that high-value IO tasks are executed first. (2) The present invention adopts a dual-port SRAM topology and a parallel conflict detection mechanism, combined with dynamic scheduling of elastic resource pool to realize conflict resolution and resource migration, thereby improving resource utilization and system robustness during multi-task concurrent processing. (3) The present invention constructs a dynamic wear assessment model based on the physical characteristics of NAND, and avoids premature block failure by using three-color block classification and elastic pool adaptive adjustment, thereby extending the overall service life of SSD. Attached Figure Description

[0015] Figure 1 This is a flowchart of the steps of the present invention. Detailed Implementation

[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0017] like Figure 1 This invention provides a solid-state drive resource management method based on intelligent algorithms, comprising: Step 1: Parse resource requirements from task metadata, collect NAND channel erase count and temperature sensor data to generate physical evaluation values, generate logical evaluation values ​​based on IO type and data block size, and calculate the waiting time fluctuation of task n executions to generate time evaluation values. The core of parsing resource requirements is to transform abstract task descriptions into quantifiable resource requirements through structured parsing and semantic mapping. The system employs regular expression matching and semantic tag mapping techniques to extract key information through predefined task metadata patterns (such as XML or key-value pair formats). Regular expression templates can define matching rules for different task types, avoid ambiguity in unstructured data, and efficiently capture metadata in fixed formats. The semantic tag library mainly establishes a mapping table between task types and resource keywords. New task types can be supported by updating the semantic tag library. For example, if the metadata input is "task type: random database read, data volume: 16KB, access mode: random, caching strategy: read cache", regular expression matching extracts the keywords: random database read, 16KB, random, read cache, and the semantic mapping result is: {task type: database operation, operation type: random read, data volume: 16KB, access mode: random, caching requirement: DRAM read cache required}. Using domain ontology mapping and resource feature dictionary techniques, keywords are transformed into specific resource requirements: Domain ontology construction requires defining resource layers based on the storage system architecture, such as SSD NAND channels and DRAM cache structures; Feature dictionary matching is essentially a mapping rule between predefined resource keywords and physical resources; For example, the keyword set is: random read, 16KB, read cache. Through ontology mapping, it is resolved as: random read → requires distributed access of NAND channels, 16KB data volume → DRAM cache block requirement, read cache → cache strategy corresponds to DRAM blocks 10-14, resource feature output: {NAND channel: requires channels 1-4, DRAM block: 10-13}. The specific steps for acquiring erase counts and temperature sensor data from NAND channels to generate physical evaluation values ​​are as follows: The erase count EC and temperature T of each NAND channel are collected every 100μs using a hardware sensing circuit. The erase count is normalized according to the formula EC_norm=EC / EC_max, where EC_max is the number of erases required for the channel's design lifetime. Perform min-max normalization on T to obtain T_norm; The channel evaluation value is calculated using the formula (1-EC_norm)×(1-T_norm), multiplying the negative effects of the number of wipes and temperature to ensure that any deterioration of any factor will significantly reduce the evaluation value. The single-channel evaluation value reflects the health status of the channel. However, for multi-channel scenarios, the worst-case channel-dominated method is used to obtain the final physical evaluation value, i.e., physical evaluation value PS = min{channel 1 evaluation value, channel 2 evaluation value, ..., channel N evaluation value}. The system performance is limited by the worst-case channel. If a channel is close to failure, even if other channels are healthy, the overall reliability is still low. The specific steps for generating logical evaluation values ​​based on IO type and data block size are as follows: For IO type encoding, a read operation is worth 2 points, a write operation is worth 1 point, and a management operation is worth 0 points. For data block size classification, small IO (≤4KB) is scored as 2 points, medium IO (5KB-1MB) is scored as 1 point, and large IO (>1MB) is scored as 0 points. The logical evaluation value LS is calculated based on the formula (IO type score + data block size score). The impact of IO type and data block size on priority is independent of each other, and addition is more consistent with the logical relationship. The specific steps for generating a time evaluation value by statistically analyzing the waiting time fluctuation of a task executed n times are as follows: Record the waiting time (t1, t2, ..., tN) of the task for the most recent n executions; The fluctuation range is calculated as max(t1,t2,...,tN) - min(t1,t2,...,tN); The time assessment value TS is calculated according to formula 1 - (fluctuation range - baseline fluctuation value). The larger the fluctuation range, the lower the time assessment value. The baseline fluctuation value is usually taken as the average fluctuation range when the system is running stably. The three-dimensional evaluation values ​​(physical evaluation value PS, logical evaluation value LS, and temporal evaluation value TS) are treated as coordinate points in three-dimensional space. The distances from these points to each coordinate axis are calculated using unweighted geometric projection. Priorities are generated based on the order of these projection distances. The specific operation is as follows: Define a three-dimensional coordinate point V = (PS, LS, TS); Calculate the square of the projected distance to each coordinate axis: The squared distance to the PS axis (ignoring the PS dimension, calculate the LS-TS plane projection), d PS 2 =LS 2 +TS 2 The squared distance to the LS axis (ignoring the LS dimension, calculate the PS-TS plane projection), d LS 2 =PS 2 +TS 2 The squared distance to the TS axis (ignoring the TS dimension, calculate the PS-LS plane projection), d TS 2 =PS 2 +LS 2 ; The smaller the distance, the stronger the dominance of the corresponding dimension. The priority encoding is as follows: If d LS 2 Minimum indicates the minimum LS-axis distance, with the logical evaluation value dominating, according to the formula. Calculate the priority; The logical evaluation value includes attributes such as IO type and data block size. These factors directly affect the throughput and response latency of the storage system. For example, database random read is a high-value IO. If the processing is delayed, it will cause the entire business chain to be stuck. Tasks with high logical values ​​need to be scheduled first to ensure the system performance baseline. Therefore, the priority calculation formula implies that the highest level is 7. If d TS 2 Minimum indicates the minimum TS-axis distance, with the time evaluation value dominating, according to the formula. Calculate the priority; The time evaluation value reflects when to process, but it is not directly related to the efficiency of the task in utilizing system resources. For example, a log archiving task with a long waiting time (high time value) with a sequential write IO type (low logical value) will have limited performance improvement on the overall system even if it is processed first. If the database task with the high logical value is preempted at this time, it may slow down the business response and reduce the efficiency of the system. Therefore, the priority calculation formula implies that the highest level is 4. If d PS 2 Minimum indicates the minimum distance between the PS and axes, with the physical evaluation value dominating, according to the formula. Calculate the priority; The physical evaluation value reflects the health status of the hardware. Its priority calculation is essentially risk avoidance rather than performance optimization. For example, when the erase count of a certain NAND channel is close to the life limit (high physical value), the system needs to reduce the task priority of that channel to extend the hardware life. However, if the task of that channel is forced to have the highest priority at this time, it may cause hardware damage. Therefore, the peak value of the physical dominance formula is limited to avoid sacrificing hardware for task processing.

[0018] Step 2: Construct a topology graph using dual-port SRAM, with each resource node (such as a NAND channel or DRAM cache block) corresponding to a quadruple record; In a storage system, the scheduling module needs to query resource usage in real time (read operation), while the hardware state machine needs to update new task allocation (write operation). Dual-port SRAM allows both ends to read and write to different addresses simultaneously, avoiding bus contention. For example, when NAND channel 0 is processing a read request, the scheduling module queries its 5ms time slot occupancy. At the same time, a new task requests to occupy the channel. The hardware state machine can write a new time slot marker through another port, and the two do not block each other. The specific format of the quadruple record corresponding to the resource node is {Resource ID, Occupation Start, Occupation End, Task Priority}; Resource ID is a unique identifier for a hardware unit. In a storage system, there may be multiple resources of the same type, such as 16 NAND channels or 256 DRAM cache blocks. The ID is needed to quickly locate the resource. For example, when a task requests "NAND channel 3", the time slot occupancy corresponding to that ID can be directly queried without traversing all resources; The time range of resource occupation accurately depicts the resource occupation cycle, using start / end time to describe the time span of resource occupation, and supports overlapping conflict detection; For example, if task A occupies NAND channel 1 for [100μs, 300μs], and task B requests [250μs, 400μs], the conflict is determined by the overlap of time intervals. If B has a higher priority, B is scheduled to occupy the channel in advance. Task priority serves as the basis for conflict resolution decisions. When multiple tasks compete for the same resource time slot, the allocation order must be determined according to priority. For example, a task with an IO type of "urgent write" has a priority of 7, while a normal read task has a priority of 3. If both request the same time slot, the higher-priority task will take priority. The time window is fixed at 5ms, and the time slots are divided into 1μs granularity (a total of 5000 time slots); The mainstream SSD scheduling cycle is 1-10ms. A 5ms window can cover about 1,000 IO operations, which can capture short-term resource conflicts and avoid data redundancy caused by excessively long windows. The page programming time of NAND flash memory is about 200μs. A 1μs granularity can decompose the operation into 200 time slots, accurately marking the resource usage of each stage. If the granularity is 10μs, there may be a situation where two tasks request resources within an adjacent 5μs but the conflict is not detected. A 1μs granularity can avoid scheduling errors caused by time gaps. When a new task arrives, the topology table is searched based on resource requirements. If the resources are available, a new record is written and the topology table is updated. Every 1μs, the time window is shifted 1μs to the right, and expired records are discarded. The base address of the sliding window is generated by a counter. For example, if the current window starts at 0x1000, the base address is incremented by 1 every 1μs, and the base address returns to zero after 5ms, thus achieving cyclic coverage. Only the time slot in the current window needs to be checked, without having to traverse all historical records, which reduces the complexity of hardware logic. At the same time, when the IO load suddenly increases, the window always focuses on the latest resource usage changes. When a new task requests resources, a parallel comparator array is triggered to scan the topology map and check whether the time slots within the next 5ms are occupied. If the time interval requested by the task overlaps with the time interval of a record in the topology map and the resource ID is the same, a conflict is determined. Real-time systems have extremely high requirements for the response speed of resource conflict detection. If a serial scanning method is used, in a scenario with 5000 time slots, assuming that a single comparison takes 10ns, the total latency of serial processing will reach 5000×10ns=50μs. This far exceeds the real-time scheduling requirements of most storage systems. However, the parallel comparator array processes all time slots simultaneously through hardware circuitry, compressing the latency to <50ns, which meets the requirements of real-time conflict detection. In case of a conflict, compare the priorities of the new task with those of the already occupied task: If a new task has a high priority, it will preempt resources, while already occupied tasks will be moved to the next task or migrated to other resources. If a new task has a low priority, it will be postponed or migrated to a backup resource. High-priority tasks typically correspond to critical business operations and require guaranteed response times; therefore, they must have the ability to preempt resources. Low-priority tasks are not postponed indefinitely, but are given the opportunity to be executed through a migration mechanism to avoid the starvation problem; Reserved resources can be set to account for 10% of the total resources and sorted by physical assessment value, with priority given to resources with higher physical assessment values; Reserve 10% of resources as a backup, which can quickly migrate tasks in the event of primary resource conflicts or failures, and avoid system blockage due to insufficient resources; NAND channels have a limited number of erase cycles. Prioritizing the use of resources with high physical evaluation values ​​can extend the overall hardware lifespan. The topology graph records are automatically modified using a state machine to update the time interval and resource ID of the task. The SRAM topology map is directly manipulated using state machine hardware, without CPU intervention, thus avoiding the clock cycle overhead of software scheduling. If the task execution time exceeds the 5ms window, the window will be automatically expanded to 8ms, with a maximum expansion of 3ms. A 5ms time window is suitable for most short-cycle tasks, but some tasks (such as large data block migration) may require a longer time. Strictly limiting the time to 5ms will lead to the following problems: The task time interval is truncated, making it impossible to fully detect subsequent conflicts. For example, if a task requires 7ms but the window only lasts 5ms, the occupancy of the last 2ms is not recorded. Frequently triggering multiple segmented scheduling of out-of-window tasks increases scheduling overhead, such as splitting a 7ms task into two scheduling cycles of 5ms + 2ms. The 3ms extension threshold is established based on a balance between hardware resources and scheduling efficiency. At the hardware level, the dual-port SRAM storage capacity has been expanded from 5000 time slots (5ms) to 8000 time slots (8ms), which does not exceed the on-chip storage resource limit of most FPGAs; In terms of real-time performance, the 8ms window meets the real-time scheduling requirements of most storage systems. For example, task A needs to write 1GB of data to a NAND channel, which is expected to take 6ms. The 5ms window cannot cover this. If the window is not expanded, the topology graph will only record the first 5ms of occupancy, and the channel occupancy from 5ms to 6ms will not be tracked. If task B requests the channel for 5ms to 7ms at this time, the conflict will not be detected, resulting in channel preemption failure and data writing errors. However, if the window is expanded to 8ms, the 1ms to 6ms occupancy of task A will be fully recorded. When task B requests the channel, the 5ms to 6ms conflict will be detected, triggering pre-resolution rearrangement. Mark tasks that extend the window in the topology table, and prioritize processing tasks at the window edges; The system shifts the time window to the right every 1μs. If the time interval of the extended task covers the edge of the window, the following risks may occur: If a task is not completed but is moved out of the current window, subsequent conflict detection will fail. For example, if the window is moved to the right, 7-8ms becomes 2-3ms. If it is not marked, it may be mistakenly identified as a new time slot. When edge tasks have low priority, they are easily squeezed out by subsequent short tasks, leading to timeouts. By adding an extended flag bit to the record format, it can be set to {Resource ID, Occupation Start, Occupation End, Task Priority, Extended Flag}, and the state machine can quickly identify tasks that require special handling; The time slots at the edge of the window will be removed when the window moves again. If the task is not completed, it needs to be rescheduled. Prioritizing such tasks can reduce the overhead of secondary scheduling. For example, in a database server I / O scheduling scenario, Task A: random database read (priority 7), requests 1-2ms of channel 1 for 4KB of data; Task B: sequential log write (priority 3), requests 2-4ms of channel 1 for 8MB of data; and in the topology diagram, channel 1 is already occupied by task C (priority 5) during the 2-4ms period. At this time, when Task B requests channel 1, it scans and finds that the 2-4ms period is occupied by task C (priority 5>3), triggering a conflict. Since Task B's priority is lower than that of task C, it cannot preempt the request and needs to be postponed or migrated: Option 1, postpone to 4-7ms, exceeding the 5ms window, expand the window as needed; Option 2, migrate to the backup channel 2, whose physical evaluation value is calculated to be 0.8, which meets the requirements; finally, Task B is migrated to channel 2, channel 1 continues to serve task C, and task A executes normally.

[0019] Step 3: Construct a dynamic judgment matrix based on the physical characteristics of NAND, calculate the wear state of each NAND block, and store it in a bitmap table, with each block corresponding to 1 bit; NAND flash memory uses blocks as the smallest unit of erasure and has a limited number of erase / write cycles. Since task write operations will consume the erase / write life of certain blocks in a concentrated manner, it is necessary to calculate and control the block wear to avoid some blocks failing prematurely. The wear and tear of NAND blocks is mainly affected by four factors: the number of erase cycles, the degree of threshold voltage drift, data retention capability, and read interference. As the number of erase cycles increases, the oxide layer gradually thins and defects increase, leading to a decrease in the charge retention capability of the floating gate, ultimately preventing the memory cell from accurately storing data. The erase count ratio, calculated using the formula E = (current erase count / maximum erase count), directly reflects the wear level of the block. The threshold voltage Vth drift degree. Each erase will cause floating gate charge leakage. When Vth drifts beyond the read window, it will cause a bit error. Wherein, Vth drift amount = current Vth - initial Vth; The Vth drift ratio is calculated using the formula V = (current drift amount / threshold drift amount). Data retention capability (D): When NAND flash memory is exposed to high temperatures or is not refreshed for a long time, charge leakage can lead to data loss. The retention capability is negatively correlated with the number of erase cycles, but it is also affected by the manufacturing process. The inverse value of data retention capability, 1-D, is calculated; the greater the wear and tear, the smaller the data retention capability value. The reading interference index R is used. Frequent reading of adjacent pages of the same block can cause floating gate charge disturbances, leading to non-erasable damage. This can be mapped by the bit error rate (BER). If R is greater than 1, the boundary value is 1. The specific steps for constructing a dynamic judgment matrix based on the physical characteristics of NAND are as follows: The temperature T and operating voltage Vcc are collected in real time by a temperature sensor and a voltage monitoring module. Construct a foundational matrix Rs, where each element Rs[i][j] represents the degree of influence of indicator i on indicator j. The foundational matrix is ​​labeled using a 1-9 scale, where 1 indicates equal influence and 9 indicates absolute dominance. The resulting foundational matrix Rs is as follows: ; The number of erase cycles has the greatest impact on other metrics, such as high erase rates leading to increased Vth drift, decreased data retention, and increased read interference. The impact of read interference is the weakest, which is consistent with the characteristic that the main failure mode of NAND is dominated by the erase and write cycle; Based on the real-time temperature T and voltage Vcc, the matrix elements are adjusted using a hardware state transition function, with the specific formula as follows: ; The temperature calibration function f(T) has the following specific form: When T > 25℃, the weight of erasure increases by 2% for every 1℃ increase; when T < 25℃, the weight of data retention increases by 1% for every 1℃ decrease. The voltage calibration function g(Vcc) has the following specific form: When Vcc > 3.3V, the higher the voltage, the more the Vth drift weight increases by 10% / 0.1V; when Vcc < 3.3V, the lower the voltage, the more the data retention weight increases by 5% / 0.1V. Real-time calculation of maximum eigenvalue And according to the formula The consistency index CI is calculated. If CI < 0.1, it indicates that the matrix is ​​valid. If the detection is inconsistent, such as the matrix being disordered due to a sudden temperature change, it will automatically revert to the stable matrix of the previous 10ms to ensure the reliability of the judgment. Solve for the judgment matrix Maximum eigenvalue The corresponding eigenvector W; Construct a real-time indicator vector X = [EV 1 - DR]; According to the formula Calculate the health score S, where S∈[0,1]; A higher health score S indicates a more severe block loss. Therefore, the interval [0,1] to which S belongs is divided into three color intervals. If S∈[0,0.2], the block is marked as green; if S∈(0.2,0.7], the block is marked as yellow; and if S∈(0.7,1], the block is marked as red. BitMap can quickly query and update block status through hardware-level bitwise operations (such as bitwise AND and shift), with low response latency; After each block is erased, the corresponding bits in the bitmap are automatically updated via a hardware state machine; After the NAND block erasure operation is completed, the hardware state machine immediately updates the corresponding bit in the bitmap to ensure that the erasure count record is completely synchronized with the physical state. If the update is delayed, the scheduler may misjudge the block wear status, such as misjudging a block that has been erased 100 times as 0 times, thus over-calling the block. The specific scheduling strategy for the three-color blocks is as follows: When a task request is written, the hardware search circuit prioritizes locating the green block and allocates it according to the principle of least recently unused; Each erase of a NAND block causes oxide layer loss. The more times it is erased, the more likely it is to fail. Green blocks have high health and should be used first to maximize their remaining lifespan, avoiding the imbalance between idle healthy blocks and overused worn blocks. If the green blocks are insufficient (i.e., their proportion is less than 30%), a compromise strategy will be implemented: Write speed reduced by 20%, reducing erase wear; Lower write speeds mean less data is written per unit of time, indirectly reducing the number of erase operations. More importantly, in low-speed mode, the system has more time for block scheduling, preventing the data from being concentrated in a few yellow blocks; Force a refresh of the flash translation layer (FTL) mapping after each write operation to avoid writing to the same yellow block consecutively. FTL is responsible for mapping logical addresses to physical blocks. Refreshing the mapping can change the data storage location and prevent the same yellow block from being written to continuously. For example, the logical address that was originally written to block A is mapped to block B after refreshing, thus distributing the number of erases. Regular tasks are prohibited from writing to the red block; only emergency system tasks are allowed to use it. The red blocks are nearing the end of their lifespan. Continuing to write to them may result in data loss due to sudden failure. Restricting regular tasks can protect user data, and only system-level emergency tasks are allowed to use them to ensure system stability. After each write operation, the remaining number of erases is predicted, and blocks with less than 100 remaining erases are marked as bad blocks. By monitoring the number of erasures in real time through a hardware state machine, when the predicted remaining number of erasures is less than 100, it is actively marked as a bad block, and the system no longer assigns tasks to that block. This is more reliable than waiting for the block to expire naturally and can prevent sudden failures. NAND flash memory has a limited number of erase cycles, and regular allocation may lead to uneven block erasures. The reserved elastic pool can provide buffer resources when system wear intensifies, preventing a lack of healthy blocks in emergencies. The specific steps for dynamically adjusting the resource pool are as follows: 10% of the green blocks are reserved as an elastic pool, which does not participate in regular allocation and is only used for emergency scheduling; The elastic pool contains only green blocks, which can maintain a low wear state by not participating in regular allocation for a long time, ensuring resource health during emergency scheduling. When the proportion of red blocks exceeds 20%, it means that the overall wear and tear of the system has reached the warning line. If no intervention is taken, it may quickly lead to the failure of more blocks and shorten the life of the SSD. At this point, the elastic pool needs to be automatically switched to wear leveling mode. The specific steps are as follows: Forcing 50% of write tasks to be redirected to the elastic pool can reduce the frequency of erasing regular blocks (especially yellow / red blocks) and prevent further wear on already worn blocks. Blocks within the elastic pool are allocated based on the minimum number of erases, ensuring that new writes prioritize the use of blocks with the least wear, further balancing the overall number of erases. When the proportion of red blocks is less than 15%, the elastic pool will gradually release blocks, releasing 10% every week to restore the normal allocation mode. If all elastic pool blocks are released at once, a large number of low-wear blocks may suddenly participate in regular allocation, causing new erase imbalances. Gradual release can avoid sudden changes in system load. For yellow blocks, the time interval of the last 100 erases is counted. This time interval can be taken as the average erase interval = total time / 100 times. The remaining lifetime is calculated according to the formula (Lmax - current number of erases) × average erase interval. If the remaining lifetime of a yellow block is predicted to be less than the lifetime threshold Lth, it is automatically upgraded to a red block.

[0020] Some of the data in the above formulas are numerical calculations with dimensions removed, and the contents not described in detail in this specification are all prior art known to those skilled in the art.

[0021] The above embodiments are only used to illustrate the technical methods of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical methods of the present invention without departing from the spirit and scope of the technical methods of the present invention.

Claims

1. A solid-state drive resource management method based on intelligent algorithms, characterized in that, Includes the following steps: Step 1: Parse resource requirements from task metadata, collect NAND channel erase count and temperature sensor data to generate physical evaluation values, generate logical evaluation values ​​based on IO type and data block size, count the waiting time fluctuation of task n executions to generate time evaluation values, and substitute the three-dimensional evaluation values ​​into three-dimensional space to calculate projection distance and generate task priority. Step 2: Construct a topology graph using dual-port SRAM and create a four-tuple record for each resource node. When a new task arrives, look up the topology table according to resource requirements. If the resource is available, write a new record and update the topology table. If there is a conflict, perform conflict resolution. Step 3: Divide the wear status of NAND blocks based on the dynamic judgment matrix and store it in the bitmap table. When a new task requests resources, the three-color block scheduling strategy is triggered and the resource pool is dynamically adjusted.

2. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific steps for generating physical evaluation values ​​are as follows: The erase count EC and temperature T of each NAND channel are collected every 100μs using a hardware sensing circuit. The erase count is normalized according to the formula EC_norm=EC / EC_max, where EC_max is the number of erases required for the channel's design lifetime. Perform min-max normalization on T to obtain T_norm; The channel evaluation value is calculated using the formula (1-EC_norm)×(1-T_norm); The physical evaluation value PS = min{Channel 1 evaluation value, Channel 2 evaluation value, ..., Channel N evaluation value}, where N is the number of channels; The specific steps for generating the logical evaluation value are as follows: For IO type encoding, a read operation is worth 2 points, a write operation is worth 1 point, and a management operation is worth 0 points. For data block size classification, small IO is scored as 2 points, medium IO as 1 point, and large IO as 0 points. The logical evaluation value LS is calculated based on the formula (IO type score + data block size score); The specific steps for generating time-based evaluation values ​​are as follows: Record the waiting time (t1, t2, ..., tn) of the task's most recent n executions; The fluctuation range is calculated as max(t1,t2,...,tn) - min(t1,t2,...,tn). The time assessment value TS is calculated using the formula [1 - (fluctuation range - baseline fluctuation value)], where the baseline fluctuation value is usually taken as the average fluctuation range when the system is running stably.

3. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific steps for generating task priorities are as follows: Define a three-dimensional coordinate point V = (PS, LS, TS); Calculate the squared projection distance d to each coordinate axis PS 2 d LS 2 d TS 2 ; If d LS 2 Minimum, according to the formula Calculate the priority; If d TS 2 Minimum, according to the formula Calculate the priority; If d PS 2 Minimum, according to the formula Calculate the priority, where round() is the rounding function.

4. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific format of the four-tuple record corresponding to the resource node is {Resource ID, Occupation Start, Occupation End, Task Priority}.

5. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, When a new task requests resources, a parallel comparator array is triggered to scan the topology map and check whether the time slots within the next 5ms are occupied. If the time interval requested by the task overlaps with the time interval recorded in the topology map and the resource ID is the same, a conflict is determined.

6. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific steps for conflict resolution are as follows: If a new task has a high priority, it will preempt resources, while already occupied tasks will be moved to the next task or migrated to other resources. If a new task has a low priority, it will be postponed or migrated to a backup resource. The topology graph records are automatically modified through a state machine, and the time interval and resource ID of the task are updated. If the task execution time exceeds the 5ms window, the window will be automatically expanded to 8ms. The spare resource capacity can be set to 10% of the total resources and sorted according to physical evaluation value. When using the spare resources, resources with higher physical evaluation values ​​will be selected first.

7. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, Mark the tasks that need to expand the window in the topology table, prioritize the tasks at the edge of the window, and add an expansion flag bit to the topology table for the task record. Specifically, it can be set to {resource ID, start of occupation, end of occupation, task priority, expansion flag}.

8. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific steps for dividing the wear status of NAND blocks based on the dynamic judgment matrix are as follows: The temperature T and operating voltage Vcc are collected in real time by a temperature sensor and a voltage monitoring module. Construct a foundational matrix Rs, where each element Rs[i][j] represents the degree of influence of indicator i on indicator j. The foundational matrix is ​​labeled using a 1-9 scale, where 1 indicates equal influence and 9 indicates absolute dominance. The specific foundational matrix Rs is as follows: ； Based on the real-time temperature T and voltage Vcc, the matrix elements are adjusted using a hardware state transition function, with the specific formula as follows: ; The specific form of the temperature calibration function f(T) is as follows: ; The voltage calibration function g(Vcc) has the following specific form: ; For the adjusted dynamic judgment matrix Calculate its maximum eigenvalue in real time And according to the formula Calculate the consistency index CI. If CI < 0.1, it indicates that the matrix is ​​valid. If inconsistency is detected, it automatically reverts to the stable matrix of the previous 10ms. Find Maximum eigenvalue The corresponding eigenvector W; Construct a real-time indicator vector X=[EV 1-DR], according to the formula The health score S is calculated, where E is the erase count ratio, V is the threshold voltage Vth drift ratio, D is the data retention capability, and R is the read interference index. If S∈[0,0.2], the block is marked as green; if S∈(0.2,0.7], the block is marked as yellow; if S∈(0.7,1], the block is marked as red.

9. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific steps to trigger the three-color block scheduling strategy are as follows: When a task request is written, the hardware search circuit prioritizes locating the green block and allocates it according to the principle of least recently unused; If the percentage of green blocks is less than 30%, a compromise strategy will be implemented: Write speed reduced by 20%; Force a refresh of the flash translation layer (FTL) mapping after each write operation; Regular tasks are prohibited from writing to the red block; only emergency system tasks are allowed to use it.

10. The solid-state drive resource management method based on intelligent algorithms according to claim 1, characterized in that, The specific steps for dynamically adjusting the resource pool are as follows: 10% of the green blocks are reserved as an elastic pool, which does not participate in regular allocation and is only used for emergency scheduling; When the proportion of red blocks exceeds 20%, the elastic pool needs to be automatically switched to wear leveling mode. The specific operation is as follows: Force 50% of write tasks to be redirected to the elastic pool, and allocate blocks in the elastic pool based on the minimum number of erases. When the proportion of red blocks is less than 15%, the elastic pool gradually releases blocks and restores the normal allocation mode.

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