Image acquisition method, device and system for large-size display panel
By utilizing checkerboard and grid image processing in large-size display panel testing to determine camera positions and cropping coordinates, the high cost problem caused by multiple high-definition cameras was solved, achieving low-cost automated screen testing.
Patent Information
- Application Number
- CN202511563650.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-30
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2045-10-30
AI Technical Summary
In automated screen testing of large-size display panels, the use of multiple high-definition cameras leads to high production costs, mainly because high-definition cameras need to integrate image processing and cropping functions, which increases additional customization costs.
By sending a checkerboard image to the display panel under test, and using the pixel information of the camera and the display panel to pre-set, the overlapping area and position of adjacent cameras are calculated, the cropping coordinate parameters are determined, and the images captured by the cameras are cropped and stitched together, reducing the configuration requirements of high-definition cameras.
It enables automated screen testing of large-size display panels using ordinary high-definition cameras without relying on advanced image processing capabilities, thereby reducing production costs.
Smart Images

Figure CN121029518B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of point screen testing, and in particular to an image acquisition method, device and system for a large-size display panel. BACKGROUND
[0002] In the automatic point screen testing technology, considering the development trend of large size and high resolution of display panels, a single high-definition camera cannot completely cover the display screen, so the industry often adopts the way of partition shooting of the display area of the display panel by multiple high-definition cameras. In the automatic point screen testing process of the display panel, the image generator lights up the screen of the display panel, multiple high-definition cameras shoot images of different areas, the high-definition cameras process the effective image data of different areas through internal software algorithms, the high-definition cameras return the effective image data to the host computer, the host computer finally splices the returned effective image data into a complete image, and the software algorithm of the host computer analyzes the complete image for defect detection.
[0003] Obviously, in the scheme of multiple high-definition cameras cooperating, the high-definition cameras need to be additionally integrated with image processing, cropping and other functions in addition to collecting high-quality images, and these functions need to pay high customization fees to the camera manufacturers, directly leading to high production cost of automatic point screen testing. SUMMARY
[0004] Therefore, the embodiments of the present application provide an image acquisition method, device and system for a large-size display panel to reduce the configuration requirements for cameras and save production cost.
[0005] In a first aspect, the embodiments of the present application provide an image acquisition method for a large-size display panel, comprising:
[0006] sending a checkerboard image to a display panel to be tested to make the display panel to be tested display the checkerboard image on the full screen, wherein the checkerboard image is preset according to a plurality of cameras and pixel information of the display panel to be tested, and the plurality of cameras are used to shoot different areas of the display panel to be tested;
[0007] acquiring checkerboard images respectively collected by the plurality of cameras, wherein each of the checkerboard images has at least one first reference vertex;
[0008] calculating an overlapping area between two adjacent checkerboard images based on coordinates of the first reference vertex on each of the checkerboard images in a preset reference pixel coordinate system, and determining positions of two cameras associated with the overlapping area when the overlapping area meets a set condition;
[0009] After determining the positions of all the cameras, a grid image is sent to the display panel under test so that the display panel under test displays the grid image in full screen.
[0010] After acquiring grid sub-images from multiple cameras, the coordinates of the grid lines of all the grid sub-images are calculated to determine the cropping coordinate parameters of each grid sub-image.
[0011] The images captured by the corresponding camera are cropped according to the cropping coordinate parameters of each of the grid sub-images.
[0012] In conjunction with the first aspect of this application, in an optional embodiment, it further includes:
[0013] The cropped images are stitched together to obtain the complete image displayed on the display panel under test.
[0014] In conjunction with the first aspect of this application, in an optional embodiment, calculating the overlapping region in two adjacent chessboard grid images based on the coordinates of the first reference vertices on each of the chessboard grid images in a preset reference pixel coordinate system includes:
[0015] The acquired chessboard grid image is traversed to determine the number of rows and columns of squares of different colors in the chessboard grid image;
[0016] The relative positions of each camera in the reference pixel coordinate system are determined based on the number of rows and columns of squares of different colors in each chessboard grid image, the starting pixel point, and the coordinates of the first reference vertex in the reference pixel coordinate system.
[0017] Calculate the pixel width of the overlapping region in the chessboard grid images captured by two adjacent cameras.
[0018] In conjunction with the first aspect of this application, in an optional embodiment, determining the positions of two cameras associated with the overlapping region based on the overlapping region when a set condition is met includes:
[0019] If the pixel width of the overlapping region exceeds a preset pixel threshold, the relative positions of two adjacent cameras associated with the overlapping region in the reference pixel coordinate system are determined, wherein the preset pixel threshold is determined based on the grid line spacing of the grid image.
[0020] In conjunction with the first aspect of this application, in an optional embodiment, it further includes:
[0021] If the pixel width of the overlapping region is below the preset pixel threshold, the positions of the two adjacent cameras associated with the overlapping region are adjusted until the overlapping region meets the set conditions.
[0022] With reference to the first aspect of the present application, in an optional implementation, the method further includes:
[0023] determining the coordinates of the second reference vertex on the grid sub-image in the reference pixel coordinate system, the coordinates of the second reference vertex in the reference pixel coordinate system being the same as the corresponding first reference vertex;
[0024] calculating the coordinates of a diagonal vertex opposite to the second reference vertex in the reference pixel coordinate system, the diagonal vertex being formed by the intersection of a grid horizontal line and a grid vertical line farthest from the second reference vertex on the grid sub-image;
[0025] determining the cutting coordinate components of two adjacent grid sub-images in the corresponding direction along the pixel width direction of the overlapping region, to obtain the cutting coordinate parameters of the grid sub-image.
[0026] With reference to the first aspect of the present application, in an optional implementation, the method further includes:
[0027] selecting the coordinate components of the diagonal vertex associated in the target direction from the overlapping region, wherein all the selected coordinate components constitute the cutting coordinate parameters of each grid sub-image, and satisfy that any two adjacent grid sub-images have the same boundary.
[0028] With reference to the first aspect of the present application, in an optional implementation, the method is applied to an FPGA chip or a CPLD chip or a high-speed ARM processor.
[0029] In a second aspect, the embodiments of the present application provide an image signal processing device, including:
[0030] a processor;
[0031] a memory for storing computer executable instructions;
[0032] the processor is configured to execute the computer executable instructions to implement the method according to any one of the first aspect.
[0033] In a third aspect, the embodiments of the present application provide an image acquisition system of a large-size display panel, including:
[0034] a display panel to be tested;
[0035] a plurality of cameras configured to capture different regions of the display panel to be tested;
[0036] An image signal processing device is electrically connected with the display panel under test and each camera, and is configured to implement the method according to any one of the first aspect.
[0037] In a fourth aspect, the embodiments of the present application provide a point screen testing system, comprising:
[0038] A host computer;
[0039] A display panel under test;
[0040] A plurality of cameras configured to capture different regions of the display panel under test;
[0041] An image signal processing device electrically connected with the host computer, the display panel under test and each camera, and configured to implement the method according to any one of the first aspect, and upload the complete image to the host computer after obtaining the complete image of the display panel under test.
[0042] The embodiments of the present application provide an image acquisition system and device for a large-size display panel. First, a checkerboard image is sent to the display panel under test, and the checkerboard image returned by the camera is analyzed to determine the overlapping region of two adjacent checkerboard images and the positions of the two cameras related to the overlapping region. Second, after determining the positions of all the cameras, a grid image is sent to the display panel under test, and the grid image returned by the camera is analyzed to determine the cutting coordinate parameters of each grid image, which are the coordinate boundaries. Finally, the image captured by the camera can be effectively cut according to the coordinate boundaries of each grid image, and the cut image is the effective image captured by the corresponding camera. The complete image of the display panel under test can be directly spliced from the effective images of the plurality of cameras. The technical solution of the embodiments of the present application first accurately locates the relative positions and overlapping regions of the cameras by using the high-contrast feature of the checkerboard, and provides a stable basis for calculating the cutting coordinate data of each camera corresponding to the subsequent grid image, thereby avoiding the missing of the spliced image due to the deviation of the camera position. Thus, even if a common high-definition camera without image processing and cutting functions is used, the automatic point screen testing requirement for the large-size display panel can also be met, the configuration requirement for the high-definition camera is reduced, and the production cost is saved.
[0043] Additional aspects and advantages of the present application will be made apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS
[0044] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:
[0045] Figure 1 A flowchart illustrating the image acquisition method for a large-size display panel provided in an embodiment of this application;
[0046] Figure 2 This is the first schematic diagram of a chessboard pattern;
[0047] Figure 3 This is a second schematic diagram of a chessboard pattern;
[0048] Figure 4 This is a schematic diagram of the checkerboard image on the reference pixel coordinate axis;
[0049] Figure 5 This is a schematic diagram of a grid image;
[0050] Figure 6 A schematic diagram showing the distribution of the four overlapping regions in the reference pixel coordinate system and the distribution of the effective cropping region;
[0051] Figure 7 A structural block diagram of an image acquisition system for a large-size display panel provided in an embodiment of this application;
[0052] Figure 8 This is a structural block diagram of the screen testing system provided in the embodiments of this application;
[0053] Figure 9 This is a structural block diagram of the image signal processing apparatus provided in the embodiments of this application. Detailed Implementation
[0054] To make the technical solution and beneficial effects of the present invention more apparent and understandable, a detailed description is provided below by listing specific embodiments. The accompanying drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application pertains.
[0055] The image acquisition method for a large-size display panel provided in this application embodiment can be specifically applied in an image signal processing device. This device can be an image generator or similar equipment. The image generator includes a processing chip that implements the method. The processing chip can be an FPGA (Field-Programmable Gate Array) chip, a CPLD (Complex Programmable Logic Device) chip, or a high-speed ARM processor. In this embodiment, the processing chip is specifically an FPGA chip.
[0056] As Figure 1 shown, the embodiment of the present application provides an image acquisition method of a large-size display panel, applied to an image generator, mainly comprising steps S101-S106.
[0057] Step S101: a checkerboard image is sent to a display panel to be tested, so that the display panel to be tested displays the checkerboard image on the full screen, wherein the checkerboard image is preset according to a plurality of cameras and pixel information of the display panel to be tested, and the plurality of cameras are used to capture different regions of the display panel to be tested.
[0058] The image generator generates checkerboard image data, and the checkerboard image can contain a single group or multiple groups of checkerboards. If the number of cameras is two or four, the checkerboard image can be referred to as a single group of checkerboards, for example, black and white grids, as Figure 2 shown. If the number of cameras is three or nine, the checkerboard image can be a multiple group of checkerboards, for example, a combination of black and white grids and red and green grids, and the main checkerboard image in the capture range of each camera is of the same group of checkerboards, and the main checkerboard image of two adjacent cameras is of different groups of checkerboards, and the colors of different groups are different, as Figure 3 shown. For the checkerboard image corresponding to 3*3 cameras, the present embodiment uses the high-contrast feature of the checkerboard square to quickly locate to the reference vertex. Taking the pixel resolution of the display panel to be tested as 1920*1080 for example, the length of each square in the checkerboard image is 20 pixel points, which ensures that the square boundary is clear and identifiable.
[0059] Taking a display panel of large size tested by four cameras as an example, taking the pixel resolution of the display panel as 1920*1080 for example, the FPGA chip of the image generator outputs a black and white grid image with a square length of 20 pixel points to the display panel, and performs full-screen display on the screen of the display panel. The black and white colors in the checkerboard image have very high contrast, and after the black and white grid image is collected by the camera, the FPGA chip can identify the boundary features of the black and white grid in the black and white grid image. As Figure 4 shown, a reference pixel coordinate system is established on the screen of the display panel, the coordinates of the lower left vertex of the screen in the reference pixel coordinate system are defined as (1, 1), and the positive direction of the X axis is from left to right, and the positive direction of the Y axis is from bottom to top. Therefore, there are four reference vertices on the checkerboard image, and the coordinates of the four reference vertices in the reference pixel coordinate system are the lower left vertex A (1, 1), the upper left vertex B (1, 1080), the upper right vertex C (1920, 1080), and the lower right vertex D (1920, 1).
[0060] Step S102: acquire the checkerboard sub-image collected by each of the plurality of cameras, and the checkerboard sub-image has at least one first reference vertex.
[0061] Generally, the cameras a, b, c and d capture the lower left, lower right, upper right and upper left four areas of the display panel to be tested, in order to facilitate the accuracy of subsequent image cutting, the cameras a, b, c and d capture the display panel to be tested, and the images obtained by the cameras a, b, c and d need to contain the reference vertices A, B, C and D, otherwise, the position of the camera needs to be adjusted so that the camera can capture the corresponding reference vertex. Then, in step S102, the checkerboard images collected by the cameras a, b, c and d are obtained, and the four checkerboard images have the first reference vertices A1, B1, C1 and D1 in sequence, and the coordinates of the first reference vertices A1, B1, C1 and D1 are (1, 1), (1920, 1), (1920, 1080) and (1, 1080) in sequence.
[0062] Step S103: Based on the coordinates of the first reference vertices on each checkerboard image in the preset reference pixel coordinate system, the overlapping area in the adjacent two checkerboard images is calculated, and the positions of the two cameras associated with the overlapping area are determined when the set condition is met.
[0063] In some embodiments, in step S103, based on the coordinates of the first reference vertices on each checkerboard image in the preset reference pixel coordinate system, the overlapping area in the adjacent two checkerboard images can include: traversing the obtained checkerboard images to determine the number of rows and columns of the different color squares in the checkerboard images; determining the relative positions of the cameras in the reference pixel coordinate system according to the number of rows and columns of the different color squares, the starting pixel points and the coordinates of the first reference vertices in the reference pixel coordinate system in each checkerboard image; and calculating the pixel width of the overlapping area in the checkerboard images collected by the adjacent two cameras. In this embodiment, the FPGA chip can traverse the black and white grid images returned by the cameras a, b, c and d to determine the number of rows and columns of the squares and the starting pixel points in each black and white grid image. Then, based on the four starting pixel points and the corresponding number of rows and columns of the squares, the four starting pixel points are mapped to the corresponding first reference vertices A1, B1, C1 and D1, and the relative positions of the cameras a, b, c and d in the reference pixel coordinate system are determined, so that the FPGA chip determines the corresponding left lower, right lower, right upper and upper left four areas of the cameras a, b, c and d. After the FPGA chip determines the relative positions of the cameras, the pixel width of the overlapping area of the black and white squares in the black and white grid images collected by the two adjacent cameras can be calculated, wherein the part that appears in the two adjacent black and white grid images at the same time is the overlapping area.
[0064] Taking the pixel width of the overlapping area calculated from the black-and-white grid images captured by the lower-left camera a and the lower-right camera b as an example, the number of pixel points of the lower-left image on the X-axis in the reference pixel coordinate system is identified from left to right as L1, the number of pixel points of the lower-right image on the X-axis is identified from right to left as L2, and the number of pixel points of the first reference vertex A1 (1, 1) to the first reference vertex B1 (1920, 1) on the X-axis is known as 1920, so the pixel width of the overlapping area can be calculated as L1+L2-1920.
[0065] In some embodiments, in step S103, the position of the two cameras associated with the overlapping area is determined according to the overlapping area satisfying a set condition, which can include: if the pixel width of the overlapping area exceeds a preset pixel threshold, the relative position of the two adjacent cameras associated with the overlapping area in the reference pixel coordinate system is determined, wherein the preset pixel threshold is determined according to the grid line spacing of the grid image.
[0066] In this embodiment, the FPGA chip can accurately calculate the pixel width value of the overlapping area of the adjacent cameras. In order to meet the error compensation requirement of subsequent grid image cutting, the pixel width of the overlapping area should be greater than the interval of the adjacent two lines of the grid image, wherein the interval length of the adjacent two lines of the grid image in step S104 is 10 pixel points, so the preset pixel threshold can be set to 10. Therefore, the set condition can be simply expressed as "the pixel width of the overlapping area exceeds the preset pixel threshold", which is essentially to meet the error compensation requirement of subsequent grid image cutting.
[0067] When it is calculated that the pixel width of the overlapping area of the black-and-white grid images captured by the lower-left camera a and the lower-right camera b is greater than 10 pixel points, the relative position of the lower-left camera a and the lower-right camera b can meet the error compensation requirement of subsequent grid image cutting.
[0068] In some embodiments, the method can further include adjusting the position of the two adjacent cameras associated with the overlapping area until the overlapping area satisfies the set condition if the pixel width of the overlapping area is below the preset pixel threshold. When it is calculated that the pixel width of the overlapping area of the black-and-white grid images captured by the lower-left camera a and the lower-right camera b is below 10 pixel points, the grid sub-image captured by the lower-left camera a and the lower-right camera b does not meet the error compensation requirement of cutting, so the position of the lower-left camera a and the lower-right camera b needs to be adjusted until the pixel width of the overlapping area of the images captured by the lower-left camera a and the lower-right camera b is greater than 10. If the pixel width of the overlapping area is below 10 pixel points, the system will automatically adjust the position of the corresponding camera to lay a foundation for the integrity of subsequent image stitching. The system adjusts the position of the camera, which is known to those skilled in the art, so it will not be described in detail.
[0069] Step S104: After determining all camera positions, send a grid image to the display panel to be tested to make the display panel to be tested display the grid image full screen.
[0070] When the FPGA chip determines the relative positions of the lower-left camera a, the lower-right camera b, the upper-right camera c, and the upper-left camera d in the reference pixel coordinate system, the FPGA chip switches the output image, i.e., sends a grid image to the display panel to be tested. The grid image is formed by lines intersecting vertically and horizontally, and the grid lines of the grid image are spaced by 10 pixel points, and the line width of each grid line is 1 pixel point. For convenience of calculation, as shown in FIG. 2, the coordinate component of the first vertical line x1 from left to right on the grid sub-image collected by the lower-left camera a on the X axis in the reference pixel coordinate system is 10, and the coordinate component of the second vertical line x2 on the X axis is 20, and the horizontal line is the same. Figure 5
[0071] Step S105: After obtaining the grid sub-images collected by the plurality of cameras, calculate the coordinates of the grid lines of all the grid sub-images, and determine the cutting coordinate parameters of each grid sub-image.
[0072] In step S105, calculating the coordinates of the grid lines of all the grid sub-images and determining the cutting coordinate parameters of each grid sub-image can include: determining the coordinates of a second reference vertex on the grid sub-image in the reference pixel coordinate system, the coordinates of the second reference vertex in the reference pixel coordinate system being the same as those of the corresponding first reference vertex; calculating the coordinates of a diagonal vertex opposite to the second reference vertex in the reference pixel coordinate system, the diagonal vertex being formed by the intersection of the grid horizontal line and the grid vertical line farthest from the second reference vertex on the grid sub-image; determining the cutting coordinate components of two adjacent grid sub-images in the corresponding direction along the pixel width direction of the overlapping area to obtain the cutting coordinate parameters of the grid sub-image; further, determining the cutting coordinate components of two adjacent grid sub-images in the corresponding direction can include: selecting the coordinate components of the diagonal vertex associated in the target direction from the overlapping area, wherein all the selected coordinate components constitute the cutting coordinate parameters of each grid sub-image, and satisfy that any two adjacent grid sub-images have the same boundary.
[0073] In this embodiment, the grid sub-images collected by the lower-left camera a, the lower-right camera b, the upper-right camera c, and the upper-left camera d are obtained, and the four grid sub-images sequentially have second reference vertices A2, B2, C2, and D2, and the coordinates of the second reference vertices A2, B2, C2, and D2 are (1, 1), (1920, 1), (1920, 1080), and (1, 1080) respectively. Each grid sub-image is traversed to count the number of vertical lines and the number of horizontal lines in each grid sub-image, for example, the grid sub-image collected by the lower-left camera a has i a vertical lines and j a Therefore, the coordinates of the diagonal vertex opposite the second reference vertex A2 (1, 1) in the reference pixel coordinate system are (10·i). a ,10·j a The coordinates of the diagonal vertex are denoted as (X). a Y a The grid sub-image captured by camera b in the lower right corner contains vertical lines i. b Strip, horizontal line j b Therefore, the coordinates of the diagonal vertex opposite the second reference vertex B2 (1920, 1) in the reference pixel coordinate system are (1920 - 10·(i b -1), 10·j b The coordinates of the diagonal vertex are denoted as (X). b Y b The grid sub-image captured by the upper right camera (c) contains vertical white lines (i). c Strip, horizontal white line j c Therefore, the coordinates of the diagonal vertex opposite the second reference vertex C2 (1920, 1080) in the reference pixel coordinate system are (1920 - 1080) / (i...). c -1), 1080 -10·(j c -1), the coordinates of the diagonal vertex are (X) c Y c The grid sub-image captured by the upper left camera d contains vertical white lines i. d Strip, horizontal white line j d Therefore, the coordinates of the diagonal vertex opposite the second reference vertex D2 (1, 1080) in the reference pixel coordinate system are (10·i) d ,1080 -10·(j d -1), the coordinates of the diagonal vertex are (X) d Y d ).
[0074] Considering that the pixel width of the overlapping region corresponding to two adjacent cameras is greater than 10 pixels, then X a >X b X d >X c X a and X d The size is determined based on the actual value, Y a >Y d Y b >Y c You can first take one pixel on the X-axis as the clipping information, and then take two pixels on the Y-axis as the clipping information. Specifically, for example... Figure 6 As shown, assume Xd X a In order to avoid image missing in subsequent cutting, x=X a is taken as the vertical cutting line of the four grid sub-images, that is, the smaller value of X a and X d is taken, if the larger value X d is taken, the image collected by the camera a will have missing, and subsequent splicing cannot be performed; then, y=Y a is taken as the horizontal cutting line of the grid sub-images of the camera a and the camera d, y=Y b is taken as the horizontal cutting line of the grid sub-images of the camera b and the camera c, based on this, the clipping effective area of the lower left grid sub-image is (1, 1) to (X a , Y a ), the clipping effective area of the lower right grid sub-image is (X a , 1) to (1920, Y b ), the clipping effective area of the upper right grid sub-image is (X a , Y b ) to (1920, 1080), and the clipping effective area of the upper left grid sub-image is (1, Y a ) to (X a , 1080).
[0075] Step S106: cutting the images captured by the corresponding cameras according to the cutting coordinate parameters of the grid sub-images.
[0076] In step S106, the cutting coordinate parameters of the lower left, lower right, upper right and upper left four regions are (1, 1) to (X a , Y a ), (X a , 1) to (1920, Y b ), (X a , Y b ) to (1920, 1080), and (1, Y a ) to (X a , 1080), respectively, and the cutting coordinate parameters of the four regions correspond to the lower left camera a, the lower right camera b, the upper right camera c and the upper left camera d, so that for the same display panel, the image clipping module in the FPGA chip can cut the images collected by the four cameras according to the cutting coordinate parameters of the four cameras, and four effective images are obtained.
[0077] In some embodiments, the FPGA chip can also integrate an image splicing function, based on which, the image splicing function can also include: splicing the cut images to obtain a complete image displayed by the display panel under test. In this embodiment, after the image cutting is completed, the FPGA chip splices the effective images of the four regions to form a complete image consistent with the display panel under test, and finally, the complete image is returned to the host computer for subsequent screen defect detection and analysis.
[0078] As shown in Figure 7 The embodiment of the present application also provides an image acquisition system of a large-size display panel, which comprises a display panel under test 701, an image signal processing device 703 and a plurality of cameras 702; the plurality of cameras 702 are used for photographing different regions of the display panel under test 701; the image signal processing device 703 is electrically connected with the display panel under test 701 and each camera 702, and is used for sending a checkerboard image to the display panel under test 701 to make the display panel under test 701 display the checkerboard image on the full screen, wherein the checkerboard image is preset according to pixel information of the plurality of cameras 702 and the display panel under test 701; a plurality of checkerboard images collected by the plurality of cameras 702 are acquired, and each checkerboard image has at least one first reference vertex; based on the coordinates of the first reference vertex on each checkerboard image in a preset reference pixel coordinate system, an overlapping region in two adjacent checkerboard images is calculated, and the positions of two cameras 702 associated with the overlapping region are determined when the overlapping region meets a preset condition; after the positions of all the cameras 702 are determined, a grid image is sent to the display panel under test 701 to make the display panel under test 701 display the grid image on the full screen; after the grid images collected by the plurality of cameras 702 are acquired, the coordinates of grid lines of all the grid images are calculated, and the cutting coordinate parameters of each grid image are determined; and the image photographed by the corresponding camera 702 is cut according to the cutting coordinate parameters of each grid image.
[0079] Further, the image signal processing device 703 is also used for splicing the cut images to obtain a complete image displayed by the display panel under test 701, so as to send the complete image to the host computer.
[0080] In the image signal processing device 703, based on the coordinates of the first reference vertex on each checkerboard image in a preset reference pixel coordinate system, the overlapping region in two adjacent checkerboard images is calculated, which comprises: traversing the acquired checkerboard images to determine the row and column numbers of the squares of different colors in the checkerboard images; determining the relative positions of the plurality of cameras 702 in the reference pixel coordinate system according to the row and column numbers of the squares of different colors in each checkerboard image, the starting pixel point and the coordinates of the first reference vertex in the reference pixel coordinate system; and calculating the pixel width of the overlapping region in the checkerboard images collected by two adjacent cameras 702.
[0081] In the image signal processing apparatus 703, the determining the position of the two adjacent cameras 702 associated with the overlapping area when the overlapping area meets the set condition can include: if the pixel width of the overlapping area exceeds a preset pixel threshold, determining the relative position of the two adjacent cameras 702 associated with the overlapping area in the reference pixel coordinate system, wherein the preset pixel threshold is determined according to the grid line spacing of the grid image.
[0082] In addition, the image signal processing apparatus 703 is further configured to: if the pixel width of the overlapping area is below the preset pixel threshold, adjusting the position of the two adjacent cameras 702 associated with the overlapping area until the overlapping area meets the set condition.
[0083] In the image signal processing apparatus 703, the calculating the coordinates of the grid lines of all grid sub-images and determining the cropping coordinate parameters of each grid sub-image can include: determining the coordinates of a second reference vertex on the grid sub-image in the reference pixel coordinate system, the coordinates of the second reference vertex in the reference pixel coordinate system being the same as the coordinates of the corresponding first reference vertex; calculating the coordinates of a diagonal vertex opposite to the second reference vertex in the reference pixel coordinate system, the diagonal vertex being formed by the intersection of the grid horizontal line and the grid vertical line farthest from the second reference vertex on the grid sub-image; and determining the cropping coordinate components of the two adjacent grid sub-images in the corresponding direction along the pixel width direction of the overlapping area to obtain the cropping coordinate parameters of the grid sub-image. Wherein, the determining the cropping coordinate components of the two adjacent grid sub-images in the corresponding direction can include: selecting the coordinate components of the diagonal vertex associated with the target direction from the overlapping area, wherein all the selected coordinate components constitute the cropping coordinate parameters of each grid sub-image, and satisfy that any two adjacent grid sub-images have the same boundary.
[0084] As shown in Figure 8 , the embodiment of the present application further provides a point screen test system, which comprises a host computer 704, a display panel to be tested 701, an image signal processing apparatus 703 and a plurality of cameras 702; the plurality of cameras 702 are configured to capture different areas of the display panel to be tested 701; the image signal processing apparatus 703 is electrically connected with the host computer 704, the display panel to be tested 701 and each camera 702, and is configured to upload the complete image to the host computer 704 after obtaining the complete image of the display panel to be tested 701, and the functions and effects of the image signal processing apparatus 703 are achieved in the implementation process of the corresponding steps of the above method, which will not be described in detail here.
[0085] As shown in Figure 9As shown, the embodiment of the present application further provides an image signal processing apparatus 703. The image signal processing apparatus 703 comprises one or more processors 901 and a memory 902; the memory 902 stores computer executable instructions; and the processor 901 is configured to execute the computer executable instructions to implement the steps in the method of any of the above embodiments.
[0086] The image signal processing apparatus 703 can be an image generator.
[0087] The processor 901 can be a central processing unit (CPU) or other form of processing unit having data processing and / or instruction executing capabilities, and can control other components in the electronic device to perform desired functions.
[0088] The memory 902 can comprise one or more computer program products, which can comprise various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory can comprise, for example, random access memory (RAM), cache memory, and / or the like. The non-volatile memory can comprise, for example, read-only memory (ROM), hard disk, flash memory, and / or the like. The computer-readable storage media can store one or more computer program instructions, which the processor 901 can execute to implement the steps in the text recognition method of the embodiments of the present application described above and / or other desired functions.
[0089] In one example, the image signal processing apparatus 703 can further comprise an input apparatus and an output apparatus, which are interconnected through a bus system and / or other forms of connection mechanism (not shown in the figure).
[0090] In addition, the input apparatus can further comprise, for example, a keyboard, a mouse, a microphone, and / or the like. The output apparatus can output various information to the outside, which can comprise, for example, a display, a speaker, a printer, a communication network and the remote output device connected thereto, and / or the like.
[0091] Of course, in order to simplify, Figure 9 In the figure, only a part of the components in the image signal processing apparatus 703 related to the present application are shown, and components such as buses, input / output interfaces, and the like are omitted. In addition to this, the image signal processing apparatus 703 can further comprise any other appropriate components according to specific application cases.
[0092] The embodiment of the present application further provides a computer readable storage medium. The computer readable storage medium stores instructions, which, when executed by a processor of an electronic device, enable the electronic device to perform the steps in the method of any of the above embodiments.
[0093] The embodiments of method, apparatus and computer program product described herein can be part of a system, method and / or computer program product. The computer program product can include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present application. The computer program product can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++, or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device or entirely on the remote computing device or server. In the latter scenario, the remote computing device can be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computing device, such as through the Internet using an Internet Service Provider. In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present application.
[0094] The computer readable storage medium can be a combination of one or more computer readable media. The computer readable storage medium can be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium is a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium can include, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium include the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or punched tape, a
[0095] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.
[0096] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.
[0097] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.
[0098] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.
[0099] It should be noted that the method embodiments, apparatus embodiments, system embodiments and computer readable storage medium embodiments provided by the present application belong to the same concept; the technical features in the technical solutions recorded by each embodiment can be combined arbitrarily without conflict.
[0100] It should be understood that the above examples are exemplary and are not intended to limit the scope of the claims encompassing all possible embodiments. Various modifications and changes can also be made on the basis of the above examples without departing from the scope of the present disclosure. Similarly, various technical features of the above examples can be combined arbitrarily to form additional embodiments of the present application that can not be explicitly described. Therefore, the above examples merely express several embodiments of the present application and do not limit the scope of the patent protection of the present application.
Claims
1. An image acquisition method for a large-size display panel, characterized by, The method comprises the following steps: sending a checkerboard image to a display panel to be tested, so that the display panel to be tested displays the checkerboard image on the full screen, wherein the checkerboard image is preset according to a plurality of cameras and pixel information of the display panel to be tested, and the plurality of cameras are used to capture different regions of the display panel to be tested; acquiring a plurality of checkerboard images captured by the plurality of cameras respectively, wherein each of the checkerboard images has at least one first reference vertex; based on the coordinates of the first reference vertex on each of the checkerboard images in a preset reference pixel coordinate system, calculating an overlapping region in two adjacent checkerboard images, and determining the positions of two cameras associated with the overlapping region when the overlapping region meets a preset condition; after determining the positions of all the cameras, sending a grid image to the display panel to be tested, so that the display panel to be tested displays the grid image on the full screen; after acquiring a plurality of grid images captured by the plurality of cameras, calculating the coordinates of grid lines of all the grid images, and determining cutting coordinate parameters of each of the grid images; cutting the images captured by the corresponding cameras according to the cutting coordinate parameters of each of the grid images. The method further comprises the following steps: splicing the cut images to obtain a complete image displayed by the display panel to be tested. The method further comprises the following steps: iterating through the acquired checkerboard images to determine the number of rows and columns of the squares of different colors in the checkerboard images; 2. The method of claim 1, wherein, determining the relative positions of the cameras in the reference pixel coordinate system according to the number of rows and columns of the squares of different colors in each of the checkerboard images, the starting pixel point, and the coordinates of the first reference vertex in the reference pixel coordinate system; calculating the pixel width of the overlapping region in the checkerboard images captured by two adjacent cameras respectively.
3. The method of claim 1, wherein, The method further comprises the following steps: if the pixel width of the overlapping region exceeds a preset pixel threshold, determining the relative positions of the two adjacent cameras associated with the overlapping region in the reference pixel coordinate system, wherein the preset pixel threshold is determined according to the grid line spacing of the grid image. 4. The method according to claim 1 or 3, characterized in that, 5. The method of claim 4, wherein, Also included are: If the pixel width of the overlapping region is below the preset pixel threshold, adjusting the positions of the two adjacent cameras associated with the overlapping region until the overlapping region meets the set condition.
6. The method of claim 1, wherein, The determination of the cutting coordinate components of two adjacent grid sub-images in the corresponding direction includes: Selecting the coordinate components of the diagonal top vertices associated with the overlapping region in the target direction, wherein all the selected coordinate components constitute the cutting coordinate parameters of each grid sub-image, and satisfy that any two adjacent grid sub-images have the same boundary.
7. An image signal processing apparatus characterized by comprising: Comprise: A processor; A memory for storing computer executable instructions; The processor is configured to execute the computer executable instructions to implement the method of any one of claims 1 to 6.
8. An image acquisition system for a large size display panel, characterized by, Comprise: A display panel to be tested; A plurality of cameras for capturing different regions of the display panel to be tested; An image signal processing device electrically connected with the display panel to be tested and each of the cameras, and configured to implement the method of any one of claims 1 to 6.
9. A point screen testing system characterized by, Comprise: A host computer; A display panel to be tested; A plurality of cameras for capturing different regions of the display panel to be tested; An image signal processing device electrically connected with the host computer, the display panel to be tested and each of the cameras; the image signal processing device is configured to implement the method of any one of claims 1 to 6, and upload a complete image of the display panel to be tested to the host computer after obtaining the complete image.
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