Decoding method and device, electronic equipment and storage medium

Abstract

The application relates to the technical field of decoding, and provides a decoding method, a decoding device, electronic equipment and a storage medium, wherein the method comprises the following steps: determining an error pattern of each check equation in a check equation set based on a hard decision result, determining the modulus of a bit position in a received sequence, determining a bit flip sequence corresponding to the received sequence based on the modulus of the bit position and the error pattern, determining an original code word estimation based on the bit flip sequence and the hard decision result, and determining whether the original code word estimation satisfies all check equations in the check equation set. In the method, the modulus of the bit position provides reliability information of each bit position, and the error pattern is used for reflecting the inconsistency between the received sequence and a check matrix, so that the decoding algorithm can correct errors in a targeted manner; in the decoding process, decoding based on the two can more accurately reflect the degree of influence of each information on noise, thereby reducing the bit error rate of the final decoding result and guaranteeing the accuracy and integrity of communication data.

Description

Technical Field

[0001] This invention relates to the field of decoding technology, and more particularly to a decoding method, apparatus, electronic device, and storage medium. Background Technology

[0002] With the rapid development of satellite communication technology, spectrum resources are becoming increasingly scarce, and the traditional fixed allocation model of licensed spectrum can no longer meet diverse communication needs. Unlicensed spectrum sharing access technology, due to its flexibility and low cost, has gradually become a research hotspot in the field of wireless communication.

[0003] However, the utilization of unlicensed spectrum in satellite communication scenarios still faces significant challenges. Communication channels are often subject to various noise interferences, with random additive noise such as Gaussian noise being prevalent and greatly affecting the reliability of signal transmission. Low-Density Parity-Check (LDPC) codes, as a high-performance error correction coding technique, are widely used in many communication systems, but their decoding process faces numerous challenges. Traditional LDPC decoding algorithms, such as the basic Belief Propagation algorithm and its variants, have limitations in dealing with random additive noise. On the one hand, the presence of loops in the actual Tanner graph structure makes iterative message passing prone to getting stuck in loops, affecting decoding accuracy; on the other hand, they are difficult to effectively adapt to randomly changing noise characteristics. Guess Random Additive Noise (GRAND) decoding is a recently proposed decoding algorithm that is theoretically applicable to all short, medium, and long codewords, suitable for low-latency, high-reliability communication scenarios. A variant of the GRAND algorithm—Ordered Reliability Bits Guessing Random Additive Noise Decoding (ORBGRAND)—converts soft information representing reliability into ordered integers. This retains the hardware-friendly advantage of the hard-detection GRAND algorithm while narrowing the error rate gap with the GRAND algorithm, which fully utilizes soft information. Weighted Bit-Flipping (WBF) is an algorithm that performs decoding by flipping bits based on the reliability of the received signal; however, the decoding performance of a simple WBF algorithm remains insufficient. Summary of the Invention

[0004] This invention provides a decoding method, apparatus, electronic device, and storage medium to address the shortcomings of existing technologies in unlicensed satellite covert communication environments, where LDPC code decoding is difficult and inaccurate due to random additive noise interference.

[0005] This invention provides a decoding method, comprising the following steps:

[0006] Obtain the received sequence and the set of check equations, and determine the error pattern of each check equation in the set of check equations based on the hard decision result;

[0007] Determine the modulus of the bits in the received sequence, and based on the modulus of the bits and the error pattern, determine the bit flip sequence corresponding to the received sequence;

[0008] Based on the bit-flipping sequence and the hard decision result, the original codeword estimate is determined, and it is determined whether the original codeword estimate satisfies all the check equations in the set of check equations;

[0009] If all the original codeword estimates satisfy all the check equations, the decoding is successful, the decoding result is output, and the iteration stops. If the original codeword estimates do not satisfy all the check equations, but the preset maximum number of iterations has been reached, the iteration stops, and the current decoding result is output. If the original codeword estimates do not satisfy all the check equations and the maximum number of iterations has not been reached, the process returns to the step of determining whether the original codeword estimates satisfy all the check equations in the check equation set, until the original codeword estimates satisfy all the check equations or the maximum number of iterations has been reached.

[0010] According to a decoding method provided by the present invention, determining the original codeword estimate based on the bit-flipping sequence and the hard decision result includes:

[0011] Based on the bit-flipping sequence, the hard decision results are reordered to obtain a hard decision sequence;

[0012] The original codeword estimate is determined based on the error pattern and the hard decision sequence.

[0013] According to a decoding method provided by the present invention, determining the original codeword estimate based on the error pattern and the hard decision sequence includes:

[0014] Based on the error pattern and the hard decision sequence, codeword estimation is determined;

[0015] Based on the codeword estimation, the original codeword estimation is determined.

[0016] According to a decoding method provided by the present invention, determining codeword estimation based on the error mode and the hard decision sequence includes:

[0017] Based on the code length, determine the maximum Hamming weight and the maximum logical weight;

[0018] The initial list is empty. Based on the maximum Hamming weight and the maximum logical weight, the Landslide algorithm is used to generate error patterns with increasing logical weight. The generated error patterns are stored in the list in sequence until the list contains a preset number of error patterns.

[0019] Starting with the first error pattern in the list, the step of determining the codeword estimate based on the first error pattern and the hard decision sequence is performed until all error patterns in the list have been processed.

[0020] According to a decoding method provided by the present invention, determining whether the original codeword estimate satisfies all the check equations in the set of check equations includes:

[0021] The original codeword estimate is multiplied by the parity check matrix to obtain the syndrome vector, and it is determined whether the syndrome vector satisfies all the parity check equations in the set of parity check equations;

[0022] The check matrix is ​​determined based on the code length and the check bits, and the check bits are determined based on the code length and the information bits.

[0023] According to a decoding method provided by the present invention, determining the bit-flipping sequence corresponding to the received sequence based on the modulus of the bit and the error pattern includes:

[0024] The bit-flipping sequence corresponding to the received sequence is determined based on the following formula:

[0025] ;

[0026] ;

[0027] in, This represents the bit-flipped sequence corresponding to the received sequence. Indicates an incorrect pattern. The modulus of a bit. , Indicates except the first The minimum value among the modulo values ​​of the remaining check nodes besides the check node. Indicates participation in the A set of bits for each check equation.

[0028] The present invention also provides a decoding device, comprising the following units:

[0029] The acquisition unit is used to acquire the received sequence and the set of check equations, and determine the error pattern of each check equation in the set of check equations based on the hard decision result;

[0030] The first determining unit is used to determine the modulus of the bits in the received sequence, and to determine the bit flip sequence corresponding to the received sequence based on the modulus of the bits and the error pattern.

[0031] The second determining unit is used to determine the original codeword estimate based on the bit flip sequence and the hard decision result, and to determine whether the original codeword estimate satisfies all the check equations in the check equation set.

[0032] An iterative unit is configured to: if all the original codeword estimates satisfy all the check equations, then the decoding is successful, the decoding result is output, and the iteration stops; if the original codeword estimates do not satisfy all the check equations, but the preset maximum number of iterations has been reached, then the iteration stops, and the current decoding result is output; if the original codeword estimates do not satisfy all the check equations and the maximum number of iterations has not been reached, then the unit returns to the step of determining whether the original codeword estimates satisfy all the check equations in the check equation set, until the original codeword estimates satisfy all the check equations or the maximum number of iterations has been reached.

[0033] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the decoding method described above.

[0034] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the decoding method as described above.

[0035] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the decoding method as described above.

[0036] The decoding method, apparatus, electronic device, and storage medium provided by this invention acquire a received sequence and a set of parity check equations. Based on the hard decision result, it determines the error pattern of each parity check equation in the set, then determines the modulus of the bits in the received sequence, and based on the bit modulus and error pattern, determines the bit flip sequence corresponding to the received sequence. Finally, based on the bit flip sequence and the hard decision result, it determines the original codeword estimate and whether the original codeword estimate satisfies all parity check equations in the set. In this method, the bit modulus provides reliability information for each bit, enabling the decoding algorithm to prioritize correcting the bits with the lowest reliability. The error pattern reflects the inconsistency between the received sequence and the parity check matrix, allowing the decoding algorithm to specifically correct errors. During the decoding process, determining the bit flip sequence corresponding to the received sequence based on the bit modulus and error pattern, and then determining the original codeword estimate based on the bit flip sequence and hard decision result, more accurately reflects the degree of noise influence on each piece of information, thereby reducing the bit error rate of the final decoding result and ensuring the accuracy and integrity of the communication data. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0038] Figure 1 This is a flowchart illustrating the decoding method provided by the present invention.

[0039] Figure 2 This is a schematic diagram of the decoding device provided by the present invention.

[0040] Figure 3 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0042] Figure 1 This is a flowchart illustrating the decoding method provided by the present invention, as shown below. Figure 1 As shown, the method includes steps 110, 120, 130 and 140.

[0043] Step 110: Obtain the received sequence and the set of check equations, and determine the error pattern of each check equation in the set of check equations based on the hard decision result.

[0044] Specifically, a set of received sequences and check equations can be obtained, wherein the received sequence can be represented as follows: In the AWGN (Additive White Gaussian Noise) channel, one of the bits... The reliability can be determined by its magnitude. The larger the modulus, the more reliable the hard decision result. Many decoding algorithms for linear block codes use this simple reliability metric. In this embodiment of the invention, we use a reliability metric that considers both the parity check and the bit's own information to determine the extent to which a bit should be flipped in order to rank the reliability of the ORBGRAND algorithm.

[0045] Assuming from the check matrix The defined LDPC code has a matrix of... The lines are respectively ,for ,definition

[0046] (1)

[0047] and

[0048] (2)

[0049] in, Indicates the first In the iteration, with the Received signal of minimum absolute value related to row check equation , Represents a cumulative reliability metric used to evaluate all bit positions. The reliability of the relevant check equations, i.e., the bit-flip sequence, Typically represented as a parity check matrix One of the elements indicates the relationship between the check equation (row) and the coded bits (column). Indicates the first The first verification equation depends on the first Each encoded feature.

[0050] in, It is actually an indicator function used to indicate the first... Does the verification equation involve the first...? One bit. Specifically:

[0051] It is a binary variable, when the first The verification equation involves the first... When there are bits, If not involved, then , It's about bits. A set of orthogonal verification equations.

[0052] A rule binary LDPC code Assume its parity-check matrix is Participating in the The set of bits for each parity check equation is denoted as Bit The set of participating verification equations is denoted as .

[0053] for calculate

[0054] (3)

[0055] in, This represents the minimum modulus value among all check nodes except the m-th node. Indicates participation in the A set of bits for each check equation.

[0056] Then, based on the hard decision results, the error pattern for each check equation in the check equation set is determined, as follows:

[0057] for and hard verdict Calculate the error pattern for each check equation. :

[0058] (4)

[0059] in, Represents the parity check matrix The Middle m Line 1 n Column elements, Indicates an incorrect pattern.

[0060] Step 120: Determine the modulus of the bits in the received sequence, and based on the modulus of the bits and the error pattern, determine the bit flip sequence corresponding to the received sequence.

[0061] Specifically, the modulus of the bits in the received sequence can be determined, and based on the modulus of the bits and the error pattern, the corresponding bit flip sequence of the received sequence can be determined, as follows:

[0062] for ,calculate

[0063] (5)

[0064] because If it comes from the checksum relationship, then it is based on the checksum information, while the information comes from the bits themselves. The information is If we consider both the information from the check relation and the bit itself, equation (5) can be rewritten as:

[0065] (6)

[0066] In equation (6), the first part comes from the verification relationship. Indicates an incorrect pattern. Indicates except the first m The minimum value among the moduli of the remaining check nodes excluding the check node; the latter part comes from the bits. itself, Indicates the bits in the received sequence The model, This indicates the extent to which a bit should be flipped after comprehensively considering information from the check relation and the bit itself. This represents the bit flip sequence corresponding to the received sequence.

[0067] Obviously, for codes with different column weights or different signal-to-noise ratios, The weights are different. If this is taken into account, equation (6) can be further written as:

[0068] (7)

[0069] in, This represents the bit-flipped sequence corresponding to the received sequence. Indicates an incorrect pattern. The modulus of a bit. , Indicates except the first The minimum value among the moduli of the remaining verification nodes excluding the node itself, the weight factor. It is a real number, and For a specific LDPC code, at a given signal-to-noise ratio, the optimal weighting factor minimizes decoding errors. The value is generally obtained through simulation.

[0070] It should be noted that the bit-flipping sequence in formula (7) comprehensively considers the message passing relationship between the verification node and the variable node, and can more accurately reflect the degree of noise influence on each piece of information. Subsequently, according to the reliability order of this metric, noise is subtracted from the demodulated hard decision sequence, and the corresponding original codeword estimate is queried to see if it belongs to the codebook. The query is performed in this reliability order, and the first codeword estimate that belongs to the codebook is considered to be the correct codeword.

[0071] Step 130: Based on the bit-flipping sequence and the hard decision result, determine the original codeword estimate, and determine whether the original codeword estimate satisfies all the check equations in the check equation set.

[0072] Specifically, the original codeword estimate is determined based on the bit-flipping sequence and the hard decision result. For example, the hard decision result can be reordered based on the bit-flipping sequence to obtain the hard decision sequence, and then the original codeword estimate is determined based on the error pattern and the hard decision sequence.

[0073] Furthermore, it is determined whether the original codeword estimate satisfies all the check equations in the check equation set.

[0074] Step 140: If all the original codeword estimates satisfy all the check equations, then the decoding is successful, the decoding result is output and the iteration stops. If the original codeword estimates do not satisfy all the check equations, but the preset maximum number of iterations has been reached, then the iteration stops and the current decoding result is output. If the original codeword estimates do not satisfy all the check equations and have not reached the maximum number of iterations, then return to the step of determining whether the original codeword estimates satisfy all the check equations in the check equation set, until the original codeword estimates satisfy all the check equations or the maximum number of iterations has been reached.

[0075] Specifically, if the original codeword is estimated If all check equations are satisfied, then decoding is successful. Output the decoding result and stop iterating. If the original codeword is estimated... Not all verification equations were satisfied, but the preset maximum number of iterations has been reached. If the original codeword is estimated to be zero, then stop the iteration and output the current decoding result; if the original codeword is estimated to be zero, then stop the iteration and output the current decoding result. Not all verification equations were satisfied and the maximum number of iterations was not reached. Then return to the step of determining whether the original codeword estimate satisfies all the check equations in the check equation set, until the original codeword estimate satisfies all the check equations or the maximum number of iterations is reached. The steps for determining whether the original codeword estimate satisfies all check equations in the check equation set are as follows: retrieve the next error mode sequentially from the error mode list, re-add the next error mode to the hard decision sequence, obtain a new codeword estimate, and query until the first codeword estimate that satisfies all check equations is found.

[0076] Here, the determination of whether the original codeword estimate satisfies all check equations is based on the original codeword estimate. With check matrix The syndrome vector is determined by multiplying the transposes of the original codewords. If all elements in the syndrome vector are zero, it means that the original codeword estimate satisfies all check equations, and the decoding is successful. If there are non-zero elements in the syndrome vector, it means that the original codeword estimate does not satisfy some check equations, and iterative decoding is required.

[0077] Among them, the verification matrix Based on code length And check bits It is confirmed that the check bit is based on the code length and the information bits. Determined, including the check bit. .

[0078] The method provided in this invention obtains a received sequence and a set of parity check equations. Based on the hard decision result, it determines the error pattern of each parity check equation in the set. Then, it determines the modulus of the bits in the received sequence and, based on the bit modulus and the error pattern, determines the bit-flip sequence corresponding to the received sequence. Finally, based on the bit-flip sequence and the hard decision result, it determines the original codeword estimate and whether the original codeword estimate satisfies all parity check equations in the set. In this method, the bit modulus provides reliability information for each bit, enabling the decoding algorithm to prioritize correcting the bits with the lowest reliability. The error pattern reflects the inconsistency between the received sequence and the parity check matrix, allowing the decoding algorithm to specifically correct errors. During the decoding process, determining the bit-flip sequence corresponding to the received sequence based on the bit modulus and the error pattern, and then determining the original codeword estimate based on the bit-flip sequence and the hard decision result, more accurately reflects the degree of noise influence on each piece of information, thereby reducing the bit error rate of the final decoding result and ensuring the accuracy and integrity of the communication data.

[0079] Based on the above embodiments, step 130, which involves determining the original codeword estimate based on the bit-flipping sequence and the hard decision result, includes:

[0080] Step 131: Based on the bit flip sequence, reorder the hard decision results to obtain a hard decision sequence;

[0081] Step 132: Determine the original codeword estimate based on the error pattern and the hard decision sequence.

[0082] Specifically, based on the bit-flipping sequence, the hard decision results are reordered to obtain the hard decision sequence. For example, the hard decision results can be used as a basis for... The Middle Bit-flipping sequence The magnitude of the values ​​is used as the basis for reliability judgment, and the hard decision sequence is obtained by sorting the values ​​in descending order of reliability. .

[0083] Furthermore, based on error patterns and hard-decision sequences, the original codeword estimates are determined.

[0084] Based on the above embodiments, step 132 includes:

[0085] Step 1321: Determine codeword estimation based on the error pattern and the hard decision sequence;

[0086] Step 1322: Determine the original codeword estimate based on the codeword estimate.

[0087] Specifically, codeword estimation can be determined based on error patterns and hard-decision sequences, using the following formula:

[0088]

[0089] in, Indicates codeword estimation. Indicates the error mode. This indicates a hard decision sequence.

[0090] Then, based on the codeword estimation, the original codeword estimate is determined. For example, [the codeword estimate is then determined]. Inverse permutation yields the original codeword estimate. That is, ,in This indicates the inverse permutation operation.

[0091] Based on the above embodiments, step 1321 includes:

[0092] Step 310: Based on the code length, determine the maximum Hamming weight and the maximum logical weight;

[0093] Step 320: Initialize the list to be empty. Based on the maximum Hamming weight and the maximum logical weight, use the Landslide algorithm to generate error patterns with increasing logical weight, and store the generated error patterns into the list in sequence until the list contains a preset number of error patterns.

[0094] Step 330: Starting from the first error pattern in the list, perform the step of determining the codeword estimate based on the first error pattern and the hard decision sequence until all error patterns in the list have been performed.

[0095] Specifically, based on the code length, the maximum Hamming weight and the maximum logical weight are determined using the following formula:

[0096]

[0097]

[0098] in, Indicates the maximum weight of the Hamming. Indicates the code length. Indicates the maximum logical weight.

[0099] The initial list is empty. Based on the maximum Hamming weight and the maximum logical weight, the Landslide algorithm is used to generate test error patterns (TEPs) with increasing logical weight, and the generated error patterns are stored sequentially in the list. until the list This includes a preset number of error patterns. The preset number is the same as the maximum number of queries.

[0100] Because the maximum number of queries is set to... Therefore, the list Contains Error patterns, namely ,and .

[0101] Starting with the first error pattern in the list, perform the step of determining codeword estimation based on the first error pattern and the hard decision sequence, until all error patterns in the list have been processed.

[0102] In a preferred embodiment, the LDPC code has an information bit length of 88, a code rate of 11 / 13, a code length of 104, and a weighting factor. .

[0103] Step 1: The ORBGRAND algorithm uses a reliability metric that considers both the check relationship and the bit's own information to determine the extent to which the bit should be flipped for reliability ranking.

[0104] Assuming from the check matrix The defined LDPC code has a matrix. The lines are respectively ,for ,definition

[0105]

[0106] and

[0107]

[0108] in, Indicates the first In the iteration, with the Received signal of minimum absolute value related to row check equation , Represents a cumulative reliability metric used to evaluate all bit positions. The reliability of the relevant check equations, i.e., the bit-flip sequence, Typically represented as a parity check matrix One of the elements indicates the relationship between the check equation (row) and the coded bits (column). Indicates the first The first verification equation depends on the first Each encoded feature.

[0109] in, It is actually an indicator function used to indicate the first... Does the verification equation involve the first...? One bit. Specifically:

[0110] It is a binary variable, when the first The verification equation involves the first... When there are bits, If not involved, then , It's about bits. A set of orthogonal verification equations.

[0111] A rule binary LDPC code Assume its parity-check matrix is Participating in the The set of bits for each parity check equation is denoted as Bit The set of participating verification equations is denoted as .

[0112] for ,calculate:

[0113]

[0114] in, This represents the minimum modulus value among all check nodes except the m-th node. Indicates participation in the A set of bits for each check equation.

[0115] for and hard verdict Calculate the error pattern for each check equation. :

[0116]

[0117] for ,calculate:

[0118] (8)

[0119] because If it comes from the checksum relationship, then it is based on the checksum information, while the information comes from the bits themselves. The information is If we take into account both the information from the check relation and the bit itself, equation (8) can be rewritten as:

[0120] (9)

[0121] In equation (9), the first part comes from the check relation, and the second part comes from the bit. itself, and the entire value The possibility of bit flipping is assessed by taking into account both the check relation and the bit information itself.

[0122] Obviously, for codes with different column weights or different signal-to-noise ratios, The weights are different. If this is taken into account, equation (9) can be further written as...

[0123]

[0124] Among them, weighting factors It is a real number, and For a specific LDPC code, at a given signal-to-noise ratio, the optimal weighting factor minimizes decoding errors. The value is generally obtained through simulation.

[0125] Step 2: Based on the code length Information bits Check bit The maximum Hamming weight according to the Test Error Modes (TEPs) is The corresponding maximum logical weight is Based on the standard, the Landslide algorithm is used to partition the data into integers, and the resulting logically weighted error patterns (TEPs) are stored in a list. Because the maximum number of queries is set to Therefore, the list Contains Error patterns, namely ,and .

[0126] Step 3: Starting with the first error pattern in the list, let the error pattern... With sorted hard decision sequence Add them together to obtain the corresponding codeword estimate. That is, and will Inverse permutation yields the original codeword estimate. That is, .

[0127] Step 4: Estimate the original codewords Parity check matrix of LDPC code If the multiplication satisfies all the check equations, then the codeword estimate is considered to be... If correct, decode and output; if not all check equations are satisfied, return to step two, sequentially obtain the next error mode, re-add it to the hard decision sequence, obtain a new codeword estimate, and query until the first codeword estimate that satisfies all check equations is found, or the maximum number of queries is reached. Stop decoding and output the current codeword estimate.

[0128] The method provided in this invention, based on weighted bit flipping and ordered reliable bit guessing for random additive noise LDPC code decoding, can reduce the bit error rate of LDPC decoding. During the decoding process, a weighted bit flipping strategy assigns weights to each bit according to the reliability of the received signal, accurately locating bits that may be erroneous due to noise interference. The ordered reliable bit guessing algorithm further mines effective information in the signal, dynamically adjusting the decoding algorithm parameters by combining guesses of the characteristics of random additive noise. This allows the decoding process to adapt to complex and changing noise environments, correcting erroneous bits generated during transmission, thereby reducing the bit error rate of the final decoding result and ensuring the accuracy and integrity of communication data.

[0129] Furthermore, this decoding method effectively reduces the number of guesses required by the ORBGRAND algorithm. The ordered reliable bit guessing mechanism introduced in this embodiment provides a solid foundation for noise guessing by rationally sorting and analyzing reliable bits. Instead of guessing random additive noise characteristics, it relies on information provided by better ordered reliable bits. This approach narrows the guessing range, enabling accurate noise identification with fewer guesses during decoding, thus efficiently completing the decoding process, improving decoding efficiency, and reducing time and resource consumption caused by invalid guesses.

[0130] The decoding apparatus provided by the present invention is described below. The decoding apparatus described below and the decoding method described above can be referred to in correspondence.

[0131] Based on any of the above embodiments, the present invention provides a decoding device. Figure 2 This is a schematic diagram of the decoding device provided by the present invention, as shown below. Figure 2 As shown, the device includes:

[0132] The acquisition unit 210 is used to acquire the received sequence and the set of check equations, and determine the error pattern of each check equation in the set of check equations based on the hard decision result;

[0133] The first determining unit 220 is used to determine the modulus of the bits in the received sequence, and to determine the bit flip sequence corresponding to the received sequence based on the modulus of the bits and the error pattern.

[0134] The second determining unit 230 is used to determine the original codeword estimate based on the bit flip sequence and the hard decision result, and to determine whether the original codeword estimate satisfies all the check equations in the check equation set.

[0135] The iteration unit 240 is configured to: if all the original codeword estimates satisfy all the check equations, then the decoding is successful, the decoding result is output and the iteration stops; if the original codeword estimates do not satisfy all the check equations, but the preset maximum number of iterations has been reached, then the iteration stops and the current decoding result is output; if the original codeword estimates do not satisfy all the check equations and the maximum number of iterations has not been reached, then the step of determining whether the original codeword estimates satisfy all the check equations in the check equation set is returned until the original codeword estimates satisfy all the check equations or the maximum number of iterations is reached.

[0136] The apparatus provided in this invention acquires a received sequence and a set of parity check equations, determines the error pattern of each parity check equation in the set based on the hard decision result, determines the modulus of the bits in the received sequence, and determines the bit-flip sequence corresponding to the received sequence based on the bit modulus and the error pattern. Finally, it determines the original codeword estimate based on the bit-flip sequence and the hard decision result, and determines whether the original codeword estimate satisfies all parity check equations in the set of parity check equations. In this method, the bit modulus provides reliability information for each bit, enabling the decoding algorithm to prioritize correcting the bits with the lowest reliability. The error pattern reflects the inconsistency between the received sequence and the parity check matrix, allowing the decoding algorithm to specifically correct errors. During the decoding process, determining the bit-flip sequence corresponding to the received sequence based on the bit modulus and the error pattern, and then determining the original codeword estimate based on the bit-flip sequence and the hard decision result, can more accurately reflect the degree of noise influence on each piece of information, thereby reducing the bit error rate of the final decoding result and ensuring the accuracy and integrity of the communication data.

[0137] Based on any of the above embodiments, the second determining unit 230 specifically includes:

[0138] The third determining unit is used to reorder the hard decision results based on the bit flipping sequence to obtain a hard decision sequence;

[0139] A raw codeword estimation unit is determined to determine the raw codeword estimate based on the error pattern and the hard decision sequence.

[0140] Based on any of the above embodiments, the determination of the original codeword estimation unit specifically includes:

[0141] A codeword estimation unit is configured to determine codeword estimates based on the error mode and the hard decision sequence.

[0142] A raw codeword estimation subunit is defined for determining the raw codeword estimate based on the codeword estimate.

[0143] Based on any of the above embodiments, the codeword estimation unit is specifically used for:

[0144] Based on the code length, determine the maximum Hamming weight and the maximum logical weight;

[0145] The initial list is empty. Based on the maximum Hamming weight and the maximum logical weight, the Landslide algorithm is used to generate error patterns with increasing logical weight. The generated error patterns are stored in the list in sequence until the list contains a preset number of error patterns.

[0146] Starting with the first error pattern in the list, the step of determining the codeword estimate based on the first error pattern and the hard decision sequence is performed until all error patterns in the list have been processed.

[0147] Based on any of the above embodiments, the second determining unit 230 is specifically used for:

[0148] The original codeword estimate is multiplied by the parity check matrix to obtain the syndrome vector, and it is determined whether the syndrome vector satisfies all the parity check equations in the set of parity check equations;

[0149] The check matrix is ​​determined based on the code length and the check bits, and the check bits are determined based on the code length and the information bits.

[0150] Based on any of the above embodiments, the first determining unit 220 is specifically used for:

[0151] The bit-flipping sequence corresponding to the received sequence is determined based on the following formula:

[0152]

[0153]

[0154] in, This represents the bit-flipped sequence corresponding to the received sequence. Indicates an incorrect pattern. The modulus of a bit. , Indicates except the first The minimum value among the modulo values ​​of the remaining check nodes besides the check node. Indicates participation in the A set of bits for each check equation.

[0155] Figure 3 This is a schematic diagram of the structure of the electronic device provided by the present invention, such as... Figure 3As shown, the electronic device may include: a processor 310, a communications interface 320, a memory 330, and a communications bus 340, wherein the processor 310, the communications interface 320, and the memory 330 communicate with each other through the communications bus 340. The processor 310 can call logic instructions in the memory 330 to execute a decoding method, which includes: acquiring a received sequence and a set of check equations, and determining the error pattern of each check equation in the set of check equations based on a hard decision result; determining the modulus of the bits in the received sequence, and determining the bit-flip sequence corresponding to the received sequence based on the modulus of the bits and the error pattern; determining the original codeword estimate based on the bit-flip sequence and the hard decision result, and determining whether the original codeword estimate satisfies all check equations in the set of check equations; if the original codeword estimate satisfies all check equations, the decoding is successful, the decoding result is output and the iteration stops; if the original codeword estimate does not satisfy all check equations, but has reached a preset maximum number of iterations, the iteration stops and the current decoding result is output; if the original codeword estimate does not satisfy all check equations and has not reached the maximum number of iterations, the process returns to the step of determining whether the original codeword estimate satisfies all check equations in the set of check equations, until the original codeword estimate satisfies all check equations or reaches the maximum number of iterations.

[0156] Furthermore, the logical instructions in the aforementioned memory 330 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0157] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer is able to execute the decoding methods provided by the above methods. The method includes: acquiring a received sequence and a set of check equations, and determining an error pattern for each check equation in the set of check equations based on a hard decision result; determining the modulus of a bit in the received sequence, and determining a bit-flipping sequence corresponding to the received sequence based on the modulus of the bit and the error pattern; and determining an original codeword estimate based on the bit-flipping sequence and the hard decision result. The algorithm calculates and determines whether the original codeword estimate satisfies all the check equations in the set of check equations. If the original codeword estimate satisfies all the check equations, the decoding is successful, the decoding result is output, and the iteration stops. If the original codeword estimate does not satisfy all the check equations but has reached the preset maximum number of iterations, the iteration stops, and the current decoding result is output. If the original codeword estimate does not satisfy all the check equations and has not reached the maximum number of iterations, the algorithm returns to the step of determining whether the original codeword estimate satisfies all the check equations in the set of check equations, until the original codeword estimate satisfies all the check equations or reaches the maximum number of iterations.

[0158] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, is implemented to perform the decoding methods provided by the methods described above. The method includes: acquiring a received sequence and a set of check equations, and determining an error pattern for each check equation in the set of check equations based on a hard decision result; determining the modulus of bits in the received sequence, and determining a bit-flipping sequence corresponding to the received sequence based on the modulus of the bits and the error pattern; determining an original codeword estimate based on the bit-flipping sequence and the hard decision result, and determining whether the original codeword estimate is valid. If the original codeword estimate satisfies all the check equations in the set, the decoding is successful, the decoding result is output, and the iteration stops. If the original codeword estimate does not satisfy all the check equations but has reached the preset maximum number of iterations, the iteration stops, and the current decoding result is output. If the original codeword estimate does not satisfy all the check equations and has not reached the maximum number of iterations, the process returns to the step of determining whether the original codeword estimate satisfies all the check equations in the set, until the original codeword estimate satisfies all the check equations or reaches the maximum number of iterations.

[0159] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0160] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0161] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A decoding method, characterized in that, include: Obtain the received sequence and the set of check equations, and determine the error pattern of each check equation in the set of check equations based on the hard decision result; Determine the modulus of the bits in the received sequence, and based on the modulus of the bits and the error pattern, determine the bit flip sequence corresponding to the received sequence; Based on the bit-flipping sequence and the hard decision result, the original codeword estimate is determined, and it is determined whether the original codeword estimate satisfies all the check equations in the set of check equations; If all the original codeword estimates satisfy all the check equations, then the decoding is successful, the decoding result is output and the iteration stops; if the original codeword estimates do not satisfy all the check equations, but the preset maximum number of iterations has been reached, then the iteration stops and the current decoding result is output. If the original codeword estimate does not satisfy all the check equations and has not reached the maximum number of iterations, then return to the step of determining whether the original codeword estimate satisfies all the check equations in the check equation set, until the original codeword estimate satisfies all the check equations or reaches the maximum number of iterations.

2. The decoding method according to claim 1, characterized in that, The determination of the original codeword estimate based on the bit-flipping sequence and the hard decision result includes: Based on the bit-flipping sequence, the hard decision results are reordered to obtain a hard decision sequence; The original codeword estimate is determined based on the error pattern and the hard decision sequence.

3. The decoding method according to claim 2, characterized in that, The determination of the original codeword estimate based on the error pattern and the hard-decision sequence includes: Based on the error pattern and the hard decision sequence, codeword estimation is determined; Based on the codeword estimation, the original codeword estimation is determined.

4. The decoding method according to claim 3, characterized in that, The step of determining codeword estimation based on the error pattern and the hard-decision sequence includes: Based on the code length, determine the maximum Hamming weight and the maximum logical weight; The initial list is empty. Based on the maximum Hamming weight and the maximum logical weight, the Landslide algorithm is used to generate error patterns with increasing logical weight. The generated error patterns are stored in the list in sequence until the list contains a preset number of error patterns. Starting with the first error pattern in the list, the step of determining the codeword estimate based on the first error pattern and the hard decision sequence is performed until all error patterns in the list have been processed.

5. The decoding method according to any one of claims 1 to 4, characterized in that, The step of determining whether the original codeword estimate satisfies all the check equations in the set of check equations includes: The original codeword estimate is multiplied by the parity check matrix to obtain the syndrome vector, and it is determined whether the syndrome vector satisfies all the parity check equations in the set of parity check equations; The check matrix is ​​determined based on the code length and the check bits, and the check bits are determined based on the code length and the information bits.

6. The decoding method according to any one of claims 1 to 4, characterized in that, Determining the bit-flipping sequence corresponding to the received sequence based on the modulus of the bit and the error pattern includes: The bit-flipping sequence corresponding to the received sequence is determined based on the following formula: ； ； in, This represents the bit-flipped sequence corresponding to the received sequence. Indicates an incorrect pattern. The modulus of a bit. , Indicates except the first The minimum value among the modulo values ​​of the remaining check nodes besides the check node. Represents bits The set of verification equations involved. Indicates participation in the The bit set of a check equation Represents the parity check matrix The Middle Line 1 The elements of the column.

7. A decoding device, characterized in that, include: The acquisition unit is used to acquire the received sequence and the set of check equations, and determine the error pattern of each check equation in the set of check equations based on the hard decision result; The first determining unit is used to determine the modulus of the bits in the received sequence, and to determine the bit flip sequence corresponding to the received sequence based on the modulus of the bits and the error pattern. The second determining unit is used to determine the original codeword estimate based on the bit flip sequence and the hard decision result, and to determine whether the original codeword estimate satisfies all the check equations in the check equation set. An iterative unit is used to determine if decoding is successful if all the original codeword estimates satisfy all the check equations, output the decoding result and stop iterating; if the original codeword estimates do not satisfy all the check equations, but the preset maximum number of iterations has been reached, then the iteration stops and the current decoding result is output. If the original codeword estimate does not satisfy all the check equations and has not reached the maximum number of iterations, then return to the step of determining whether the original codeword estimate satisfies all the check equations in the check equation set, until the original codeword estimate satisfies all the check equations or reaches the maximum number of iterations.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the decoding method as described in any one of claims 1 to 6.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the decoding method as described in any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the decoding method as described in any one of claims 1 to 6.

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