An electroluminescent lamp driving circuit chip and a control method thereof

Abstract

The application relates to an electroluminescent lamp driving circuit chip and a control method thereof. The application comprises an I2C demodulation module for receiving a master control instruction from outside and setting a target working frequency and an output voltage amplitude; a signal generator for generating a target waveform signal required for driving an electroluminescent lamp according to the setting of the I2C demodulation module; two closed-loop feedback control modules with the same structure, the output ends of the two closed-loop feedback control modules are respectively electrically connected with two ends of the electroluminescent lamp, and each of the closed-loop feedback control modules comprises a voltage sampling unit, an error amplification unit, a PWM modulation unit, an analog modulation unit and a main switch unit. The application can realize high-efficiency energy conversion and generate a stable and consistent sine wave driving voltage.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to an electroluminescent lamp driver circuit chip and its control method. Background Technology

[0002] An electroluminescent lamp (EL lamp), also known as a cold light sheet, is an electroluminescent device that directly converts electrical energy into light energy. Due to its advantages such as thinness, light weight, low power consumption, uniform light emission, flexibility, and rich colors, it is widely used in backlighting, signage, and decorative lighting for various electronic products, such as dashboard backlighting, advertising light boxes, wearable devices, and automotive interior ambient lighting. Physically, an EL lamp is equivalent to a capacitor. Its light-emitting principle utilizes a high-intensity alternating electric field to excite fluorescent materials to produce light. Therefore, EL lamps cannot be directly driven by conventional low-voltage DC power supplies; they must be provided with a high-voltage (typically 60V to 200V peak-to-peak), specific-frequency (typically 50Hz to 2kHz) AC power supply. In practical applications, the core task of the driving circuit is to efficiently convert the common low-voltage DC power supply in the system (such as 3.7V from a battery or 12V from a car battery) into the high-voltage AC power required to drive the EL lamp.

[0003] Currently, the traditional drive circuits used in the industry to achieve this function typically employ a two-stage architecture. This architecture first uses a DC-DC boost converter to raise the input low-voltage DC power to a high-voltage DC level (e.g., 100V DC). Then, an H-bridge inverter, consisting of four switching transistors, alternately switches this high-voltage DC power, thereby generating the desired AC drive waveform across the EL lamp. The H-bridge inverter, combined with a current-limiting resistor, can make the AC waveform across the EL approximate a sine wave.

[0004] A solution that uses an H-bridge inverter combined with a series current-limiting resistor to drive an electroluminescent lamp (EL lamp), such as... Figure 1 As shown, the analysis reveals the following two inherent defects:

[0005] 1) Low energy conversion efficiency and excessive power consumption: This scheme uses an RC circuit to charge and discharge an EL lamp, which is equivalent to a capacitor, to generate a quasi-sine wave. However, according to capacitor charging theory, during the process of charging the capacitor to voltage V through a resistor, the energy stored in the capacitor is... Meanwhile, the Joule heat energy consumed in the series resistor is also... This means that the charging efficiency is theoretically only up to 50%. In a complete charge-discharge cycle, the total energy loss can reach as high as... This inherent resistive power loss results in low overall efficiency of the solution, which is unacceptable for power-sensitive applications.

[0006] 2) Poor waveform consistency and uncontrollable electromagnetic compatibility (EMC) performance: The shape and slew rate of the drive waveform are determined by the RC time constant. In practical applications, the capacitance of the EL lamp varies due to differences in its size, shape, and cable length, leading to uncertainty in the total load capacitance. Therefore, this drive scheme lacks robustness and cannot provide a consistent output waveform for different loads. The waveform inconsistency, especially variations in its edge rate, makes its harmonic components unpredictable, posing a significant challenge to the system's EMC design and increasing the risk of exceeding electromagnetic interference (EMI) limits. Summary of the Invention

[0007] To address this, the present invention provides an electroluminescent lamp driving circuit chip and its control method, which is a high-efficiency EL lamp driving circuit based on a dynamic reference modulation inductive switching regulator. This circuit abandons the traditional high-loss RC current limiting method and uses a closed-loop feedback system to precisely control the charging and discharging of energy to the EL lamp as a capacitive load, thereby achieving high-efficiency energy conversion while generating a stable and consistent quasi-sine wave driving voltage.

[0008] To solve the above-mentioned technical problems, the present invention provides an electroluminescent lamp driving circuit chip, comprising:

[0009] The I2C demodulation module is used to receive external master control commands and set the target operating frequency and output voltage amplitude.

[0010] A signal generator is used to generate the target waveform signal required to drive the electroluminescent lamp according to the settings of the I2C demodulation module.

[0011] Two identical closed-loop feedback control modules are provided, with their respective output terminals electrically connected to the two ends of an electroluminescent lamp. Each closed-loop feedback control module includes a voltage sampling unit, an error amplification unit, a PWM modulation unit (PWM, pulse width modulation), an analog modulation unit, and a main switching unit.

[0012] The voltage sampling unit is used to sample the output voltage of the closed-loop feedback control module and generate a feedback voltage signal.

[0013] The error amplification unit is used to compare the feedback voltage signal with the target waveform signal and generate an error signal proportional to the difference between the two.

[0014] The PWM modulation unit is used to compare the error signal with the sawtooth wave RAMP signal, generate a PWM signal whose pulse width is proportional to the amplitude of the error signal, and buffer and shape the PWM signal and amplify its driving capability. The main switching unit is used to control the duty cycle under the drive of the amplified PWM signal.

[0015] The analog modulation unit is used to buffer and isolate the error signal, generate a smooth analog signal, and form a discharge path with adjustable on-resistance.

[0016] In one embodiment of the present invention, the voltage sampling unit includes a resistor divider, the resistor divider including a first voltage divider resistor and a second voltage divider resistor connected in series;

[0017] One end of the first voltage divider resistor and one end of the second voltage divider resistor are respectively connected to the output voltage of the closed-loop feedback control module and connected to ground level;

[0018] The error amplification unit includes an error amplifier;

[0019] The other ends of the first voltage divider resistor and the second voltage divider resistor are connected together and then connected to the inverting input terminal of the error amplifier;

[0020] The target waveform signal is connected to the non-inverting input of the error amplifier.

[0021] In one embodiment of the present invention, the PWM modulation unit includes a PWM comparator, an RS flip-flop unit, a logic gate, and a non-inverting buffer;

[0022] The inverting input of the PWM comparator is connected to the output of the error amplifier, and the non-inverting input of the PWM comparator is connected to the sawtooth wave RAMP signal.

[0023] The PWM comparator compares the error signal with the sawtooth wave RAMP signal. When the level of the error signal is higher than that of the sawtooth wave RAMP signal, the PWM comparator outputs a high level, and vice versa, it outputs a low level, thereby generating a PWM signal whose pulse width is proportional to the amplitude of the error signal.

[0024] The RS flip-flop unit includes a first RS flip-flop and a second RS flip-flop connected together, which are RS flip-flops synchronized by the clock CLK signal;

[0025] The output of the PWM comparator is connected to the first input of the first RS flip-flop, the output of the second RS flip-flop is connected to the second input of the first RS flip-flop A403, the first input of the second RS flip-flop is connected to the clock CLK signal, and the second input of the second RS flip-flop is connected to the output of the first RS flip-flop.

[0026] The first input terminal of the logic gate is connected to the output terminal of the first RS flip-flop; the logic gate is an AND gate.

[0027] The output of the logic gate is connected to the input of the in-phase buffer A406;

[0028] The PWM signal is implemented with a fixed start frequency per cycle by an RS flip-flop unit synchronized by the clock CLK signal; after synchronization, the PWM signal passes through the logic gate and then through the in-phase buffer to achieve buffering, shaping and amplification of driving capability.

[0029] In one embodiment of the present invention, the in-phase buffer consists of a plurality of CMOS inverters connected end to end, each of the CMOS inverters including a PMOS transistor and an NMOS transistor;

[0030] The source of the PMOS transistor is connected to the internal power supply, and the source of the NMOS transistor is grounded.

[0031] The gates of the PMOS transistor and the NMOS transistor are connected to form an input terminal;

[0032] The drains of the PMOS transistor and the NMOS transistor are connected to form an output terminal;

[0033] The output of the previous CMOS inverter is used as the input of the next CMOS inverter.

[0034] In one embodiment of the present invention, the main switching unit includes a main power switching transistor, an external inductor, and a diode;

[0035] Wherein, one end of the external inductor is connected to the power supply voltage, and the positive and negative terminals of the diode are respectively connected to the other end of the external inductor and the output pin;

[0036] The source of the main power switch is connected to ground, the gate of the main power switch is connected to the output of the in-phase buffer, and the drain of the main power switch is connected to the positive terminal of the diode.

[0037] In one embodiment of the present invention, the analog modulation unit includes a voltage buffer, a first power transistor, and a second power transistor;

[0038] The input terminal of the voltage buffer is connected to the output terminal of the error amplifier;

[0039] The output terminal of the voltage buffer is connected to the drain of the first power transistor and the gate of the second power transistor, respectively.

[0040] The gate of the first power transistor is connected to the second input terminal of the logic gate; the source of the first power transistor is connected to ground.

[0041] The source of the second power transistor is connected to ground.

[0042] The drain of the second power transistor is connected to the negative terminal of the diode.

[0043] In one embodiment of the present invention, the voltage buffer includes a first PMOS transistor, a second PMOS transistor, and an NMOS transistor;

[0044] The source of the first PMOS transistor is connected to the internal power supply, the drain of the NMOS transistor, and the drain of the second PMOS transistor, respectively. The gate of the first PMOS transistor is connected to the input signal, and the drain of the first PMOS transistor is connected to the ground level and the gate of the NMOS transistor, respectively.

[0045] The source of the NMOS transistor is connected to ground.

[0046] The source of the second PMOS transistor is connected to the internal power supply, and the gate of the second PMOS transistor is connected to its own drain.

[0047] In one embodiment of the present invention, a voltage reference / current bias module and a voltage regulator LDO are also included. The voltage reference / current bias module provides a reference voltage and bias current for the internal analog circuits of the chip, and the voltage regulator LDO provides a stable power supply voltage for the internal low-voltage digital and analog circuits of the chip.

[0048] In one embodiment of the present invention, the target waveform signal is a sinusoidal reference voltage. The sinusoidal reference voltages provided by the signal generator to the two closed-loop feedback control modules are out of phase, and a differential AC drive voltage with doubled swing is obtained between the output terminals of the two closed-loop feedback control modules.

[0049] The present invention also provides a control method for an electroluminescent lamp driving circuit chip, comprising:

[0050] During the charging phase, within the rising half-cycle of the sinusoidal reference voltage, the error amplification unit in the closed-loop feedback control module compares the voltage sample value of the output voltage to the electroluminescent lamp with the sinusoidal reference voltage to generate an error signal. The error signal is converted into a PWM signal by the PWM modulation unit and then controlled by buffer shaping and drive capability amplification to control the duty cycle of the main power switch in the main switching unit.

[0051] When the voltage sample value is lower than the sinusoidal reference voltage, the duty cycle of the PWM signal increases to inject more energy into the electroluminescent lamp, thereby increasing the output voltage; when the voltage sample value is higher than the sinusoidal reference voltage, the duty cycle decreases to limit the energy input.

[0052] During the discharge phase, within the falling half-cycle of the sinusoidal reference voltage, the closed-loop feedback control module compares the voltage sample value with the sinusoidal reference voltage. The error signal output by the error amplification unit is used to control the conduction state of the second power transistor of the analog modulation unit to form a discharge path with adjustable on-resistance. When the voltage sample value is higher than the sinusoidal reference voltage, the conduction capability of the discharge path is enhanced to accelerate the charge release of the electroluminescent lamp. When the voltage sample value is lower than the sinusoidal reference voltage, the conduction capability of the discharge path is weakened, so that the energy stored in the electroluminescent lamp can be released according to a smooth sinusoidal law, thereby accurately reproducing the falling curve of the sinusoidal wave.

[0053] The technical solution of the present invention has the following advantages compared with the prior art:

[0054] The electroluminescent lamp driver circuit chip and its control method described in this invention have the advantages of high efficiency and low power consumption. By adopting lossless switching energy transfer based on inductance, it completely replaces the traditional RC charging and discharging scheme, fundamentally eliminating resistive losses and increasing the energy conversion efficiency from the theoretical upper limit of 50% to the inherent high efficiency level of switching regulators (usually reaching over 90%).

[0055] This invention offers advantages such as stable waveform and controllable electromagnetic compatibility (EMC) performance. The output waveform is actively generated by a precise sine wave reference through closed-loop feedback control, resulting in highly stable waveform shape, amplitude, and frequency, unaffected by changes in load characteristics such as the capacitance of the EL lamp itself or the length of the connecting cable. This ensures the consistency and predictability of harmonic components, greatly simplifies EMC design, and improves the product's EMC performance.

[0056] This invention offers the advantages of high integration and low cost. The control scheme proposed in this invention has clear logic and is integrated into a single integrated circuit (IC), enabling a fully integrated single-chip solution that includes power stages and all control and protection functions, thereby significantly reducing bill of materials (BOM) costs and product size. Attached Figure Description

[0057] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0058] Figure 1 It is an existing H-bridge inverter drive circuit.

[0059] Figure 2 This is a schematic diagram of the driving circuit for the inductive switching regulator combined with the low dropout regulator of the present invention.

[0060] Figure 3 This is a block diagram of the electroluminescent lamp driver chip of the present invention.

[0061] Figure 4 This is an embodiment of the electroluminescent lamp driver chip of the present invention.

[0062] Figure 5 This is a circuit diagram of the in-phase buffers A406 and B406 in the embodiment of the electroluminescent lamp driver chip of the present invention.

[0063] Figure 6 This is a circuit diagram of voltage buffers A407 and B407 in an embodiment of the electroluminescent lamp driver chip of the present invention.

[0064] Figure 7 This is a voltage waveform diagram of driving the electroluminescent lamp in an embodiment of the present invention. Detailed Implementation

[0065] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.

[0066] In this invention, when directions (up, down, left, right, front, and back) are described, it is only for the convenience of describing the technical solution of this invention, and does not indicate or imply that the technical features referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this invention.

[0067] In this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," "exceeding," etc., are understood to exclude the stated number; "above," "below," "within," etc., are understood to include the stated number. In the description of this invention, the terms "first" and "second" are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0068] In this invention, unless otherwise explicitly defined, the terms "setting," "installing," and "connecting" should be interpreted broadly. For example, they can refer to a direct connection or an indirect connection through an intermediate medium; a fixed connection, a detachable connection, or an integrally formed connection; a mechanical connection, an electrical connection, or a connection capable of mutual communication; or the internal connection of two components or the interaction between two components. Those skilled in the art can reasonably determine the specific meaning of the above terms in this invention based on the specific content of the technical solution.

[0069] This embodiment provides an electroluminescent lamp driver circuit chip, referring to... Figure 3 The diagram shown is a block diagram of the electroluminescent lamp driver chip. The chip integrates several necessary functional modules, including:

[0070] The I2C (I²C bus) demodulation module, as the digital control core of the chip, is used to receive master control commands from external sources (such as MCUs), set the target operating frequency and output voltage amplitude, and perform start-stop control and other functions.

[0071] A signal generator is used to generate a target waveform signal (e.g., a sine wave of a specific frequency and amplitude) required to drive the electroluminescent lamp according to the settings of the I2C demodulation module, as a reference signal for subsequent closed-loop control.

[0072] Two identical closed-loop feedback control modules are provided, with their respective output terminals electrically connected to the two ends of an electroluminescent lamp. Each closed-loop feedback control module includes a voltage sampling unit, an error amplification unit, a PWM modulation unit, an analog modulation unit, and a main switching unit.

[0073] The voltage sampling unit is used to sample the output voltage of the closed-loop feedback control module and generate a feedback voltage signal.

[0074] The error amplification unit is used to compare the feedback voltage signal with the target waveform signal and generate an error signal proportional to the difference between the two.

[0075] The PWM modulation unit is used to compare the error signal with the sawtooth wave RAMP signal, generate a PWM signal whose pulse width is proportional to the amplitude of the error signal, and buffer and shape the PWM signal and amplify its driving capability. The main switching unit is used to control the duty cycle under the drive of the amplified PWM signal.

[0076] The analog modulation unit is used to buffer and isolate the error signal, generate a smooth analog signal, and form a discharge path with adjustable on-resistance.

[0077] Specifically, it also includes a voltage reference / current bias module and a voltage regulator LDO (low-dropout regulator). The voltage reference / current bias module provides a stable, accurate, and power supply voltage-independent reference voltage and bias current for the internal analog circuitry of the chip, which is the basis for ensuring accurate reproduction of the drive waveform. The voltage regulator LDO provides a clean and stable power supply voltage for the low-voltage digital and analog circuitry inside the chip.

[0078] It should be noted that the I2C demodulation module, voltage reference / current bias module, voltage regulator LDO, and signal generator are all mature circuit structures commonly used in the industry, and their specific structures will not be described in detail here.

[0079] Reference Figure 4 The diagram shows an embodiment of the electroluminescent lamp driver chip of the present invention. This circuit is mainly used to generate precise AC drive signals. Its structure includes two symmetrical, independently controllable drive channels (i.e., two closed-loop feedback control modules), corresponding to output pin 1 and output pin 2, respectively. For simplicity, the following detailed description focuses on the upper half of the channel (channel A) corresponding to output pin 1; the structure and working principle of the lower half of the channel (channel B) are the same.

[0080] Specifically, the voltage sampling unit includes a resistor divider, which includes a first voltage divider resistor A411 and a second voltage divider resistor A412 connected in series.

[0081] One end of the first voltage divider resistor A411 and the second voltage divider resistor A412 are respectively connected to the output voltage of the closed-loop feedback control module and to ground level;

[0082] The error amplification unit includes an error amplifier A401;

[0083] The other ends of the first voltage divider resistor A411 and the second voltage divider resistor A412 are connected together and then connected to the inverting input terminal of the error amplifier A401;

[0084] The target waveform signal is connected to the non-inverting input of error amplifier A401.

[0085] It should be noted that the core of Channel A is a pulse width modulation (PWM) switching control loop based on closed-loop feedback and a parallel analog control loop. The output voltage of Channel A is sampled by a resistor divider, and the resulting feedback voltage is sent to the inverting input of error amplifier A401. Error amplifier A401 compares this feedback voltage with the target waveform signal (sine wave reference voltage 1) generated by the signal generator, and generates an error signal at its output that is proportional to the difference between the two.

[0086] Specifically, the PWM modulation unit includes a PWM comparator A402, an RS flip-flop unit, a logic gate A405, and a non-inverting buffer A406;

[0087] The inverting input of the PWM comparator A402 is connected to the output of the error amplifier A401, and the non-inverting input of the PWM comparator A402 is connected to the sawtooth wave RAMP signal.

[0088] The PWM comparator A402 compares the error signal with the sawtooth wave RAMP signal. When the level of the error signal is higher than that of the sawtooth wave RAMP signal, the PWM comparator A402 outputs a high level, and vice versa, it outputs a low level, thereby generating a PWM signal whose pulse width is proportional to the amplitude of the error signal.

[0089] The RS flip-flop unit includes a first RS flip-flop A403 and a second RS flip-flop A404 connected together. The RS flip-flop unit is an RS flip-flop synchronized by the clock CLK signal.

[0090] The output of the PWM comparator A402 is connected to the first input of the first RS flip-flop A403, the output of the second RS flip-flop A404 is connected to the second input of the first RS flip-flop A403, the first input of the second RS flip-flop A404 is connected to the clock signal CLK, and the second input of the second RS flip-flop A404 is connected to the output of the first RS flip-flop A403.

[0091] The first input terminal of the logic gate A405 is connected to the output terminal of the first RS flip-flop A403; the logic gate A405 is an AND gate.

[0092] The output of logic gate A405 is connected to the input of non-inverting buffer A406;

[0093] The PWM signal is implemented with a fixed start frequency per cycle by an RS flip-flop unit synchronized by the clock CLK signal; after synchronization, the PWM signal passes through the logic gate A405 and then through the in-phase buffer A406 to achieve buffering, shaping and amplification of driving capability.

[0094] It should be noted that the error signal is sent to the inverting input of the PWM comparator A402 and compared with the sawtooth RAMP signal input to the non-inverting input. When the error signal level is higher than the sawtooth RAMP signal, the PWM comparator A402 outputs a high level, and vice versa, generating a PWM signal whose pulse width is proportional to the amplitude of the error signal. This PWM signal is then fed into an RS flip-flop synchronized by the clock signal CLK to achieve a fixed start frequency per cycle. The synchronized PWM signal passes through logic gate A405, and then through a non-inverting buffer A406 for buffering, shaping, and amplification of the drive capability.

[0095] Furthermore, the PWM modulation process involves obtaining the required duty cycle (i.e., the switch-on time) within a fixed period through a feedback signal. This process uses two signals: a CLK signal, which resets the signal each period to turn on the power transistor; and a ramp signal compared to a reference signal, which determines when to turn off the power transistor. These two signals are coupled through an RS flip-flop unit to generate the final required PWM modulation signal.

[0096] Reference Figure 5 As shown, the in-phase buffer A406 consists of several CMOS inverters connected end-to-end, which can provide a steep switching edge and sufficient gate drive current for the subsequent power transistors. Each of the CMOS inverters includes a PMOS transistor and an NMOS transistor;

[0097] The source of the PMOS transistor is connected to the internal power supply, and the source of the NMOS transistor is grounded.

[0098] The gates of the PMOS transistor and the NMOS transistor are connected to form an input terminal;

[0099] The drains of the PMOS transistor and the NMOS transistor are connected to form an output terminal;

[0100] The output of the previous CMOS inverter is used as the input of the next CMOS inverter.

[0101] Specifically, the main switching unit includes a main power switching transistor A408, an external inductor, and a diode;

[0102] Wherein, one end of the external inductor is connected to the power supply voltage, and the positive and negative terminals of the diode are respectively connected to the other end of the external inductor and the output pin (output pin 1 or output pin 2).

[0103] The source of the main power switch A408 is connected to ground, the gate of the main power switch A408 is connected to the output of the non-inverting buffer A406, and the drain of the main power switch A408 is connected to the positive terminal of the diode.

[0104] Specifically, the analog modulation unit includes a voltage buffer A407, a first power transistor A409, and a second power transistor A410;

[0105] The input terminal of the voltage buffer A407 is connected to the output terminal of the error amplifier A401;

[0106] The output terminal of the voltage buffer A407 is connected to the drain of the first power transistor A409 and the gate of the second power transistor A410, respectively.

[0107] The gate of the first power transistor A409 is connected to the second input terminal of the logic gate A405; the source of the first power transistor A409 is connected to ground.

[0108] The source of the second power transistor A410 is connected to ground.

[0109] The drain of the second power transistor A410 is connected to the negative terminal of the diode.

[0110] Specifically, refer to Figure 6 As shown, the voltage buffer A407 includes a first PMOS transistor, a second PMOS transistor, and an NMOS transistor;

[0111] The source of the first PMOS transistor is connected to the internal power supply, the drain of the NMOS transistor, and the drain of the second PMOS transistor, respectively. The gate of the first PMOS transistor is connected to the input signal, and the drain of the first PMOS transistor is connected to the ground level and the gate of the NMOS transistor, respectively.

[0112] The source of the NMOS transistor is connected to ground.

[0113] The source of the second PMOS transistor is connected to the internal power supply, and the gate of the second PMOS transistor is connected to its own drain.

[0114] Specifically, the target waveform signal is a sinusoidal reference voltage. The sinusoidal reference voltages provided by the signal generator to the two closed-loop feedback control modules are out of phase, and a differential AC drive voltage with doubled swing is obtained between the output terminals of the two closed-loop feedback control modules.

[0115] In addition, it should be noted that the power output stage in this embodiment contains two parallel control paths.

[0116] Main switching path: The PWM signal, amplified by buffer A406, drives the main power switch A408. The main power switch A408, together with the external inductor, diode, and load (EL lamp), constitutes a switching power converter, achieving efficient energy transfer from the power source to the load through high-frequency switching.

[0117] Analog control path: The output signal of error amplifier A401 is also buffered by a voltage buffer A407. (See attached diagram) Figure 6 The voltage buffer A407 employs a flipped voltage follower structure, characterized by high input impedance and low output impedance, enabling it to buffer and isolate error signals. The buffered analog signal is then used to drive the second power transistor A410.

[0118] The logic control signal controls the first power transistor A409 and the logic gate A405, which can selectively connect or disconnect the analog control path or the main switch path, thereby realizing the switching between PWM charging and linear discharging modes.

[0119] Reference Figure 4 As shown, the structure and operating principle of channel B (B401 to B412) are exactly the same as those of channel A. The sinusoidal reference voltage 2 provides a signal that is inverted compared to the sinusoidal reference voltage 1, thereby obtaining a differential AC drive voltage with doubled swing between output pin 1 and output pin 2.

[0120] The operation of this electroluminescent lamp driver circuit chip can be divided into two stages: charging (voltage rise) and discharging (voltage fall), which together constitute a complete sinusoidal driving cycle, including:

[0121] During the charging phase, within the rising half-cycle of the sinusoidal reference voltage, the internally generated sinusoidal reference voltage is in the rising half-cycle. The error amplification unit in the closed-loop feedback control module compares the voltage sample value of the output voltage to the electroluminescent lamp with the sinusoidal reference voltage to generate an error signal. The error signal is converted into a PWM signal by the PWM modulation unit and then buffered, shaped, and amplified to dynamically and in real-time control the duty cycle of the main power switch A408 (B408) in the main switching unit.

[0122] When the voltage sample value is lower than the sinusoidal reference voltage, the duty cycle of the PWM signal increases to inject more energy into the electroluminescent lamp (capacitive load) (through the inductive switching regulator module), thus increasing the output voltage. When the voltage sample value is higher than the sinusoidal reference voltage, the duty cycle decreases to limit energy input. In this way, the output voltage is forced to precisely follow the trajectory of the sinusoidal reference voltage. The entire energy transfer process is completed through inductor energy storage, avoiding resistive losses and achieving extremely high conversion efficiency. It should be noted that the inductive switching regulator module includes a PWM modulation unit, an analog modulation unit, an error amplifier A401, a main power switch A408, and an RS flip-flop unit.

[0123] During the discharge phase, within the falling half-cycle of the sinusoidal reference voltage, the closed-loop feedback control module compares the voltage sample value with the sinusoidal reference voltage. The error signal output by the error amplifier unit is used to control the conduction state of the second power transistor A410 (B410) of the analog modulation unit to form a discharge path with adjustable on-resistance (low dropout regulator LDO). When the voltage sample value is higher than the sinusoidal reference voltage, the conduction capability of the discharge path is enhanced to accelerate the charge release of the electroluminescent lamp; when the voltage sample value is lower than the sinusoidal reference voltage, the conduction capability of the discharge path is weakened, allowing the energy stored in the electroluminescent lamp to be released according to a smooth sinusoidal pattern, thereby accurately reproducing the falling curve of the sine wave. It should be noted that the low dropout regulator LDO includes an error amplifier A401, a voltage buffer A407, and a second power transistor A410 shared with the PWM modulation.

[0124] Reference Figure 7 The diagram shown is a schematic representation of the driving waveform according to a specific embodiment of the present invention. The diagram illustrates the single-ended voltage waveform to ground generated by the driving circuit at output pins 1 and 2, and the differential voltage waveform finally applied across the EL lamp. The final driving waveform applied across the EL lamp is a periodic, near-sine wave AC signal. The rising edge of the waveform (e.g., Figure 7The waveform shown in the middle left image (enlarged view) exhibits a stepped approximation shape. This is formed by the switching power supply module in the circuit injecting energy through high-frequency pulse width modulation (PWM). Each step represents the discrete energy injection into the capacitive load of the EL lamp within one or more switching cycles, while the tiny spikes on the steps are high-frequency noise and ripples left over from the switching process. This discrete energy delivery method, although microscopically step-like, accurately follows the rising trajectory of the target waveform macroscopically and ensures high energy transfer efficiency. Unlike the step-like rising edge, the falling edge of the waveform presents a smooth, continuous curve, closely resembling an ideal sine wave. This corresponds to the discharge stage of the LDO linear control loop used in this invention. In this stage, the circuit smoothly releases the charge stored on the EL lamp through a simulated control loop in a linear adjustment manner, thereby achieving accurate and low-noise simulation of the falling curve.

[0125] Figure 7 The waveform clearly demonstrates the composite driving strategy adopted in this invention: the waveform rise is completed by using a high-efficiency but noisy switching power supply mode, and the waveform fall is completed by using a smooth, low-noise linear discharge mode, thereby achieving an ideal balance between efficiency and waveform quality.

[0126] In summary, this electroluminescent lamp driver circuit chip has the advantages of high efficiency and low power consumption. By adopting lossless switching energy transfer based on inductance, it completely replaces the traditional RC charging and discharging scheme, fundamentally eliminating resistive losses and increasing the energy conversion efficiency from the theoretical upper limit of 50% to the inherent high efficiency level of switching regulators (typically reaching over 90%).

[0127] This electroluminescent lamp driver circuit chip boasts advantages such as stable waveform and controllable electromagnetic compatibility (EMC) performance. The output waveform is actively generated by closed-loop feedback control from a precise sine wave reference, resulting in highly stable waveform shape, amplitude, and frequency, unaffected by changes in load characteristics such as the EL lamp's capacitance or the length of connecting cables. This ensures the consistency and predictability of harmonic components, greatly simplifies EMC design, and improves the product's EMC performance.

[0128] This electroluminescent lamp driver circuit chip boasts advantages of high integration and low cost. The control scheme proposed in this invention has clear logic and is integrated into a single integrated circuit (IC), enabling a fully integrated single-chip solution that includes power stages and all control and protection functions, thereby significantly reducing bill of materials (BOM) costs and product size.

[0129] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0130] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0131] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0132] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0133] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A driver circuit chip for an electroluminescent lamp, characterized in that, include: The I2C demodulation module is used to receive external master control commands and set the target operating frequency and output voltage amplitude. A signal generator is used to generate the target waveform signal required to drive the electroluminescent lamp according to the settings of the I2C demodulation module. Two identical closed-loop feedback control modules are provided, with their respective output terminals electrically connected to the two ends of an electroluminescent lamp. Each closed-loop feedback control module includes a voltage sampling unit, an error amplification unit, a PWM modulation unit, an analog modulation unit, and a main switching unit. The voltage sampling unit is used to sample the output voltage of the closed-loop feedback control module and generate a feedback voltage signal. The error amplification unit is used to compare the feedback voltage signal with the target waveform signal and generate an error signal proportional to the difference between the two. The PWM modulation unit is used to compare the error signal with the sawtooth wave RAMP signal, generate a PWM signal whose pulse width is proportional to the amplitude of the error signal, and buffer and shape the PWM signal and amplify its driving capability. The main switching unit is used to control the duty cycle under the drive of the amplified PWM signal. The analog modulation unit is used to buffer and isolate the error signal, generate a smooth analog signal, and form a discharge path with adjustable on-resistance.

2. The electroluminescent lamp driving circuit chip according to claim 1, characterized in that, The voltage sampling unit includes a resistor divider, which includes a first voltage divider resistor and a second voltage divider resistor connected in series. One end of the first voltage divider resistor and one end of the second voltage divider resistor are respectively connected to the output voltage of the closed-loop feedback control module and connected to ground level; The error amplification unit includes an error amplifier; The other ends of the first voltage divider resistor and the second voltage divider resistor are connected together and then connected to the inverting input terminal of the error amplifier; The target waveform signal is connected to the non-inverting input of the error amplifier.

3. The electroluminescent lamp driving circuit chip according to claim 2, characterized in that, The PWM modulation unit includes a PWM comparator, an RS flip-flop unit, logic gates, and a non-inverting buffer; The inverting input of the PWM comparator is connected to the output of the error amplifier, and the non-inverting input of the PWM comparator is connected to the sawtooth wave RAMP signal. The PWM comparator compares the error signal with the sawtooth wave RAMP signal. When the level of the error signal is higher than that of the sawtooth wave RAMP signal, the PWM comparator outputs a high level, and vice versa, it outputs a low level, thereby generating a PWM signal whose pulse width is proportional to the amplitude of the error signal. The RS flip-flop unit includes a first RS flip-flop and a second RS flip-flop connected together, which are RS flip-flops synchronized by the clock CLK signal; The output of the PWM comparator is connected to the first input of the first RS flip-flop, the output of the second RS flip-flop is connected to the second input of the first RS flip-flop, the first input of the second RS flip-flop is connected to the clock CLK signal, and the second input of the second RS flip-flop is connected to the output of the first RS flip-flop. The first input terminal of the logic gate is connected to the output terminal of the first RS flip-flop; the logic gate is an AND gate. The output of the logic gate is connected to the input of the in-phase buffer; The PWM signal is implemented with a fixed start frequency per cycle by an RS flip-flop unit synchronized by the clock CLK signal; after synchronization, the PWM signal passes through the logic gate and then through the in-phase buffer to achieve buffering, shaping and amplification of driving capability.

4. The electroluminescent lamp driving circuit chip according to claim 3, characterized in that, The in-phase buffer consists of several CMOS inverters connected end to end, each of which includes a PMOS transistor and an NMOS transistor. The source of the PMOS transistor is connected to the internal power supply, and the source of the NMOS transistor is grounded. The gates of the PMOS transistor and the NMOS transistor are connected to form an input terminal; The drains of the PMOS transistor and the NMOS transistor are connected to form an output terminal; The output of the previous CMOS inverter is used as the input of the next CMOS inverter.

5. The electroluminescent lamp driving circuit chip according to claim 3, characterized in that, The main switching unit includes a main power switching transistor, an external inductor, and a diode; Wherein, one end of the external inductor is connected to the power supply voltage, and the positive and negative terminals of the diode are respectively connected to the other end of the external inductor and the output pin; The source of the main power switch is connected to ground, the gate of the main power switch is connected to the output of the in-phase buffer, and the drain of the main power switch is connected to the positive terminal of the diode.

6. The electroluminescent lamp driving circuit chip according to claim 5, characterized in that, The analog modulation unit includes a voltage buffer, a first power transistor, and a second power transistor; The input terminal of the voltage buffer is connected to the output terminal of the error amplifier; The output terminal of the voltage buffer is connected to the drain of the first power transistor and the gate of the second power transistor, respectively. The gate of the first power transistor is connected to the second input terminal of the logic gate; the source of the first power transistor is connected to ground. The source of the second power transistor is connected to ground. The drain of the second power transistor is connected to the negative terminal of the diode.

7. The electroluminescent lamp driving circuit chip according to claim 6, characterized in that, The voltage buffer includes a first PMOS transistor, a second PMOS transistor, and an NMOS transistor; The source of the first PMOS transistor is connected to the internal power supply, the drain of the NMOS transistor, and the drain of the second PMOS transistor, respectively. The gate of the first PMOS transistor is connected to the input signal, and the drain of the first PMOS transistor is connected to the ground level and the gate of the NMOS transistor, respectively. The source of the NMOS transistor is connected to ground. The source of the second PMOS transistor is connected to the internal power supply, and the gate of the second PMOS transistor is connected to its own drain.

8. The electroluminescent lamp driving circuit chip according to claim 1, characterized in that, It also includes a voltage reference / current bias module and a voltage regulator LDO. The voltage reference / current bias module provides a reference voltage and bias current for the internal analog circuits of the chip, and the voltage regulator LDO provides a stable power supply voltage for the internal low-voltage digital and analog circuits of the chip.

9. A driver circuit chip for an electroluminescent lamp according to claim 6, characterized in that, The target waveform signal is a sinusoidal reference voltage. The sinusoidal reference voltages provided by the signal generator to the two closed-loop feedback control modules are out of phase, and a differential AC drive voltage with doubled swing is obtained between the output terminals of the two closed-loop feedback control modules.

10. A control method for the electroluminescent lamp driving circuit chip according to claim 9, characterized in that, include: During the charging phase, within the rising half-cycle of the sinusoidal reference voltage, the error amplification unit in the closed-loop feedback control module compares the voltage sample value of the output voltage to the electroluminescent lamp with the sinusoidal reference voltage to generate an error signal. The error signal is converted into a PWM signal by the PWM modulation unit and then controlled by buffer shaping and drive capability amplification to control the duty cycle of the main power switch in the main switching unit. When the voltage sample value is lower than the sinusoidal reference voltage, the duty cycle of the PWM signal increases to inject more energy into the electroluminescent lamp, thereby increasing the output voltage; when the voltage sample value is higher than the sinusoidal reference voltage, the duty cycle decreases to limit the energy input. During the discharge phase, within the falling half-cycle of the sinusoidal reference voltage, the closed-loop feedback control module compares the voltage sample value with the sinusoidal reference voltage. The error signal output by the error amplifier unit is used to control the conduction state of the second power transistor of the analog modulation unit to form a discharge path with adjustable on-resistance. When the voltage sampling value is higher than the sinusoidal reference voltage, the discharge path conduction capability is enhanced to accelerate the charge release of the electroluminescent lamp; when the voltage sampling value is lower than the sinusoidal reference voltage, the discharge path conduction capability is weakened, so that the energy stored in the electroluminescent lamp can be released according to a smooth sinusoidal law, thereby accurately reproducing the descent curve of the sine wave.

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