Voltage supplement circuit based on serial multi-test task scene and supplement method thereof

Abstract

The invention provides a voltage supplement circuit based on a serial multi-test task scene and a supplement method thereof, and the circuit comprises a logic control module, a voltage division circuit module, a standard source module, and a double-control switch module. The logic control module comprises a calibration voltage check port, an inner loop current check port and an output port. The method has the advantages that through a dynamic voltage drop compensation and closed-loop feedback mechanism, the voltage stability and radio frequency index test precision in multiple test scenes are remarkably improved, equivalent path resistance is accurately calculated, instantaneous voltage drop caused by dynamic current is compensated, transient test requirements of various composite scenes are met, calibration and power supply functions are integrated, and the test efficiency is improved. Seamless execution of automatic scripts is supported, manual intervention is reduced, and the complexity and hardware cost of a test system are remarkably reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit testing, in particular to a voltage supplementing circuit and supplementing method based on a serial multi-test task scenario. BACKGROUND

[0002] In the field of radio frequency testing of intelligent terminals (especially battery-powered devices), 4G / 5G devices need to meet the radio frequency index verification under nine severe scenarios of extreme temperature (high temperature, normal temperature, low temperature) and voltage (high voltage, normal voltage, low voltage) combinations, among which the transmission performance test is extremely sensitive to voltage stability. The current industry generally uses non-programmed or low-cost programmed power supplies for testing, which can meet the normal power supply requirements, but has the following core defects:

[0003] Dynamic voltage drop interference: In the large current transient scenario (such as 5G high-speed data transmission), the relay resistance of the test cable causes dynamic voltage difference, making the actual power supply voltage of the device under test (DUT) deviate from the preset value, which seriously affects the accuracy of radio frequency indicators such as transmit power and frequency offset;

[0004] Hidden fault risk: Traditional power supplies cannot compensate for line losses in real time, and index abnormalities caused by voltage fluctuations are difficult to trace, leading to misjudgment of test results and hidden failure risk;

[0005] Test efficiency limitation: The response speed of manual intervention to adjust the power supply voltage is slow, which cannot adapt to the efficient execution demand of automatic test scripts (such as CMWRuning), and the stability of multi-scenario traversal test is poor.

[0006] In addition, the existing scheme lacks an adaptive compensation mechanism for cable impedance, especially under complex extreme conditions such as low temperature / high voltage and high temperature / low voltage, the voltage offset and radio frequency parameter coupling error are further amplified, and the voltage accuracy under complex scenarios is poor and cannot be repeatedly tested. SUMMARY

[0007] The main purpose of the present application is to provide a voltage supplementing circuit and supplementing method based on a serial multi-test task scenario, aiming to solve the problem of poor voltage accuracy under complex scenarios.

[0008] The present application provides a voltage supplementing circuit based on a serial multi-test task scenario, which is used for voltage supplementing of a device under test, comprising: a logic control module, a voltage dividing circuit module, a standard source module, and a double-control switch module.

[0009] The logic control module comprises a calibration voltage check port, an inner loop current check port, and an output port.

[0010] The double-control switch module is controlled by the logic control module, and a first path of the standard source module-the double-control switch module-the inner loop current inspection port is formed according to the control to detect a first current at the inner loop current inspection port;

[0011] and a second path of the standard source module-the double-control switch module-the calibration voltage inspection port is formed according to the control to detect a first voltage at the calibration voltage inspection port;

[0012] and a third path of the output port-the double-control switch module-the device under test-ground and a fourth path of the output port-the voltage dividing circuit module-ground are formed according to the control, and an output voltage of the output port is calculated according to the first voltage and the voltage and the first current of the standard source module, and the output port is controlled to output the output voltage to make the voltage across the device under test within a preset range.

[0013] Further, the double-control switch module comprises a first double-control switch, a second double-control switch, a third double-control switch, a fourth double-control switch, a fifth double-control switch and a sixth double-control switch;

[0014] The inner loop current inspection port is connected with a first end of the first double-control switch, and the calibration voltage inspection port is connected with a second end of the first double-control switch, and a common end of the first double-control switch is connected with a common end of the third double-control switch;

[0015] A first end of the third double-control switch is connected with the output port, and a second end of the third double-control switch is connected with a second end of the sixth double-control switch;

[0016] A first end of the sixth double-control switch is grounded, and a common end of the sixth double-control switch is connected with a common end of the fifth double-control switch;

[0017] A first end of the fifth double-control switch is connected with a second end of the fourth double-control switch, and a second end of the fifth double-control switch is connected with a negative end of the device under test;

[0018] A first end of the fourth double-control switch is connected with a positive end of the device under test, and a common end of the fourth double-control switch is connected with a common end of the second double-control switch;

[0019] A first end of the second double-control switch is connected with the standard source module, and a second end of the second double-control switch is connected with the output port.

[0020] Further, the voltage dividing circuit module comprises a first voltage dividing sub-circuit and a second voltage dividing sub-circuit, a first end of the first voltage dividing sub-circuit is connected with the output port, a second end of the first voltage dividing sub-circuit is connected with a first end of the second voltage dividing sub-circuit, and a second end of the second voltage dividing sub-circuit is grounded.

[0021] Further, the logic control module further comprises an output voltage feedback port, and the second end of the first voltage dividing sub-circuit is further connected with the output voltage feedback port.

[0022] Further, the first voltage dividing sub-circuit and / or the second voltage dividing sub-circuit comprises a plurality of branches connected in parallel, and a plurality of voltage dividing resistors capable of being short-circuited are arranged on each branch.

[0023] Further, a circuit protection module is further included, and the common end of the first double control switch is connected with the common end of the third double control switch through the circuit protection module.

[0024] The application further provides a voltage supplementing method based on a serial multi-test task scenario, which is realized by the voltage supplementing circuit based on a serial multi-test task scenario.

[0025] The double control switch module is controlled to form the first path, the standard source module is controlled to supply power at a set voltage to detect a first current at the inner ring current detection port, the double control switch module is controlled to form the second path, and the standard source module is controlled to supply power at the set voltage to detect a first voltage at the calibration voltage detection port.

[0026] An equivalent resistance value is calculated based on the first voltage, the set voltage and the first current.

[0027] The total voltage dividing resistance value of the voltage dividing circuit module is adjusted according to the equivalent resistance value, and the output voltage of the output port is set according to the total voltage dividing resistance value.

[0028] The double control switch module is controlled to form the third path and the fourth path to make the voltage across the device under test within a preset range.

[0029] Further, after the step of controlling the double control switch module to form the third path and the fourth path to make the voltage across the device under test within a preset range, the method further comprises:

[0030] A temperature parameter is obtained based on a preset temperature detection module.

[0031] A corresponding relationship is constructed based on the temperature parameter, the output voltage and the total voltage dividing resistance value of the voltage dividing circuit module, and is stored in a preset relationship corresponding table.

[0032] The application also provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method according to any one of the preceding embodiments.

[0033] The application also provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of the method according to any one of the preceding embodiments.

[0034] The application has the following advantages: through dynamic voltage drop compensation and closed-loop feedback mechanism, the voltage stability and RF index test accuracy in multiple test scenarios are significantly improved, the equivalent path resistance is accurately calculated, the instantaneous voltage drop caused by dynamic current is compensated, the transient test requirements of various composite scenarios are adapted, the calibration and power supply functions are integrated, the seamless execution of automatic scripts is supported, the manual intervention is reduced, the misjudgment and data drift problems caused by the hidden nature of voltage drop in the traditional scheme are avoided, the configurable combination of the voltage dividing circuit and the double-control switch is compatible with multiple standard sources and voltage dividing ratios, the cross-scene application from consumer terminals to industrial devices is supported, and the test system complexity and hardware cost are significantly reduced. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 is a circuit schematic diagram of a voltage compensation circuit based on a serial multi-test task scenario according to an embodiment of the application;

[0036] Figure 2 is a flowchart of a voltage compensation method based on a serial multi-test task scenario according to an embodiment of the application;

[0037] Figure 3 is a structural schematic block diagram of an electronic device according to an embodiment of the application.

[0038] The implementation, functional features and advantages of the application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the application.

[0040] It should be noted that all the direction indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between components in a certain posture (as shown in the drawings), and if the certain posture changes, the direction indications will also change accordingly. The connection can be direct connection or indirect connection.

[0041] The term "and / or" herein is only used to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and B can represent three cases of existence of A alone, existence of A and B at the same time, and existence of B alone.

[0042] In addition, the descriptions such as "first", "second" and the like in the present application are only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" can explicitly or implicitly include at least one of the features. In addition, the technical solutions of various embodiments can be combined with each other, but it must be based on the realization of ordinary skilled in the art, when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, nor within the protection scope required by the present application.

[0043] Referring to Figure 1 The present application provides a voltage supplement circuit based on serial multi-test task scene, which is used for voltage supplement of a device to be tested 100, comprising: a logic control module 10, a voltage division circuit module 30, a standard source module 40, a double control switch module;

[0044] The logic control module 10 comprises a calibration voltage inspection port, an inner loop current inspection port and an output port;

[0045] The double control switch module is controlled by the logic control module 10, and according to the control, a first path of the standard source module 40-the double control switch module-the inner loop current inspection port is formed to detect the first current at the inner loop current inspection port;

[0046] And according to the control, a second path of the standard source module 40-the double control switch module-the calibration voltage inspection port is formed to detect the first voltage at the calibration voltage inspection port;

[0047] and according to the control forming the third path of the output port-the double control switch module-the device under test 100-ground, and the fourth path of the output port-the voltage dividing circuit module 30-ground, according to the first voltage and the voltage and the first current of the standard source module 40, the output voltage of the output port is calculated, and the output port is controlled to output the output voltage to make the voltage across the device under test 100 within a preset range.

[0048] In the embodiment, by controlling the double control switch module, the first path (standard source→Imonitor) is switched to, the reference current I1 is measured; the second path (standard source→Vmonitor) is switched to, the reference voltage V1 is measured; and the total impedance Rpath of the current test path is calibrated. The third path (output voltage→voltage across the device under test 100→ground) and the fourth path (output voltage→voltage dividing circuit→ground) are turned on through the double control switch module; the output voltage is dynamically adjusted to make the voltage across the device under test 100 satisfy: voltage across the device under test 100=Vset+kΔV, where k is a compensation coefficient (0<k≤1), Vset is a set voltage, and ΔV is a voltage drop, and the PID algorithm is iteratively converged. For different devices in a serial test queue, the above steps realize automatic and continuous calibration.

[0049] In one embodiment, the double control switch module includes: a first double control switch SPDT1, a second double control switch SPDT2, a third double control switch SPDT3, a fourth double control switch SPDT4, a fifth double control switch SPDT5, and a sixth double control switch SPDT6.

[0050] The inner ring current check port is connected with the first end of the first double control switch SPDT1, and the calibration voltage check port is connected with the second end of the first double control switch SPDT1, and the common end of the first double control switch SPDT1 is connected with the common end of the third double control switch SPDT3.

[0051] The first end of the third double control switch SPDT3 is connected with the output port, and the second end of the third double control switch SPDT3 is connected with the second end of the sixth double control switch SPDT6.

[0052] The first end of the sixth double control switch SPDT6 is grounded, and the common end of the sixth double control switch SPDT6 is connected with the common end of the fifth double control switch SPDT5.

[0053] The first end of the fifth double control switch SPDT5 is connected with the second end of the fourth double control switch SPDT4, and the second end of the fifth double control switch is connected with the negative electrode end of the device under test 100.

[0054] The first end of the fourth double control switch SPDT4 is connected with the positive end of the device under test 100, and the common end of the fourth double control switch SPDT4 is connected with the common end of the second double control switch SPDT2.

[0055] The first end of the second double control switch SPDT2 is connected with the standard source module 40, and the second end of the second double control switch SPDT2 is connected with the output port.

[0056] In the embodiment, the dynamic switching network is composed of six double control switches, wherein the first double control switch SPDT1, the second double control switch SPDT2, the third double control switch SPDT3, the fourth double control switch SPDT4, the fifth double control switch SPDT5 and the sixth double control switch SPDT6 correspond to S1, S2, S3, S4, S5 and S6 respectively, C1 represents the first end, C2 represents the second end, COM represents the common end, DUT represents the device under test 100, Imonitor represents the inner loop current checking port, Vout represents the output port, and Vmonitor represents the calibration voltage checking.

[0057] The steps of the inner loop current detection are as follows:

[0058] Switching action: S1 switches to C1 (Imonitor), S2 switches to C1 (standard source), S3 switches to C1 (Vout is disconnected), and S6 keeps C2 (ground is disconnected).

[0059] Signal path: standard source→S2C1→S2COM→S4COM→S4C1→DUT positive electrode→DUT negative electrode→S5C2→S5COM→S6COM→S6C2→GND

[0060] The loop current I1 is detected through Imonitor.

[0061] The steps of the calibration voltage detection are as follows:

[0062] Switching action: S1 switches to C2 (Vmonitor), S2 keeps C1 (standard source), S3 switches to C2 (connects S6C2), and S6 switches to C1 (ground is connected).

[0063] Signal path: standard source→S2C1→S2COM→S4COM→S4C1→DUT positive electrode→DUT negative electrode→S5C2→S5COM→S6COM→S6C1→S3C2→S3COM→S1COM→S1C2→Vmonitor, and the calibration voltage V1 is read through Vmonitor.

[0064] Objective: dynamically adjust the output voltage (Vout) to stabilize the voltage across the DUT in a preset range.

[0065] Switching actions:

[0066] S2 switches to C2 (connect Vout), S3 switches to C1 (turn on Vout→DUT), S4 switches to C1 (turn on DUT positive), S5 switches to C1 (turn on DUT negative), S6 remains C1 (ground on).

[0067] Signal path:

[0068] Main power supply path:

[0069] Vout→S3C1→S3COM→S1COM→S1C1→Imonitor (off).

[0070] DUT power supply path: Vout→S3C1→S3COM→S1COM→S2COM→S4COM→S4C1→DUT positive→DUT negative→S5C1→S5COM→S6COM→S6C1→GND;

[0071] Voltage division feedback path: Vout→voltage division circuit→GND, the voltage division circuit feeds back the voltage signal to the logic control module 10 in real time, and generates compensation instructions.

[0072] In one embodiment, the voltage division circuit module 30 includes a first voltage division sub-circuit 31 and a second voltage division sub-circuit 32, a first end of the first voltage division sub-circuit 31 is connected with the output port, a second end of the first voltage division sub-circuit 31 is connected with a first end of the second voltage division sub-circuit 32, and a second end of the second voltage division sub-circuit 32 is grounded.

[0073] The voltage division circuit module 30 is composed of a first voltage division sub-circuit 31 (Sub1) and a second voltage division sub-circuit 32 (Sub2) in series, and the connection relationship of each terminal is as follows:

[0074] The first end (A1) of Sub1 is directly connected to the output port (Vout) of the system for receiving the output voltage to be adjusted;

[0075] The second end (B1) of Sub1 is connected with the first end (A2) of Sub2, forming an intermediate node (Vmid) to output a voltage division feedback signal;

[0076] The second end (B2) of Sub2 is grounded (GND) to form a closed loop.

[0077] Relationship between output voltage and voltage division resistance: Wherein Similarly

[0078] It can be obtained that:

[0079] Wherein A-H is the number of resistance of access path, the coefficient in A-H can be removed by open circuit, wherein R 上 represents the equivalent resistance of the first voltage division sub-circuit 31, R 下 represents the equivalent resistance of the second voltage division sub-circuit 32, R 上 is the minimum value (i.e. only one 100K resistance in each path is connected to the circuit, ), R 下 is the maximum value (only one path is connected to the circuit, other paths remain in the open state, and the resistance in the connected path is connected to the circuit R 下 = 6 * 100K) is the minimum adjustment value at this time: The maximum value is the opposite of the minimum value, which is

[0080] In an embodiment, the logic control module 10 further comprises an output voltage feedback port, and the second end of the first voltage division sub-circuit 31 is further connected to the output voltage feedback port. The double control switch turns on Vout to the load, synchronously monitors the voltage drop caused by the change of load current, and realizes dynamic compensation. It avoids the error introduced by the additional sampling circuit in the traditional scheme (such as cable voltage drop, contact resistance); by fixing the voltage division ratio, the high voltage signal (such as 30V) is scaled down to the ADC range (such as 0-3V) in proportion, without the need for an external attenuator. The feedback path can also be separated from the main power supply path to prevent signal lag caused by load mutation, for example: when the DUT current changes in steps, the output voltage feedback port can trigger the compensation instruction within μs.

[0081] In an embodiment, the first voltage division sub-circuit 31 and / or the second voltage division sub-circuit 32 comprises a plurality of branches connected in parallel, and a plurality of short-circuitable voltage division resistors are arranged on each branch. Thus, the resistors on each branch can be adjusted.

[0082] In an embodiment, a circuit protection module is further included, and the common terminal of the first double control switch SPDT1 is connected to the common terminal of the third double control switch SPDT3 through the circuit protection module. Protection is performed through the circuit protection module.

[0083] Referring to Figure 2 , a voltage supplement method based on a serial multi-test task scenario is realized by the voltage supplement circuit based on the serial multi-test task scenario described above, and the method comprises:

[0084] S1: controlling the double control switch module to form the first path, controlling the standard source module to supply power at a set voltage, detecting a first current at the inner ring current inspection port, and controlling the double control switch module to form the second path, controlling the standard source module to supply power at the set voltage, detecting a first voltage at the calibration voltage inspection port;

[0085] S2: calculating an equivalent resistance value based on the first voltage, the set voltage, and the first current;

[0086] S3: adjusting a total resistance value of the voltage dividing circuit module according to the equivalent resistance value, and setting an output voltage of the output port according to the total resistance value;

[0087] S4: controlling the double control switch module to form the third path and the fourth path, so that the voltage across the device under test is within a preset range.

[0088] The above specific implementation steps have been specifically described in the embodiment of explaining the implementation of the voltage supplement circuit based on the serial multi-test task scenario, and will not be repeated here.

[0089] In one embodiment, after the step S4 of controlling the double control switch module to form the third path and the fourth path, so that the voltage across the device under test 100 is within a preset range, the method further comprises:

[0090] S401: obtaining a temperature parameter based on a preset temperature detection module;

[0091] S402: constructing a corresponding relationship based on the temperature parameter, the output voltage, and the total resistance value of the voltage dividing circuit module 30, and storing it in a preset relationship corresponding table.

[0092] As described in the steps S401-S402 above, the temperature detection module is deployed in a key heat-sensitive area (such as the voltage dividing circuit, the double control switch node, or the vicinity of the DUT), and contains at least one temperature sensor (such as NTC thermistor, PT100 platinum resistance, or digital sensor DS18B20). In subsequent tests, the logic control module 10 automatically compensates for the parameter drift caused by temperature by querying the relationship corresponding table, thereby speeding up the calibration.

[0093] The application has the beneficial effects that: through dynamic voltage drop compensation and closed-loop feedback mechanism, the voltage stability and radio frequency index test precision under multiple test scenes are significantly improved, the equivalent path resistance is accurately calculated, the instantaneous voltage drop caused by dynamic current is compensated, the transient test demand of various composite scenes is adapted, the calibration and power supply functions are integrated, the seamless execution of automatic scripts (such as CMWRuning) is supported, the manual intervention is reduced, the misjudgment and data drift problems caused by the hidden nature of voltage drop in the traditional scheme are avoided, the configurable combination of the voltage dividing circuit and the double-control switch is provided, various standard sources and voltage dividing ratios are compatible, the cross-scene application from consumer terminals to industrial devices is supported, and the test system complexity and hardware cost are significantly reduced.

[0094] Reference Figure 3 In the embodiments of the application, an electronic device can be a server, and the internal structure of the electronic device can be as shown in Figure 3 The electronic device includes a processor, a memory, a network interface and a database connected through a system bus. The processor of the computer design is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the electronic device is used to store various current and voltage data. The network interface of the electronic device is used to communicate with the terminal outside through the network connection. The computer program is executed by the processor to implement the voltage compensation circuit based on the serial multi-test task scene as described in any of the above embodiments.

[0095] Those skilled in the art can understand that Figure 3 The structure shown in the above embodiment is only a block diagram of part of the structure related to the scheme of the application, and does not constitute a limitation on the electronic device to which the scheme of the application is applied.

[0096] The embodiments of the application further provide a computer readable storage medium having a computer program stored thereon, and the computer program is executed by the processor to implement the voltage compensation circuit based on the serial multi-test task scene as described in any of the above embodiments.

[0097] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when executed, can include the processes of the above-mentioned embodiment methods. Any reference to memory, storage, databases, or other media in this application and in examples provided herein, unless specifically stated otherwise, can include non-volatile and / or volatile memory. Non-volatile memory can include, for example, read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include, for example, random access memory (RAM), or external cache memory. As an illustration and not a limitation, RAM can be available in many forms such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), Rambus DRAM (RDRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0098] It should be noted that the terms "comprising", "including", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, a device, an article or a method that comprises a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, device, article or method. Without further limitation, an element defined by the phrase "comprising a" does not exclude the presence of additional identical elements in the process, device, article or method that includes the element.

[0099] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the scope of the claims of the present application.

Claims

1. A voltage supply circuit based on serial multi-test task scenarios, for voltage supply to a device under test, characterized in that, The application relates to a voltage output circuit for testing a device under test, comprising: a logic control module, a voltage dividing circuit module, a standard source module and a double-control switch module; the logic control module comprises a calibration voltage inspection port, an inner loop current inspection port and an output port; the double-control switch module is controlled by the logic control module, and according to the control, a first path of the standard source module-the double-control switch module-the inner loop current inspection port is formed to detect a first current at the inner loop current inspection port; and according to the control, a second path of the standard source module-the double-control switch module-the calibration voltage inspection port is formed to detect a first voltage at the calibration voltage inspection port; and according to the control, a third path of the output port-the double-control switch module-the device under test-ground is formed, and a fourth path of the output port-the voltage dividing circuit module-ground is formed, the output voltage of the output port is calculated according to the first voltage, the voltage of the standard source module and the first current, and the output port outputs the output voltage to make the voltage across the device under test within a preset range.

2. The voltage padding circuit based on serial multiple test task scenarios as claimed in claim 1, wherein, the double-control switch module comprises a first double-control switch, a second double-control switch, a third double-control switch, a fourth double-control switch, a fifth double-control switch and a sixth double-control switch; the inner loop current inspection port is connected with a first end of the first double-control switch, the calibration voltage inspection port is connected with a second end of the first double-control switch, and a common end of the first double-control switch is connected with a common end of the third double-control switch; a first end of the third double-control switch is connected with the output port, and a second end of the third double-control switch is connected with a second end of the sixth double-control switch; a first end of the sixth double-control switch is grounded, and a common end of the sixth double-control switch is connected with a common end of the fifth double-control switch; a first end of the fifth double-control switch is connected with a second end of the fourth double-control switch, and a second end of the fifth double-control switch is connected with a negative electrode end of the device under test; a first end of the fourth double-control switch is connected with a positive electrode end of the device under test, and a common end of the fourth double-control switch is connected with a common end of the second double-control switch; a first end of the second double-control switch is connected with the standard source module, and a second end of the second double-control switch is connected with the output port.

3. The voltage padding circuit based on serial multiple test task scenarios as claimed in claim 2, wherein, the voltage dividing circuit module comprises a first voltage dividing sub-circuit and a second voltage dividing sub-circuit, a first end of the first voltage dividing sub-circuit is connected with the output port, a second end of the first voltage dividing sub-circuit is connected with a first end of the second voltage dividing sub-circuit, and a second end of the second voltage dividing sub-circuit is grounded.

4. The voltage padding circuit based on serial multiple test task scenarios as claimed in claim 3, wherein, the logic control module further comprises an output voltage feedback port, and the second end of the first voltage dividing sub-circuit is further connected with the output voltage feedback port.

5. The voltage padding circuit based on serial multiple test task scenarios as claimed in claim 3, wherein, the first voltage dividing sub-circuit and / or the second voltage dividing sub-circuit comprises a plurality of branches connected in parallel, and a plurality of voltage dividing resistors which can be short-circuited are arranged on each branch.

6. The voltage supply circuit based on serial multi-test task scenario according to any one of claims 2-5, wherein, a circuit protection module is further arranged, and the common end of the first double-control switch is connected with the common end of the third double-control switch through the circuit protection module.

7. A voltage supplementing method based on a serial multi-test task scenario, characterized in that, The voltage supplement circuit implementation based on the serial multi-test task scenario according to any one of claims 1-6, the method comprising: controlling the double-control switch module to form the first path, controlling the standard source module to supply power at a set voltage, and detecting a first current at the inner ring current inspection port; and controlling the double-control switch module to form the second path, controlling the standard source module to supply power at the set voltage, and detecting a first voltage at the calibration voltage inspection port; calculating an equivalent resistance value based on the first voltage, the set voltage, and the first current; adjusting a total resistance value of the voltage dividing circuit module according to the equivalent resistance value, and setting an output voltage of the output port according to the total resistance value; controlling the double-control switch module to form the third path and the fourth path, so that the voltage across the device under test is within a preset range.

8. The voltage supplement method based on serial multi-test task scenarios as claimed in claim 7, wherein, The step of controlling the double-control switch module to form the third path and the fourth path, so that the voltage across the device under test is within a preset range, further comprises: obtaining a temperature parameter based on a preset temperature detection module; constructing a corresponding relationship based on the temperature parameter, the output voltage, and the total resistance value of the voltage dividing circuit module, and storing the corresponding relationship in a preset relationship corresponding table. 9.An electronic device comprising a memory and a processor, the memory storing a computer program, wherein, The processor executes the computer program to implement the steps of the method of any one of claims 7-8.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the method of any one of claims 7-8.

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