Electronic paper display device and electronic equipment

Abstract

The invention provides an electronic paper display device and electronic equipment. The electronic paper display device comprises an array substrate, gate lines and source lines, the array substrate comprises a plurality of pixel units, the pixel units are arranged at intervals to form a pixel array, and the gate lines and the source lines are arranged on the array substrate and used for transmitting gate signals and source signals to the corresponding pixel units respectively. Therefore, the display of the electronic paper display device is controlled. Through the arrangement of the pixel array, the gate lines and the source lines, the brightness / chromaticity difference between the pixel units in the transverse direction and the longitudinal direction can be reduced, and the display effect of the electronic paper display device is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to an electronic paper display device and electronic equipment. BACKGROUND

[0002] Electronic paper has passive display and other paper-like visual characteristics, and is widely used in electronic readers and electronic tags and other electronic products.

[0003] In the related art, when a certain gate signal line of an electronic paper display device is applied with a high level, all pixel units in the corresponding pixel row will be sequentially turned on in the row direction, but the turn-on of each pixel unit will cause electrical phenomena such as attenuation and fluctuation of the gate signal, thereby causing differences in charging rate, resistance, capacitance and other electrical characteristics of different pixel units in the row, resulting in poor display refresh and uneven display effect. On the other hand, all pixel units in the pixel column corresponding to the gate signal line will also be affected, and due to the line resistance of the gate signal line, the charging rate and actual voltage, resistance, capacitance and other electrical characteristics of all pixel units are further affected, ultimately causing uneven migration speed of electronic paste particles of a large number of pixel units, producing differences in brightness / chroma in the horizontal and vertical directions, reducing overall uniformity and refresh uniformity, and affecting the display effect of the electronic paper display device. SUMMARY

[0004] The main purpose of the present application is to provide an electronic paper display device and electronic equipment, which reduces the brightness / chroma difference in the horizontal and vertical directions and improves the display effect of the electronic paper display device.

[0005] In a first aspect, the present application provides an electronic paper display device, comprising: An array substrate, comprising a plurality of pixel units, the plurality of pixel units are arranged at intervals to form a pixel array, the pixel array at least comprises a first pixel unit, a second pixel unit, a third pixel unit and a fourth pixel unit, the first pixel unit and the second pixel unit are arranged at intervals along a first direction to form a first pixel group, the third pixel unit and the fourth pixel unit are arranged at intervals along the first direction to form a second pixel group, the first pixel unit and the third pixel unit are arranged at intervals along a second direction to form a third pixel group, the second pixel unit and the fourth pixel unit are arranged at intervals along the second direction to form a fourth pixel group, and the first direction and the second direction are arranged at an angle; a gate line, the gate line being disposed on the array substrate, the gate line comprising a first gate signal line, a second gate signal line and a gate connecting line, the first gate signal line and the second gate signal line extending at least partially along a first direction, the first gate signal line being electrically connected to each pixel unit in the first pixel group, the second gate signal line being electrically connected to each pixel unit in the second pixel group, the first gate signal line and the second gate signal line being electrically connected to the gate connecting line; a source line, the source line being disposed on the array substrate, the source line extending at least partially along a second direction, the source line comprising at least a first source signal line, a second source signal line, a third source signal line and a fourth source signal line, the first source signal line being electrically connected to the source of the first pixel unit, the second source signal line being electrically connected to the source of the second pixel unit, the third source signal line being electrically connected to the source of the third pixel unit, the fourth source signal line being electrically connected to the source of the fourth pixel unit.

[0006] In a second aspect, the present application provides an electronic device, which comprises the electronic paper display device according to any one of the embodiments of the present application.

[0007] The electronic paper display device provided by the application comprises an array substrate, a gate line and a source line. Firstly, the array substrate comprises a plurality of pixel units arranged at intervals in different directions and divided into a plurality of pixel groups. The special layout of the gate line and the source line not only provides operation space for processes such as deposition and etching, but also facilitates display quality inspection, detection and refresh control of the pixel units. Secondly, the plurality of gate signal lines are connected in parallel through the gate connection lines, so that the same signal can be transmitted at the same time, thereby improving the electrical characteristics between the plurality of pixel groups, reducing display differences and improving display effects in the electronic paper display device. Thirdly, the arrangement density of the pixel units connected to a single source signal line is greatly reduced, thereby improving the electrical characteristic consistency of a large number of pixel units, improving the charging efficiency of the pixel units and further optimizing the display effect. Finally, in terms of control, stable transmission of the gate signal is the premise of efficient work of the source signal. If the gate signal cannot be accurately transmitted to the pixel units, the opening rate of the specified pixel units will not be as expected, and the effect of the source signal on the pixel units will be greatly reduced. The transmission scheme of the source signal and the transmission scheme of the gate signal are interdependent. In terms of layout, the layout of the gate signal line and the source signal line is matched with each other, extends in different directions and regularly connects different parts of the pixel groups and the pixel units, so as to ensure the uniform and accurate distribution of the electric field controlled by the microcavity of the electronic paste. The position, shape and layout of the pixel units, the design of the gate signal line and the design of the source signal line in the application solve the problems of uneven display effect and uneven refresh of the traditional electronic paper display device through close cooperation, reduce the electrical characteristic difference and display brightness / chromaticity difference between the pixel units, prevent the generation of brightness / chromaticity stripes and improve the display effect. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0009] Figure 1 A cross-sectional structure schematic diagram of an electronic paper display device provided by an embodiment of the application; Figure 2 A structure schematic diagram of an electronic paper display device provided by an embodiment of the application; Figure 3 A structure schematic diagram of an electronic paper display device provided by an embodiment of the application; Figure 4A structural schematic diagram of an electronic paper display device provided by an embodiment of the present application; Figure 5 A structural schematic diagram of an electronic paper display device provided by an embodiment of the present application; Figure 6 A structural schematic diagram of an electronic device provided by an embodiment of the present application; Reference signs: X, first direction; Y, second direction; I, first pixel unit; II, second pixel unit; III, third pixel unit; IV, fourth pixel unit; V, fifth pixel unit; VI, sixth pixel unit; VII, seventh pixel unit; VIII, eighth pixel unit; 1000, electronic device; 100, electronic paper display device; 101, driving layer; 102, encapsulation layer; 103, flow medium layer; 200, display controller; 201, gate signal controller; 202, source signal controller; 10, array substrate; 11, pixel unit; 111, pixel electrode; 12, gate line; 121, first gate signal line; 122, second gate signal line; 123, third gate signal line; 124, gate connection line; 13, source line; 131, first source signal line; 132, second source signal line; 133, third source signal line; 134, fourth source signal line; 20, encapsulation substrate; 21, common electrode; 30, support structure; 31, microcavity structure; 32, electronic paste; 41, first pixel group; 42, second pixel group; 43, third pixel group; 44, fourth pixel group; 45, fifth pixel group; 46, sixth pixel group. DETAILED DESCRIPTION

[0010] The technical solutions in the embodiments of the present application will be clearly and completely described in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0011] The flowcharts shown in the drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor do they have to be executed in the described order. For example, some operations / steps can be further decomposed, combined or partially merged, so that the actual execution order may be changed according to the actual situation.

[0012] It is to be understood that the terms used in this specification of the present application are only for the purpose of describing particular embodiments and do not intend to limit the present application. As used in this specification and the appended claims of the present application, "a," "an," and "the" are each intended to include the plural forms unless the context clearly indicates otherwise.

[0013] It should be understood that, in order to facilitate the clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, the terms "first", "second", etc. are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first callback function and the second callback function are only used to distinguish different callback functions, and do not limit the order. Those skilled in the art can understand that the terms "first", "second", etc. do not limit the quantity and execution order, and the terms "first", "second", etc. also do not necessarily mean different.

[0014] It should also be understood that the term "and / or" used in the specification and the appended claims of the present application means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0015] Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The following embodiments and features in the embodiments can be combined with each other without conflict.

[0016] Electronic paper display (EPD) is a reflective display system based on microcavity electrophoretic architecture. Its core is composed of a driving plate, a flow medium layer, and a packaging plate from bottom to top: the driving plate arranges thin film transistors, common electrodes, and pixel electrodes in each pixel unit in turn; the packaging plate provides a common potential on the side facing the microcavity; and the flow medium layer forms independent microcavities supported by a coffer and encapsulates electronic paste therein. The device uses the local electric field generated by the thin film transistor to drive the particle migration in the microcavity, thereby modulating the reflected light spectrum to achieve precise switching of gray scale, chroma, and brightness, and display a visual effect close to paper while having ultra-low power consumption and eye protection characteristics. The device has been widely used in e-books, electronic shelf labels, education tablets, smart wearables, Internet of Things terminals, and outdoor billboards, etc. With continuous iteration of microcavity structure, wiring layout, particle material, and flexible packaging technology, electronic paper display devices are expected to achieve new breakthroughs in response speed, color saturation, mechanical bending reliability, and environmental adaptability, and become an important technical cornerstone in the era of low-carbon display.

[0017] However, in the conventional electronic paper display device, when a certain gate signal line is applied with a high level, all pixel units in the corresponding pixel row will be sequentially turned on in the row direction, and the turn-on of each pixel unit will cause step-by-step attenuation of the gate signal, and the line resistance of the gate signal line further causes more obvious attenuation, thereby causing significant differences in charging rate, resistance, capacitance and other electrical characteristics of different pixel units in the row, and finally causing poor display refresh and uneven display effect.

[0018] Secondly, since the precise control of the pixel array requires close cooperation of the gate signal line and the source signal line, the line resistance of the source signal line itself and the energy loss caused by each pixel unit will also cause rapid attenuation of the source signal when the source signal line provides driving current for the activated pixel unit. In combination with the fluctuation and attenuation of the gate signal and the differences in electrical characteristics between pixel units, the charging voltage and charging rate of the multiple pixel units corresponding to the source signal line will be quite different, further causing uneven particle migration speed and degree in the electronic paste in the micro-cavity of the pixel unit, thereby causing differences in brightness / chroma of the pixel unit in the horizontal and vertical directions, and reducing the overall uniformity and refresh uniformity.

[0019] To solve the above problems, the present application provides an electronic paper display device, which is improved in three aspects of pixel array layout, gate line form layout and source line form layout, changes the signal transmission mode in the control process of the display device, significantly reduces the differences in electrical characteristics between pixel units, and solves the problems of poor display refresh and uneven display effect in the related art. Moreover, since the signal transmission of the technical solution of the present application is more stable and reliable, the response speed of the pixel array thereof is faster than that of the conventional pixel array, which is beneficial to improve the reflectivity and refresh rate of the electronic paper display device, effectively avoids the occurrence of ghosting, makes the display picture of the electronic paper display device have high resolution and uniformity, ensures clear picture without flickering, and brings good visual experience to the user.

[0020] For example, the electronic paper display device provided by the present application can be a micro-cavity electronic paper display (MED), or other electronic paper display devices, which are not specifically limited here. It should be understood that the micro-cavity electronic paper display (MED) is a passive display device.

[0021] In some embodiments, please refer to Figure 1The electronic paper display device 100 can be manufactured above the array substrate 10 to form a support structure 30 surrounding each pixel unit 11, and a packaging plate glass is used to form a micro-cavity structure 31, and the micro-cavity structure 31 can be filled with electronic paste 32. Specifically, the electronic paste 32 can be used as display particles, and the color change of the particles in the paste can be controlled by an electric field, and the display effect of high contrast, high reflection and high color gamut can be realized by particle reflection. It should be understood that the pixel unit of the present application can refer to a single pixel or a single sub-pixel / sub-pixel, which is not limited here. The micro-cavity electronic paper display can include a packaging layer 102, a flow medium layer 103 and a driving layer 101, the packaging layer 102 can include a packaging substrate 20 and a common electrode 21, the common electrode 21 is arranged on the packaging substrate 20, the driving layer 101 can include an array substrate 10 and a pixel electrode 111, the flow medium layer 103 can include the support structure 30 and the electronic paste 32, the support structure 30 cooperates with the packaging layer 102 and the array substrate 10 to form a micro-cavity structure 31, the micro-cavity structure 31 is filled with the electronic paste 32 and is arranged between the packaging substrate 20 and the array substrate 10. Wherein, the pixel electrode 111 is arranged on the array substrate 10 and cooperates with the common electrode 21 to form a control electric field for controlling the migration of the electronic paste 32 to realize the switching of chroma or brightness.

[0022] Please refer to Figure 2 and Figure 3 The electronic paper display device 100 provided by the embodiment of the present application includes an array substrate 10 and a gate line 12 and a source line 13 arranged on the array substrate 10. The array substrate 10 includes a plurality of pixel units 11, and the plurality of pixel units 11 are arranged at intervals to form a pixel array, and the pixel array includes at least a first pixel unit, a second pixel unit, a third pixel unit and a fourth pixel unit. The first pixel unit and the second pixel unit are arranged at intervals along a first direction to form a first pixel group 41, the third pixel unit and the fourth pixel unit are arranged at intervals along the first direction to form a second pixel group 42, the first pixel unit and the third pixel unit are arranged at intervals along a second direction to form a third pixel group 43, the second pixel unit and the fourth pixel unit are arranged at intervals along the second direction to form a fourth pixel group 44, and the first direction and the second direction are arranged at an angle.

[0023] It should be understood that the arrangement of the pixel units 11 can present various modes according to actual production and product needs, which are not specifically limited herein. For example, the included angle between the first direction and the second direction can range from 5° to 90°. Typically but not limitatively, the included angle between the first direction and the second direction can be 5°, 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50°, 55°, 60°, 65°, 70°, 75°, 80°, 85°, 90°, or any range formed by two numerical values. For another example, a single pixel unit 11 can contain multiple sub-pixels, although the arrangement of the multiple sub-pixels in a single pixel unit 11 can present different forms, it can be understood by those skilled in the art that the multiple sub-pixels can still be arranged at regular intervals along a specific direction at the level of the pixel unit. It should be further understood that the specific directions of the first direction and the second direction can not be specifically limited, for example, the first direction can be a row and the second direction can be a column, or the first direction can be a column and the second direction can be a row.

[0024] Please refer to Figure 2 , Figure 3 and Figure 4 In some embodiments, the gate lines 12 can be arranged on the array substrate 10, and the gate lines 12 include a first gate signal line 121, a second gate signal line 122, and a gate connecting line 124. The first gate signal line 121 and the second gate signal line 122 extend at least partially along the first direction. The first gate signal line 121 is electrically connected to each pixel unit 11 in the first pixel group 41, and the second gate signal line 122 is electrically connected to each pixel unit 11 in the second pixel group 42. The first gate signal line 121 and the second gate signal line 122 are electrically connected to the gate connecting line 124.

[0025] In this way, one end of the gate connecting line 124 is connected to the display controller 200, and the other end can be electrically connected to the first gate signal line 121, the second gate signal line 122, and other gate signal lines, respectively. Thus, the multiple gate signal lines can transmit the same or similar gate signals at a smaller potential difference, so that the corresponding multiple groups of pixel units receive gate signals with more similar strengths, and the opening and closing time difference between the multiple groups of pixel units is avoided, so that the opening and closing are more consistent, the display is more accurate and uniform.

[0026] In some embodiments, the source lines 13 can be disposed on the array substrate 10, and the source lines 13 extend at least partially along the second direction, and the source lines 13 at least include a first source signal line 131, a second source signal line 132, a third source signal line 133, and a fourth source signal line 134, the first source signal line 131 is electrically connected to the source of the first pixel unit, the second source signal line 132 is electrically connected to the source of the second pixel unit, the third source signal line 133 is electrically connected to the source of the third pixel unit, and the fourth source signal line 134 is electrically connected to the source of the fourth pixel unit.

[0027] In this way, one end of the plurality of source signal lines is connected to the display controller 200, and the other end can be correspondingly connected to fewer pixel units, thereby greatly reducing the attenuation rate and amplitude of the source signal, reducing the influence of the uneven gate signal on the source signal line, the fluctuation caused by the large number of pixel units with different electrical characteristics on the stability of the source signal, the line resistance, and improving the consistency of the charging voltage, charging rate, and electrical characteristics such as resistance and capacitance of each pixel unit 11, as well as the consistency of the particle migration speed in the microcavity of each pixel unit 11, reducing the brightness / chromaticity difference in a certain direction, and improving the overall uniformity and refresh uniformity of the display effect.

[0028] It should be understood that the display controller 200 can include a separate and independent gate signal controller 201 connected to the plurality of gate signal lines and a source signal controller 202 connected to the plurality of source signal lines. The display controller 200 can also be an entire display controller 200 integrated with gate signal control function and source signal control function, and those skilled in the art can adjust according to actual conditions, which is not specifically limited here.

[0029] In some embodiments, the pixel array can further include a fifth pixel unit and a sixth pixel unit, the fifth pixel unit and the sixth pixel unit are disposed on the side of the second pixel group 42 away from the first pixel group 41, and are arranged in the first direction to form a fifth pixel group 45, the first pixel unit, the third pixel unit, and the fifth pixel unit are arranged in the second direction to form a third pixel group 43, and the second pixel unit, the fourth pixel unit, and the sixth pixel unit are arranged in the second direction to form a fourth pixel group 44.

[0030] It should be understood that, in order to facilitate the connection of the gate signal lines and the pixel units, avoid the gate signal lines occupying too large wiring area, prevent the number of pixel units in a unit area from being limited and the resolution from being reduced, or prevent the intervals between the pixel groups from being different and the display from being unnatural, a plurality of gate signal lines can be respectively arranged in a plurality of interval regions. For example, the first gate signal line 121 can be arranged on the side of the first pixel group 41 away from the second pixel group 42, and the second gate signal line 122 can be arranged in the interval region between the first pixel group 41 and the second pixel group 42. For another example, the first gate signal line 121 can be arranged in the interval region between the first pixel group 41 and the second pixel group 42, and the second gate signal line 122 can be arranged on the side of the second pixel group 42 away from the first pixel group 41.

[0031] It should be further understood that, according to the production or product needs, a plurality of pixel rows / columns can also be arranged in the interval between the two gate signal lines to which the same gate line 12 belongs. For example, at least one pixel unit 11 can be arranged in the interval region between the first gate signal line 121 and the second gate signal line 122 in the direction of the first gate signal line 121 and the second gate signal line 122.

[0032] In some embodiments, the gate line 12 further includes a third gate signal line 123 extending at least partially in the first direction, the third gate signal line 123 being electrically connected to each pixel unit 11 in the fifth pixel group 45, a gate connecting line 124 being electrically connected to the third gate signal line 123, and the first gate signal line 121 and the second gate signal line 122 being electrically connected to the third gate signal line 123 through the gate connecting line 124. In this way, the charging rate and the differences in the electrical properties such as capacitance and resistance of the pixel units in a larger range can be improved, and the overall visual effect of the product can be improved.

[0033] In some embodiments, the pixel array can further include a seventh pixel unit and an eighth pixel unit, the seventh pixel unit and the eighth pixel unit being arranged on the side of the fifth pixel group 45 away from the second pixel group 42 and being arranged in the first direction to form a sixth pixel group 46, the first pixel unit, the third pixel unit, the fifth pixel unit, and the seventh pixel unit being arranged in the second direction to form a third pixel group 43, and the second pixel unit, the fourth pixel unit, the sixth pixel unit, and the eighth pixel unit being arranged in the second direction to form a fourth pixel group 44.

[0034] It should be understood that an odd row of sub-pixels can correspond to the same source signal line, and an even row of sub-pixels can also correspond to the same source signal line. Alternatively, every three rows of sub-pixels can correspond to three source signal lines arranged at intervals, and the three source signal lines can belong to the same source line 13. Alternatively, two rows of sub-pixels connected by two source signal lines corresponding to the same source line 13 can be arranged at intervals. It should be further understood that the terms odd, even, row, and column are only used to facilitate the description of the technical solutions of the embodiments and do not limit the scope of protection.

[0035] In this way, the arrangement density of the pixel units connected to a single source signal line can be greatly reduced by the interval arrangement of the source signal lines and different pixel rows / columns, the line resistance effect can be reduced, the electrical characteristics consistency of the pixel units can be improved, the charging efficiency of the pixel units can be improved, and the display effect can be further optimized. Furthermore, the above technical solutions can be combined with the wiring layout of the plurality of source signal lines to form a plurality of control blocks containing a plurality of pixel units 11, to avoid the complexity of pixel unit control caused by asymmetric layout, greatly facilitate the design on the software and process levels, and more clearly and simply control each pixel unit 11 through the gate line 12 and the source line 13, thereby greatly simplifying the display control difficulty.

[0036] It should be further understood that by arranging every three rows of sub-pixels to correspond to three source signal lines of the same source line 13, a pixel combination can be formed by every three sub-pixels, and in particular, an RGB pixel combination can be formed in a color display electronic paper device. Each source line 13 corresponds to an RGB pixel combination, which can greatly facilitate the accurate control of the pixel units, and can optimize the structure and layout of each source signal line according to the color display requirements of the specific pixel units, for example, the source signal lines corresponding to R pixels, G pixels, and B pixels can be adjusted according to the physical properties of different electronic pastes 32, the morphology of the microcavity, the electrical characteristics such as resistance and capacitance, and the like. Specifically, the thickness, material, layout, wiring method, and connection process of the source signal line can be adjusted, and in particular, the unwinding or twisting of the source line 13 can be optimized according to the specific production or product requirements.

[0037] In some embodiments, referring to Figure 4 and Figure 5 The source signal lines arranged in the same interval region can also have different arrangement heights or line thicknesses, which can more easily realize the "crossing but not connecting" of the structures of different source signal lines, and reduce the process difficulty of connecting the pixel units on the same side by different source signal lines and the subsequent optical quality inspection accuracy.

[0038] In some embodiments, referring to Figure 2 , Figure 3 and Figure 5The position setting of the source signal lines and the wiring scheme, and the connection mode of the pixel units and the source signal lines can be adjusted according to production needs and product requirements. For example, the first source signal line 131 and the third source signal line 133 can be arranged on the same side of the third pixel group 43, the first source signal line 131 is electrically connected with the source electrode of the first pixel unit and the source electrode of the fifth pixel unit, and the third source signal line 133 is electrically connected with the source electrode of the third pixel unit and the source electrode of the seventh pixel unit. For another example, the second source signal line 132 and the fourth source signal line 134 can be arranged on the same side of the fourth pixel group 44, the second source signal line 132 is electrically connected with the source electrode of the second pixel unit and the source electrode of the sixth pixel unit, and the fourth source signal line 134 is electrically connected with the source electrode of the fourth pixel unit and the source electrode of the eighth pixel unit.

[0039] In some embodiments, the arrangement of the source signal lines can be repeated in a certain mode to form a regular layout, so as to simplify the data structure of the control end, facilitate the display control of the pixel array, and simplify the wiring, etching or deposition process, facilitate large-scale digital processing, and improve the processing precision. For example, the first source signal line 131 is electrically connected with the source electrode of the first pixel unit and the source electrode of the fifth pixel unit, and at least one pixel unit 11 can be arranged in the interval region between the first pixel unit and the fifth pixel unit, and the pixel unit 11 can be connected to other source signal lines. For another example, the third source signal line 133 is electrically connected with the source electrode of the third pixel unit and the source electrode of the seventh pixel unit, and at least one pixel unit 11 can be arranged in the interval region between the third pixel unit and the seventh pixel unit, and the pixel unit 11 can be connected to other source signal lines.

[0040] In some embodiments, a plurality of source signal lines can be arranged on the same side or in the same interval region. For example, the third pixel group 43 and the fourth pixel group 44 can be arranged adjacently, and at least two of the first source signal line 131, the second source signal line 132, the third source signal line 133 and the fourth source signal line 134 are arranged in the interval region between the third pixel group 43 and the fourth pixel group 44.

[0041] It should be understood that a plurality of source signal lines can be arranged on the same side or in the same interval region, and due to the cross interval between the pixel units corresponding to the first source signal line 131 and the third source signal line 133, the pixel unit density on the source signal line is not only greatly reduced, but also in the process, one of the source signal lines can be connected first, and after covering an insulating layer, the other source signal line can be connected, so that the yield of the finished product is high, the stability is good, the process is simple, clear and easy to realize based on the original production equipment, facilitating large-scale production and digital processing, and reducing the production cost.

[0042] In some embodiments, the heat management performance of the electronic paper display device 100 can be improved and the negative electrical characteristics such as parasitic capacitance can be reduced by controlling the density of the source signal lines in the same side or the same spacing area. For example, the first source signal line 131 and the third source signal line 133 can be arranged on the side of the third pixel group 43 facing away from the fourth pixel group 44, and the second source signal line 132 and the fourth source signal line 134 can be arranged in the spacing between the third pixel group 43 and the fourth pixel group 44. For another example, the first source signal line 131 and the third source signal line 133 can be arranged in the spacing between the third pixel group 43 and the fourth pixel group 44, and the second source signal line 132 and the fourth source signal line 134 can be arranged on the side of the fourth pixel group 44 facing away from the third pixel group 43.

[0043] In some embodiments, at least a part of the gate connection lines 124 extends along the second direction and is arranged on one side of the pixel array. It should be understood that for the gate connection lines 124 acting as the "bus" of the plurality of gate signal lines, not only the wiring of the plurality of gate connection lines 124 itself needs to occupy a large space, but also the gate connection lines 124 itself needs to be reduced in line resistance by a thicker and wider line body to avoid problems such as thermal failure, which further exacerbates the problem of excessive wiring space. Therefore, in some embodiments of the present application, by arranging the gate connection lines 124 on the outside of the pixel array, the resolution and heat management efficiency of the pixel array can be improved, and the reliability of the electronic paper display device 100 can be improved.

[0044] In some embodiments, the electronic paper display device 100 can include at least two gate lines 12, at least a part of the gate connection lines 124 of one of the gate lines 12 is arranged on one side of the pixel array, and at least a part of the gate connection lines 124 of the other of the gate lines 12 is arranged on the other side of the pixel array. It should be understood that by arranging the gate lines 12 on both sides of the pixel array, on the one hand, the extension directions of the plurality of gate signal lines are parallel to each other, which is easy to cooperate with the plurality of source signal lines, and to combine the wiring and connect the pixel units 11 in a certain pattern, and on the other hand, the layout density of the connection lines can be further reduced to avoid problems such as thermal failure and excessive space of the non-display area, and the reliability and display effect of the electronic paper display device 100 can be improved.

[0045] In some embodiments, the plurality of pixel groups connected by the two corresponding gate connection lines 124 on the two sides can be arranged adjacently or cross-spaced, so as to save wiring space, reduce the process difficulty and overall production cost of wiring etching, and create conditions for optical detection and failure detection of the electronic paper display device 100, and improve the iteration and improvement efficiency of the product.

[0046] As Figure 6As shown, the electronic device 1000 can include the electronic paper display device 100 as in any of the embodiments of the present application. Since the passive display scheme of the electronic paper display device 100 is adopted in the embodiment, the display effect is achieved by reflecting external light, so that the influence of the aperture ratio on the display of the electronic device 1000 is very limited. The electronic device 1000 has the advantages of small electrical characteristic difference between pixel units, small brightness / chromaticity difference, good overall uniformity and refresh uniformity, and the like.

[0047] In the description of the present application, it should be noted that unless specifically defined and limited otherwise, the terms "mounting", "connected", "connection" should be interpreted broadly, for example, it can be fixed connection, or detachable connection, or integrally connected. It can be mechanical connection, or electrical connection. It can be directly connected, or indirectly connected through an intermediate medium, or the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0048] In the present application, unless specifically defined and limited otherwise, the first feature "on" or "under" the second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the first feature "on", "above" and "on" the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the first feature is higher than the second feature in horizontal height. The first feature "under", "below" and "below" the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the first feature is lower than the second feature in horizontal height.

[0049] The above disclosure provides many different implementations or examples for implementing the different structures of the present application. In order to simplify the disclosure of the present application, the components and arrangements of specific examples are described in the above. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeatedly refer to numbers and / or letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or arrangements discussed. In addition, the present application provides examples of various specific processes and materials, but those skilled in the art can realize the application of other processes and / or the use of other materials.

[0050] In the description of the specification, the description using the terms "one embodiment", "some embodiments", "certain embodiments", "an example", "a specific example", or "some examples" etc. means that the particular feature, structure, material or characteristic being described is included in at least one embodiment or example of the application. The illustrative appearances of the above-mentioned terms in various places in the specification are not necessarily intended to refer to the same embodiment or example. Moreover, the particular features, structures, materials or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0051] The above-described embodiments are merely preferred embodiments of the present application, and thus cannot limit the scope of the application, and any non-essential changes or substitutions made by those skilled in the art based on the present application are within the scope of the application.

Claims

1. An electronic paper display device, characterized by comprising: The array substrate comprises a plurality of pixel units arranged at intervals to form a pixel array, the pixel array comprising at least a first pixel unit, a second pixel unit, a third pixel unit and a fourth pixel unit, the first pixel unit and the second pixel unit being arranged at intervals along a first direction to form a first pixel group, the third pixel unit and the fourth pixel unit being arranged at intervals along the first direction to form a second pixel group, the first pixel unit and the third pixel unit being arranged at intervals along a second direction to form a third pixel group, the second pixel unit and the fourth pixel unit being arranged at intervals along the second direction to form a fourth pixel group, the first direction and the second direction being arranged at an angle; a gate line arranged on the array substrate, the gate line comprising a first gate signal line, a second gate signal line and a gate connecting line, the first gate signal line and the second gate signal line extending at least partially along the first direction, the first gate signal line being electrically connected to each pixel unit in the first pixel group, the second gate signal line being electrically connected to each pixel unit in the second pixel group, the first gate signal line and the second gate signal line being electrically connected to the gate connecting line; a source line arranged on the array substrate, the source line extending at least partially along the second direction, the source line comprising at least a first source signal line, a second source signal line, a third source signal line and a fourth source signal line, the first source signal line being electrically connected to the source electrode of the first pixel unit, the second source signal line being electrically connected to the source electrode of the second pixel unit, the third source signal line being electrically connected to the source electrode of the third pixel unit, and the fourth source signal line being electrically connected to the source electrode of the fourth pixel unit. The pixel array further comprises a fifth pixel unit and a sixth pixel unit, the fifth pixel unit and the sixth pixel unit being arranged on a side of the second pixel group facing away from the first pixel group and forming a fifth pixel group arranged at intervals along the first direction, the first pixel unit, the third pixel unit and the fifth pixel unit forming a third pixel group arranged at intervals along the second direction, and the second pixel unit, the fourth pixel unit and the sixth pixel unit forming a fourth pixel group arranged at intervals along the second direction; 2. The electronic paper display device according to claim 1, wherein wherein the first gate signal line is arranged on a side of the first pixel group facing away from the second pixel group, and the second gate signal line is arranged in an interval region between the first pixel group and the second pixel group; or the first gate signal line is arranged in an interval region between the first pixel group and the second pixel group, and the second gate signal line is arranged on a side of the second pixel group facing away from the first pixel group; or in an interval region between the first gate signal line and the second gate signal line, at least two pixel units are arranged along the direction of the first gate signal line and the second gate signal line. ​ 3. The electronic paper display device according to claim 2, wherein The gate line further comprises a third gate signal line extending at least partially along the first direction, each pixel unit in the fifth pixel group is electrically connected to the third gate signal line, the gate connecting line is electrically connected to the third gate signal line, and the first gate signal line and the second gate signal line are electrically connected to the third gate signal line through the gate connecting line.

4. The electronic paper display device according to claim 2, wherein The pixel array further comprises a seventh pixel unit and an eighth pixel unit, the seventh pixel unit and the eighth pixel unit are arranged on a side of the fifth pixel group away from the second pixel group and are arranged at intervals along the first direction to form a sixth pixel group, the first pixel unit, the third pixel unit, the fifth pixel unit and the seventh pixel unit are arranged at intervals along a second direction to form a third pixel group, and the second pixel unit, the fourth pixel unit, the sixth pixel unit and the eighth pixel unit are arranged at intervals along the second direction to form a fourth pixel group. The first source signal line and the third source signal line are arranged on the same side of the third pixel group, the first source signal line is electrically connected to the source electrode of the first pixel unit and the source electrode of the fifth pixel unit, and the third source signal line is electrically connected to the source electrode of the third pixel unit and the source electrode of the seventh pixel unit; or The second source signal line and the fourth source signal line are arranged on the same side of the fourth pixel group, the second source signal line is electrically connected to the source electrode of the second pixel unit and the source electrode of the sixth pixel unit, and the fourth source signal line is electrically connected to the source electrode of the fourth pixel unit and the source electrode of the eighth pixel unit; or The first source signal line is electrically connected to the source electrode of the first pixel unit and the source electrode of the fifth pixel unit, and at least one pixel unit is further arranged in the interval region between the first pixel unit and the fifth pixel unit; or The third source signal line is electrically connected to the source electrode of the third pixel unit and the source electrode of the seventh pixel unit, and at least one pixel unit is further arranged in the interval region between the third pixel unit and the seventh pixel unit.

5. The electronic paper display device according to claim 1, wherein The third pixel group and the fourth pixel group are arranged at intervals, and at least two of the first source signal line, the second source signal line, the third source signal line and the fourth source signal line are arranged in the interval region between the third pixel group and the fourth pixel group.

6. The electronic paper display device according to claim 4, wherein The first source signal line and the third source signal line are arranged on a side of the third pixel group away from the fourth pixel group, and the second source signal line and the fourth source signal line are arranged in the interval between the third pixel group and the fourth pixel group; or The first source signal line and the third source signal line are arranged in the interval between the third pixel group and the fourth pixel group, and the second source signal line and the fourth source signal line are arranged on a side of the fourth pixel group away from the third pixel group.

7. The electronic paper display device according to claim 1, wherein At least a part of the gate connecting line extends along the second direction and is arranged on one side of the pixel array.

8. The electronic paper display device according to claim 7, wherein The electronic paper display device comprises at least two gate lines, at least a part of the gate connection lines of one of the gate lines is arranged on one side of the pixel array, and at least a part of the gate connection lines of the other of the gate lines is arranged on the other side of the pixel array.

9. The electronic paper display device according to claim 8, wherein At least one of the pixel groups to which one of the gate lines is electrically connected is arranged in a spacing region between a plurality of the pixel groups to which the other of the gate lines is electrically connected; or The pixel groups to which the gate lines are electrically connected are arranged adjacently, and one of the pixel groups to which one of the gate lines is electrically connected is arranged adjacently to one of the pixel groups to which the other of the gate lines is electrically connected.

10. An electronic device, comprising: The electronic device comprises the electronic paper display device according to any one of claims 1-9.

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