Task scheduling method and related device
By combining the deadline and processing time of segments in heterogeneous systems and employing a comprehensive scheduling method of MSF and EDF, the problem of insufficient task scheduling flexibility is solved, achieving efficient and flexible task scheduling and improving the computing performance and resource utilization of heterogeneous systems.
Patent Information
- Application Number
- CN202410714700.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-03
- Publication Date
- 2025-12-05
AI Technical Summary
Traditional task scheduling methods in heterogeneous systems rely solely on the deadlines of segments, resulting in low task scheduling flexibility and an inability to meet diverse computational needs.
By acquiring the first information of a segment, combining the segment's deadline and the task's processing time, a multi-dimensional evaluation of the segment's priority order is adopted. A comprehensive scheduling method combining the Most Remaining Suspended Segments First (MSF) algorithm and the Earliest Deadline First (EDF) algorithm is used to dynamically adjust the task's priority weight, thereby improving the flexibility and efficiency of task scheduling.
It improves the flexibility of task scheduling and the utilization rate of computing resources, expands the scope of application of task scheduling to various application scenarios, reduces the risks of actual operation, and improves the real-time performance and reliability of task scheduling.
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Figure CN121070530A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of computer, and particularly relates to a task scheduling method and related device. BACKGROUND
[0002] With the continuous development of technology and the increasing demand for computing, the traditional computer platform has been unable to meet the growing computing tasks. In order to improve the computing performance and meet the diversified computing demand, the heterogeneous system emerges as the times require. The heterogeneous system is composed of a plurality of different devices, such as central processing unit (CPU), graphics processing unit (GPU), coprocessor, etc. However, how to reasonably divide the tasks into different devices and effectively schedule has become a key problem to improve the performance of the heterogeneous system.
[0003] For periodic tasks, the dynamic scheduling based on priority often adopts the earliest deadline first (EDF) algorithm. The EDF algorithm specifically shows that: the schedulability of the task set is obtained through the schedulability judgment formula, and each task in the task set is dynamically scheduled according to the deadline of the segment according to the schedulability judgment result. However, when the EDF algorithm is used for dynamic scheduling, only the deadline of the segment is used to schedule each task in the task set, and the flexibility of task scheduling is low. SUMMARY
[0004] The present application provides a task scheduling method and related device, which can improve the flexibility of task scheduling.
[0005] In a first aspect, the present application provides a task scheduling method, which comprises: obtaining first information of a segment, the first information being used to indicate the priority order of the segment, the first information being related to the deadline of the segment and the processing duration of the task, the task comprising a plurality of segments; processing the segment based on the first information of the segment.
[0006] Compared with scheduling the task based on only the deadline of the segment, the present application evaluates the priority order of the segment based on the deadline of the segment and the processing duration of the task, which helps to improve the efficiency of task scheduling, the utilization rate of computing resources and the flexibility of task scheduling, and also expands the application range of task scheduling.
[0007] In a possible implementation manner, the processing can also be understood as calling or executing.
[0008] In a possible implementation manner of the first aspect, the first information is determined based on a weight ratio between the second information and the third information, the second information being used to indicate a deadline of the segment, and the third information being used to indicate a processing duration of the task.
[0009] The deadline of the segment and the processing duration of the task directly affect the response time of the task on the processor, the weight ratio between the second information and the third information is different, and the determined first information also has a difference, so that the flexibility of the first information is realized, and the flexibility and efficiency of the task scheduling are improved.
[0010] In a possible implementation manner of the first aspect, the third information includes a remaining processing duration of the task.
[0011] The remaining processing duration of the task affects the processing duration of the task, and by fully utilizing the remaining processing duration of the task, the flexibility of the first information is realized based on the weight ratio between the second information and the remaining processing duration of the task, so that the flexibility and efficiency of the task scheduling are improved.
[0012] In a possible implementation manner of the first aspect, the third information includes a total number of segments to be suspended in the task.
[0013] The total number of segments to be suspended in the task affects the response time of the task on the processor. By flexibly adjusting the first information based on the weight ratio between the total number of segments to be suspended in the task and the second information, the flexibility and efficiency of the task scheduling are improved.
[0014] In a possible implementation manner of the first aspect, the third information includes a total length of segments to be suspended in the task.
[0015] The total length of segments to be suspended in the task affects the response time of the task on the processor. By flexibly adjusting the first information based on the weight ratio between the total length of segments to be suspended in the task and the second information, the flexibility and efficiency of the task scheduling are improved.
[0016] In a possible implementation manner of the first aspect, the third information is determined based on a most remaining segment first (MSF) algorithm.
[0017] In a possible implementation manner of the first aspect, the third information includes a processing duration of a segment to be suspended in the task.
[0018] The processing time length of the task is evaluated by the processing time length of the to-be-suspended segment in the task, so that the first information can be flexibly adjusted based on the weight ratio between the processing time length of the to-be-suspended segment in the task and the second information, the flexibility of task scheduling is improved, and the flexibility of task scheduling can be more effectively improved for a scenario in which the processing time lengths of tasks greatly differ from each other, so as to meet the task scheduling requirements under different task loads.
[0019] In a possible implementation of the first aspect, the first information is obtained based on offline testing of the program, and the program includes a plurality of tasks.
[0020] Compared with obtaining the first information by online testing of the program, obtaining the first information by offline testing of the program in advance can help identify and solve various problems that may occur when the program is executed online, thereby reducing the risk of actual operation of the program and improving the reliability and stability of the program. In addition, offline testing in advance can reduce the time occupied by the program in actual operation for generating the first information, and thus the tasks can be directly scheduled based on the first information, thereby further ensuring the real-time performance of task scheduling and improving the efficiency of task scheduling and the utilization rate of computing resources.
[0021] In a second aspect, the present application provides a task scheduling apparatus, comprising:
[0022] an information obtaining module configured to obtain first information of a segment, the first information being used to indicate a priority order of the segment, and the first information being related to a deadline of the segment and a processing time length of a task, the task including a plurality of segments;
[0023] a task executing module configured to process the segment based on the first information of the segment.
[0024] In a possible implementation of the second aspect, the first information is determined based on a weight ratio between second information and third information, the second information being used to indicate the deadline of the segment, and the third information being used to indicate the processing time length of the task.
[0025] In a possible implementation of the second aspect, the third information includes a remaining processing time length of the task.
[0026] In a possible implementation of the second aspect, the third information includes a total number of to-be-suspended segments in the task.
[0027] In a possible implementation of the second aspect, the third information includes a total length of to-be-suspended segments in the task.
[0028] In a possible implementation of the second aspect, the third information is determined based on a most-suspended-fragment-first (MSF) algorithm.
[0029] In a possible implementation of the second aspect, the third information includes processing time lengths of the segments to be suspended in the task.
[0030] In a possible implementation of the second aspect, the first information is obtained based on offline testing of the program, and the program includes a plurality of tasks.
[0031] In a third aspect, the present application provides a computing device, including a memory and a processor.
[0032] The memory is configured to store a computer program.
[0033] The processor is configured to execute the computer program to enable the computing device to implement the method in the first aspect or any possible implementation of the first aspect.
[0034] In a fourth aspect, the present application provides a computer program product, which, when executed by a computer, implements the method in the first aspect or any possible implementation of the first aspect.
[0035] In a fifth aspect, the present application provides a chip system, which includes a processor configured to implement the method in the first aspect or any possible implementation of the first aspect. In a possible design, the chip system further includes a memory configured to store program instructions and / or data. The chip system can be composed of a chip, or include a chip and other discrete devices.
[0036] In a sixth aspect, the present application provides a computer-readable storage medium, which stores a computer program. The computer program, when executed by a processor, implements the method in the first aspect or any possible implementation of the first aspect.
[0037] The second to sixth aspects described above are used to implement or assist in implementing the method in the first aspect or any possible implementation of the first aspect, and thus can achieve the same or corresponding beneficial effects as the first aspect. Therefore, no further description is given here. BRIEF DESCRIPTION OF DRAWINGS
[0038] Figure 1a A structural schematic diagram of a heterogeneous system provided by an embodiment of the present application;
[0039] Figure 1b A structural schematic diagram of a computing device provided by an embodiment of the present application;
[0040] Figure 2 A flowchart of a task scheduling method provided by an embodiment of the present application;
[0041] Figure 3 A flowchart of a pre-running process of a program provided by an embodiment of the present application;
[0042] Figure 4 A schematic diagram of a heterogeneous system provided by an embodiment of the present application for scheduling tests based on different algorithms;
[0043] Figure 5 A structural schematic diagram of a task scheduling device provided by an embodiment of the present application. DETAILED DESCRIPTION
[0044] The technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. Those skilled in the art can know that, with the development of technology and the appearance of new scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.
[0045] First, some terms in the embodiments of the present application are explained to facilitate understanding by those skilled in the art.
[0046] 1. Heterogeneous computing
[0047] Heterogeneous computing refers to the cooperation of different types of computing units to complete a computing task. Each computing unit adopts a different architecture and is good at processing a certain type of computing task. The entire computing task is divided into small units and is respectively given to the appropriate computing unit for processing.
[0048] 2. Real-time task
[0049] A real-time task is a task that a computing system needs to complete within strict time constraints, requiring a response or completion of computation within a specified time to ensure the real-time requirements of the system on events or tasks.
[0050] 3. Periodic task
[0051] A periodic task is a task that is repeatedly executed at a fixed time interval, with a predetermined execution period. The system needs to execute these tasks on time within each period to meet specific time requirements.
[0052] 4. Work
[0053] In this embodiment, a work refers to a single release of a periodic real-time task.
[0054] 5. Task suspension
[0055] Task suspension refers to placing a task in a state of not being processed temporarily, which has not been completed in the flow.
[0056] 6. Task partitioning
[0057] Task partitioning refers to decomposing a complex computing task into multiple subtasks and assigning these subtasks to different computing devices for processing. The purpose of task partitioning is to balance the computing load among subtasks as much as possible, while maximizing the overall performance of the heterogeneous system.
[0058] 7. Task scheduling
[0059] Task scheduling refers to reasonably assigning the order and time of task execution according to the characteristics of tasks and the state of devices. The goal of task scheduling is to minimize the waiting time between tasks and improve overall computing efficiency. Among them, dynamic scheduling (DS) refers to adjusting and arranging the execution order and resource allocation of tasks in real time according to the real-time state of the system and the characteristics of the tasks to optimize system performance.
[0060] This embodiment mainly adopts a priority-based scheduling method, that is, tasks are scheduled according to their priorities, and tasks with higher priorities are executed first. The priority-based scheduling method can ensure that urgent tasks are processed first and improve overall computing efficiency.
[0061] Please refer to Figure 1a , Figure 1a for a structural schematic diagram of a heterogeneous system provided by the embodiment of the present application.
[0062] As shown in Figure 1a , the heterogeneous system 100 includes a computing device 11, a communication bus 12, a computing device 13, and a communication interface 14.
[0063] Optionally, the heterogeneous system 100 further includes a memory.
[0064] The computing device 11 and the computing device 13 belong to different hardware resources. The computing device 11 and the computing device 13 can have different computing power, for example, the computing power of the computing device 11 is higher than that of the computing device 13. For example, the processor of the computing device 11 can be a central processing unit (CPU), and the processor of the computing device 13 can be a graphics processing unit (GPU), a field programmable gate array (FPGA), or a tensor processing unit (TPU), etc.
[0065] In some examples, the heterogeneous system 100 can be various XPU heterogeneous computing platforms, or simply heterogeneous computing platforms or heterogeneous platforms.
[0066] The computing device 11 can be a mobile phone, a tablet, a television (also referred to as a smart television, a smart screen, or a large screen device), a notebook computer, an ultra-mobile personal computer (UMPC), a handheld computer, a netbook, a personal digital assistant (PDA), a wearable computing device (for example, a smart watch, a smart bracelet, or smart glasses), a vehicle-mounted device, a virtual reality device, a server, or the like processing device with computing capability.
[0067] The computing device 11, the computing device 13, and the communication interface 14 communicate in a wired manner through the communication bus 12, such as Ethernet, optical fiber, and various peripheral component interconnect express (PCIe) buses arranged inside the heterogeneous system 100 for connecting the computing device 11, the computing device 13, and the communication interface 14; or in a wireless manner, such as Internet, wireless fidelity (WIFI), ultra wide band (UWB) technology, and the like.
[0068] In an example, a task can be scheduled (or deployed) in the heterogeneous system 100 and run on the computing device 11, which reasonably divides the task to different computing devices and effectively schedules the task.
[0069] It can be understood that the heterogeneous system 100 refers to a complete platform for computing by using hardware devices with different architectures, such as CPU, GPU, FPGA, and application specific integrated circuit (ASIC). The hardware devices in the platform are interconnected through the communication bus 12 and are allocated to perform different tasks according to their performance characteristics. The hardware devices with different architectures have different advantages, and the combination of the hardware devices can achieve complementary advantages and fully exert the super-high computing capability of the co-processors (such as ASIC, FPGA, and GPU) and the logical control capability of the CPU, thereby improving the computing performance and resource utilization of the entire system. The current heterogeneous platform includes CPU+FPGA, CPU+GPU, and CPU+FPGA+GPU, and the like flexible forms.
[0070] It can be understood that the term “task” in the present disclosure can be referred to as a load, a task load, or the like.
[0071] It should be noted that,Figure 1a The illustrated heterogeneous system 100 is merely an example and should not be construed as limiting the embodiments of the present disclosure.
[0072] Please refer to Figure 1b , Figure 1b A structural schematic diagram of a computing device provided by an embodiment of the present application.
[0073] Taking a CPU processor as an example, as shown in Figure 2 The computing device 11 includes at least one processor 111, a communication bus 112, a memory 113, and at least one communication interface 114.
[0074] It can be understood that the heterogeneous system is composed of a plurality of different computing devices, such as a central processing unit (CPU), a graphics processing unit (GPU), a coprocessor, etc. The internal structural components of different computing devices are similar, for example, the computing device 13 also includes a processor, a communication bus, a memory, and a communication interface, one of the differences is that the types of processors used by different computing devices are different, for example, the computing device 13 uses a graphics processing unit.
[0075] The processor 111, the memory 113, and the communication interface 114 communicate through the communication bus 112, and can also communicate through wireless transmission and other means. The memory 113 is used to store instructions, and the processor 111 is used to execute the instructions stored in the memory 113. The memory 113 stores program code, and the processor 111 can call the program code stored in the memory 113 to execute the method provided by the embodiment.
[0076] In a possible implementation, the processor 111 is a general central processing unit (CPU), and can also be other general processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices (PLD), transistor logic devices, hardware components or any combination thereof. The PLD can be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL) or any combination thereof.
[0077] The communication bus 112 is used to transmit information between the processor 111, the memory 113 and the communication interface 114. The communication bus 112 can be divided into an address bus, a data bus, a control bus and the like. For the convenience of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or only one type of bus.
[0078] Optionally, the memory 113 is a read-only memory (ROM) or other type of static storage device that can store static information and instructions. Alternatively, the memory 113 is a random access memory (RAM) or other type of dynamic storage device that can store information and instructions. Alternatively, the memory 113 is an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disk storage, a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited thereto. Optionally, the memory 113 is independent and connected to the processor 111 through the communication bus 112. Alternatively, the memory 113 and the processor 111 are integrated together.
[0079] The communication interface 114 uses any transceiver-like mechanism for communicating with other devices or a communication network. The communication interface 114 includes a wired communication interface. Optionally, the communication interface 114 also includes a wireless communication interface. The wired communication interface is, for example, an Ethernet interface. The Ethernet interface is an optical interface, an electrical interface, or a combination thereof. The wireless communication interface is, for example, a wireless local area networks (WLAN) interface, a cellular network communication interface, or a combination thereof.
[0080] In a particular implementation, as one example, the processor 111 includes one or more CPUs, such as the CPU0 and the CPU1 shown in FIG. 1. Figure 1b
[0081] In a particular implementation, as one example, the computing device 11 includes multiple processors, such as the processor 111 and the processor 115 shown in FIG. 1. Each of these processors is a single-CPU or a multi-CPU. A processor here refers to one or more devices, circuits, and / or processing cores for processing data, such as computer program instructions. Figure 1b
[0082] In some embodiments, the memory 113 is used to store program codes of executing the schemes of the present application, and the processor 111 executes the program codes stored in the memory 113.
[0083] It is understood that the method steps in the embodiments of the present application can be implemented in hardware, or in software instructions executable by the processor 111. The software instructions can be composed of corresponding software modules, which can be stored in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically programmable read-only memory, a register, a hard disk, a mobile hard disk, a CD-ROM, or any other form of storage medium well known in the art. In addition, the scope of the apparatus described in the present application is not limited thereto, and the structure of the apparatus is not limited by the apparatus provided in the embodiments. The apparatus can be a standalone device or a part of a larger device. For example, the apparatus can be:
[0084] (1) a standalone integrated circuit (IC), or a chip, or a chip system or subsystem;
[0085] (2) a set of one or more ICs, which can optionally also include a storage component for storing data and / or instructions;
[0086] (3) a module that can be embedded in other devices;
[0087] (4) receivers, terminals, intelligent terminals, wireless devices, handsets, mobile units, in-vehicle devices, artificial intelligence devices, machine devices, home devices, medical devices, industrial devices, and the like;
[0088] (5) others, and the like.
[0089] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the device described above can refer to the corresponding process in the foregoing method embodiments, and will not be described here.
[0090] In the current computing environment, as shown in the application of a heterogeneous system 100 becomes more and more common, the heterogeneous system 100 is composed of a plurality of different devices, such as central processing units (CPU), graphics processing units (GPU), coprocessors, etc. Among them, the CPU is responsible for processing input / output (I / O) interrupts and thread communication, while the GPU / FPGA and other devices are responsible for parallel computing and compute-intensive workloads. Figure 1a It can be understood that the application program in the heterogeneous computing scenario usually depends on different types of computing tasks, such as data pre-occupancy, model training / refinement, and decision prediction, and each task requires different computing resources. These tasks are not fixed over time, and the underlying available computing resources are also not fixed. In order to optimally utilize the heterogeneous computing hardware resources, each task / subtask can be dynamically allocated to the most suitable hardware processor or device.
[0091] Under such a heterogeneous system, real-time tasks access different devices in a set order, which contains time dependency, that is, after completing the access and calculation of one device, the next device can be accessed. Therefore, how to reasonably divide the tasks into different computing devices and effectively schedule them has become a key problem to improve the performance of the heterogeneous system.
[0092] For periodic tasks, the dynamic scheduling based on priority often adopts the Earliest Deadline First (EDF) algorithm. The EDF algorithm specifically shows that: through a schedulability decision formula, a schedulability decision result of a task set is obtained, and according to the schedulability decision result, each task in the task set is dynamically scheduled according to the deadline of the segment. However, when the EDF algorithm is used for dynamic scheduling, only the deadline of the segment is used to schedule each task in the task set, and the flexibility of task scheduling is low.
[0093]
[0094] To solve the above problems, the embodiment of the present application provides a task scheduling method and related devices. Please refer to Figure 2 , Figure 2 A flowchart of the task scheduling method provided by the embodiment of the present application, which can be executed by the computing device 11 in the heterogeneous system 100 as shown in Figure 1a The computing device 11 improves the flexibility of task scheduling by dividing the segments to different computing devices (such as the computing device 13) for processing by executing the scheduling method. The method comprises the following steps.
[0095] S201. Obtain first information of the segment, the first information being used to indicate the priority order of the segment, the first information being related to the deadline of the segment and the processing duration of the task, the task comprising a plurality of segments.
[0096] Each task comprises a plurality of segments, and each segment can be executed on different processors.
[0097] In a possible implementation manner, the first information is obtained based on offline testing of a program, the program comprising a plurality of tasks. Specifically, the computing device 11 performs pre-runtime processing (PRP) on the program in a preprocessing stage (i.e. a testing stage before running) to obtain the first information, and directly processes the segments according to the first information after power-on. The pre-runtime processing can be understood as a process of predicting and adjusting the performance and scheduling parameters of the task by simulating task generation and simulation testing, etc. before the actual running of the task.
[0098] In a possible implementation manner, as shown in Figure 3 The computing device 11 performs the pre-runtime processing on the program in the following steps:
[0099] S301. Obtain a test task set and platform running data.
[0100] The test task set refers to a set composed of each task in the program.
[0101] In a possible implementation manner, the platform running data comprises the computing resource of the processor, the scheduling algorithm, and the number of test tasks, etc.
[0102] The computing resource of the processor comprises the number of processor cores and the resource requirement of each task in the program to the processor (i.e. each task comprises a plurality of segments, and each segment is executed on a corresponding processor).
[0103] The scheduling algorithm comprises a most remaining segment first (MSF) algorithm and a first algorithm, the first algorithm being composed of an EDF algorithm and the MSF algorithm.
[0104] It can be understood that, compared with the traditional dynamic and static priority scheduling algorithm, and the classic EDF algorithm and the rate monotonic algorithm (RM), the embodiment evaluates the priority order of the segment in multiple dimensions based on the deadline of the segment and the processing duration of the task, thereby helping to improve the efficiency of task scheduling, the utilization rate of computing resources, and the flexibility of task scheduling, and also expanding the application range of task scheduling.
[0105] The method provided by the embodiment can meet various application scenarios, provide efficient and flexible scheduling strategies for various tasks, and does not need to adjust the underlying hardware, has high flexibility, and has high applicability.
[0106] In a possible implementation, the first information is determined based on a first algorithm, that is, based on a weight ratio between the second information and the third information, the second information is used to indicate the deadline of the segment, and the third information is used to indicate the processing duration of the task.
[0107] In a possible implementation, the third information includes the remaining processing duration of the task.
[0108] In a possible implementation, the first algorithm includes the following two implementations.
[0109] In the first possible implementation, the first algorithm includes a most remaining segment number&earliest deadline first (MSEDF) algorithm, and a formula of the first algorithm is as follows:
[0110] p i,j (MSEDF)=αp i,j (EDF)+(1-α)p i,j (MSF), i, j∈1, 2... (1)
[0111] Wherein, p i,j (MSEDF) represents the priority of the segment j in the task i based on the MSEDF algorithm, and a represents a weight, and the range is 0< a <1. p i,j (EDF) represents the priority of the segment j in the task i based on the EDF algorithm, that is, based on the deadline of each segment.
[0112] It can be understood that, p i,j (MSEDF) and p i,j (EDF) will directly affect the response time of the task on the processor, and the weight ratio of the two corresponds to the determined pi,j (MSEDF) also will be different, can be based on actual demand set the value of the weight, improve the flexibility of scheduling.
[0113] In this possible implementation, the third information includes the total number of segments to be suspended in the task. Correspondingly, the formula of the MSF algorithm is as follows:
[0114] p i,j (MSF)∝(M i -1-comp i,i , i, j∈1, 2… (2)
[0115] Wherein, p i,j (MSF) is proportional to the total number of segments to be suspended in task i, p i,j (MSF) represents the priority of segment j in task i based on the MSF algorithm, M i represents the total number of segments to be processed in CPU of task i under work τ i , comp i,j represents the total number of suspended segments completed in task i under work τ i .
[0116] It can be understood that all tasks in the program need to be processed by the computing device 11, and then the tasks are allocated to the appropriate processor according to the priority of the task and the resource demand of the task to the processor. Therefore, the size of M i needs to be counted.
[0117] In the first possible implementation, the third information includes the total length of the segments to be suspended in the task. In formula (2), M i represents the total length of the segments to be processed in CPU of task i under work τ i , comp i,j represents the total length of the suspended segments completed in task i under work τ i .
[0118] In the second possible implementation, the first algorithm includes the Minus Remaining Segment time & Earliest Deadline First (MRSEDF) algorithm, and the formula of the first algorithm is as follows:
[0119]
[0120] Wherein, p i,j (MRSEDF) represents the priority of segment j in task i based on the MRSEDF algorithm, and α represents the weight, ranging from 0<α<1. di,j Indicates work τ i The deadline for segment j in task i, d i,j Calculated based on the EDF algorithm.
[0121] In this possible implementation, the third information includes the processing time of the segments to be suspended in the task. Correspondingly, the formula for the MSF algorithm is as follows:
[0122]
[0123] in, Indicates work τ i The remaining suspension time, i.e., the working τ i M is the total duration required to suspend all pending segments in task i. i Indicates work τ i The number of segments to be processed in the CPU for task i, comp i,j Indicates work τ i The number of suspended segments that have been completed in task i.
[0124] Understandably, for scenarios where the workload of segments varies greatly, such as scenarios where the processing time of different segments differs significantly, calculating priorities directly based on the remaining processing time of the task, specifically based on the total time required to suspend the segments to be suspended in the task, can further improve the flexible scheduling capability of heterogeneous systems for tasks and better meet the priority configuration requirements under different task loads.
[0125] Understandably, the more remaining pending segments in task i, the more work τ represents. i The longer the remaining suspension time, the higher the priority it should theoretically be for processing.
[0126] S302. Test all tasks in the program in parallel to obtain the total length or number of segments to be suspended in each task.
[0127] The computing device 11 tests all tasks in the program in parallel, and can obtain the length of each completed suspended segment in each task. The computing device 11 can add up the lengths of the suspended segments in task i, and the number of completed suspended segments in task i, comp, is obtained. i,j Alternatively, the computing device can directly obtain the total number of completed suspended segments in task i, comp. i,j .
[0128] S303. Generate a simulated task set corresponding to the test task set based on the test task set.
[0129] The computing device 11 can generate multiple test cases based on the test task set, for example, adjusting the total number or total length of the suspended segments in task i that have been completed to obtain different test cases, so as to expand the coverage of the test and improve the stability and accuracy of the test.
[0130] In a possible implementation, in order to more comprehensively and accurately simulate the real running environment, the computing device 11 generates the simulation task set based on the comp i,j The number or length of the suspended segments included in each task is limited, for example, the number or length of the suspended segments should be the same as or within an approximate range of the comp i,j The same or within an approximate range, which can be set according to actual needs, without limitation.
[0131] It can be understood that step 3 is an optional step, and the computing device 11 can directly perform simulation testing based on the test task set.
[0132] S304. The size of each parameter in formula (1) is specified, and formula (1) is obtained, to obtain the priority order of each segment of each task, so as to perform simulation testing on the simulation task set based on the priority order.
[0133] In a possible implementation, the computing device 11 uses formula (1), and pre-specifies the values of each parameter in formula (1), that is, p i,j (MSF), p i,j (MSEDF) and the weight (for example, specified based on historical data), and then the values of the above parameters are respectively brought into formula (1) to obtain the priority order of each segment of each task.
[0134] In a possible implementation, the computing device 11 uses formula (3), and pre-specifies the values of d i,j , and the weight (for example, historical data), and then the values of the above parameters are respectively brought into formula (3) to obtain the priority order of each segment of each task.
[0135] It can be understood that, in the test process, in order to simulate the process of executing the actual program, the computing device 11 determines on which processor each segment of each task is executed and the number of processor cores (the more the number, the faster the parallel processing) based on the computing resources of the processor. Then, the computing device 11 executes each segment in the simulation task set in the priority order to allocate each segment to the corresponding processor for execution.
[0136] It can be understood that by generating a simulation task set to perform simulation testing, a real workload can be simulated to evaluate the scheduling performance of the task set under the current dynamic scheduler.
[0137] For ease of illustration, subsequent steps are illustrated by taking the calculation method of the computing device 11 to obtain the priority of the segment j in the task i according to formula (1) as an example.
[0138] S305. Determine whether the first condition is met. If yes, output the values of the parameters of formula (1) and perform S306; if not, re-adjust the values of the parameters of formula (1) and jump back to perform S302.
[0139] After the computing device 11 performs all the segments in the program according to the priority order described above, the computing device 11 determines whether each segment is completed within the specified deadline. The deadline of each segment can be calculated in advance based on the EDF algorithm. If the computing device determines that all segments in the task are completed within the deadline corresponding to the segment, it is considered to pass, and the specified p i,j (MSF), p i,j (MSEDF) and the value of the weight as input to calculate the priority according to formula (1). If it does not pass, the values of p i,j (MSF), p i,j (MSEDF) and the weight are re-adjusted until the first condition is met.
[0140] It can be understood that the weight directly affects the response time of the task on the processor, and by setting the first condition, the weight in the first algorithm is accurately adjusted, thereby improving the scheduling performance of the task and obtaining a priority order with optimized processing performance. If the test is successfully passed, i.e., the first condition is met, the scheduling reliability of the task set on each processor can be ensured, thereby providing higher reliability and stability for actual application scenarios and meeting the real-time requirements of the task.
[0141] S306. The values of the parameters of formula (1) are brought into formula (1) to obtain the priority of each segment in each task.
[0142] The computing device 11 brings the values of p i,j (MSF), p i,j (MSEDF) and the weight into formula (1) to obtain the priority of each task i p i,j (MSEDF).
[0143] Understandably, after the computing device 11 obtains the priority of each segment in each task, it can sort them to obtain the priority order of each segment in each task within the program. After obtaining the priority order of each segment, the computing device can represent the priority order of each segment in various ways, such as index number, identification information, tables, etc., to generate first information.
[0144] Understandably, the computing device 11 performs simulation tests on the simulated task set during the preprocessing stage before task execution. This allows the computing device 11 to accurately assess the scheduling performance of the task set under the real-time scheduler configuration in advance and make timely parameter adjustments. This ensures that the heterogeneous system can better adapt to the needs of different tasks before execution, improves the scheduling stability and efficiency of tasks during actual operation, and also helps to identify and solve problems that may occur in practical applications, reduce the risk of heterogeneous system deployment, and improve the reliability of heterogeneous systems.
[0145] S202. First information processing segment based on the segment.
[0146] The first information is used to indicate the priority order of the segments. After obtaining the first information of the segments, the computing device 11 can process the segments according to the priority order of each segment in the task.
[0147] In one possible implementation, processing can also be understood as calling or executing.
[0148] In one possible implementation, before the computing device processes the first information segment based on the segment, the computing device 11 sets the operating system's processor as a real-time processor to ensure that the task is not interrupted by other tasks.
[0149] Understandably, since the computing device 11 has determined the tasks and number of tasks to be processed by each processor during the preprocessing stage, in order to ensure that the task allocation during actual execution corresponds to that during simulation, the computing device will allocate corresponding resources to each task segment. Furthermore, for heterogeneous systems that particularly emphasize computationally intensive tasks, this embodiment can be applied to various application scenarios, thereby improving the scheduling flexibility of computationally intensive tasks.
[0150] In one example, such as Figure 4 As shown, the horizontal axis represents utilization, which is the proportion of resources used by each algorithm relative to the total resources of a single CPU. The vertical axis represents the number of times a task passes the test with the same number of trials, such as the number of times a task passes in 100 trials. For example, when the utilization of RM is 60%, the pass rate is approximately 38%, meaning that in a scenario where a program is scheduled and tested using the RM algorithm with 60% of the resources of a single CPU, the pass rate of the task is 38%.
[0151] From Figure 4 It can be known that, under the fixed system load, the task passing rate obtained by using the method provided in the embodiment is higher than that of other algorithms under the same utilization rate.
[0152] Please refer to Figure 5 , Figure 5 A structural schematic diagram of a task scheduling device provided in the embodiment. The task scheduling device can be used to realize the function of the computing device 11 in the method embodiment, and thus can also realize the beneficial effects possessed by the method embodiment. In the embodiment, the task scheduling device can be located in the computing device 11 as shown in the figure, and can be a module (such as a chip) of the computing device 11. The task scheduling device 5000 comprises: Figure 1a
[0153] An information obtaining module 5001, configured to obtain first information of a segment, the first information being used to indicate a priority order of the segment, the first information being related to a deadline of the segment and a processing duration of a task, the task comprising a plurality of segments;
[0154] A task executing module 5002, configured to process the segment based on the first information of the segment.
[0155] In a possible implementation manner, the first information is determined based on a weight ratio between second information and third information, the second information being used to indicate the deadline of the segment, and the third information being used to indicate the processing duration of the task.
[0156] In a possible implementation manner, the third information comprises a remaining processing duration of the task.
[0157] In a possible implementation manner, the third information comprises a total number of segments to be suspended in the task.
[0158] In a possible implementation manner, the third information comprises a total length of segments to be suspended in the task.
[0159] In a possible implementation manner, the third information is determined based on a most remaining suspended segment first (MSF) algorithm.
[0160] In a possible implementation manner, the third information comprises a processing duration of a segment to be suspended in the task.
[0161] In a possible implementation manner, the first information is obtained based on offline testing of a program, the program comprising a plurality of tasks.
[0162] In the embodiment, the operations performed by each unit in the task scheduling device 5000 are the same as those described in the foregoing Figure 2 The similar as described in the method embodiments can be used to realize the functions of the control device in the above method embodiments, and the beneficial effects of the above method embodiments can also be realized, which will not be repeated here.
[0163] The embodiments of the present application further provide a computer readable storage medium, comprising program instructions, which, when executed on a computing device, cause the computing device to perform any of the above method embodiments.
[0164] The embodiments of the present application further provide a computer program product, which, when executed on a computer, causes the computer to perform any of the above method embodiments.
[0165] It can be understood that the apparatus and method described in the present application can also be implemented in other ways. For example, the apparatus embodiments described above are only schematic, and the division of units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.
[0166] Each embodiment in the specification is described in a progressive manner, and the same or similar parts between each embodiment can be referred to each other, and each embodiment focuses on the difference from other embodiments.
[0167] The naming or numbering of the steps in the present application does not mean that the steps in the method process must be executed in the time / logical order indicated by the naming or numbering. The named or numbered process steps can change the execution order according to the technical purpose to be achieved, as long as the same or similar technical effects can be achieved. The division of units in the present application is a logical division, and in actual application, another division manner can be implemented, for example, a plurality of units can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be through some interface, indirect coupling or communication connection between units can be electrical or other similar forms, which are not limited in the present application. And the units or sub-units as separate components can be or can not be physical units, or can be distributed to a plurality of circuit units, and some or all of the units can be selected according to actual needs to achieve the purpose of the present application scheme.
[0168] The terms "first", "second", and the like, as used in the specification and in the claims of the application, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the use of the terms so construed can interchange depending upon the context in which it is used. It is also to be understood that the terms "comprising", "having", "including", and the like, when used in the specification, the claims and the above description of the application, are not intended to exclude or exclude the presence of one or more features, integers, steps, operations, objects, benefits, advantages, or the like, and that the description of the application has the same scope as if each feature and each combination of features were explicitly disclosed in the claims.
[0169] The term "and / or", occurring in the present application, can be a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in the present application generally represents an "or" relationship between the front and rear associated objects.
[0170] It should also be noted that in some alternative implementations, the functions / actions indicated can not occur in the order shown in the figures. For example, depending on the functions / actions involved, two consecutively shown figures can actually occur substantially simultaneously or can be performed in reverse order at times.
[0171] In the embodiments of the present application, unless otherwise specified, "at least one" means one or more, and "multiple" means two or more. It can be understood that in the present application, "when", "if" and "if" all mean that the device will make corresponding processing under certain objective conditions, and are not limited to time, and do not require the device to have a judgment action when implemented, nor does it mean that there are other limitations. In addition, the special word "exemplary" means "as an example, embodiment or illustration". Any embodiment described as "exemplary" is not necessarily interpreted as superior or better than other embodiments.
[0172] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application. In the embodiments of the present application, various numbers are only used for differentiation for convenience of description, and are not used to limit the scope of the embodiments of the present application. The size of the serial number of the above processes does not mean the execution order, and the execution order of the processes should be determined by its function and inherent logic.
[0173] The above examples are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacements for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A task scheduling method, characterized by, The method comprises: obtaining first information of a segment, the first information being used to indicate a priority order of the segment, the first information being related to a deadline of the segment and a processing duration of a task, the task comprising a plurality of segments; processing the segment based on the first information of the segment.
2. The method of claim 1, wherein, The first information is determined based on a weight ratio between second information and third information, the second information being used to indicate the deadline of the segment, and the third information being used to indicate the processing duration of the task.
3. The method of claim 2, wherein, The third information comprises a remaining processing duration of the task.
4. The method of claim 3, wherein, The third information comprises a total number of segments to be suspended in the task.
5. The method of claim 3, wherein, The third information comprises a total length of segments to be suspended in the task.
6. The method according to claim 4 or 5, characterized in that, The third information is determined based on a Most Segments First, MSF, algorithm.
7. The method of claim 3, wherein, The third information comprises a processing duration of segments to be suspended in the task.
8. The method according to any one of claims 1 to 7, characterized in that, The first information is obtained based on offline testing of a program, the program comprising a plurality of tasks.
9. A task scheduling apparatus characterized by comprising: The method comprises: an information obtaining module, configured to obtain first information of a segment, the first information being used to indicate a priority order of the segment, the first information being related to a deadline of the segment and a processing duration of a task, the task comprising a plurality of segments; a task executing module, configured to process the segment based on the first information of the segment.
10. The apparatus of claim 9, wherein, The first information is determined based on a weight ratio between second information and third information, the second information being used to indicate the deadline of the segment, and the third information being used to indicate the processing duration of the task.
11. The apparatus of claim 10, wherein, The third information comprises a remaining processing duration of the task.
12. The apparatus of claim 11, wherein, The third information comprises a total number of segments to be suspended in the task.
13. The apparatus of claim 11, wherein, The third information comprises a total length of segments to be suspended in the task.
14. The apparatus of claim 12 or 13, wherein, The third information is determined based on a Most Segments First, MSF, algorithm.
15. The apparatus of claim 11, wherein, The third information comprises a processing duration of segments to be suspended in the task.
16. The apparatus of any one of claims 9 to 15, wherein, The first information is obtained based on offline testing of a program, the program comprising a plurality of tasks.
17. A computing device, comprising: The computing device comprises a memory and a processor; The memory is configured to store a computer program; The processor is configured to execute the computer program to enable the computing device to implement the method in any one of claims 1 to 8.
18. A computer-readable storage medium, characterized in that, The storage medium has stored therein a computer program, which, when executed by a processor, implements the method in any one of claims 1 to 8.