Integrated circuit path optimization method based on multi-dimensional feature judgment

By using a multi-dimensional feature-based integrated circuit path optimization method, multiple features of the signal transmission path are evaluated, the optimal path is determined, and targeted processing is performed. This solves the problems of poor optimization effect and resource waste in integrated circuit timing violations, and achieves efficient timing violation repair and resource utilization.

CN121072452AActive Publication Date: 2025-12-05ZHIHEXINGYI TECHNOLOGY (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202511622953.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-07
Publication Date
2025-12-05
Estimated Expiration
2045-11-07

AI Technical Summary

Technical Problem

Existing technologies for resolving timing violations in integrated circuits typically employ a single metric for evaluation, resulting in poor optimization performance, low iteration efficiency, and a high risk of resource waste.

Method used

By using a multi-dimensional feature-based method, the signal transmission path of an integrated circuit is evaluated. By utilizing multi-dimensional indicators such as signal delay, load dispersion, and buffer level, replicable and optimization paths are identified, and targeted optimizations are performed.

Benefits of technology

It achieves a high efficiency improvement in timing violation repair rate, reduces resource waste, improves optimization efficiency, and solves the problems of slow iteration and low accuracy in existing technologies.

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Abstract

The embodiment of the invention provides an integrated circuit path optimization method based on multi-dimensional feature judgment, and the method comprises the steps: determining the signal transmission features of an integrated circuit according to the layout and wiring data of the integrated circuit and the static time sequence analysis data of the integrated circuit, determining the scores of a plurality of signal transmission paths according to the signal transmission features, and determining the signal transmission path with the corresponding score higher than a first threshold value as a replicable path, determining the signal transmission path with the corresponding score lower than a second threshold value as a to-be-optimized path, and optimizing the to-be-optimized path according to the replicable path. According to the scheme, the score of the signal transmission path is calculated through the signal transmission characteristics, the signal transmission path is evaluated from multiple dimensions, and the poor optimization effect caused by single index evaluation is avoided. The path needing to be optimized is determined through the score of the signal transmission path, targeted processing is achieved, the whole integrated circuit does not need to be optimized, and resource waste caused by excessive copying is avoided.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of integrated circuits, and in particular to an integrated circuit path optimization method based on multi-dimensional feature judgment. BACKGROUND

[0002] With the development of integrated circuits, the scale of integrated circuits continues to increase, but large-scale integrated circuits tend to have characteristics such as excessively long signal transmission paths, excessively large fan-outs, crossing congested areas, or physically dispersed distribution, which can cause setup violation problems.

[0003] Currently, in order to solve the problem of setup violation, a buffer or upsizing driving unit is usually inserted on a critical path, the wiring width, spacing, or level is increased, or some designers manually judge and duplicate some lines with large fan-outs.

[0004] However, the method of inserting a buffer or upsizing driving unit on a critical path has limited effect on the fan-out problem across a large area, and increasing the wiring width, spacing, or level only improves a single signal transmission path. The manual judgment method may miss or over-duplicate due to the single evaluation index, and the iteration efficiency is low, which cannot achieve the ideal optimization effect. SUMMARY

[0005] Therefore, embodiments of the present application provide an integrated circuit path optimization method based on multi-dimensional feature judgment.

[0006] According to a first aspect of embodiments of the present application, an integrated circuit path optimization method based on multi-dimensional feature judgment is provided, including: determining signal transmission features of an integrated circuit according to layout and routing data of the integrated circuit and static timing analysis data of the integrated circuit, wherein the signal transmission features are used to indicate signal delay degree, load dispersion degree, and buffer level of a plurality of signal transmission paths included in the integrated circuit; determining scores of the plurality of signal transmission paths according to the signal transmission features; determining a signal transmission path corresponding to a score higher than a first threshold value as a duplicable path, and determining a signal transmission path corresponding to a score lower than a second threshold value as a path to be optimized, wherein the second threshold value is less than or equal to the first threshold value; and optimizing the path to be optimized according to the duplicable path.

[0007] According to the scheme provided in the embodiment of the present application, the score of the signal transmission path is calculated through the signal transmission characteristics, the signal transmission path is evaluated from multiple dimensions, and the poor optimization effect caused by single index evaluation is avoided. The path that needs to be optimized is determined through the score of the signal transmission path, targeted processing is realized, the entire integrated circuit does not need to be optimized, and resource waste caused by excessive replication is avoided. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments described in the present application, and other drawings can also be obtained by those skilled in the art according to these drawings.

[0009] Figure 1 is a step flow chart of an integrated circuit path optimization method based on multi-dimensional feature judgment according to an embodiment of the present application; Figure 2 is a step flow chart of a normalization result calculation method of a timing feature according to an embodiment of the present application; Figure 3 is a step flow chart of an integrated circuit path optimization method based on multi-dimensional feature judgment according to another embodiment of the present application; Figure 4A The signal transmission path of the integrated circuit before optimization is shown; Figure 4B The signal transmission path of the integrated circuit after optimization is shown; Figure 5 is a schematic diagram of an automatic optimization device of an integrated circuit according to an embodiment of the present application; Figure 6 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0010] The present application is described below based on the embodiments, but the present application is not limited to only these embodiments. In the following detailed description of the present application, some specific details are described in detail. The present application can also be fully understood without the description of these details by those skilled in the art. In order to avoid confusion of the essence of the present application, the well-known methods, processes and flows are not described in detail. In addition, the drawings are not necessarily drawn to scale.

[0011] Figure 1 is a step flow chart of an integrated circuit path optimization method based on multi-dimensional feature judgment according to an embodiment of the present application. As shown in Figure 1 , the integrated circuit path optimization method based on multi-dimensional feature judgment can include the following steps: Step 101, determining signal transmission characteristics of the integrated circuit according to layout routing data of the integrated circuit and static timing analysis data of the integrated circuit.

[0012] In order to optimize the integrated circuit, it is necessary to know the problems of the integrated circuit first, so the layout routing data (Place&Route) can be extracted from the layout routing graph of the integrated circuit design, and the static timing analysis data of the integrated circuit can also be obtained from the static timing analysis (STA) report. Then, according to the layout routing data of the integrated circuit and the static timing analysis data of the integrated circuit, the signal transmission characteristics of the integrated circuit are determined, which are used to indicate the signal delay degree, load dispersion degree and buffer level of the plurality of signal transmission paths included in the integrated circuit.

[0013] Step 102, determining scores of the plurality of signal transmission paths according to the signal transmission characteristics.

[0014] After obtaining the signal transmission characteristics, each signal transmission path is scored according to the signal transmission characteristics corresponding to each signal transmission path. The scoring method can be multi-dimensional scoring of the signal delay degree, load dispersion degree and buffer level, and then comprehensive scoring is performed to obtain the final score. Alternatively, the signal delay degree, load dispersion degree and buffer level can be normalized, and different weights can be given according to their respective characteristics to calculate the final score.

[0015] Step 103, determining the signal transmission paths corresponding to scores higher than a first threshold value as replicable paths, and determining the signal transmission paths corresponding to scores lower than a second threshold value as paths to be optimized.

[0016] The higher the score of the signal transmission path, the better the signal transmission performance of the signal transmission path, and the more suitable the signal transmission path is for repetition. Therefore, the signal transmission paths corresponding to scores higher than the first threshold value are determined as replicable paths, and the signal transmission paths corresponding to scores lower than the second threshold value are determined as paths to be optimized. Since some signal transmission paths may just pass, they do not need to be optimized, but they are not very suitable for repetition. Therefore, the second threshold value can be less than the first threshold value, or the first threshold value can be equal to the second threshold value for simplicity, as long as the signal transmission paths that do not need to be optimized can be used for repetition. For example, the first threshold value can be 0.7, and the second threshold value can be 0.5.

[0017] Step 104, optimizing the paths to be optimized according to the replicable paths.

[0018] Duplication / cloning operation in integrated circuits is a technical operation for optimizing signal transmission by creating a copy of the driving unit, so that the "signal source" in the duplicable path shares the load of the path to be optimized.

[0019] The integrated circuit path optimization method based on multi-dimensional feature determination provided in the embodiments of the present application calculates the score of the signal transmission path through the signal transmission feature, evaluates the signal transmission path from multiple dimensions, and avoids poor optimization effect caused by single index evaluation. The path to be optimized is determined through the score of the signal transmission path, targeted processing is realized, the entire integrated circuit does not need to be optimized, and resource waste caused by excessive duplication is avoided. In addition, existing EDA tools (such as Synopsys IC Compiler, Cadence Innovus, etc.) only support duplication recommendation based on a single index, for example, only according to the fan-out number (such as > 50 to recommend duplication) or the timing margin (such as < -30ps to prompt optimization), the designer needs to manually try different duplication schemes, the iteration period is long, and it may take one or several weeks according to the actual situation, and it is easy to cause excessive duplication (resource waste of 10%-15%) or optimization omission (timing violation repair rate < 70%) due to single index. The present scheme realizes intelligent determination of duplicable paths through multi-dimensional index scoring and dynamic threshold correction, without manual intervention, after single round optimization, the timing violation repair rate is improved to more than 90%, and the resource waste is reduced to less than 5%, which can solve the problems of "slow iteration and low precision" of existing EDA tools.

[0020] In a possible implementation manner, the process of determining the scores of the plurality of signal transmission paths according to the signal transmission features can further include: For each of the plurality of signal transmission paths, the timing feature, the physical feature and the path link feature corresponding to the signal transmission path are determined according to the signal transmission features, the timing feature is used to indicate the signal delay degree of the signal transmission path, the physical feature is used to indicate the load dispersion degree of the signal transmission path, and the path link feature is used to indicate the number of stages of the buffer in the signal transmission path.

[0021] The signal transmission feature can include timing feature, physical feature and path link feature corresponding to the signal transmission path. The timing feature can include at least one of worst timing slack, average timing slack and clock length value. The timing slack is used to indicate the difference between the data valid time and the clock period after the data arrives at the clock edge. A positive number indicates that the requirement is met, and a negative number indicates a violation. For example, the worst timing slack of a signal transmission path is -16ps, which means that the signal transmission path can be delayed by at most 16 picoseconds during signal transmission. The values of the worst timing slack and the average timing slack of the signal transmission path are negatively correlated with the final score, and the clock length of the signal transmission path is positively correlated with the final score. The physical feature can include at least one of path length of the signal transmission path, number and maximum spacing of load clusters in the signal transmission path, and hierarchical name (hier name) to which the load belongs. The path length of the signal transmission path and the number and maximum spacing of load clusters in the signal transmission path are negatively correlated with the final score, and the hierarchical name to which the load belongs is used to locate the signal transmission path. The path link feature can include at least one of the number of signal driving endpoints (fanout) and the number of buffers in the signal transmission path. The number of signal driving endpoints and the number of buffers in the signal transmission path are negatively correlated with the final score.

[0022] According to the timing feature, the physical feature and the path link feature corresponding to the signal transmission path, the score of the signal transmission path is calculated by the following formula: wherein, the score of the signal transmission path is represented by S, the normalized result of the timing feature is represented by S1, the normalized result of the physical feature is represented by S2, the normalized result of the path link feature is represented by S3, the weight corresponding to the timing feature is represented by w1, the weight corresponding to the physical feature is represented by w2, the weight corresponding to the path link feature is represented by w3, and the sum of w1, w2 and w3 is 1.

[0023] Since the timing feature, the physical feature and the path link feature all include multiple parameters, normalization processing is required before the score calculation. After the normalization is completed, the score of the signal transmission path is calculated according to the weights corresponding to the timing feature, the physical feature and the path link feature. The weights can be dynamically adjusted according to the chip process node. For example, in the 5nm process, the timing feature has a greater impact on performance, the value of w1 can be 0.4-0.5, in the 7nm process, the physical feature (load dispersion) has a more significant impact, The value can be 0.4-0.5. Moreover, the contribution of each feature to the timing violation repair rate can be counted by analyzing the optimization cases of the chips that have been mass-produced under the same process, and the weight value is calibrated reversely to ensure that the score is strongly associated with the actual optimization effect.

[0024] In the embodiments of the present application, the timing feature, the physical feature and the path link feature can be used to analyze the signal transmission path in multiple dimensions, and the final score can be calculated by normalization, so that the problems of the signal transmission path can be quantified, and the signal transmission path that needs to be optimized can be directly observed.

[0025] Figure 2 is a step flow chart of the normalization result calculation method of the timing feature of an embodiment of the present application. As shown in Figure 2 The normalization result calculation method of the timing feature can include the following steps: Step 201, calculating the margin and severity of the signal transmission path according to the timing margin of the signal transmission path and the timing margin of the upper level signal transmission path of the signal transmission path.

[0026] In order to calculate the normalization result of the timing feature, first, the margin and severity of the signal transmission path are calculated according to the timing margin of the signal transmission path and the timing margin of the upper level signal transmission path of the signal transmission path. The margin of the signal transmission path is used to indicate the margin of the data arrival time outside the required time. The severity of the signal transmission path is used to indicate the influence degree of the signal transmission state on the signal transmission path.

[0027] Step 202, linearly mixing the margin and severity of the signal transmission path to obtain the normalization result of the timing feature corresponding to the signal transmission path.

[0028] The normalization result of the timing feature can be calculated by the following formula:

[0029] wherein, is used to represent the margin function, is used to represent the severity function, is used to represent the weight of the margin corresponding to the linear mixing, may be a preset value, or can be adjusted according to the degree of automation optimization of the integrated circuit. For example, when the integrated circuit is optimized for the first time, a value higher than 0.5 is set, and the more times the integrated circuit is automatically optimized, the value of can be smaller, and tends to be close to 0.5.

[0030] Specifically, the margin function can be as follows:

[0031] wherein, for representing the margin, for representing the reference margin, the value of the reference margin ranges from 100ps to 300ps, and the value of the reference margin can be adjusted according to the degree of automation optimization of the integrated circuit.

[0032] When P (margin) < P_ref, g_P(P) increases linearly with P, which reflects that the smaller the margin is, the lower the replication feasibility is; when P ≥ P_ref, g_P(P) tends to 1, which avoids the score saturation caused by excessive calculation and ensures the stability of the feasibility determination of the path with sufficient margin.

[0033] The severity function can be as follows:

[0034] wherein, for representing the severity, for representing the reference severity, the value of the reference severity ranges from 50ps to 200ps, and the reference severity is used to control the curve slope of the severity function.

[0035] When V (severity) < V_ref, g_V(V) increases rapidly with V, which highlights that the more serious the timing violation is, the higher the optimization urgency is; when V ≥ V_ref, g_V(V) tends to 1, which prevents a single path from monopolizing optimization resources due to excessively high severity.

[0036] Specifically, the margin of the signal transmission path is the maximum value between the timing slack of the upper level signal transmission path of the signal transmission path and 0, wherein, for representing the timing slack of the upper level signal transmission path of the signal transmission path, and the severity of the signal transmission path is the maximum value between the negative of the timing slack of the signal transmission path and 0, wherein, for representing the timing slack of the signal transmission path.

[0037] When P is small (such as < 50ps) but V is large (such as > 150ps), ft is balanced to 0.4-0.5 (such as 0.5-0.6) after which prompts that the path needs to be optimized and avoids blind determination as high priority, thereby avoiding resource mismatch; when P is large (such as > 200ps) but V is small (such as < 50ps), the value is 0.6-0.7, which reflects that there is a margin but it is not urgent, and the high-urgency path optimization is prioritized to improve the overall optimization robustness.

[0038] In the embodiments of the present application, by linear mixing, when the margin is small but the severity is very large (urgent but low feasibility), the normalization result of the timing feature is still supported by the severity function (prompting the need for intervention), but the opportunity will not be blindly pushed to 1. At the same time, if the margin is large but the severity is small, the combination reflects that there is a margin but it is not urgent. The accuracy of the normalization result of the timing feature can be improved.

[0039] In one possible implementation manner, the normalization result of the physical feature can be obtained by the following method: According to the physical feature, a cluster dispersion degree sub-feature, a load quantity sub-feature, and a physical distance sub-feature are determined, the cluster dispersion degree sub-feature is used to represent the distribution of the load, the load quantity sub-feature is used to represent the number of loads corresponding to the driving source in the signal transmission path, and the physical distance sub-feature is used to represent the maximum distance between the driving source and the load.

[0040] The physical feature indicates the load dispersion degree of the signal transmission path, and can specifically include the positions of the loads in the signal transmission path, so that the loads in the signal transmission path can be clustered according to distance by K-medoids clustering (K [1, Kmax]), and the closer the clustering result is to 1 (compact within the class and far between the classes), the closer the cluster dispersion degree sub-feature is to 1, and the stronger the replication tendency is. Kmax=number of loads / 5, to avoid over-fine clustering.

[0041] According to the cluster dispersion degree sub-feature, the load quantity sub-feature, and the physical distance sub-feature, and the weights corresponding to the cluster dispersion degree sub-feature, the load quantity sub-feature, and the physical distance sub-feature, the normalization result of the physical feature is determined.

[0042] In order to calculate the normalization result of the physical feature, the cluster dispersion degree sub-feature, the load quantity sub-feature, and the physical distance sub-feature can be normalized respectively and weighted and summed.

[0043] The normalization result of the cluster dispersion degree sub-feature is calculated according to the following formula:

[0044] wherein, is used to represent the normalization result of the cluster dispersion degree sub-feature, and S is used to represent.

[0045] The calculation method of the cluster dispersion degree S is: S=(intra-class average distance / inter-class minimum distance)*0.5, when the intra-class is compact (such as <30 μm) and the inter-class is distant (such as >100 μm), S tends to 1, and at this time the normalization result of the cluster dispersion degree sub-feature tends to 1, proving that the signal transmission path is suitable for replication, and further accurately identifying the path with reasonable load distribution, reducing the timing risk after replication.

[0046] The normalized result of the load quantity sub-feature is calculated according to the following formula:

[0047] in, Used to characterize the normalization result of the load quantity sub-feature Used to characterize the fan-out quantity Used to characterize the fan-out reference value.

[0048] The normalized result of the physical distance sub-feature is calculated according to the following formula:

[0049] in, Used to characterize the normalization result of physical distance sub-features Used to characterize the maximum Manhattan distance, Used to characterize the reference distance.

[0050] In this embodiment of the application, the cluster dispersion sub-feature is evaluated in the physical features, and the calculation is performed accordingly. By incorporating temporal characteristics during scoring, the replication strategy can be transformed from a static rule-based approach to an adaptive data-driven model. By determining the normalized results of physical features through cluster dispersion sub-features, load quantity sub-features, and physical distance sub-features, the signal transmission path can be evaluated from multiple dimensions, improving the accuracy of the physical feature normalization results. Figure 3 This is a flowchart of the steps of an integrated circuit path optimization method based on multi-dimensional feature determination according to another embodiment of this application, as follows: Figure 3 As shown, the integrated circuit path optimization method based on multi-dimensional feature determination may include the following steps: Step 301: Determine the signal transmission characteristics of the integrated circuit based on the layout and routing data and the static timing analysis data of the integrated circuit.

[0051] Step 302: Determine the scores of multiple signal transmission paths based on signal transmission characteristics.

[0052] Step 303: Determine the signal transmission path with a score higher than the first threshold as a replicable path, and determine the signal transmission path with a score lower than the second threshold as a path to be optimized.

[0053] Steps 301-303 are the same as steps 101-103 in the previous embodiments, and will not be repeated here.

[0054] Step 304: Select a first number of loads from the loads included in the path to be optimized as cluster centers. The number of clusters in each cluster center is greater than 1 and less than or equal to the third threshold.

[0055] Step 305, Manhattan distance of each load to the cluster center is calculated, and each load is classified into the cluster where the shortest Manhattan distance corresponds to the cluster center.

[0056] Step 306, at least part of the drive unit in the replicable path is replicated, so that at least part of the drive unit corresponds to the cluster to which the load of the path to be optimized belongs, and the optimization of the path to be optimized is realized.

[0057] In the signal transmission path of the integrated circuit, the load of the signal is often distributed in different areas of the integrated circuit (such as different functional modules, different physical positions). If a drive unit is directly copied to cover all the integrated circuits, it may cause new long line transmission or uneven load, and thus cannot solve the timing problem. Therefore, when optimizing the path, in order to reduce the long line and cross-area fanout, the method of clustering can be used to group the dispersed load according to the physical position, and the K-means or K-medoids algorithm is used to cluster the load included in the path to be optimized into several clusters based on the Manhattan distance. For example, 118 loads can be clustered into 3 clusters, and the loads in each cluster are close (such as the maximum distance in the cluster <50μm), and the distance between clusters is far (such as >100μm). Then at least part of the drive unit in the replicable path is replicated, so that the replicated drive unit can drive the clusters of the load included in the path to be optimized. The first number is less than the number of loads included in the path to be optimized.

[0058] Compared with the traditional replication method which only depends on the fanout number threshold, according to the clustering of the loads according to the physical coordinates of the loads, the centralized and dispersed load distribution can be effectively distinguished, the unnecessary replication operation can be significantly reduced, and the optimization efficiency can be improved.

[0059] Specifically, the number of drive units in the replicable path that are replicated can be equal to the number of clusters into which the loads included in the path to be optimized are divided, and the replicated drive units correspond to the clusters one by one.

[0060] Specifically, in order to determine the number of clusters into which the loads included in the path to be optimized are divided, the loads included in the path to be optimized can be classified into a second number of clusters, the signal transmission cost at different values of the second number is calculated, and the value of the first number is determined according to the value of the second number corresponding to the lowest signal transmission cost.

[0061] The second number can be any number in (1, A), and A is the number of loads included in the path to be optimized. In order to determine the optimal second number, the second number can be taken with different values, and the signal transmission cost under each value of the second number can be calculated, which can be calculated by a cost function:

[0062] wherein, for representing the signal transmission cost, for representing the number of clusters corresponding to the to-be-optimized path when the second number takes value A, for representing the index of the cluster, for traversing each cluster from the first cluster to the Kth cluster, for representing the kth cluster, for representing the index of the load in the kth cluster, for traversing each load in the kth cluster, for representing the center (cluster center) of the kth cluster, for representing the distance from the load i to the center of the cluster where the load i is located,

[0063] When the data is divided into K clusters, the sum of the distances from all the loads to the center of the cluster to which the load belongs is calculated. The smaller the sum is, the more compact the data points in the cluster are, the better the clustering effect is, and the number of subsequent replication drive units (clones) can be more reasonably determined, so that when the critical path of the integrated circuit is optimized, the timing problem is solved and resource waste is minimized.

[0064] According to the cost function, the signal transmission cost corresponding to the second number at different values is calculated, and the value of the first number is determined according to the value of the second number corresponding to the lowest signal transmission cost, for example, the number of loads included in the to-be-optimized path is divided by the result of the value of the second number corresponding to the lowest signal transmission cost.

[0065] Specifically, a penalty function can also be added to improve the accuracy of the determination of the value of the second number corresponding to the lowest signal transmission cost:

[0066] wherein, for representing the expected number of clustering clusters, the expected number of clustering clusters can be pre-set according to experience, design requirements, etc., and the number of reasonable clusters expected to be obtained. When the actual number of clusters K deviates from the expected number of clusters , the absolute difference between the two is calculated and the ratio of is used to quantify the degree of deviation. If K deviates from more, the value of is larger, so as to punish unreasonable cluster number selection.

[0067] ​​In one possible implementation, the automatic optimization process of the integrated circuit can further include: obtaining a preset fourth threshold value, correcting the fourth threshold value according to the timing margin of the upper-level signal transmission path of the signal transmission path and the timing margin of the lower-level signal transmission path of the signal transmission path, and obtaining the first threshold value.

[0068] When the timing margin of the upper-level signal transmission path of the signal transmission path is far less than 0, the fourth threshold value can be increased (the duplication opportunity is small); when the timing margin of the upper-level signal transmission path of the signal transmission path is close to 0 or positive, the fourth threshold value can be decreased (the duplication priority is high). Similarly, the reference to the timing margin of the lower-level signal transmission path of the signal transmission path is similar. By correcting the fourth threshold value, the determination of the signal transmission path suitable for duplication can be more accurate.

[0069] For example, when the upper-level timing margin (S_pre) of the signal transmission path is less than -50 ps, it is determined that the upper-level path has a serious timing pressure, and duplication of the current path can exacerbate the upstream burden, and therefore the fourth threshold value is increased by 10%-20%, thereby reducing the probability of the current path being determined as a duplicable path. When S_pre is greater than or equal to 0 ps, the upper-level path timing margin is sufficient, and duplication of the current path has no upstream pressure, and therefore the fourth threshold value is decreased by 5%-10%, thereby improving the duplication priority of the duplicable path. When the lower-level timing margin (S_next) is less than -30 ps, the lower-level path timing is urgent, and the duplicability of the current path needs to be ensured to support downstream optimization, and therefore the fourth threshold value is decreased by 8%-15%; if S_next is greater than or equal to 0 ps, the lower-level path has no urgent demand, and therefore the fourth threshold value remains at the default value or is slightly adjusted.

[0070] The effect of the automatic optimization of the integrated circuit can be as shown in Figures 4A-4B Figure 4A The signal transmission path of the integrated circuit before optimization is shown in Figure 4B The signal transmission path of the integrated circuit after optimization is shown in Figure 4A The yellow circular area in the figure represents the starting point of the signal, which is the source unit (such as a register, a logic gate, etc.) driving the signal, the dark blue circular area represents the driving unit without duplication operation, that is, there is only one original driving unit to drive all related endpoints, and the red area represents the load. The original driving unit needs to drive a large number of dispersed endpoints, which is easy to cause timing violation (signal transmission timeout) or load overload (insufficient driving capacity). After optimization, Figure 4B ​The driving units in the middle are copied out multiple copies. After starting from the origin, at the white dot (copied driving unit), the signal is distributed to fewer, more concentrated paths, and the number of connected red loads is significantly reduced and more concentrated. This shows that by copying the driving unit, the driving task of a large number of dispersed loads originally borne by one driving unit is distributed to multiple copied driving units, each of which only needs to drive a small part of the concentrated load, thereby shortening the average distance of signal transmission, reducing signal delay, solving the timing violation problem, reducing the load of a single driving unit, improving driving efficiency, and avoiding signal distortion or transmission failure due to excessive load.

[0071] Figure 5 is a schematic diagram of an integrated circuit path optimization device based on multi-dimensional feature judgment according to an embodiment of the present application, as shown in Figure 5 The integrated circuit path optimization device 400 based on multi-dimensional feature judgment includes: A determination module 401 is configured to determine signal transmission features of the integrated circuit according to layout and routing data of the integrated circuit and static timing analysis data of the integrated circuit, wherein the signal transmission features are used to indicate signal delay degree, load dispersion degree and buffer level of a plurality of signal transmission paths included in the integrated circuit.

[0072] A scoring module 402 is configured to determine scores of the plurality of signal transmission paths according to the signal transmission features.

[0073] An optimization module 403 is configured to determine a signal transmission path corresponding to a score higher than a first threshold value as a copyable path, determine a signal transmission path corresponding to a score lower than a second threshold value as a to-be-optimized path, and optimize the to-be-optimized path according to the copyable path, wherein the second threshold value is less than or equal to the first threshold value.

[0074] To optimize an integrated circuit (IC), it's first necessary to understand its existing problems. Therefore, module 401 can extract placement and routing data from the IC design's layout and routing diagram, and also obtain static timing analysis data from the Static Timing Analysis (STA) report. Then, based on the IC's placement and routing data and STA data, the signal transmission characteristics of the IC are determined. These characteristics indicate the signal delay, load dispersion, and number of buffer stages in the multiple signal transmission paths included in the IC. After obtaining the signal transmission characteristics, module 402 scores each signal transmission path based on its corresponding characteristics. The scoring can be done by multi-dimensionally evaluating signal delay, load dispersion, and the number of buffer stages, then synthesizing the scores to obtain a final score; or by normalizing these factors and assigning different weights to each characteristic to calculate the final score. A higher score indicates better signal transmission performance and suitability for repetition. Therefore, the optimization module 403 identifies signal transmission paths with scores higher than the first threshold as reproducible paths and signal transmission paths with scores lower than the second threshold as paths to be optimized. Since some paths may have just barely passed the signal transmission test, they don't urgently need optimization but are not ideally suited for repetition either. Therefore, the second threshold can be lower than the first threshold, or for simplicity, the first threshold can be equal to the second threshold. Any signal transmission path that doesn't require optimization can be used for repetition. For example, the first threshold could be 0.7 and the second threshold could be 0.5.

[0075] In this embodiment, the signal transmission path score is calculated based on signal transmission characteristics, and the signal transmission path is evaluated from multiple dimensions, avoiding poor optimization results caused by a single indicator evaluation. By determining the path requiring optimization through the signal transmission path score, targeted processing is achieved, eliminating the need to optimize the entire integrated circuit and avoiding resource waste caused by excessive replication.

[0076] In this embodiment, an electronic device 500 is provided, such as... Figure 6 As shown, the electronic device 500 may include: a processor 501, a communications interface 502, a memory 503, and a communication bus 504. Wherein: The processor 501, communication interface 502, and memory 503 communicate with each other through the communication bus 504.

[0077] The communication interface 502 is configured to communicate with other electronic devices or servers.

[0078] The processor 501 is configured to execute the program 505, and specifically can execute the related steps in the foregoing integrated circuit path optimization method based on multi-dimensional feature judgment.

[0079] Specifically, the program 505 can include program codes, which include computer operation instructions.

[0080] The processor 501 can be a CPU, or an ASIC (Application Specific Integrated Circuit), or be configured as one or more integrated circuits. The one or more processors included in the smart device can be processors of the same type, such as one or more CPUs; or can be processors of different types, such as one or more CPUs and one or more ASICs.

[0081] The memory 503 is configured to store the program 505. The memory 503 can include a high-speed RAM memory, and can further include a non-volatile memory, for example, at least one disk memory.

[0082] The program 505 can be specifically used for causing the processor 501 to execute the foregoing integrated circuit path optimization method based on multi-dimensional feature judgment.

[0083] The specific implementation of each step in the program 505 can refer to the corresponding description in the foregoing corresponding steps and units of the integrated circuit path optimization method based on multi-dimensional feature judgment, which will not be described herein. It can be clearly understood by those skilled in the art that, for the convenience and brevity of description, the specific working process of the device and the module described above can refer to the corresponding process description in the foregoing method embodiments, which will not be described herein.

[0084] The electronic device 500 of the embodiment of the present application calculates the score of the signal transmission path through the signal transmission feature, evaluates the signal transmission path from multiple dimensions, and avoids poor optimization effect caused by single index evaluation. The path to be optimized is determined through the score of the signal transmission path, targeted processing is realized, the entire integrated circuit does not need to be optimized, and resource waste caused by excessive replication is avoided.

[0085] In this embodiment, a computer-readable storage medium storing instructions for causing a machine to perform the integrated circuit path optimization method based on multi-dimensional feature determination as described herein is provided. Specifically, a system or apparatus equipped with a storage medium on which a software program code for implementing the functions of any of the above-described embodiments is stored, and causing a computer (or CPU or MPU) of the system or apparatus to read out and execute the program code stored in the storage medium can be provided.

[0086] In this case, the program code read from the storage medium can itself implement the functions of the above-described method embodiments, and therefore the program code and the storage medium storing the program code constitute part of the present application.

[0087] Embodiments of the storage medium for providing the program code include a floppy disk, a hard disk, a magneto-optical disk, an optical disk (such as a CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD+RW), a magnetic tape, a non-volatile memory card, and a ROM. Alternatively, the program code can be downloaded from a server computer through a communication network.

[0088] In this embodiment, a computer program product is provided, which includes computer instructions instructing a computing device to perform the operations corresponding to the above-described method embodiments.

[0089] It should be noted that, according to the needs of implementation, each component / step described in the embodiments of the present application can be split into more components / steps, or two or more components / steps or part of the operations of the components / steps can be combined into a new component / step, to achieve the purpose of the embodiments of the present application.

[0090] The above-described method according to the embodiments of the present application can be implemented in hardware, firmware, or as software or computer code that can be stored in a recording medium such as a CD ROM, a RAM, a floppy disk, a hard disk, or a magneto-optical disk, or downloaded through a network from a remote recording medium or a non-transitory machine-readable medium originally stored in a local recording medium and to be stored in a local recording medium, so that the method described herein can be processed by such software using a general-purpose computer, a special-purpose processor, or programmable or dedicated hardware such as an ASIC or an FPGA. It can be understood that the computer, processor, microprocessor electronic device, or programmable hardware includes a storage component (for example, RAM, ROM, flash memory, etc.) that can store or receive software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the method described herein. In addition, when a general-purpose computer accesses the code for implementing the method shown herein, the execution of the code will convert the general-purpose computer into a special-purpose computer for executing the method shown herein.

[0091] The embodiments of the present application can quickly and accurately locate the critical path in the process of solving the signal transmission path duplication (duplication / clone) in the integrated circuit timing violation, shorten the design cycle, reduce the design cost, and effectively solve the key path timing violation problem, and improve the chip performance, such as increasing the chip running speed, reducing the power consumption, and improving the product competitiveness. In addition, the weights and thresholds in the present scheme can be adjusted, which is suitable for different chip manufacturing processes (such as 5nm, 7nm, etc.), and can better meet the optimization needs of customers for chips of different process nodes.

[0092] It should be understood that each of the embodiments in the specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment mainly describes the difference from other embodiments. Especially, for the method embodiment, since it is basically similar to the method described in the device and system embodiment, the description is relatively simple, and the related parts can refer to the part of the description of other embodiments.

[0093] It should be understood that the above describes a specific embodiment of the specification. Other embodiments are within the scope of the claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multi-task processing and parallel processing are possible or can be advantageous.

[0094] It should be understood that the elements described herein in singular form or only one shown in the drawings do not represent the number of the elements limited to one. In addition, the modules or elements described or shown herein as separate can be combined into a single module or element, and the modules or elements described or shown herein as single can be split into multiple modules or elements.

[0095] It should also be understood that the terms and expressions used herein are only for description, and one or more embodiments of the specification should not be limited to these terms and expressions. The use of these terms and expressions does not mean the exclusion of any equivalent features described (or part thereof). It should be recognized that various modifications that can exist should be included in the scope of the claims. Other modifications, changes and replacements can also exist. Accordingly, the claims should be considered to cover all these equivalents.

Claims

1. An integrated circuit path optimization method based on multi-dimensional feature judgment, comprising: determining signal transmission features of an integrated circuit according to layout routing data of the integrated circuit and static timing analysis data of the integrated circuit, wherein the signal transmission features are used to indicate signal delay degree, load dispersion degree and buffer stage number of a plurality of signal transmission paths included in the integrated circuit; determining scores of the plurality of signal transmission paths according to the signal transmission features; determining a signal transmission path corresponding to a score higher than a first threshold as a replicable path, and determining a signal transmission path corresponding to a score lower than a second threshold as a path to be optimized, wherein the second threshold is less than or equal to the first threshold; optimizing the path to be optimized according to the replicable path.

2. The method of claim 1, wherein, The determining of the scores of the plurality of signal transmission paths according to the signal transmission features comprises: for each of the plurality of signal transmission paths, determining a timing feature, a physical feature and a path link feature corresponding to the signal transmission path according to the signal transmission features, wherein the timing feature is used to indicate signal delay degree of the signal transmission path, the physical feature is used to indicate load dispersion degree of the signal transmission path, and the path link feature is used to indicate stage number of buffers in the signal transmission path; calculating the score of the signal transmission path according to the timing feature, the physical feature and the path link feature corresponding to the signal transmission path by the following formula: wherein a score for characterizing a signal transmission path, a normalized result for characterizing the timing feature, a normalized result for characterizing the physical feature, a normalized result for characterizing the path link feature, a weight for characterizing the timing feature, a weight for characterizing the physical feature, a weight for characterizing the path link feature, and and the sum of the weights is 1.

3. The method of claim 2, wherein, The method further comprises: calculating a normalized result of the timing feature by the following method: calculating slack and severity of the signal transmission path according to timing slack of the signal transmission path and timing slack of a previous signal transmission path of the signal transmission path; linearly mixing the slack and the severity of the signal transmission path to obtain the normalized result of the timing feature corresponding to the signal transmission path.

4. The method of claim 3, wherein, The slack of the signal transmission path is a maximum value between the timing slack of the previous signal transmission path of the signal transmission path and 0, and the severity of the signal transmission path is a maximum value between an inverse of the timing slack of the signal transmission path and 0.

5. The method of claim 2, wherein, The method further comprises: determining a cluster dispersion degree sub-feature, a load number sub-feature and a physical distance sub-feature according to the physical feature, wherein the cluster dispersion degree sub-feature is used to represent distribution of loads, the load number sub-feature is used to represent number of loads corresponding to a driving source in the signal transmission path, and the physical distance sub-feature is used to represent maximum distance between the driving source and the loads; and determining a normalized result of the physical feature according to the cluster dispersion degree sub-feature, the load number sub-feature and the physical distance sub-feature, and weights corresponding to the cluster dispersion degree sub-feature, the load number sub-feature and the physical distance sub-feature.

6. The method of claim 1, wherein, The optimizing of the path to be optimized according to the replicable path comprises: selecting a first number of loads included in the to-be-optimized path as cluster centers, each of the cluster centers having a cluster number greater than 1 and less than or equal to a third threshold, wherein the first number is less than a number of loads included in the to-be-optimized path; calculating Manhattan distances from a physical coordinate of each load to each of the cluster centers, and classifying each load into a cluster in which a cluster center corresponding to a shortest Manhattan distance is located; copying at least part of the driving units in the replicable path so that the at least part of the driving units respectively correspond to the clusters to which the loads of the to-be-optimized path belong, thereby optimizing the to-be-optimized path.

7. The method of claim 6, wherein, The selecting a first number of loads included in the to-be-optimized path as cluster centers comprises: classifying the loads included in the to-be-optimized path into a second number of clusters, wherein the second number is less than a number of loads included in the to-be-optimized path; respectively calculating signal transmission costs of the second number at different values, and determining a value of the first number according to a value of the second number corresponding to a lowest signal transmission cost.

8. The method of any one of claims 1-7, wherein, The method further comprises: obtaining a preset fourth threshold; correcting the fourth threshold according to a timing margin of an upper-level signal transmission path of the signal transmission path and a timing margin of a lower-level signal transmission path of the signal transmission path to obtain the first threshold.

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