Millimeter wave broadband power amplifier and communication system based on transconductance enhancement stacked common-gate input

By designing a broadband power amplifier based on transconductance-enhanced stacked common-gate input in the millimeter-wave band, and using a matching network composed of transformers and capacitors, combined with a common-source architecture of transconductance-enhanced stacked common-gate stage and cross-coupled capacitors, the problem of broadband matching and high gain was solved, achieving a broadband power amplifier effect with high integration and high efficiency.

CN121077412APending Publication Date: 2025-12-05XIDIAN UNIV +1
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Patent Information

Application Number
CN202511230030.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-29
Publication Date
2025-12-05

AI Technical Summary

Technical Problem

Existing millimeter-wave broadband amplifiers cannot simultaneously meet the performance requirements of good broadband matching and high gain. Traditional methods suffer from problems such as complex wiring, parasitic effects, and insufficient impedance matching.

Method used

By adopting a transconductance-enhanced stacked common-matching input structure, and designing an input millimeter-wave broadband power amplifier, a matching network composed of transformers and capacitors is used. Combined with a common-source architecture of transconductance-enhanced stacked common gate stage and cross-coupled capacitors, broadband matching and high gain are achieved.

Benefits of technology

It achieves excellent broadband gain and input/output matching, reduces parasitic effects on RF signal traces, saves chip area, and meets the requirements of 5G communication and radar systems for highly integrated and efficient broadband power amplifiers.

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Abstract

The invention discloses a millimeter wave broadband power amplifier and communication system based on transconductance enhancement stacked common-gate input. The millimeter wave broadband power amplifier and communication system comprises an input matching circuit which is composed of an input transformer, a first capacitor and a second capacitor, wherein the first capacitor and the second capacitor are connected to the primary side and the secondary side of the input transformer in parallel; the output matching network is composed of an output transformer, an eleventh capacitor and a twelfth capacitor, wherein the eleventh capacitor and the twelfth capacitor are connected in parallel. The inter-stage matching network is composed of an inter-stage transformer, a seventh capacitor, an eighth capacitor and a fourth resistor, wherein the seventh capacitor and the eighth capacitor are connected to the primary stage and the secondary stage of the inter-stage transformer in parallel. A secondary coil of the input matching network is connected with an input end of the first amplifier, an output end of the first amplifier is connected with a primary coil of the inter-stage matching network, a secondary coil of the inter-stage matching network is connected with an input end of the second amplifier, and an output end of the second amplifier is connected with a primary coil of the output matching network; the first amplifier adopts a transconductance-enhanced stacked common-gate architecture, and the second amplifier adopts a common-source architecture with a cross-coupling capacitor.
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Description

TECHNICAL FIELD

[0001] The application belongs to the field of radio frequency power amplifiers, and particularly relates to a millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input and a communication system. BACKGROUND

[0002] The increasing demand for high-speed wireless communication promotes the development of wireless communication in the direction of high speed and high throughput, and thus puts forward higher requirements for the channel capacity of a communication system. The millimeter wave frequency band has abundant bandwidth resources and can adapt to greater bandwidth needs, so the communication frequency bands of communication equipment in important fields of current wireless communication, such as 5G communication and satellite communication, are all developing from ordinary microwave long waves to millimeter wave short waves.

[0003] A broadband amplifier is a core component for realizing broadband communication. There is no big difference between the traditional method and the method for realizing the broadband characteristics of an amplifier in the millimeter wave frequency band. Usually, an impedance network composed of multiple inductance and capacitance elements is needed to realize broadband impedance matching, but such wiring is complex and introduces additional parasitic effects. Moreover, when realizing broadband matching, a lower Q value of the impedance of the matching port and a small difference between the real parts will make broadband matching easier and more effective, but the Q value of the gate of a transistor is usually high, and the real part of the impedance is small and far from 50Ω. If a common source stage is used as an input stage, it is difficult to achieve good broadband input matching. If a common gate stage is used as an input stage, good input matching can be achieved, but its gain is not as good as that of a common source stage. SUMMARY

[0004] The purpose of the present application is to overcome the problem that the existing millimeter wave frequency band broadband amplifier cannot simultaneously meet the performance requirements of good broadband matching and high gain, and to propose a millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input and a communication system.

[0005] To achieve the above-mentioned purpose, the present application adopts the following technical solutions: In a first aspect, the present application provides a millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input, which comprises an input matching circuit, a first amplifier I1, an inter-stage matching network, a second amplifier I2, and an output matching network. The input matching circuit is composed of an input transformer T1, a first capacitor C1 connected in parallel with the primary of the input transformer T1, and a second capacitor C2 connected in parallel with the secondary of the input transformer T1. The output matching network is composed of an output transformer T11, an eleventh capacitor C11 connected in parallel with the primary of the output transformer T11, and a twelfth capacitor C12 connected with the secondary of the output transformer T11. The inter-stage matching network is composed of an inter-stage transformer T2, a seventh capacitor C7 connected in parallel with the primary of the inter-stage transformer T2, an eighth capacitor C8 connected with the secondary of the inter-stage transformer T2, and a fourth resistor R4 connected in parallel with the secondary coil of the inter-stage transformer T2. The secondary coil of the input matching network is connected to the input end of the first amplifier I1, the output end of the first amplifier I1 is connected to the primary coil of the inter-stage matching network, the secondary coil of the inter-stage matching network is connected to the input end of the second amplifier I2, and the output end of the second amplifier I2 is connected to the primary coil of the output matching network. The first amplifier I1 adopts a transconductance enhancement stacked common gate stage architecture, and the second amplifier I2 adopts a common source stage architecture with cross-coupled capacitors.

[0006] Further, the middle tap of the secondary coil of the input transformer T1 is connected to the ground GND, the middle tap of the primary coil of the inter-stage matching network is connected to the power supply VDD, the middle tap of the secondary coil of the inter-stage matching network is connected to the second bias voltage VB2, and the middle tap of the primary coil of the output transformer T2 is connected to the power supply VDD.

[0007] Further, the first amplifier I1 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, a second resistor R2, and a third resistor R3. The first input end VIP1 of the first amplifier I1 is connected to the source of the first transistor M1, the source of the second transistor M2 is the second input end VIN1 of the first amplifier I1, the drain of the third transistor M3 is the first output end VOP1 of the first amplifier I1, and the drain of the fourth transistor M4 is the second output end VON1 of the first amplifier I1. The third capacitor C3 and the fourth capacitor C4 are cross-coupled, and the third capacitor C3 and the fourth capacitor C4 are respectively connected across the source of the first transistor M1, the gate of the second transistor M2, and the source of the second transistor M2, the gate of the first transistor M1. The gate of the first transistor M1 is connected to the first bias voltage VB1 through the first resistor R1, and the gate of the second transistor M2 is connected to the first bias voltage VB1 through the second resistor R2. The drain of the first transistor M1 is connected to the source of the third transistor M3, and the drain of the second transistor M2 is connected to the source of the fourth transistor M4. The fifth capacitor C5 and the sixth capacitor C6 are cross-coupled, and the fifth capacitor C5 and the sixth capacitor C6 are respectively connected across the drain of the third transistor M3, the source of the fourth transistor M4, and the drain of the fourth transistor M4, the source of the third transistor M3. The gates of the third transistor M3 and the fourth transistor M4 are connected, and the gates are connected to the power supply through the third resistor R3.

[0008] Further, one end of the third capacitor C3 is connected to the source of the first transistor M1, and the other end of the third capacitor C3 is connected to the gate of the second transistor M2. One end of the fourth capacitor C4 is connected to the source of the second transistor M2, and the other end of the fourth capacitor C4 is connected to the gate of the first transistor M1.

[0009] Further, one end of the fifth capacitor C5 is connected to the drain of the third transistor M3, and the other end of the fifth capacitor C5 is connected to the source of the fourth transistor M4. One end of the sixth capacitor C6 is connected to the drain of the fourth transistor M4, and the other end of the sixth capacitor C6 is connected to the source of the third transistor M3.

[0010] Further, the second amplifier I2 includes a fifth transistor M5, a sixth transistor M6, a ninth capacitor C9, and a tenth capacitor C10. The gate of the fifth transistor M5 is the first input end VIP2 of the second amplifier I2, and the gate of the sixth transistor M6 is the second input end VIN2 of the second amplifier I2. The drain of the fifth transistor M5 is the first output end VOP2 of the second amplifier I2, and the drain of the sixth transistor M6 is the second output end VON2 of the second amplifier I2. The ninth capacitor C9 and the tenth capacitor C10 are cross-coupled, and the ninth capacitor C9 and the tenth capacitor C10 are respectively connected across the drain of the fifth transistor M5, the gate of the sixth transistor M6, the drain of the sixth transistor M6, and the gate of the fifth transistor M6. The source of the fifth transistor M5 and the source of the sixth transistor M6 are both grounded.

[0011] Further, one end of the ninth capacitor C9 is connected to the drain of the fifth transistor M5, and the other end of the ninth capacitor C9 is connected to the gate of the sixth transistor M6. One end of the tenth capacitor C10 is connected to the drain of the sixth transistor M6, and the other end of the tenth capacitor C10 is connected to the gate of the fifth transistor M6. Further, the sizes of the transistors in the first amplifier I1 are the same, and the sizes of the transistors in the second amplifier I2 are the same.

[0012] Further, the sizes of the transistors in the first amplifier I1 are half of the sizes of the transistors in the second amplifier I2.

[0013] In a second aspect, the present application provides a communication system, including a power amplifier, and the power amplifier adopts a millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input.

[0014] Compared with the prior art, the present application has the following beneficial technical effects: The millimeter wave broadband power amplifier based on the transconductance enhancement stacked common gate input provided by the application uses a matching network composed of a transformer and a capacitor to complete broadband matching by using a transconductance enhancement stacked common gate stage as an input stage, so that the amplifier has good broadband gain and input / output matching, and the matching network structure is compact, greatly shortening the required radio frequency signal wiring and reducing the parasitic effects of the wiring; moreover, the transformer in the input / output matching network also completes the function of converting the signal between balance and unbalance, eliminating the use of an additional balun at the input / output end and saving the chip area. BRIEF DESCRIPTION OF DRAWINGS

[0015] The drawings described herein are for illustrative purposes only and are not intended to limit the scope of the present disclosure in any way. In addition, the shapes and scale sizes of the components in the drawings are only illustrative and are used to help understand the present application, and are not specific limitations on the shapes and scale sizes of the components. In the drawings: Figure 1 The circuit overall schematic diagram of the millimeter wave broadband power amplifier based on the transconductance enhancement stacked common gate input of the present application.

[0016] Figure 2 The schematic diagram of the first amplifier of the millimeter wave broadband power amplifier based on the transconductance enhancement stacked common gate input of the present application.

[0017] Figure 3 The schematic diagram of the second amplifier of the millimeter wave broadband power amplifier based on the transconductance enhancement stacked common gate input of the present application.

[0018] Figure 4 The structure diagram of the inter-stage matching transformer in the embodiment of the present application.

[0019] Figure 5 The simulation result diagram of S11 and S22 in the embodiment of the present application.

[0020] Figure 6 The simulation result diagram of S21 in the embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should be within the scope of protection of the present application.

[0022] It is to be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In addition, it should be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements can also be present. As used herein the terms "vertical", "horizontal", "left", "right" and the like are merely used for illustration and do not imply any particular orientation.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0024] It is to be understood that the terms "first", "second", and the like, used in the description and the claims herein, are used to describe various embodiments and do not imply any particular order or sequence. It is to be understood that the use of the term "about" in the description herein is to be construed as meaning "approximately," "substantially," or "in the vicinity of" and not necessarily limited to the exact value recited. It is further to be understood that the use of the term "including" and "comprising" and variations thereof herein is intended to be broad and encompass the terms "consisting of" and "consisting essentially of" and variations thereof. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0025] Embodiment One Referring to Figure 1 The millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input includes an input matching circuit, a first amplifier I1, an inter-stage matching network, a second amplifier I2, and an output matching network. The input matching circuit is composed of an input transformer T1, a first capacitor C1 connected in parallel with the primary of the input transformer T1, and a second capacitor C2 connected in parallel with the secondary of the input transformer T1. The output matching network is composed of an output transformer T11, an eleventh capacitor C11 connected in parallel with the primary of the output transformer T11, and a twelfth capacitor C12 connected with the secondary of the output transformer T11. The inter-stage matching network is composed of an inter-stage transformer T2, a seventh capacitor C7 connected in parallel with the primary of the inter-stage transformer T2, an eighth capacitor C8 connected with the secondary of the inter-stage transformer T2, and a fourth resistor R4 connected in parallel with the secondary coil of the inter-stage transformer T2. The secondary coil of the input matching network is connected to the input terminal of the first amplifier I1, the output terminal of the first amplifier I1 is connected to the primary coil of the inter-stage matching network, the secondary coil of the inter-stage matching network is connected to the input terminal of the second amplifier I2, and the output terminal of the second amplifier I2 is connected to the primary coil of the output matching network. The first amplifier I1 adopts a transconductance-enhanced stacked common-gate stage architecture, and the second amplifier I2 adopts a common-source stage architecture with cross-coupled capacitors.

[0026] In this embodiment, the first amplifier I1 of the transconductance-enhanced stacked common-gate input stage significantly improves the transconductance efficiency through the stacked transistor structure, effectively expands the operating bandwidth and reduces the insertion loss in combination with the input matching network composed of the input transformer T1 and the capacitors C1 / C2, and improves the linearity and gain flatness of the input signal; the inter-stage matching network adopts a combination of the inter-stage transformer T2 and the capacitors C7 / C8 and the resistor R4, which not only realizes impedance conversion to match the output / input impedance of the two-stage amplifier, but also suppresses inter-stage oscillation through the resistor R4 to enhance stability; the common-source stage architecture of the second amplifier I2 introduces cross-coupled capacitors, which can compensate for high-frequency phase distortion and expand the bandwidth, and cooperate with the output matching network composed of the output transformer T11 and the capacitors C11 / C12 to further improve the power transmission efficiency and return loss. The overall design replaces the traditional inductor-capacitor network with a transformer-coupled matching network, reducing the chip area and parasitic loss, while the stacked structure and cross-coupling technology work together to achieve high power gain, wide operating bandwidth and peak power added efficiency in the millimeter wave band, meeting the needs of 5G millimeter wave communication and radar systems for high-integration, high-efficiency and wide-band power amplifiers.

[0027] The middle tap of the secondary coil of the input transformer T1 is connected to the ground GND, the middle tap of the primary coil of the inter-stage matching network is connected to the power supply VDD, the middle tap of the secondary coil of the inter-stage matching network is connected to the second bias voltage VB2, and the middle tap of the primary coil of the output transformer T2 is connected to the power supply VDD.

[0028] Referring to Figure 2The first amplifier I1 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, a second resistor R2, and a third resistor R3. A first input end VIP1 of the first amplifier I1 is a source of the first transistor M1, a source of the second transistor M2 is a second input end VIN1 of the first amplifier I1, a drain of the third transistor M3 is a first output end VOP1 of the first amplifier I1, and a drain of the fourth transistor M4 is a second output end VON1 of the first amplifier I1. The third capacitor C3 and the fourth capacitor C4 are cross-coupled, and the third capacitor C3 and the fourth capacitor C4 are respectively connected across the source of the first transistor M1, a gate of the second transistor M2, and the source of the second transistor M2, a gate of the first transistor M1. The gate of the first transistor M1 is connected with the first bias voltage VB1 through the first resistor R1, and the gate of the second transistor M2 is connected with the first bias voltage VB1 through the second resistor R2. The drain of the first transistor M1 is connected with the source of the third transistor M3, and the drain of the second transistor M2 is connected with the source of the fourth transistor M4. The fifth capacitor C5 and the sixth capacitor C6 are cross-coupled, and the fifth capacitor C5 and the sixth capacitor C6 are respectively connected across the drain of the third transistor M3, the source of the fourth transistor M4, and the drain of the fourth transistor M4, the source of the third transistor M3. The gates of the third transistor M3 and the fourth transistor M4 are connected, and are connected with the power supply through the third resistor R3. One end of the third capacitor C3 is connected with the source of the first transistor M1, and the other end of the third capacitor C3 is connected with the gate of the second transistor M2. One end of the fourth capacitor C4 is connected with the source of the second transistor M2, and the other end of the fourth capacitor C4 is connected with the gate of the first transistor M1. One end of the fifth capacitor C5 is connected with the drain of the third transistor M3, and the other end of the fifth capacitor C5 is connected with the source of the fourth transistor M4. One end of the sixth capacitor C6 is connected with the drain of the fourth transistor M4, and the other end of the sixth capacitor C6 is connected with the source of the third transistor M3.

[0029] Referring to Figure 3The second amplifier I2 includes a fifth transistor M5, a sixth transistor M6, a ninth capacitor C9, and a tenth capacitor C10. The gate of the fifth transistor M5 is the first input end VIP2 of the second amplifier I2, and the gate of the sixth transistor M6 is the second input end VIN2 of the second amplifier I2. The drain of the fifth transistor M5 is the first output end VOP2 of the second amplifier I2, and the drain of the sixth transistor M6 is the second output end VON2 of the second amplifier I2. The ninth capacitor C9 and the tenth capacitor C10 are cross-coupled. The ninth capacitor C9 and the tenth capacitor C10 are connected across the drain of the fifth transistor M5, the gate of the sixth transistor M6, and the drain of the sixth transistor M6, and the gate of the fifth transistor M6. The source of the fifth transistor M5 and the source of the sixth transistor M6 are both grounded. One end of the ninth capacitor C9 is connected to the drain of the fifth transistor M5, and the other end of the ninth capacitor C9 is connected to the gate of the sixth transistor M6. One end of the tenth capacitor C10 is connected to the drain of the sixth transistor M6, and the other end of the tenth capacitor C10 is connected to the gate of the fifth transistor M6.

[0030] The sizes of the transistors in the first amplifier I1 are the same, and the sizes of the transistors in the second amplifier I2 are the same. The sizes of the transistors in the first amplifier I1 are half of the sizes of the transistors in the second amplifier I2.

[0031] The embodiment effectively suppresses common mode noise by grounding the secondary intermediate tap of the input transformer T1, and the differential input structure composed of C1 / C2 capacitors significantly reduces even harmonic distortion and improves the linearity of the input stage. The inter-stage matching network realizes the collaborative optimization of impedance matching and independent bias voltage through the bias scheme of the transformer T2 primary intermediate tap connected to VDD and the secondary intermediate tap connected to VB2, which not only ensures the optimal working point of the two-stage amplifier, but also enhances the inter-stage stability through the R4 resistor. The first amplifier I1 adopts a stacked common gate architecture, and the stacked structure of M1 / M2 source input and M3 / M4 drain output effectively improves the voltage swing and power capacity. The cross-coupled C3 / C4 and C5 / C6 capacitors introduce negative feedback at the input stage and the output stage, respectively, to compensate for high-frequency phase distortion and expand the bandwidth. At the same time, the R1 / R2 resistors ensure the stability of the gate bias, and the R3 resistor provides a DC path for M3 / M4 to improve the overall transconductance efficiency. The second amplifier I2 adopts a common source structure with cross-coupled capacitors C9 / C10, which compensates for high-frequency gain roll-off through capacitor feedback and significantly improves output power and return loss in combination with the differential output design of M5 / M6. In addition, the I1 transistor size is half of I2, realizing gradient optimization of power distribution - I1 as the front stage provides high transconductance gain, and I2 as the back stage undertakes high-power output. Under the synergistic action of the two, the overall circuit realizes high power gain, wide dynamic range and peak PAE in the millimeter wave frequency band. At the same time, the transformer coupling matching network replaces the traditional inductor-capacitor network, greatly reducing the chip area and parasitic loss, meeting the needs of 5G millimeter wave base stations and radar systems for high integration, high efficiency and wideband power amplifier.

[0032] Embodiment two A communication system includes a power amplifier, which adopts the millimeter wave wideband power amplifier based on transconductance enhanced stacked common gate input in embodiment one.

[0033] Embodiment three The embodiment provides a millimeter wave wideband power amplifier based on transconductance enhanced stacked common gate input, which includes an input matching circuit, a first amplifier, an inter-stage matching network, a second amplifier, and an output matching network. The input matching circuit, the inter-stage matching network, and the output matching network all adopt a reactance network composed of a transformer and a capacitor, the first amplifier adopts a transconductance enhanced stacked common gate stage, and the second amplifier adopts a common source stage with cross-coupled capacitors. The present application uses a transconductance enhanced stacked common gate stage as an input stage, and uses a matching network composed of a transformer and a capacitor to complete wideband matching, so that the amplifier has good wideband gain and input / output matching. Moreover, the matching network structure is compact, greatly shortening the required radio frequency signal wiring and reducing the parasitic effects of the wiring. Moreover, the transformer in the input / output matching network also completes the function of converting the signal between balance and imbalance, eliminating the need for additional baluns at the input / output end and saving chip area.

[0034] As shown in Figure 1 The present embodiment provides an implementation scheme of a millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input, which comprises an input matching circuit, a first amplifier I1, an inter-stage matching network, a second amplifier I2, and an output matching network. The input matching circuit and the output matching network are both composed of a transformer and a capacitor connected in parallel to the primary and secondary of the transformer. The inter-stage matching network contains a resistor connected in parallel to the secondary coil in addition to the transformer and the capacitor connected in parallel to the primary and secondary of the transformer. The secondary coil of the input matching network is connected to the input end of the first amplifier I1, the output end of the first amplifier I1 is connected to the primary coil of the inter-stage matching network, the secondary coil of the inter-stage matching network is connected to the input end of the second amplifier I2, and the output end of the second amplifier I2 is connected to the primary coil of the output matching network.

[0035] In the present embodiment, the middle tap of the secondary coil of the input transformer T1 of the input matching network is connected to the ground GND, the middle tap of the primary coil of the inter-stage matching network is connected to the power supply VDD, the middle tap of the secondary coil is connected to the second bias voltage VB2, and the middle tap of the primary coil of the output transformer T2 of the output matching network is connected to the power supply VDD.

[0036] In the present embodiment, the millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input is as shown in Figure 2 The input end of the first amplifier I1 is the source of the first transistor M1 and the second transistor M2, two cross-coupled capacitors of the third capacitor C3 and the fourth capacitor C4 are connected across the source of the first transistor M1, the gate of the second transistor M2, and the source of the second transistor M2, and the gate of the first transistor M1, respectively. The gates of the first transistor M1 and the second transistor M2 are connected to the first bias voltage VB1 through the first resistor R1 and the second resistor R2, respectively. The drains of the first transistor M1 and the second transistor M2 are connected to the sources of the third transistor M3 and the fourth transistor M4, respectively. Two cross-coupled capacitors of the fifth capacitor C5 and the sixth capacitor C6 are connected across the drain of the third transistor M3, the source of the fourth transistor M4, and the drain of the fourth transistor M4, and the source of the third transistor M3, respectively. The gates of the third transistor M3 and the fourth transistor M4 are connected together and connected to the power supply through the third resistor R3. The output end of the first amplifier I1 is the drain of the third transistor M3 and the fourth transistor M4.

[0037] In the present embodiment, the millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input is as shown in Figure 3As shown, the input end of the second amplifier I2 is the gate of the fifth transistor M5 and the sixth transistor M6; the two cross-coupled capacitors of the ninth capacitor C9 and the tenth capacitor C10 are connected across the drain of the fifth transistor M5, the gate of the sixth transistor M6 and the drain of the sixth transistor M6, the gate of the fifth transistor M5; the source of the fifth transistor M5 and the sixth transistor M6 are grounded; the output end of the second amplifier I2 is the drain of the fifth transistor M5 and the sixth transistor M6.

[0038] In the embodiment, the millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input, the first amplifier I1 adopts the stacked common gate stage architecture with transconductance enhancement, and the second amplifier I2 adopts the common source stage architecture with cross-coupled capacitors.

[0039] In the embodiment, the millimeter wave broadband power amplifier based on transconductance enhancement stacked common gate input, the transistor size of the first amplifier I1 is the same, and the width×gate index×transistor parallel number is 1.5μm×15×2 / 0.06μm, the transistor size of the second amplifier I2 is the same, and the width×gate index×transistor parallel number is 1.2μm×25× / 0.06μm; the transistor size of the first amplifier I1 is half of the transistor size of the second amplifier I2.

[0040] In the embodiment, as shown in Figure 4 As shown in FIG. 2, the inter-stage transformer T2 in the inter-stage matching network is a structure diagram (the middle tap is not drawn in the figure), the inter-stage transformer T2 is realized by a differential input inductor and a differential output inductor, the inter-stage transformer T2 is realized by using two layers of top thick metal in the CMOS process, and the mutual inductance of the transformer is realized by the two inductor coils stacked between the two layers.

[0041] In the embodiment, the power supply voltage VDD is 1.2V, the first bias voltage VB1 is 0.5V, and the second bias voltage VB2 is 0.4V.

[0042] In the embodiment, as shown in FIG. 3, Figure 5 and Figure 6 As shown in FIG. 4, the S parameter curve of the entire power amplifier, as shown in FIG. 5, Figure 5 and Figure 6 It can be known that, in the frequency range of 20~30GHz, S21 ripple≤3dB, S11, S22<-10dB, and the power amplifier has good broadband characteristics and input / output matching characteristics.

[0043] Many embodiments and many applications other than those described herein will be apparent to those skilled in the art from consideration of the specification and practice of the teachings herein. Therefore, the scope of the present teachings should be determined by the appended claims and equivalents thereof, rather than by the description alone. All articles and references, including patent applications and publications, are incorporated herein by reference for all that they contain. Any aspect of the subject matter disclosed herein that is not recited in the claims is hereby abandoned. The foregoing detailed description has set forth various embodiments of the devices and / or processes via the use of specific terminology. However, embodiments thereof can be practiced without the specific details (e.g., the specific order, or the specific relative timing) set forth in the description. In particular, other embodiments can be practiced or adapted as modifications of the various embodiments described herein. Accordingly, no limitation is placed on the devices and / or processes described herein, and the scope of the disclosure is to be only limited by the claims set forth below.

[0044] The above description is further detailed of the present application, and cannot be considered as limiting the specific embodiments of the present application, and for those skilled in the art, without departing from the concept of the present application, a number of simple deductions or replacements can be made, which should be considered as belonging to the present application.

Claims

1. A millimeter wave broadband power amplifier based on transconductance enhanced stacked common-gate input, characterized in that, The input matching circuit is composed of an input transformer T1, a first capacitor C1 connected in parallel with the primary of the input transformer T1, and a second capacitor C2 connected in parallel with the secondary of the input transformer T1. The output matching network is composed of an output transformer T11, an eleventh capacitor C11 connected in parallel with the primary of the output transformer T11, and a twelfth capacitor C12 connected with the secondary of the output transformer T11. The inter-stage matching network is composed of an inter-stage transformer T2, a seventh capacitor C7 connected in parallel with the primary of the inter-stage transformer T2, an eighth capacitor C8 connected with the secondary of the inter-stage transformer T2, and a fourth resistor R4 connected in parallel with the secondary coil of the inter-stage transformer T2. The secondary coil of the input matching network is connected with the input end of the first amplifier I1, the output end of the first amplifier I1 is connected with the primary coil of the inter-stage matching network, the secondary coil of the inter-stage matching network is connected with the input end of the second amplifier I2, and the output end of the second amplifier I2 is connected with the primary coil of the output matching network. The first amplifier I1 adopts a transconductance enhancement stacked common gate stage architecture, and the second amplifier I2 adopts a common source stage architecture with cross-coupled capacitors.

2. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 1, wherein, The middle tap of the secondary coil of the input transformer T1 is connected with the ground GND, the middle tap of the primary coil of the inter-stage matching network is connected with the power supply VDD, the middle tap of the secondary coil of the inter-stage matching network is connected with a second bias voltage VB2, and the middle tap of the primary coil of the output transformer T2 is connected with the power supply VDD.

3. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 1, wherein, The first amplifier I1 comprises a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, a second resistor R2, and a third resistor R3. The source of the first transistor M1 is the first input end VIP1 of the first amplifier I1, the source of the second transistor M2 is the second input end VIN1 of the first amplifier I1, the drain of the third transistor M3 is the first output end VOP1 of the first amplifier I1, and the drain of the fourth transistor M4 is the second output end VON1 of the first amplifier I1. The third capacitor C3 and the fourth capacitor C4 are cross-coupled, and the third capacitor C3 and the fourth capacitor C4 are respectively connected across the source of the first transistor M1, the gate of the second transistor M2, and the source of the second transistor M2 and the gate of the first transistor M1. The gate of the first transistor M1 is connected with the first bias voltage VB1 through the first resistor R1, and the gate of the second transistor M2 is connected with the first bias voltage VB1 through the second resistor R2. The drain of the first transistor M1 is connected with the source of the third transistor M3, and the drain of the second transistor M2 is connected with the source of the fourth transistor M4. The fifth capacitor C5 and the sixth capacitor C6 are cross-coupled, and the fifth capacitor C5 and the sixth capacitor C6 are connected across the drain of the third transistor M3, the source of the fourth transistor M4 and the drain of the fourth transistor M4, and the source of the third transistor M3, respectively. The gate of the third transistor M3 and the fourth transistor M4 are connected, and the third resistor R3 is connected to the power supply.

4. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 3, wherein, One end of the third capacitor C3 is connected to the source of the first transistor M1, and the other end of the third capacitor C3 is connected to the gate of the second transistor M2. One end of the fourth capacitor C4 is connected to the source of the second transistor M2, and the other end of the fourth capacitor C4 is connected to the gate of the first transistor M1.

5. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 3, wherein, One end of the fifth capacitor C5 is connected to the drain of the third transistor M3, and the other end of the fifth capacitor C5 is connected to the source of the fourth transistor M4. One end of the sixth capacitor C6 is connected to the drain of the fourth transistor M4, and the other end of the sixth capacitor C6 is connected to the source of the third transistor M3.

6. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 1, wherein, The second amplifier I2 includes a fifth transistor M5, a sixth transistor M6, a ninth capacitor C9, and a tenth capacitor C10. The gate of the fifth transistor M5 is the first input end VIP2 of the second amplifier I2, and the gate of the sixth transistor M6 is the second input end VIN2 of the second amplifier I2. The drain of the fifth transistor M5 is the first output end VOP2 of the second amplifier I2, and the drain of the sixth transistor M6 is the second output end VON2 of the second amplifier I2. The ninth capacitor C9 and the tenth capacitor C10 are cross-coupled, and the ninth capacitor C9 and the tenth capacitor C10 are connected across the drain of the fifth transistor M5, the gate of the sixth transistor M6 and the drain of the sixth transistor M6, and the gate of the fifth transistor M6, respectively. The source of the fifth transistor M5 and the source of the sixth transistor M6 are both connected to the ground.

7. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 6, wherein, One end of the ninth capacitor C9 is connected to the drain of the fifth transistor M5, and the other end of the ninth capacitor C9 is connected to the gate of the sixth transistor M6. One end of the tenth capacitor C10 is connected to the drain of the sixth transistor M6, and the other end of the tenth capacitor C10 is connected to the gate of the fifth transistor M6.

8. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 1, wherein, The sizes of the transistors in the first amplifier I1 are the same, and the sizes of the transistors in the second amplifier I2 are the same.

9. The transconductance boosted stacked common-gate input based millimeter-wave wideband power amplifier of claim 8, wherein, The sizes of the transistors in the first amplifier I1 are half of the sizes of the transistors in the second amplifier I2.

10. A communication system comprising a power amplifier, the power amplifier employing the millimeter wave wideband power amplifier based on transconductance boosting stacked common-gate input according to any one of claims 1-9.