Power amplifier

Abstract

The embodiment of the present disclosure provides a power amplifier. The power amplifier comprises: a first transistor and at least one second transistor; a control end of the first transistor is used for receiving a radio frequency input signal; a control end of the second transistor is used for receiving a bias voltage; a first end of at least one second transistor is coupled with a power supply voltage end and a signal output end; and a first transformer is coupled between a first end of the first transistor and a second end of the second transistor.

Description

Technical Field

[0001] This disclosure relates to the field of circuit technology, and more particularly to a power amplifier. Background Technology

[0002] A power amplifier (PA) is an important component of the radio frequency circuit in electronic devices. It is responsible for amplifying the power of the radio frequency signal to be transmitted, enabling communication with base stations or WiFi hotspots.

[0003] However, as electronic devices demand increasingly higher communication quality, the requirements for PA output power are also increasing. Specifically, PAs need to support higher power levels, such as Power Class 2 (PC2), to improve communication quality. Summary of the Invention

[0004] In view of this, embodiments of the present disclosure provide a power amplifier.

[0005] The technical solution disclosed herein is implemented as follows:

[0006] This disclosure provides a power amplifier, including:

[0007] A first transistor and at least one second transistor; the control terminal of the first transistor is used to receive a radio frequency input signal; the control terminal of the second transistor is used to receive a bias voltage; and the first terminal of at least one second transistor is coupled to a power supply voltage terminal and a signal output terminal.

[0008] A first transformer is coupled between the first terminal of the first transistor and the second terminal of the second transistor.

[0009] In some embodiments, the at least one second transistor includes a sub-transistor one and a sub-transistor two, a first terminal of the sub-transistor two being coupled to the power supply voltage terminal and the signal output terminal; the first transformer is coupled between the first terminal of the first transistor and the second terminal of the sub-transistor one.

[0010] The power amplifier also includes:

[0011] The second transformer is coupled between the first terminal of the first sub-transistor and the second terminal of the second sub-transistor.

[0012] In some embodiments, the at least one second transistor includes a sub-transistor three and a sub-transistor four; the first terminal of the sub-transistor three and the first terminal of the sub-transistor four are both coupled to the signal output terminal; the first transformer includes a first input terminal, a first output terminal and a second output terminal; the first input terminal is coupled to the first terminal of the first transistor, the first output terminal is coupled to the second terminal of the sub-transistor three, and the second output terminal is coupled to the second terminal of the sub-transistor four.

[0013] The power amplifier also includes:

[0014] The third transformer includes a second input terminal, a third input terminal, and a third output terminal; the second input terminal is coupled to the first terminal of the third sub-transistor, the third input terminal is coupled to the first terminal of the fourth sub-transistor, and the third output terminal is coupled to the signal output terminal.

[0015] In some embodiments, the power amplifier further includes:

[0016] A first choke inductor and a second choke inductor are provided. The first terminal of the third sub-transistor is coupled to the power supply voltage terminal via the first choke inductor, and the first terminal of the fourth sub-transistor is coupled to the power supply voltage terminal via the second choke inductor. The first choke inductor, the second choke inductor, and the third transformer are integrated on a first substrate, the material of which includes ceramic.

[0017] In some embodiments, the power amplifier further includes:

[0018] A capacitor, wherein the capacitor is coupled between the power supply voltage terminal and the signal output terminal;

[0019] The load is coupled between the signal output terminal and the ground terminal.

[0020] In some embodiments, the capacitor includes a first capacitor and a second capacitor; wherein the first capacitor is coupled between a first terminal of the third sub-transistor and the second input terminal; and the second capacitor is coupled between a first terminal of the fourth sub-transistor and the third input terminal.

[0021] The first capacitor and the second capacitor are integrated on a second substrate, and the material of the second substrate includes ceramic.

[0022] In some embodiments, the first transistor includes a silicon-on-insulator (SOI) transistor, and the second transistor includes a heterojunction bipolar transistor (HBT).

[0023] In some embodiments, the first transformer is integrated on a third substrate, the material of which includes ceramic.

[0024] In some embodiments, the first transformer includes a primary coil and a secondary coil, wherein the turns ratio of the primary coil to the secondary coil is from 1:1 to 3:1.

[0025] In some embodiments, the first transformer includes an adjustable transformer.

[0026] This disclosure provides a power amplifier, including: a first transistor and at least one second transistor; a control terminal of the first transistor is used to receive a radio frequency input signal; a control terminal of the second transistor is used to receive a bias voltage; a first terminal of the at least one second transistor is coupled to a power supply voltage terminal and a signal output terminal; and a first transformer is coupled between the first terminal of the first transistor and the second terminal of the second transistor. In this disclosure, by providing a first transformer between the first terminal of the first transistor and the second terminal of the second transistor, the inductive characteristics of the first transformer are used to lower the minimum voltage at the second terminal of the second transistor, thereby increasing the swing of the radio frequency output signal and ensuring that the output power of the power amplifier is increased while the power supply voltage remains constant. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of the power amplifier in Example 1;

[0028] Figure 2 This is a schematic diagram of the power amplifier in Example 2;

[0029] Figure 3 This is a schematic diagram of the structure of a first power amplifier provided in an embodiment of the present disclosure;

[0030] Figure 4 This is a schematic diagram of the structure of a second power amplifier provided in an embodiment of this disclosure;

[0031] Figure 5 This is a schematic diagram of the structure of a third power amplifier provided in an embodiment of this disclosure;

[0032] Figure 6 This is a schematic diagram of the structure of a fourth power amplifier provided in an embodiment of this disclosure. Detailed Implementation

[0033] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0034] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0035] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.

[0036] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this disclosure.

[0037] Spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0038] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0039] To fully understand this disclosure, detailed steps and structures will be presented in the following description to illustrate the technical solutions of this disclosure. Preferred embodiments of this disclosure are described in detail below; however, other embodiments may also be implemented in addition to these detailed descriptions.

[0040] Figure 1 This is a schematic diagram of the power amplifier in Example 1. Figure 1 As shown, power amplifier 100 typically includes transistor Q, capacitor C, and load R. L In this transistor, the base of transistor Q is connected to the RF signal input terminal RFIN to receive the RF input signal. The collector of transistor Q is connected to the power supply voltage terminal to receive the power supply voltage V. CC Here, the power supply voltage V CC Typically, it is a low voltage, denoted as V1 (V1>0), for example, V1 could be 3.4V. The emitter of transistor Q is grounded. The base of transistor Q is also connected to a bias voltage ( Figure 1 (Not shown in the diagram) The bias voltage is used to turn on transistor Q. Transistor Q amplifies the received RF input signal and outputs it from its collector. Here, the amplified RF input signal is also the RF output signal, and the swing of the RF output signal is V1. Capacitor C is coupled between the power supply voltage terminal and the RF signal output terminal RFOUT to isolate the signal from the power supply voltage V1. CC The DC component. Load R L Coupled between the RF signal output terminal RFOUT and the ground terminal, the load impedance is R1. Power amplifier 100 converts the DC power supplied to it by the power supply into load R1. L The AC power of the power amplifier 100 can be expressed as P.

[0041] As electronic devices demand increasingly higher communication quality, power amplifiers are needed to meet the power requirements of PC2. In a specific example, to meet the power requirements of PC2, a higher supply voltage V can be used when designing the power amplifier. CCPowering the power amplifier. For example, a constant 4.5V or a high 5V power supply can be used. However, due to the limited voltage tolerance of individual transistors, when the supply voltage V... CC When the voltage is increased, the transistor is easily damaged.

[0042] Figure 2 The schematic diagram of the power amplifier in Example 2 is shown below. Figure 2 As shown, to prevent individual transistors from being damaged, a power amplifier 200 with a stacked transistor structure can be used to amplify the RF input signal. Specifically, the power amplifier 200 includes transistor Q', transistor Q'", capacitor C, and load R. L In this configuration, the base of transistor Q' is connected to the RF signal input terminal RFIN to receive the RF input signal. The collector of transistor Q' is connected to the emitter of transistor Q'", and the emitter of transistor Q' is grounded. Transistor Q' amplifies the received RF input signal and outputs it to transistor Q' through its collector. The base of transistor Q' is connected to the bias voltage V. bias The collector of transistor Q is connected to the power supply voltage terminal. Here, the power supply voltage V... CC This is either constant voltage or high voltage, and its value is represented as V2. For example, V2 equals 2V1. Capacitor C is coupled between the power supply voltage terminal and the RF signal output terminal RFOUT to isolate the signal from the power supply voltage V. CC The DC component. At this point, the amplified RF input signal can be output from the RF signal output terminal RFOUT via transistor Q" and capacitor C. Here, the amplified RF input signal is also the RF output signal. The swing of this RF output signal can be expressed as the voltage at the collector of transistor Q" (i.e., the power supply voltage V). CC The difference between the value of and the lowest voltage (0V) at the emitter of transistor Q" is used to determine the swing of the RF output signal, which is 2V1. The load R L It is coupled between the RF signal output terminal RFOUT and the ground terminal. Here, the load impedance can be R1. The power amplifier 200 can convert the DC power supplied to it by the power supply into load R1. L AC power.

[0043] Here, it should be noted that, compared to Figure 1 The power amplifier 100 in the middle, Figure 2 The power supply voltage V connected to the medium power amplifier 200 CC Doubling the value of RF output signal doubles the amplitude of its RF output signal.

[0044] Specifically, you can refer to the calculation formula (1) for the output power of a power amplifier:

[0045]

[0046] Where V represents the swing of the RF output signal and R represents the load impedance.

[0047] From the above formula, it can be seen that under load R L If the RF output signal swing doubles while the load impedance remains constant, the output power of power amplifier 200 will become four times the original value. Therefore, Figure 2 The output power of the medium power amplifier 200 is increased to Figure 1 Four times the output power of the medium-power amplifier 100. That is, Figure 2 The output power of the medium power amplifier 200 is 4P.

[0048] As can be seen from the preceding text, Figure 2 The power amplifier 200 shown has higher output power, which can effectively improve communication quality. However, Figure 2 The power amplifier 200 in the middle uses a higher power supply voltage V. CC The power supply voltage V CC It requires an additional boost chopper circuit, which is expensive and increases the cost of the entire RF system.

[0049] In view of this, embodiments of the present disclosure provide a power amplifier. This power amplifier can operate using a power supply voltage V with a lower voltage value. CC At the same time, it outputs higher power. This eliminates the need for a boost circuit at the RF system level and improves compatibility.

[0050] This disclosure provides a power amplifier, including: a first transistor and at least one second transistor; a control terminal of the first transistor is used to receive a radio frequency input signal; a control terminal of the second transistor is used to receive a bias voltage; a first terminal of the at least one second transistor is coupled to a power supply voltage terminal and a signal output terminal; and a first transformer is coupled between the first terminal of the first transistor and the second terminal of the second transistor.

[0051] Figure 3 This is a schematic diagram of the structure of a first power amplifier provided in an embodiment of this disclosure. Figure 3 As shown, the power amplifier 300 includes a first transistor Q1, a second transistor Q2, and a first transformer 301. The control terminal 302 of the first transistor Q1 is connected to the radio frequency signal input terminal RFIN for receiving radio frequency input signals. The control terminal 302 of the first transistor Q1 is also connected to a bias voltage (…). Figure 3(Not shown in the diagram) The bias voltage is used to turn on the first transistor Q1. The first terminal 303 of the first transistor Q1 is connected to the first transformer 301, and the second terminal 304 of the first transistor Q1 is grounded. The first transformer 301 includes an input terminal 305 and an output terminal 306, wherein the input terminal 305 of the first transformer 301 is connected to the first terminal 303 of the first transistor Q1, and the output terminal 306 of the first transformer 301 is connected to the second terminal 307 of the second transistor Q2. The control terminal 308 of the second transistor Q2 is connected to the bias voltage V. bias Connection, bias voltage V bias This is used to turn on the second transistor Q2. The first terminal 309 of the second transistor Q2 is coupled to both the power supply voltage terminal and the signal output terminal RFOUT. Here, the power supply voltage terminal is used to output a low-voltage power supply voltage V. CC Power supply voltage V CC The value can be V1.

[0052] In some embodiments, the power amplifier 300 also includes a load R L Load R L It is coupled between the signal output terminal RFOUT and the ground terminal. Here, the load impedance can be R1.

[0053] In some embodiments, the power amplifier 300 further includes a capacitor C. The capacitor C is coupled between the power supply voltage terminal and the signal output terminal RFOUT, and can be used to isolate the RF output signal from the power supply voltage V. CC The DC component.

[0054] Figure 3 In this circuit, the first transistor Q1 amplifies the received radio frequency (RF) input signal and outputs it from its first terminal 303 to the input terminal 305 of the first transformer 301. The first transformer 301 outputs a second RF signal to the second transistor Q2 based on the input first RF signal (i.e., the amplified RF input signal mentioned above). The second transistor Q2 outputs this second RF signal from the RF signal output terminal RFOUT. Here, the second RF signal is also the RF output signal. It should be noted that under the transformer action of the first transformer 301, the minimum voltage at the voltage node located at the output terminal 306 of the first transformer 301 can be reduced to below 0V, that is, the minimum voltage at the second terminal 307 of the second transistor Q2 is reduced to below 0V. Specifically, the value of the minimum voltage at the second terminal 307 of the second transistor Q2 can be reduced to -V1. At this time, the voltage difference between the first terminal 309 and the second terminal 307 of the second transistor Q2 is 2V1, that is, the swing of the RF output signal is 2V1. According to formula (1), if the swing of the RF output signal doubles while the load impedance remains constant, the output power of power amplifier 300 will become four times the original value. Therefore, Figure 3 The output power of the medium power amplifier 300 is increased to Figure 1 Four times the output power of the medium-power amplifier 100. That is, Figure 3 The output power of the medium power amplifier 300 is 4P.

[0055] In this embodiment, a first transformer 301 is provided between the first terminal 303 of the first transistor Q1 and the second terminal 307 of the second transistor Q2. The inductive characteristics of the first transformer 301 are used to reduce the minimum voltage at the second terminal 307 of the second transistor Q2, thereby increasing the voltage swing of the RF output signal and ensuring that the voltage V is within the power supply voltage range. CC Without changing the parameters, the output power of power amplifier 300 was increased.

[0056] In this embodiment, the load impedance of the power amplifier 300 can be adjusted to approach 50Ω, thereby increasing the bandwidth of the power amplifier 300. For example, the load impedance can be increased from a smaller R1 to a larger 4R1 to bring the load impedance closer to 50Ω. In this case, the bandwidth of the power amplifier 300 increases. However, the output power of the power amplifier 300 will decrease to P. Therefore, in practical applications, the load impedance of the power amplifier 300 can be adjusted according to specific needs to balance output power and bandwidth.

[0057] In some embodiments, the first transistor Q1 and the second transistor Q2 can be transistors of the same type, such as heterojunction bipolar transistors (HBTs). In this case, the control terminal 302 of the first transistor Q1 is its base, the first terminal 303 of the first transistor Q1 is its collector, and the second terminal 304 of the first transistor Q1 is its emitter.

[0058] Figure 4 This is a schematic diagram of the structure of a second power amplifier provided in an embodiment of this disclosure. Figure 4 As shown, in some embodiments, depending on the voltage withstand capability of each transistor, the first transistor Q1 and the second transistor Q2 in the power amplifier 400 can be different types of transistors. For example, the first transistor Q1 can be a transistor with a lower voltage withstand capability, and the second transistor Q2 can be a transistor with a higher voltage withstand capability. Specifically, the first transistor Q1 includes a silicon-on-insulator (SOI) transistor, and the second transistor Q2 includes a heterojunction bipolar transistor (HBT). In this case, the control terminal 402 of the first transistor Q1 is its gate, the first terminal 403 of the first transistor Q1 is its drain, and the second terminal 404 of the first transistor Q1 is its source. Here, compared to an HBT, the SOI transistor is less expensive; therefore, using an SOI transistor for the first transistor Q1 can further reduce costs.

[0059] In some embodiments, the first transformer 301 is integrated on a third substrate, the third substrate being made of ceramic. In a specific embodiment, the third substrate is made of LMT ceramic, such as Li2MgTi3O8. It should be noted that, since LMT ceramics are inexpensive and suitable for the integration of passive devices, the first transformer 301 can be integrated on an LMT ceramic substrate instead of a semiconductor chip, thereby saving chip area and further reducing costs.

[0060] In this embodiment of the disclosure, the first transformer 301 includes a balun. For example... Figure 4 As shown, in some embodiments, the first transformer 301 includes a primary coil L1 and a secondary coil L2, the turns ratio of the primary coil L1 to the secondary coil L2 including 1:1 to 3:1.

[0061] In this embodiment, the first transformer 301 can participate in the impedance matching of the power amplifier 400. Specifically, Figure 4 The impedance Z1 (i.e., the impedance of the first transistor Q1) located at the input terminal 305 of the first transformer 301 and the impedance Z2 (i.e., the impedance of the second transistor Q2) located at the output terminal 306 of the first transformer 301 are different. In this case, it is necessary to match the impedances at both ends of the first transformer 301 to improve the operating efficiency of the power amplifier 400. Here, there is a specific relationship between the impedance ratio at both ends of the first transformer 301 and the turns ratio N of the primary coil L1 and the secondary coil L2 of the first transformer 301, as shown in formula (2):

[0062]

[0063] As shown in the above equation, the ratio of the impedance Z1 at the input terminal 305 of the first transformer 301 to the impedance Z2 at the output terminal 306 of the first transformer 301 is equal to the square of the turns ratio N of the primary coil L1 and the secondary coil L2 of the first transformer 301. Therefore, impedance matching in the power amplifier 400 can be achieved by adjusting the turns ratio N of the primary coil L1 and the secondary coil L2 of the first transformer 301.

[0064] In one specific embodiment, the ratio of the impedance Z1 located at the input terminal 305 side of the first transformer 301 to the impedance Z2 located at the output terminal 306 side of the first transformer 301 is 4:1. At this time, it is necessary to adjust the turns ratio N of the primary coil L1 and the secondary coil L2 of the first transformer 301 to 2:1, so as to achieve impedance matching in the power amplifier 400.

[0065] In other embodiments, the turns ratio N of the primary coil L1 and the secondary coil L2 of the first transformer 301 can be greater than 3:1. Furthermore, the turns ratio N of the primary coil L1 and the secondary coil L2 can be adjusted according to actual design requirements.

[0066] In some embodiments, the first transformer 301 includes an adjustable transformer. This adjustable transformer can achieve different voltage conversion ratios, thereby adapting to power supply voltages V with different voltage values. CC The swing of the RF output signal is adjusted. Furthermore, the voltage conversion ratio of this adjustable transformer can also be adjusted according to the actual required output power.

[0067] In some embodiments, at least one second transistor includes a sub-transistor one and a sub-transistor two, with a first terminal of the sub-transistor two coupled to a power supply voltage terminal and a signal output terminal; a first transformer is coupled between the first terminal of the first transistor and the second terminal of the sub-transistor one; the power amplifier further includes a second transformer coupled between the first terminal of the sub-transistor one and the second terminal of the sub-transistor two.

[0068] Figure 5 This is a schematic diagram of the structure of a third power amplifier provided in an embodiment of this disclosure. Figure 5 As shown, the power amplifier 500 includes a first transistor Q1, two second transistors Q2, a first transformer 301, a second transformer 501, a capacitor C, and a load R. L Among them, the two second transistors Q2 are respectively sub-transistors Q1 and Q2. 21 Q-type transistor 22 The control terminal 402 of the first transistor Q1 is connected to the RF signal input terminal RFIN to receive the RF input signal. The control terminal 402 of the first transistor Q1 is also connected to the bias voltage (…). Figure 5 (Not shown in the diagram) A bias voltage is used to turn on the first transistor Q1. The first terminal 403 of the first transistor Q1 is connected to the first transformer 301, and the second terminal 404 of the first transistor Q1 is grounded. The first transformer 301 includes an input terminal 305 and an output terminal 306, wherein the input terminal 305 of the first transformer 301 is connected to the first terminal 403 of the first transistor Q1, and the output terminal 306 of the first transformer 301 is connected to the sub-transistor Q1. 21 The second terminal 502 is connected. Sub-transistor Q 21 Control terminal 503 and bias voltage V bias Connection, bias voltage V bias Used for the conduction transistor Q 21 The second transformer 501 includes an input terminal 505 and an output terminal 506. The input terminal 505 of the second transformer 501 is connected to the sub-transistor Q. 21The first terminal 504 is connected, and the output terminal 506 of the second transformer 501 is connected to the sub-transistor Q. 22 The second terminal is connected to 507. Sub-transistor Q... 22 Control terminal 508 and bias voltage V bias Connection, bias voltage V bias Used for the two-Q transistor of the conducting transistor 22 Sub-transistor Q 22 The first terminal 509 is coupled to both the power supply voltage terminal and the signal output terminal RFOUT. Here, the power supply voltage V... CC For low voltage, its value can be V1. The load impedance can be R1.

[0069] Figure 5 In this circuit, the first transistor Q1 amplifies the received radio frequency input signal and outputs it from its first terminal 403 to the input terminal 305 of the first transformer 301. The first transformer 301 outputs a second radio frequency signal to the sub-transistor Q1 based on the input first radio frequency signal (i.e., the amplified radio frequency input signal mentioned above). 21 It should be noted here that, under the transformation effect of the first transformer 301, the minimum voltage of the voltage node located at the output terminal 306 of the first transformer 301 can be reduced to below 0V. That is to say, the voltage at the sub-transistor Q... 21 The minimum voltage at the second terminal 502 is reduced to below 0V. Specifically, located at sub-transistor Q... 21 The minimum voltage at the second terminal 502 can be reduced to -V1. At this point, the swing of the second RF signal increases compared to the first RF signal. Sub-transistor Q 21 The second radio frequency (RF) signal is output from its first terminal 504 to the input terminal 505 of the second transformer 501. The second transformer 501 outputs a third RF signal to the signal output terminal RFOUT based on the input second RF signal. Here, the third RF signal is also known as the RF output signal.

[0070] It should be noted that, under the transformation effect of the second transformer 501, the minimum voltage of the voltage node located at the output terminal 506 of the second transformer 501 can be reduced to a level lower than the minimum voltage of the voltage node located at the output terminal 306 of the first transformer 301. In other words, the voltage at the sub-transistor Q... 22 The minimum voltage at the second terminal 507 is further reduced. At this point, the swing of the third radio frequency signal is further increased compared to the second radio frequency signal. Thus, compared to... Figure 4 , Figure 5 The output power of the power amplifier 500 in the middle is further improved.

[0071] In this embodiment, the second transformer 501 includes a balun. Both the second transformer 501 and the first transformer 301 can be integrated onto a third substrate.

[0072] In some embodiments, at least one second transistor includes sub-transistor three and sub-transistor four; a first terminal of sub-transistor three and a first terminal of sub-transistor four are both coupled to a signal output terminal; a first transformer includes a first input terminal, a first output terminal, and a second output terminal; the first input terminal is coupled to the first terminal of the first transistor, the first output terminal is coupled to the second terminal of sub-transistor three, and the second output terminal is coupled to the second terminal of sub-transistor four; the power amplifier further includes a third transformer, the third transformer including a second input terminal, a third input terminal, and a third output terminal; the second input terminal is coupled to the first terminal of sub-transistor three, the third input terminal is coupled to the first terminal of sub-transistor four, and the third output terminal is coupled to a signal output terminal.

[0073] Figure 6 This is a schematic diagram of the structure of a fourth power amplifier provided in an embodiment of this disclosure. Figure 6 As shown, the power amplifier 600 includes a first transistor Q1, two second transistors Q2, a first transformer 601, a third transformer 602, a capacitor, and a load R. L Among them, the two second transistors Q2 are respectively sub-transistors Q3. 23 Harmony transistor quad Q 24 The control terminal 402 of the first transistor Q1 is connected to the RF signal input terminal RFIN to receive the RF input signal. The control terminal 402 of the first transistor Q1 is also connected to the bias voltage (…). Figure 6 (Not shown in the diagram) A bias voltage is used to turn on the first transistor Q1. The first terminal 403 of the first transistor Q1 is connected to the first transformer 601, and the second terminal 404 of the first transistor Q1 is grounded. The first transformer 601 includes an input terminal and an output terminal; specifically, the first transformer 601 includes a first input terminal 603, a first output terminal 604, and a second output terminal 605. The first input terminal 603 of the first transformer 601 is connected to the first terminal 403 of the first transistor Q1, and the first output terminal 604 of the first transformer 601 is connected to the third transistor Q1. 23 The second terminal 606 is connected to the second output terminal 605 of the first transformer 601 and the sub-transistor quad Q. 24 The second terminal is connected to 607. Sub-transistor three Q 23 Control terminal 608 and sub-transistor quad Q 24 The control terminal 609 is connected to the bias voltage V. bias Connection. Sub-transistor three Q 23 The first terminal 610 and the sub-transistor quad Q 24The first terminal 611 is coupled to the signal output terminal RFOUT and to the power supply voltage terminal. Here, the power supply voltage V output from the power supply voltage terminal... CC For low voltage, its value can be V1. The third transformer 602 includes a second input terminal 612, a third input terminal 613, and a third output terminal 614. The second input terminal 612 is connected to the sub-transistor Q. 23 The first input terminal 610 is coupled to the third input terminal 613 and the sub-transistor quad Q. 24 The first terminal 611 is coupled, and the third output terminal 614 is coupled to the signal output terminal RFOUT. The load impedance can be R1.

[0074] In some embodiments, the capacitor includes a first capacitor C1 and a second capacitor C2; wherein the first capacitor C1 is coupled to the sub-transistor 3Q. 23 Between the first input terminal 610 and the second input terminal 612; the second capacitor C2 is coupled to the sub-transistor quad Q. 24 Between the first input terminal 611 and the third input terminal 613. The first capacitor C1 and the second capacitor C2 can be used to isolate the DC component from the power supply voltage in the RF output signal.

[0075] In this embodiment of the disclosure, the third transformer 602 includes a balun.

[0076] Figure 6 In this circuit, the first transistor Q1 amplifies the received radio frequency input signal and outputs it from its first terminal 403 to the first input terminal 603 of the first transformer 601. The first transformer 601 outputs a differential second radio frequency signal to the sub-transistor Q1 based on the input single-ended first radio frequency signal (i.e., the amplified radio frequency input signal mentioned above). 23 Harmony transistor quad Q 24 .

[0077] It should be noted here that, under the transformer action of the first transformer 601, the minimum voltage at the voltage node located at the first output terminal 604 of the first transformer 601 and the voltage node located at the second output terminal 605 of the first transformer 601 can be reduced to below 0V. That is to say, the voltage at the voltage node located at the sub-transistor Q... 23 The lowest voltage at the second terminal 606 and located in the sub-transistor quad Q 24 The minimum voltage at the second terminal 607 is reduced to below 0V. Specifically, located at the sub-transistor Q... 23 The lowest voltage at the second terminal 606 and located in the sub-transistor quad Q 24 The minimum voltage at the second terminal 607 can be reduced to -V1. At this point, the swing of the second RF signal increases compared to the first RF signal. Specifically, the swing of the second RF signal increases to 2V1. (Sub-transistor three Q) 23The sub-transistor quad-Q is used to output the second radio frequency signal from its first terminal 610 to the second input terminal 612 of the third transformer 602. 24 This is used to output the second radio frequency signal from its first terminal 611 to the third input terminal 613 of the third transformer 602. The third transformer 602 is used to output a single-ended third radio frequency signal from its third output terminal 614 to the signal output terminal RFOUT based on the input differential second radio frequency signal. Here, the third radio frequency signal is also the radio frequency output signal.

[0078] According to formula (1), if the swing of the RF output signal doubles while the load impedance remains constant, the output power of power amplifier 600 will become four times the original value. Therefore, Figure 6 The output power of the medium power amplifier 600 is increased to Figure 1 Four times the output power of the medium-power amplifier 100. That is, Figure 6 The output power of the medium power amplifier 600 is 4P.

[0079] It's important to note that in high-power applications, single-ended power amplifiers typically have low load impedance. This low load impedance leads to a high impedance slew rate, limiting the amplifier's bandwidth. Differential amplifiers, on the other hand, have a higher load impedance (approximately four times that of a single-ended amplifier), resulting in lower insertion loss for output matching and a relatively lower impedance slew rate, thus enabling a wider bandwidth. Furthermore, due to the efficient CL in a differential amplifier... bc The parasitic capacitance (i.e., the parasitic capacitance between the transistor control terminal and the first terminal) is approximately C, which is equivalent to that in a single-ended circuit. bc With half the parasitic capacitance and a higher input impedance compared to a single-ended circuit, a differential circuit power amplifier exhibits lower inter-stage matching insertion loss compared to a single-ended power amplifier, assuming a constant Q value for the impedance matching structure (e.g., a transformer). This allows for higher gain in differential circuit power amplifiers. Furthermore, since transformer-based differential output matching theoretically suppresses all even-order harmonics, differential circuit power amplifiers can effectively improve the quality of the RF output signal.

[0080] In this embodiment of the disclosure, the power amplifier 600 is designed as a differential circuit, which allows the power amplifier 600 to have lower output matching insertion loss, greater bandwidth, higher gain, and higher signal quality.

[0081] like Figure 6 As shown, in some embodiments, the power amplifier 600 further includes: a first choke inductor L3 and a second choke inductor L4, and a sub-transistor Q. 23The first terminal 610 is coupled to the power supply voltage terminal via the first choke inductor L3, and the sub-transistor Q4 24 The first terminal 611 is coupled to the power supply voltage terminal via the second choke inductor L4. Here, the first choke inductor L3 and the second choke inductor L4 are not coupled to the DC power supply voltage V. CC It has an impact, but exhibits high impedance for AC radio frequency signals. Therefore, the power supply voltage V output from the power supply voltage terminal... CC It can be transmitted to the sub-transistor Q via the first choke inductor L3 and the second choke inductor L4 respectively. 23 The first terminal 610 and the sub-transistor quad Q 24 The first terminal 611, while the radio frequency signal output by the second transistor Q2 is suppressed and cannot pass through the first choke inductor L3 and the second choke inductor L4.

[0082] In other embodiments, the power supply voltage terminal can also be connected to the third transformer 602, enabling the sub-transistor Q to... 23 The first terminal 610 is coupled to the power supply voltage terminal via the third transformer, and the sub-transistor is Q4. 24 The first terminal 611 is coupled to the power supply voltage terminal via the third transformer.

[0083] In this embodiment of the disclosure, some device structures in the power amplifier 600 can be integrated onto an external substrate instead of a semiconductor chip, thereby saving the area occupied by the semiconductor chip and further reducing costs. For example, the first choke inductor L3, the second choke inductor L4, and the third transformer 602 in the power amplifier 600 are integrated onto a first substrate, the material of which includes ceramic. The first capacitor C1 and the second capacitor C2 are integrated onto a second substrate, the material of which includes ceramic. The first transformer 601 is integrated onto a third substrate, the material of which includes ceramic.

[0084] In some embodiments of this disclosure, the first substrate, the second substrate, and the third substrate may be the same substrate. In other embodiments of this disclosure, the first substrate, the second substrate, and the third substrate may be different substrates. In still other embodiments of this disclosure, any two of the first substrate, the second substrate, and the third substrate may be the same substrate, and the remaining one may be a different substrate.

[0085] In this embodiment of the disclosure, the first substrate, the second substrate, and the third substrate may be made of the same material, for example, all of them may be LMT ceramic.

[0086] This disclosure provides a power amplifier, including: a first transistor and at least one second transistor; a control terminal of the first transistor for receiving a radio frequency input signal; a control terminal of the second transistor for receiving a bias voltage; a first terminal of the at least one second transistor coupled to a power supply voltage terminal and a signal output terminal; and a first transformer coupled between the first terminal of the first transistor and the second terminal of the second transistor. In this disclosure, by providing a first transformer between the first terminal of the first transistor and the second terminal of the second transistor, the inductive characteristics of the first transformer are used to lower the minimum voltage at the second terminal of the second transistor, thereby increasing the swing of the radio frequency output signal and ensuring that the output power of the power amplifier is increased while the power supply voltage remains constant.

[0087] It should be understood that the phrase "an embodiment" or "one embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this disclosure. Therefore, "in one embodiment" or "one embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this disclosure, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this disclosure. The sequence numbers of the above-described embodiments are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0088] The above description is merely a preferred embodiment of this disclosure and does not limit the patent scope of this disclosure. Any equivalent structural transformations made using the contents of this specification and drawings under the inventive concept of this disclosure, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this disclosure.

Claims

1. A power amplifier, characterized by, include: A first transistor and at least one second transistor; the control terminal of the first transistor is used to receive a radio frequency input signal; The control terminal of the second transistor is used to receive the bias voltage, and at least one first terminal of the second transistor is coupled to the power supply voltage terminal and the signal output terminal; A first transformer is coupled between a first terminal of the first transistor and a second terminal of the second transistor; wherein the first transformer includes a primary coil and a secondary coil, the primary coil being coupled between the first terminal of the first transistor and the power supply voltage terminal, and the secondary coil being coupled between the second terminal of the second transistor and the ground terminal; the first transformer is configured such that the minimum voltage of the voltage node at the second terminal of the second transistor is less than or equal to 0V.

2. The power amplifier of claim 1, wherein, The at least one second transistor includes a sub-transistor one and a sub-transistor two, the first terminal of the sub-transistor two being coupled to the power supply voltage terminal and the signal output terminal; the first transformer is coupled between the first terminal of the first transistor and the second terminal of the sub-transistor one. The power amplifier also includes: The second transformer is coupled between the first terminal of the first sub-transistor and the second terminal of the second sub-transistor.

3. The power amplifier of claim 1, wherein, The at least one second transistor includes a sub-transistor three and a sub-transistor four; the first terminal of the sub-transistor three and the first terminal of the sub-transistor four are both coupled to the signal output terminal; the first transformer includes a first input terminal, a first output terminal and a second output terminal; the first input terminal is coupled to the first terminal of the first transistor, the first output terminal is coupled to the second terminal of the sub-transistor three, and the second output terminal is coupled to the second terminal of the sub-transistor four. The power amplifier also includes: The third transformer includes a second input terminal, a third input terminal, and a third output terminal; the second input terminal is coupled to the first terminal of the third sub-transistor, the third input terminal is coupled to the first terminal of the fourth sub-transistor, and the third output terminal is coupled to the signal output terminal.

4. The power amplifier of claim 3, wherein, The power amplifier also includes: A first choke inductor and a second choke inductor are provided. The first terminal of the third sub-transistor is coupled to the power supply voltage terminal via the first choke inductor, and the first terminal of the fourth sub-transistor is coupled to the power supply voltage terminal via the second choke inductor. The first choke inductor, the second choke inductor, and the third transformer are integrated on a first substrate, the material of which includes ceramic.

5. The power amplifier of claim 3, wherein, The power amplifier also includes: A capacitor, wherein the capacitor is coupled between the power supply voltage terminal and the signal output terminal; The load is coupled between the signal output terminal and the ground terminal.

6. The power amplifier of claim 5, wherein, The capacitor includes a first capacitor and a second capacitor; wherein the first capacitor is coupled between the first terminal of the third sub-transistor and the second input terminal; and the second capacitor is coupled between the first terminal of the fourth sub-transistor and the third input terminal. The first capacitor and the second capacitor are integrated on a second substrate, and the material of the second substrate includes ceramic.

7. The power amplifier of any one of claims 1 to 4, wherein, The first transistor comprises a silicon-on-insulator (SOI) transistor, and the second transistor comprises a heterojunction bipolar transistor (HBT).

8. The power amplifier of any one of claims 1 to 4, wherein, The first transformer is integrated on a third substrate, and a material of the third substrate comprises ceramic.

9. The power amplifier of any one of claims 1 to 4, wherein, The first transformer comprises a primary coil and a secondary coil, and a turns ratio of the primary coil and the secondary coil comprises 1:1 to 3:

1.

10. The power amplifier of any one of claims 1 to 4, wherein, The first transformer comprises an adjustable transformer.

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