Optical chip test assembly

The optical chip test assembly with a multi-layer semi-enclosed structure solves the problem of easy damage to the protruding packaging solution of optical chips during temperature testing, and achieves stable electrical connection and signal transmission.

CN121114507APending Publication Date: 2025-12-12LIGHT-BASED INTELLIGENT TECHNOLOGY (SHANGHAI) CO LTD

Patent Information

Application Number
CN202511300677.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-11
Publication Date
2025-12-12

AI Technical Summary

Technical Problem

Existing technologies are not effective for temperature testing of optical chips, especially for protruding packaging solutions with their special structures, which are prone to damage under prolonged pressure.

Method used

The optical chip testing assembly adopts a multi-layered semi-enclosed structure with interlocking components, including a substrate, a pressure platform, and a cover plate. Through partitioned connection components and partitioned pressing modules, it works together to disperse external forces and protect the optical chip.

Benefits of technology

It effectively maintains the stability of the optical chip during the testing process, reduces the risk of damage caused by prolonged pressure, and ensures the reliability of electrical connections and the transmission of optical signals.

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Abstract

The invention discloses an optical chip test assembly. The optical chip test assembly comprises a substrate and an optical chip fixed on the substrate, the bearing platform is arranged on the substrate; the metal cover plate covers the optical chip; when a test is carried out, the pressure-bearing table and the metal cover plate bear pressure together, so that the substrate pushes the ejector pin on the PCB test board back, and the substrate is electrically connected with the PCB test board. According to the invention, the pressure bearing platform is arranged on the substrate and is used for bearing the downward pressure, so that the optical chip is protected under the condition of ensuring the successful electric connection with the PCB test board. Meanwhile, the optical chip is also provided with the metal cover plate, and when the optical chip is pressed, the metal cover plate bears pressure at the same time, thereby solving the problem of non-uniform stress.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of optical chip testing, and particularly relates to an optical chip testing assembly. BACKGROUND

[0002] In the process of AI computing, electronic chips play an important role in data transmission and calculation. The entire process of artificial neural algorithm contains a large number of matrix multiplication operations, and the CPU based on the traditional computer architecture is very difficult to handle these operations and has low calculation efficiency. Therefore, the academic and industrial circles turn to focus on new hardware structures for artificial neural networks and deep learning, such as GPU, ASIC and FPGA. However, regardless of the technical architecture, it is designed and manufactured by using traditional microelectronic technology. The improvement of AI chip performance cannot be separated from the improvement of microelectronic integration. However, in the early 21st century, microelectronic technology has been very difficult to develop according to Moore's Law prediction, and the difficulty of improving chip integration has increased.

[0003] Compared with electrons, photons have many unique properties: photons have no rest mass, no interaction force between photons, and almost no interference; different wavelengths of light can be used for multi-channel simultaneous communication, and at a modulation frequency of several tens of hertz, photons can still obtain stable modulation and information transmission, while electrical signals face the problem of radiation loss at high frequencies; in addition, optical signals are not affected by electromagnetic fields and have strong security. More uniquely, using some specific optical structures, photons can perform some mathematical operations at zero energy consumption. Therefore, using photons can realize ultra-high speed, low energy consumption or even zero energy consumption calculation, thereby breaking through the performance and cost bottleneck of traditional microelectronic chips.

[0004] With the gradual entry of the semiconductor industry into the post-Moore era, the development of integrated circuits continues to evolve in different directions. On the one hand, new semiconductor materials are developed, especially carbon nanotubes and two-dimensional semiconductor materials, to continue the essence of Moore's Law and continue to shrink device or chip size, i.e. "More Moore"; on the other hand, new architectures and heterogeneous integrated chips are developed for specific application fields, such as neuromorphic chips, optoelectronic chips, quantum chips, etc., to realize "More than Moore".

[0005] Among them, the photonic computing chip (hereinafter referred to as the optical chip) based on silicon-based optoelectronic technology uses materials and processes compatible with integrated circuits to integrate micron and nanometer scale photons, electrons and optoelectronic devices on the same silicon substrate to realize the functional integration and complementary advantages of microelectronic devices and optoelectronic devices, and obtain a superior optoelectronic chip, which is an effective way to solve the performance bottleneck and information congestion faced by traditional integrated circuits. Benefiting from the mature application of optical fiber communication, as an information carrier, photons have more multiplexing dimensions than electrons, such as amplitude, phase, wavelength, mode, etc., thereby having greater bandwidth, faster speed and lower energy consumption. Early silicon-based optoelectronic chips were designed to replace copper interconnection technology to solve the interconnection communication bottleneck between the processor core and the memory of the microelectronic chip. The microprocessor and the storage unit are realized by microelectronic devices, and the photonic devices mainly complete signal transceiving and information transmission. With the increasing maturity of silicon photon technology and the great advantages of optical communication, people's attention to silicon photonic computing chips gradually shifts from information transmission to information processing, including analog computing, quantum computing, brain-like computing and other frontier application fields.

[0006] The optical chip needs to be tested at temperature before leaving the factory, for detecting the working conditions of the optical chip at the best temperature, the worst temperature and the ordinary temperature.

[0007] The prior art Chinese patent application CN201920152609.9 discloses a chip high-temperature aging test seat capable of independently controlling temperature, which comprises a base, a flip cover is arranged on the base, a pressure head is arranged on the lower surface of the flip cover, a groove is arranged on the upper surface of the pressure head, a circular groove is arranged on the bottom wall of the groove, a special-shaped spring is arranged in the circular groove, a temperature sensor is arranged at the bottom end of the special-shaped spring, a slot is arranged on one side of the pressure head, a heating rod is arranged in the slot, and a heat dissipation fan is mounted on the upper surface of the flip cover.

[0008] The above prior art is designed for electronic chips and cannot be applied to the special structure of optical chips. SUMMARY

[0009] The purpose of the present application is to provide an optical chip test assembly, which partially solves or alleviates the above-mentioned deficiencies in the prior art, and is designed for the special structure of optical chips to realize temperature testing of optical chips.

[0010] In order to solve the above-mentioned technical problems, the following technical solutions are adopted in the present application: The first aspect of the present application is an optical chip test assembly, comprising: a substrate; A pressure bearing platform is provided with a first gap in a semi-enclosed manner, wherein the pressure bearing platform is arranged on a first surface of a substrate, and the pressure bearing platform comprises a first pressure bearing part and at least one second pressure bearing part connected to the first pressure bearing part, and a first mounting space is provided between the first pressure bearing part and the at least one second pressure bearing part, and an end of the second pressure bearing part is disconnected to form the first gap; An optical chip is fixed on the substrate through the first mounting space, and a second mounting space is provided between the optical chip and the pressure bearing platform; A cover plate is provided with a first mounting groove and a second gap in a semi-enclosed manner, wherein the cover plate comprises a first cover plate region and a second cover plate region connected to each other, the first cover plate region is provided with a connecting plate, the connecting plate is provided with a first mounting groove in a semi-enclosed manner to accommodate the optical chip, and the connecting plate extends into the second mounting space; the second cover plate region at least partially protrudes from the pressure bearing platform and / or the optical chip; When testing, the pressure bearing platform and the cover plate can jointly bear pressure.

[0011] In some embodiments, the first pressure bearing part and the at least one second pressure bearing part are connected to form a U-shaped pressure bearing platform to surround the optical chip from three sides, and the height of the cover plate does not protrude from the U-shaped pressure bearing platform.

[0012] In some embodiments, when the cover plate is connected to the substrate, a first gap space is formed between the cover plate and the pressure bearing platform.

[0013] In some embodiments, the width of the first pressure bearing part is greater than the width of the second pressure bearing part.

[0014] In some embodiments, the optical chip protrudes outward relative to the substrate through the first gap and the second gap in sequence.

[0015] In some embodiments, the cover plate is a metal cover plate.

[0016] In some embodiments, the side of the optical chip not surrounded by the pressure bearing platform is a coupling part, and the coupling part is provided with a photosensitive region for coupling connection with a fiber array.

[0017] In some embodiments, the coupling part of the optical chip extends out of the substrate and is arranged in a suspended manner, and the photosensitive region is arranged on the bottom surface of the coupling part.

[0018] In some embodiments, the bottom surface of the cover plate is provided with a mounting step for fixing the fiber array, and the mounting step is provided with a mounting boss.

[0019] In some embodiments, the substrate is provided with a plurality of conductive bumps, and the optical chip is electrically connected to the substrate by the conductive bumps.

[0020] In some embodiments, the cover plate is provided with overflow holes.

[0021] In some embodiments, the cover plate extends beyond the substrate, and the mounting step is arranged on the portion of the cover plate extending beyond the substrate.

[0022] In some embodiments, the overflow holes are long holes.

[0023] In some embodiments, the optical chip test assembly is installed in a slot assembly for testing.

[0024] Beneficial technical effects: For the "protruding packaging scheme", the application proposes a partitioned auxiliary connection assembly. Specifically, the application adopts a multi-layer semi-enclosed structure staggered to provide a partitioned auxiliary connection assembly (i.e. optical chip test assembly), so that the protruding packaging scheme can maintain a relatively stable state during chip testing, and alleviate or reduce the risk of damage under long-term pressure.

[0025] The application actually provides a force transmission structure for regional connection of the protruding packaging scheme to cooperatively disperse external forces. The cover plate can be used as a connecting piece (or a bearing structure) to assemble the pressure bearing table, optical chip, substrate, and fiber array into one body directly / indirectly, and the cover plate and the pressure bearing table are cooperatively arranged in the force bearing position and the force bearing contact surface size / area as two force transmission structures to protect the protruding packaging scheme (especially the optical chip) from damage during long-term testing and pressure process. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or prior art description. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, each element or part is not necessarily drawn according to the actual proportion. Obviously, the drawings described below are some embodiments of the application, and for those skilled in the art, other drawings can be obtained from these drawings without creative labor.

[0027] Figure 1 It is an exploded view of the optical chip test assembly in embodiment one.

[0028] Figure 2 It is a schematic view of the optical chip test assembly after removing the metal cover plate in embodiment one.

[0029] Figure 3a The exploded view of the optical chip testing assembly after coupling the optical fiber array in Example 1.

[0030] Figure 3b The schematic view of the cooperation between the pressure bearing platform and the metal cover plate in Example 1.

[0031] Figure 4 The schematic view of the optical chip testing assembly after coupling the optical fiber array in Example 1.

[0032] Figure 5 The schematic view of the metal cover plate in the optical chip testing assembly in Example 1.

[0033] Figure 6 The schematic view of the cross-sectional structure of the optical chip testing assembly in Example 1.

[0034] Figure 7 The perspective view of the optical chip testing system in Example 2.

[0035] Figure 8 The cross-sectional view of the optical chip testing system in Example 2.

[0036] Figure 9 The exploded view of the slot base in Example 2.

[0037] Summary of the reference signs: 1, chip testing assembly; 2, slot assembly; 3, optical fiber array; 4, PCB testing board; 11, substrate; 12, optical chip; 13, pressure bearing platform; 131, first pressure bearing part; 132, second pressure bearing part; 133, first notch; 14, metal cover plate; 121, light receiving surface; 134, glue injection groove; 141, glue overflow hole; 142, mounting step; 143, first mounting groove; 144, mounting boss; 14a, first cover plate area; 14b, second cover plate area; 145, connecting plate; 146, second notch; 21, slot base; 22, top cover; 211, slot; 212, protection dike; 213, upper layer hole plate; 214, lower layer hole plate; 221, floating pressing block; 222, fixed pressing block; 223, clamping jaw; 224, knob; 225, pre-tightening spring; 228, rotating part; 229, sliding block; 230, support plate; 231, locking screw; 232, pressing rivet nut. DETAILED DESCRIPTION

[0038] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0039] Herein, the suffix such as "module", "part" or "unit" used for representing an element is only for facilitating the description of the present application, and has no specific meaning by itself. Therefore, "module", "part" or "unit" can be mixedly used.

[0040] Herein, the terms "upper", "lower", "inner", "outer", "front", "back", "one end", "the other end" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for facilitating the description of the present application and simplifying the description, and do not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0041] Herein, unless otherwise explicitly specified and limited, the terms "mount", "provided with", "connected" and the like should be understood in a broad sense, for example, "connected" can be fixedly connected, or detachably connected, or integrally connected; can be mechanically connected, can be directly connected, or indirectly connected through an intermediate medium, can be the communication inside two elements. For a person of ordinary skill in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0042] Herein, "and / or" includes any and all combinations of one or more listed associated items.

[0043] Herein, "a plurality of" means two or more, that is, it includes two, three, four, five and the like.

[0044] In this paper, the "floating force" (or called buffer force) refers to the actual applied force (such as the force applied to the optical chip, or the actual force borne by the optical chip) has a certain degree of floating compared to the size of the external force (such as the downward force applied by the operator through rotation) during the force application process. For example, the floating force is applied by the floating block, when the first driving force is applied to the floating block, the floating block can correspondingly apply the second driving force to the optical chip. The difference between the second driving force and the first driving force is the floating amount, and the floating amount is determined by the elastic force of the elastic member (or the compression amount / elongation amount). Specifically, during the pressure application process, the size of the second driving force is adaptively adjusted by the buffering action of the elastic member at the upper end of the floating block.

[0045] On the contrary, the "fixed force" refers to the actual applied force (such as the force borne by the pressure bearing table) has the same or similar size as the external force during the force application process. For example, the fixed force is applied by the fixed block, when the first driving force is applied to the fixed block, the fixed block can correspondingly apply the third driving force which is the same or similar to the first driving force to the optical chip.

[0046] In this paper, "semi-enclosed" refers to one or more components connected to form a partial enclosure to retain at least one gap for communication with the outside world. In other words, "semi-enclosed" refers to a space or area partially enclosed by a solid structure, not completely closed, that is, part of the boundary of the structure is closed by a solid structure, and the other part of the boundary is in an open state. For example, in some embodiments, the first mounting slot reserved in the first cover plate area 14a by semi-enclosed means that the connecting plates arranged on the three side edges of the first cover plate area are connected in turn to form a U-shaped enclosed area (corresponding to the solid structure), and the position without connecting plates forms a second gap (that is, a U-shaped opening, corresponding to the open state), which is used for communication with external components (such as the optical fiber array).

[0047] In this paper, "protruding" or "protruding packaging scheme" refers to the structure scheme that one side of the optical chip protrudes outward (or hangs in the air) compared to the intermediate layer (such as the substrate or other connecting layer). For example, patent application 202410110835.6 discloses an optoelectronic chip hybrid packaging structure and packaging method based on 2.5D packaging technology, wherein the optical chip extends out of the intermediate layer to make the optical fiber array hang in the air. That is, one side of the optical chip is arranged to protrude outward compared to the intermediate layer to provide a protruding packaging scheme. This protruding optical chip packaging scheme is beneficial to realize the miniaturization and high integration of photonic computing units, thereby realizing the miniaturization of high-dimensional matrix optical chips.

[0048] However, this convex packaging scheme also brings great challenges to the testing work of the optical chip.

[0049] To this end, for this convex packaging scheme, the application provides a partitioned auxiliary connecting assembly, and a partitioned pressing module is also provided in cooperation with the partitioned auxiliary connecting assembly.

[0050] Embodiment one: Firstly, the application adopts a multi-layer semi-enclosed structure to staggeredly cooperate to provide a partitioned auxiliary connecting assembly (i.e. optical chip testing assembly), so that the convex packaging scheme can maintain a relatively stable state during chip testing, thereby relieving or reducing the risk of damage under long-time pressure.

[0051] Referring to Figure 3a , Figure 3b The optical chip testing assembly provided by the application comprises: a substrate 11; a pressure bearing table 13, which is provided with a first gap 133 in a semi-enclosed manner, wherein the pressure bearing table 13 is arranged on the first surface of the substrate, and the pressure bearing table 13 comprises a first pressure bearing part 131 and at least one second pressure bearing part 132 connected with the first pressure bearing part 131, and a first mounting space is reserved between the first pressure bearing part 131 and the at least one second pressure bearing part 132, and the end of the second pressure bearing part 132 is disconnected to form the first gap; an optical chip 12, which is fixed on the substrate through the first mounting space, and a second mounting space is reserved between the optical chip and the pressure bearing table 13; a cover plate 14, which is provided with a first mounting groove 143 and a second gap 146 in a semi-enclosed manner; wherein the cover plate comprises a first cover plate area 14a and a second cover plate area 14b connected with each other, the first cover plate area 14a is provided with a connecting plate 145, and the connecting plate 145 is formed with a first mounting groove in a semi-enclosed manner to accommodate the optical chip, and the connecting plate extends into the second mounting space; the second cover plate area 14b is at least partially convex with respect to the pressure bearing table 13 and / or the optical chip; wherein the pressure bearing table and the cover plate can jointly bear pressure during testing.

[0052] In this embodiment, the substrate has a first surface and a second surface, the first surface of the substrate is used for communication connection with the optical chip, and the second surface is used for connecting external equipment (such as a PCB test board or other circuit structure).

[0053] In this embodiment, the surfaces of the first pressure receiving portion and the second pressure receiving portion are adhered to the first surface of the substrate by glue. Correspondingly, the surfaces of the first pressure receiving portion and the second pressure receiving portion connected with the substrate are referred to as force transmission surfaces, and the other surfaces of the first pressure receiving portion and the second pressure receiving portion are referred to as pressure receiving surfaces. Similarly, the first mounting groove of the cover plate can also be connected with the surface of the optical chip by glue, and the surface of the first mounting groove connected with the optical chip is also referred to as a force transmission surface, and the other surface of the cover plate is referred to as a force receiving surface. The present application actually provides a force transmission structure for regional connection of a convex packaging scheme to cooperatively disperse external forces. The cover plate can serve as a connecting piece (or a bearing structure) to directly / indirectly assemble the pressure receiving platform, the optical chip, the substrate and the optical fiber array into one body, and the cover plate and the pressure receiving platform are cooperatively arranged in the force receiving position and the size / area of the force receiving contact surface to protect the convex packaging scheme (especially the optical chip) and avoid damage to the optical chip during long-term test pressing.

[0054] From another perspective, the present application provides an optimized transmission path of external forces by a double force receiving structure (i.e., the pressure receiving portion and the cover plate), which can cooperatively disperse forces for different regions (such as the substrate or the optical chip) by different force receiving surfaces, so as to uniformly transmit forces of the entire structure of the substrate and the optical chip and reduce damage to the connection relationship between the substrate and the optical chip during force transmission.

[0055] In some embodiments, the first pressure receiving portion 131 and the at least one second pressure receiving portion 132 are connected to form a U-shaped pressure receiving platform to surround the optical chip from three sides, and the height of the cover plate does not protrude from the U-shaped pressure receiving platform.

[0056] For example, in some embodiments, the surfaces (specifically, the pressure receiving surfaces / force receiving surfaces) of the cover plate and the pressure receiving platform can be at the same height when the test assembly is connected. Alternatively, in some embodiments, the height of the cover plate can be slightly lower than the height of the U-shaped pressure receiving platform when the test assembly is connected.

[0057] In some embodiments, when the cover plate is connected with the substrate, a first gap space is formed between the cover plate and the pressure receiving platform. The first gap space can be used to accommodate excess glue, and thus can also be referred to as a glue injection groove.

[0058] In some embodiments, the width of the first pressure receiving portion 131 is greater than the width of the second pressure receiving portion 132. In some embodiments, the optical chip protrudes outward relative to the substrate 11 through the first gap and the second gap in sequence. The outward protruding portion is provided with a coupling portion.

[0059] In some embodiments, the cover plate is a metal cover plate.

[0060] Reference will now be made to the following description Figures 1-9 The specific embodiments of the optical chip testing assembly are exemplarily illustrated as follows: As Figure 1 , Figure 2 As shown in the accompanying drawings, the present embodiment provides an optical chip testing assembly 1 (or called a partitioned auxiliary connecting assembly), which comprises a substrate 11 and an optical chip 12 fixed on the substrate 11; further comprises a pressure bearing platform 13 arranged on the substrate 11 and a cover plate, such as a metal cover plate 14, covering the optical chip.

[0061] During testing, the pressure bearing platform 13 and the metal cover plate 14 jointly bear the pressure so that the substrate 11 pushes back the pogo pins on the PCB testing board 4, thereby enabling the electrical connection between the substrate 11 and the PCB testing board 4.

[0062] During testing, the optical chip 12 needs to be installed above the PCB testing board 4, and then pressure is applied to the optical chip 12 so that the substrate 11 pushes back the pogo pins on the PCB testing board 4 to ensure successful electrical connection. Since the optical chip 12 is relatively fragile, it is easy to be crushed. In the present embodiment, the pressure bearing platform 13 is arranged on the substrate 11 to bear the downward pressure, thereby protecting the optical chip while ensuring successful electrical connection with the PCB testing board 4.

[0063] In the present embodiment, the pressure bearing platform 13 and the cover plate are combined to bear the force, which can reduce or alleviate the problem of uneven force on the substrate 11. During pressure application, the substrate 11 may be raised, which will affect the contact between the substrate 11 and the pogo pins of the PCB testing board, thereby affecting the reliability of the electrical connection. The combined force bearing scheme in the present embodiment can solve the problem of uneven force.

[0064] In this embodiment, the pressure receiving platform 13 and the metal cover plate 14 work together, and the pressure receiving platform 13 serves as the main pressure receiving component. During the test pressure application process, the pressure receiving platform 13 first receives the externally applied pressure, avoiding the direct action of the pressure on the optical chip, thereby buffering and protecting the optical chip 12. After the pressure receiving platform 13 receives the pressure, the force is transmitted to the substrate 11, enabling the substrate 11 to generate sufficient displacement to push the pogo pins on the PCB test board, thereby ensuring that the substrate 11 and the PCB test board can establish stable electrical connection, meeting the test requirements for electrical paths. The metal cover plate 14 is arranged on the optical chip and jointly receives the pressure with the pressure receiving platform 13 during pressure application. It cooperates with the pressure receiving platform 13 to disperse the force originally concentrated on the pressure receiving platform 13, making the force on the substrate 11 more uniform in the vertical direction. In this way, the substrate 11 will not be tilted when it receives pressure due to uneven force, ensuring the stability of the contact between the substrate 11 and the pogo pins. The metal cover plate 14 covers the optical chip 12, further reducing the possibility of the optical chip 12 being subjected to additional stress. The metal cover plate 14 and the pressure receiving platform 13 together provide protection for the optical chip 12 from different directions, achieving electrical connection while minimizing the probability of damage to the optical chip 12 due to stress.

[0065] Specifically, the substrate 11 serves as the bearing base of the optical chip 12, providing physical support for the optical chip 12 and ensuring that the optical chip 12 has a stable installation position in the entire test assembly. The substrate 11 is provided with a plurality of conductive bumps, and the optical chip 12 is connected to the substrate 11 through these conductive bumps, enabling the transmission of electrical signals inside the optical chip 12 to external circuits or the reception of electrical signals input by external circuits.

[0066] As shown in Figure 6 The pressure receiving platform 13 is fixed to the substrate 11 by adhesion. The metal cover plate 14 and the pressure receiving platform 13 have an injection groove 134 therebetween; the metal cover plate 14 has an overflow hole 141. The overflow hole 141 is a long hole and is located at one end adjacent to the injection groove 134. The injection groove 134 provides a space for encapsulation glue between the metal cover plate 14 and the pressure receiving platform 13. The injection groove 134 can be used to supplement glue between the optical chip 12 and the substrate 11. After the glue is filled, it can seal the peripheral area of the optical chip, preventing the intrusion of pollutants such as water vapor and dust. The overflow hole 141 provides a channel for the overflow of glue, so that when there is too much glue used to bond the metal cover plate 14 and the optical chip 12, the excess glue can overflow through the overflow hole 141. The bottom surface of the metal cover plate 14 has a first mounting groove 143, and the optical chip 12 is placed in the first mounting groove 143, serving as a positioning and mounting function.

[0067] In this embodiment, the pressure-bearing platform 13 is U-shaped to surround the optical chip on three sides. This three-sided enclosure creates a "semi-open frame" for the pressure-bearing platform 13, providing maximum all-around protection for the optical chip without causing interference. When external pressure is applied to the pressure-bearing platform 13, the force can be transmitted to the substrate 11 through the pressure-bearing platform 13, avoiding local deformation and warping of the substrate 11 caused by single-point force.

[0068] In addition, the height of the metal cover plate 14 in this embodiment is not higher than that of the pressure-bearing platform 13. Through the height difference design, it is ensured that the pressure-bearing platform 13 bears the pressure first when pressure is applied, and the metal cover plate 14 only assists in bearing the force after the pressure-bearing platform 13 is compressed to a certain extent, so as to avoid the optical chip bearing direct load from above.

[0069] like Figures 3a-4 As shown, to facilitate connection with the fiber optic array 3, the side of the optical chip not surrounded by the pressure platform 13 is a coupling section, and the coupling section is provided with a photosensitive area for coupling connection with the fiber optic array 3. In this embodiment, the pressure platform 13 surrounds the optical chip on three sides, and the side not surrounded serves as the coupling section specifically for the input and output of optical signals, which is the interface for interaction between the optical chip and the fiber optic array 3.

[0070] like Figure 5 As shown, more specifically, the coupling portion of the optical chip 12 extends out of the substrate 11 and is suspended in mid-air, with the photosensitive area disposed on the bottom surface of the coupling portion. The bottom surface of the metal cover plate 14 is provided with a mounting step 142 for fixing the fiber optic array 3, and a mounting boss 144 is provided on the mounting step. The coupling portion extends out of the substrate 11 and is suspended in mid-air, so that the photosensitive area on the bottom surface is completely exposed to the space below the substrate 11, providing an unobstructed optical path for the vertical alignment of the fiber optic array 3 and avoiding physical obstruction of the optical signal by the substrate 11. The mounting step 142 is disposed on the bottom surface of the metal cover plate 14 for fixing and positioning the fiber optic array 3.

[0071] In other embodiments, the cover plate may also be made of other materials with a certain strength, such as plastic cover plates, etc.

[0072] The beneficial technical effects of the testing component in this embodiment are as follows: The optical chip testing system with the above structure includes a pressure-bearing platform on the substrate to withstand downward pressure, protecting the optical chip while ensuring successful electrical connection with the PCB test board. Relying solely on the pressure-bearing platform can lead to uneven stress on the substrate due to the concentrated force application point at the platform. During pressure application, the substrate may warp, affecting the contact between the substrate and the PCB test board pins, thus compromising the reliability of the electrical connection. Therefore, this invention also includes a metal cover plate on the optical chip. When pressure is applied, the metal cover plate also bears the pressure, solving the problem of uneven stress distribution.

[0073] In this embodiment, the pressure bearing table cooperates with the metal cover plate, and the pressure bearing table serves as the main pressure bearing component. During the pressure test, the pressure bearing table first receives the external pressure to avoid the pressure directly acting on the optical chip, thereby buffering and protecting the optical chip. After the pressure bearing table receives the pressure, the force is transmitted to the substrate, so that the substrate can generate sufficient displacement to push the pogo pin on the test board, thereby ensuring that the substrate and the PCB test board can establish stable electrical connection to meet the test requirements for electrical paths. The metal cover plate is arranged on the optical chip and bears the pressure together with the pressure bearing table during the pressure test. The metal cover plate cooperates with the pressure bearing table to disperse the force originally concentrated on the pressure bearing table, so that the substrate is more uniformly stressed in the vertical direction. The substrate will not be tilted due to uneven stress when it bears the pressure, thereby ensuring the stability of the contact between the substrate and the pogo pin. The metal cover plate covers the optical chip to further reduce the possibility of the optical chip being subjected to additional stress. The metal cover plate and the pressure bearing table together provide protection for the optical chip from different directions, while achieving electrical connection and minimizing the probability of damage to the optical chip due to stress.

[0074] Embodiment two: For the above-mentioned convex packaging scheme, the application also provides a partitioned pressure test module (or referred to as a slot assembly 2), which comprises an optical chip test assembly and a slot assembly for installing the optical chip test assembly for testing; The optical chip test assembly comprises: a substrate 11; a pressure bearing table 13, which comprises a first pressure bearing part 131 and at least one second pressure bearing part 132 connected to the first pressure bearing part 131, and a first mounting space is reserved between the first pressure bearing part 131 and the at least one second pressure bearing part 132, and the end of the second pressure bearing part 132 is disconnected to form the first notch; an optical chip 12, which is mounted on the substrate 11 through the first mounting space; a cover plate 14, which comprises a first cover plate area 14a and a second cover plate area 14b, the first cover plate area 14a is provided with a first mounting slot for accommodating the optical chip, and the first cover plate area corresponds to the first mounting space, and the second cover plate area protrudes from the optical chip and / or the pressure bearing table; that is, the second cover plate area can be suspended compared to the optical chip; The slot assembly comprises a slot base and a top cover; the slot base comprises a slot and a protective dike arranged around the slot; preferably, a hole plate is arranged in the slot, so that when the slot base is connected with the PCB test board, the retractable pogo pin on the PCB test board can penetrate the slot and contact the contact on the substrate; The top cover comprises: a fixed pressing block corresponding to the pressure receiving platform; a floating pressing block corresponding to the first cover plate area; the substrate can be pushed back by the fixed pressing block and the floating pressing block, so as to electrically connect the substrate and the PCB test board; the lower pressing driving mechanism for driving the fixed pressing block and the floating pressing block to press down is further included. The top cover and the slot base are respectively provided with a connecting mechanism for cooperation and connection.

[0075] In some embodiments, a second gap space is arranged between the fixed pressing block and the floating pressing block; the first cover plate area 14a is provided with a glue overflow hole near one end of the second pressure receiving part 132, and correspondingly, when the floating pressing block is in contact with the first cover plate area under the action of the lower pressing driving mechanism, the glue overflow hole corresponds to the second gap space to avoid contact with the force applying surface of the floating pressing block.

[0076] In some embodiments, the size of the force applying surface of the floating pressing block is greater than or equal to the size of the optical chip.

[0077] As shown in Figure 7 The embodiment provides an optical chip test system, which includes the optical chip test assembly 1 and the slot assembly 2 for installing the optical chip test assembly 1 for testing.

[0078] The slot assembly 2 includes a slot base 21 and a top cover 22; the slot base 21 includes a slot 211 and a protection dike 212 arranged at the periphery of the slot 211; a hole plate is arranged in the slot 211, so that when the slot base 21 is connected with the PCB test board 4, the retractable pogo pins on the PCB test board 4 can penetrate the slot and contact the contacts on the substrate 11; the top cover 22 is provided with a fixed pressing block 222 acting on the pressure receiving platform 13 and a floating pressing block 221 acting on the cover plate (such as the metal cover plate 14); the substrate 11 can be pushed back by the force of the fixed pressing block 222 and the floating pressing block 221, so as to electrically connect the substrate 11 and the PCB test board 4.

[0079] In the embodiment, the function of the slot assembly 2 is to install the optical chip test assembly 1 on the PCB test board 4 for testing. The slot base 21 in the slot assembly 2 can be connected with the PCB test board 4 in advance by a detachable connection mode such as a bolt or a buckle. After the optical chip assembly is installed in the slot assembly 2, the top cover 22 is fixedly connected with the slot base 21, and then the optical chip test can be started.

[0080] In this embodiment, the light chip is suspended and the floating block 221 is arranged to butt against the light chip, which can float up and down and has a certain retreat space when in contact with the metal cover plate 14. For example, the force applying surface of the floating block 221 can be directly in contact with the metal cover plate, and the other surface thereof corresponds to an elastic member (such as a pre-tightening spring). The floating block can buffer the external force to a certain extent under the elastic action of the elastic member, thereby reducing or avoiding the risk of breaking the light chip caused by hard extrusion. Specifically, the pressure applying part in this embodiment also includes the fixed block 222 corresponding to the pressure receiving table 13 and the floating block 221 corresponding to the metal cover plate 14 (actually corresponding to the position of the light chip).

[0081] Specifically, the top cover 22 in this embodiment is provided with a second mounting groove, the floating block 221 is arranged in the second mounting groove, and a pre-tightening spring 225 is arranged between the second mounting groove and the floating block 221; the cross-sectional shape of the floating block 221 corresponds to the light chip, and the cross-sectional shape of the fixed block 222 corresponds to the pressure receiving table 13.

[0082] The cross-sectional shape of the fixed block 222 is a U-shaped boss matching the U-shaped structure of the pressure receiving table 13, and the pressure is directly applied to the top of the pressure receiving table 13 to drive the ejector pin back. In this process, the U-shaped structure of the pressure receiving table 13 uniformly disperses the pressure to the edge of the substrate 11, avoiding the transmission of pressure to the light chip body. The fixed block 222 is rigidly connected with the top cover 22, ensuring the immediacy and stability of pressure transmission and meeting the mechanical stroke accuracy required for the ejector pin back.

[0083] The floating block 221 is connected with the top cover 22 through the pre-tightening spring 225 and can adaptively float in the vertical direction (the stroke can be adjusted according to the actual situation). When in contact with the metal cover plate 14, the spring of the floating block 221 is compressed and retreats, avoiding hard extrusion on the light chip 12.

[0084] As Figure 8 It also includes a downward driving mechanism for driving the fixed block 222 and the floating block 221 to press down; the downward driving mechanism includes a sliding block 229 which can move axially along the top cover 22, and the floating block 221 and the fixed block 222 are arranged on the sliding block 229; it also includes a rotating part 228 arranged above the sliding block 229 and threadedly matched with the top cover 22, which can produce axial displacement along the top cover 22 when rotated, thereby pressing the sliding block 229 towards the light chip test assembly 1. In order to facilitate the rotation of the rotating part 228, a knob 224 or a handle can be arranged on the rotating part 228 to assist the rotation.

[0085] When the top cover 22 is lowered, the fixed pressing block 222 contacts the pressure bearing platform 13, and starts to apply pressure, and the fixed pressing block 222 and the floating pressing block 221 act on the pressure bearing platform 13 and the metal cover plate 14 respectively through the rotating component 228, so that the base plate 11 is pressed down, and the ejector pin starts to be pressed back. During the pressing down process, the floating pressing block 221 located directly above the optical chip acts on the metal cover plate 14 to perform auxiliary pressing, so that the force of the whole assembly is uniform. In addition, the floating pressing block 221 can contact the metal plate, so that heat transfer is better, and subsequent temperature testing is facilitated.

[0086] More specifically, the floating pressing block 221 in the embodiment is provided with a TEC temperature control module, which is used to control the temperature rise or fall of the floating pressing block 221, so that the optical chip reaches a preset test temperature. In order to better transfer heat, the floating block is made of pure copper, and the fixed block can be made of engineering plastic to save cost.

[0087] The TEC (Thermoelectric Cooler) semiconductor cooler is a solid-state refrigeration / heating device based on the Peltier effect. Its principle is that when a direct current passes through an electric couple composed of two different semiconductor materials, one end of the electric couple will absorb heat as a refrigeration end, and the other end will release heat as a heating end. By controlling the current direction, the refrigeration or heating function can be realized.

[0088] The temperature test in the application is to detect the working conditions of the optical chip at the best temperature, the worst temperature and the ordinary temperature. Through the TEC temperature control module, the temperature of the optical chip is accurately adjusted to the preset temperature, so that the test purpose is achieved.

[0089] In some embodiments, a heat sink is further arranged on the top cover 22, and the heat sink is a air-cooled heat sink or a water-cooled heat sink, which is used for auxiliary heat dissipation of the optical chip.

[0090] Due to the existence of the heat sink, the structure of the auxiliary rotating component is also different. For example, in the case without the heat sink, the rotating component can be a knob 224 arranged on the top of the top cover 22, as shown in Figure 7 、 Figure 8 In the case with the heat sink, the rotating component is a rotating handle extending out of the heat sink, which is convenient to operate.

[0091] ​In order to cater to the special structure of the optical chip, the slot and the protective dike 212 are provided with a position corresponding notch for the metal cover plate 14 (specifically the second cover plate area 14b) to pass out; the optical fiber array 3 is fixed on the mounting step 142 and coupled with the optical chip. The notch avoids the interference between the protective dike 212 and the slot and the metal cover plate 14 and the optical fiber array 3, and through the notch, the ambient temperature can also affect the working temperature of the optical chip, which is more convenient for temperature adjustment.

[0092] As shown in Figure 7 、 Figure 8 、 Figure 9 In order to improve the strength, the protective dike 212 is connected and locked with the slot 211, the hole plate (including the upper hole plate 213 and the lower hole plate 214), the PCB test plate 4 and the support plate 230 arranged at the bottom of the PCB test plate 4 by using the locking screw 231 and the press-in nut 232, which not only ensures the stability between the components, but also avoids the deformation of the protective dike 212 when it is pressed due to the notch.

[0093] In addition, in order to facilitate the connection between the slot base 21 and the cover, the top cover 22 and the slot base 21 are respectively provided with a connecting mechanism for cooperation. The top cover 22 is hinged with the slot base 21, and the connecting structure includes a claw 223 arranged on the top cover 22, which can be connected with the clamping groove on the slot base 21. Of course, in other embodiments, the slot base 21 and the cover are split type, and are also connected by the claw 223 and the clamping groove. The claw 223 in the embodiment is lever type, which is connected with the top cover 22 through a rotating shaft. A reset spring is arranged at the rotating shaft, and the claw 223 is opened outward after the rear end of the claw 223 is pressed, and the claw 223 is retracted inward to be connected with the clamping groove under the action of the reset spring when it is released.

[0094] During operation, the slot base 21 is fixed with the PCB test plate 4 in advance. Then the optical chip test assembly 1 is installed in the slot, and the optical fiber array 3 is coupled with the optical chip 12. The top cover 22 is buckled with the slot base 21, and then the rotating part 228 is operated to be pressed, and the temperature test can be started.

[0095] It can be understood that the test assembly or test system in the application is preferably applied to the performance test of the optical chip adopting the convex packaging process, and can also be applied to the test of other types of optical chips, which will not be described here.

[0096] The test system in the embodiment has at least the following beneficial technical effects: The optical chip testing system with the above structure has a pressure bearing table arranged on the substrate for bearing the downward pressure, and protects the optical chip under the condition that the electrical connection with the PCB test board is ensured. Therefore, the metal cover plate is further arranged on the optical chip in the application, and the metal cover plate cooperates with the force bearing table to bear the pressure when being pressed, thereby solving the problem of uneven stress. Only the pressure bearing table bears the pressure, and the stress point is concentrated on the position of the pressure bearing table, which causes uneven stress on the substrate. When being pressed, the substrate may be warped, which affects the contact between the substrate and the contact pin of the PCB test board, and further affects the reliability of the electrical connection.

[0097] In the embodiment, the pressure bearing table cooperates with the metal cover plate, and the pressure bearing table is the main bearing part of the pressure. During the test pressing process, the pressure bearing table first bears the externally applied pressure, avoids the pressure directly acting on the optical chip, and plays a role of buffering and protecting the optical chip. After the pressure bearing table bears the pressure, the force is transmitted to the substrate, so that the substrate can generate sufficient displacement to push back the contact pin on the test board, thereby ensuring that the substrate and the PCB test board can establish a stable electrical connection, and meeting the demand of the test on the electrical path. The metal cover plate is arranged on the optical chip, and bears the pressure together with the pressure bearing table when being pressed. It cooperates with the pressure bearing table to disperse the stress originally concentrated on the pressure bearing table, so that the stress on the substrate in the vertical direction is more uniform. The substrate will not be warped due to uneven stress when bearing the pressure, thereby ensuring the stability of the contact between the substrate and the contact pin. The metal cover plate covers the optical chip, which further reduces the possibility of the optical chip being subjected to additional stress. The metal cover plate and the pressure bearing table together provide protection for the optical chip from different directions, while realizing the electrical connection, and maximally reduce the probability of the optical chip being damaged due to stress.

[0098] The function of the slot assembly is to install the optical chip testing assembly on the PCB test board for testing. The slot base in the slot assembly can be connected to the PCB test board in advance through a detachable connection mode such as a bolt or a buckle. After the optical chip assembly is installed in the slot assembly, the top cover is fixedly connected with the slot base 21, and then the optical chip testing can be started.

[0099] Since the optical chip testing assembly is provided with a pressure bearing table for mainly bearing the downward pressure, the pressing part in the application also includes a fixed pressure block corresponding to the pressure bearing table and a floating pressure block corresponding to the metal cover plate (which actually corresponds to the position of the optical chip). The floating pressure block can float up and down, and there is a certain relief gap when it is in contact with the metal cover plate, thereby avoiding hard extrusion to cause the optical chip to be broken.

[0100] The TEC temperature control module is arranged in the floating pressure block for controlling the floating pressure block to be heated or cooled, so that the optical chip reaches the preset test temperature. In order to better transfer heat, the floating block is made of pure copper, and the fixed block can be made of engineering plastic to save cost.

[0101] The temperature test in the present application is to detect the working conditions of the optical chip at the best temperature, the worst temperature and the ordinary temperature. The optical chip temperature is accurately adjusted to the preset temperature through the heating or cooling of the TEC temperature control module, so as to achieve the purpose of testing.

[0102] From another perspective, for the above convex packaging scheme, the present application provides a partitioned pressure measurement module. Wherein, the partitioned pressure measurement module is composed of a floating block with a certain degree of self-adjusting ability (that is, the floating block can play a certain degree of buffering effect on the application of force by the spring), and a fixed block with relatively fixed force, and the pressure partition formed by the floating block and the fixed block corresponds to the optical chip and its pressure bearing table respectively.

[0103] Therefore, this pressure application scheme based on the cooperation of self-adjusting pressure and fixed pressure is especially suitable for convex packaging scheme (which can be beneficial to realize the miniaturization of high-dimensional matrix optical chip). That is to say, the present application provides a special test equipment for miniaturized high-dimensional matrix optical chip, which provides an effective detection means for the implementation of miniaturization of high-dimensional matrix optical chip.

[0104] It should be noted that in this document, the terms "comprise", "comprise", or any other variant thereof are intended to cover non-exclusive inclusion, so that processes, methods, articles or devices including a series of elements not only include those elements, but also include other elements not explicitly listed, or include elements inherent to such processes, methods, articles or devices. Without more limitations, the element defined by the statement "comprises a" does not exclude the presence of another identical element in the process, method, article or device that includes the element.

[0105] From the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment method can be realized by means of software and necessary general hardware platform, of course, it can also be realized by hardware, but in many cases the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a plurality of instructions for making a computer terminal (which can be a mobile phone, computer, server, or network equipment, etc.) execute the method described in each embodiment of the present application.

[0106] The embodiments of the present application are described above with reference to the accompanying drawings, but the present application is not limited to the above-described specific embodiments, and the above-described specific embodiments are merely illustrative, but not restrictive, and a person of ordinary skill in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims, and these all belong to the protection of the present application.

Claims

1. An optical chip testing component, characterized in that, include: substrate(11); The pressure-bearing platform (13) is provided with a first notch (133) in a semi-enclosed manner. The pressure-bearing platform (13) is disposed on the first surface of the substrate and includes: a first pressure-bearing part (131) and at least one second pressure-bearing part (132) connected to the first pressure-bearing part (131). A first installation space is reserved between the first pressure-bearing part (131) and the at least one second pressure-bearing part (132), and the end of the second pressure-bearing part (132) is disconnected to form the first notch. The optical chip (12) is fixed on the substrate through the first mounting space, and a second mounting space is left between the optical chip and the pressure platform (13); A cover plate (14) is provided with a first mounting groove (143) and a second notch (146) in a semi-enclosed manner; wherein, the cover plate includes: a first cover plate area (14a) and a second cover plate area (14b) connected to each other, a connecting plate (145) is provided on the first cover plate area (14a), and the connecting plate (145) is provided with a first mounting groove in a semi-enclosed manner to accommodate the optical chip, and the connecting plate extends into the second mounting space; the second cover plate area (14b) protrudes at least partially from the pressure platform (13) and / or the optical chip. During testing, the pressure-bearing platform and the cover plate can jointly withstand the pressure.

2. The optical chip testing assembly according to claim 1, characterized in that, The first pressure-bearing part (131) and the at least one second pressure-bearing part (132) are connected to form a U-shaped pressure-bearing platform to surround the optical chip on three sides, and the height of the cover plate does not protrude beyond the U-shaped pressure-bearing platform.

3. The optical chip testing assembly according to claim 1, characterized in that, When the cover plate is connected to the base plate, a first gap space is formed between the cover plate and the pressure platform.

4. The optical chip testing assembly according to claim 1, characterized in that, The width of the first pressure-bearing part (131) is greater than the width of the second pressure-bearing part; And / or, the optical chip protrudes outward relative to the substrate (11) through the first notch and the second notch in sequence; The cover plate is a metal cover plate.

5. The optical chip testing assembly according to claim 4, characterized in that, The side of the optical chip not surrounded by the pressure platform is the coupling part, and the coupling part is provided with a photosensitive area for coupling and connection with the optical fiber array.

6. The optical chip testing assembly according to claim 5, characterized in that, The coupling portion of the optical chip extends out of the substrate and is suspended in mid-air, while the photosensitive area is disposed on the bottom surface of the coupling portion.

7. The optical chip testing assembly according to claim 1, characterized in that, The bottom surface of the cover plate is provided with an installation step for fixing the fiber optic array, and the installation step is provided with an installation boss. And / or, the substrate is provided with a plurality of conductive bumps, and the optical chip is electrically connected to the substrate by means of the conductive bumps; And / or, the cover plate has an overflow hole.

8. The optical chip testing assembly according to claim 7, characterized in that, The cover plate extends out of the substrate, and the mounting step is provided on the portion of the cover plate that extends out of the substrate.

9. The optical chip testing assembly according to claim 7, characterized in that, The overflow hole is an elongated hole.

10. An optical chip testing assembly according to any one of claims 1-9, characterized in that, The optical chip test assembly is installed in the slot assembly for testing.

Citation Information

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