Software logic simulation operation control method and system in audio processor

Abstract

The invention relates to the technical field of software simulation operation simulation, and discloses a software logic simulation operation control method and system in an audio processor. The control method is applied to logic simulation operation control equipment and specifically comprises the following steps that S101, an audio processor simulation operation request sent by a user side is received, a graphical user interface is generated according to the operation request, and the graphical user interface comprises a logic module list area, a design editing area, an attribute bar and an information display area; and the user side drags an icon of a logic circuit element from the logic module list area to the design editing area. Through a highly integrated graphical interface and intelligent interactive design, the design and simulation efficiency of an audio processor logic circuit is remarkably improved, and by adopting a'drag-and-generate 'module instantiation mechanism, an attribute bidirectional real-time synchronization technology and visual connection and signal type inspection, the reliability of the audio processor logic circuit is greatly improved. Therefore, the user can intuitively and quickly construct the complex circuit topology, and the professional threshold is greatly reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of software simulation running simulation, in particular to a software logic simulation running control method and system in an audio processor. BACKGROUND

[0002] Simulation software has been relatively widely applied in the circuit design industry and the industrial field, but it is still relatively less in the audio processor industry to apply software for simulation running.

[0003] When we want to realize a certain function, if there is no simulation software for simulation, then we can only physically build the relevant environment in the real world for testing and verifying the conclusion, and building a real environment in the real world may consume a lot of manpower, material resources and time.

[0004] Based on the above technical problems, if a simulation software is designed, then the idea can be designed and realized on the simulation software first, then run, and then verify the feasibility of the idea according to the result, which can greatly shorten the time from the idea to the realization, and can verify whether the idea meets the expectation, without investing real resources in the real environment, saving manpower, material resources and time cost. SUMMARY

[0005] The purpose of the present application is to provide a software logic simulation running control method and system in an audio processor, which significantly improves the design and simulation efficiency of the audio processor logic circuit through highly integrated graphical interface and intelligent interactive design, adopts a "dragging to generate" module instantiation mechanism, a bidirectional real-time synchronization technology and a visual connection and signal type checking, so that users can intuitively and quickly build complex circuit topology, greatly reducing the professional threshold, and aims to solve the problems in the prior art.

[0006] The present application is implemented as follows: a software logic simulation running control method in an audio processor is applied to a logic simulation running control device, and specifically includes the following steps: S101: receiving an audio processor simulation running request sent by a user end, generating a graphical user interface according to the running request, the graphical user interface including a logic module list area, a design editing area, an attribute column and an information display area, the user end dragging an icon of a logic circuit element from the logic module list area to the design editing area, and the device instantiating and generating a graphical module entity with a standard logic function at a mouse hovering position in response to a release action of the user end; S102: When the user selects a graphical module entity in the design editing area, the device automatically parses all configurable attributes of the module, generates an attribute editing form and dynamically loads it to the attribute bar for display. The user modifies any attribute value through the input control in the attribute bar. The modification operation is captured and transmitted to the corresponding module entity in real time through the internal bidirectional data binding mechanism, triggering the graphical display update of the module entity and the reconfiguration of the internal logic parameters. S103: The device responds to the user's connection operation in the design editing area. When the user operates in the design editing area, the device automatically draws a connection line with direction between two pins and establishes a signal transmission channel internally. When the transmission channel is connected, a signal type compatibility check is performed. If the types match, the connection is successfully established. If the types conflict, the connection is rejected and an error is prompted. S104: Continuously monitor the level signal changes of all pins. When the input signal value of any module changes, mark the event as a to-be-processed event, schedule the internal logic function of the module, and generate new output signals according to its logic function. The output signals are automatically transmitted to the input pins of all downstream connected modules through the signal transmission channel, triggering a chain of logic calculation processes and achieving simulation logic simulation running control. S105: The types, positions, attribute parameters of all module entities in the design editing area, as well as all connection relationships between modules, are converted into a structured engineering file and stored in a local non-volatile memory. The memory responds to the user's opening operation and reconstructs all module entities, connection lines and circuit states in the design editing area based on the file information, achieving lossless saving and reuse of simulation running control.

[0007] Further, in S101, the user end drags an icon of a logic circuit element from the logic module list area to the design editing area. The device responds to the user's release action, including: The user selects an icon of a target element from a variety of pre-set logic circuit elements in the left logic module list area. The logic circuit elements include basic logic gates, input / output modules and composite logic components. Then the user moves the graphical identifier of the element from the list area to the central design editing area range through continuous pressing and dragging operation. When the user releases the mouse or touch screen after performing the above dragging operation, a release action occurs. The device immediately responds to the action, determines it as a placement instruction, and generates an interactive module entity instance corresponding to the type of the target element at the current coordinate position of the mouse pointer in the design editing area, completing the conversion from the logic symbol to the specific instance.

[0008] Further, when the user end is monitored to release the mouse or touch screen after performing the above-mentioned dragging operation, i.e. the release action occurs, the device immediately responds to the action, determines as a placement instruction, and includes the following on the coordinate position of the design editing area where the mouse pointer is currently located: When the user drags an element icon from the logical module list area organized in a tree-like classification structure, the device acquires the pre-defined metadata of the element in real time, including the function description, electrical characteristics and simulation model information; After monitoring the user release action, the device immediately responds to the placement instruction, generates a module entity instance at the mouse pointer position of the design editing area according to the acquired metadata, and calls the simulation model defined in the metadata to initialize the internal behavior logic of the entity, thereby completing the creation of a module with specific circuit function and simulation rules.

[0009] Further, in S102, the user end modifies any attribute value through the input control in the attribute bar, and the modification operation is captured in real time and transmitted to the corresponding module entity through the internal bidirectional data binding mechanism, including: When the user operates in the input control of the right attribute bar to modify a certain attribute value, the operation will immediately trigger a specific event, the event carries the modified attribute identifier and the new attribute value data, and is captured by the built-in event listening mechanism; After the event listening mechanism captures the modification event, the internal bidirectional data binding process is activated immediately, the packaged new attribute value data packet is transmitted to the specific module entity corresponding thereto in the design editing area through the pre-defined data channel in real time and automatically, and the module is driven to update its internal state and graphical representation according to the new parameter.

[0010] Further, in S103, the device responds to the connection operation of the user end in the design editing area, and automatically draws a directional connection line between the two pins when the user end operates in the design editing area, including: The user end presses the mouse from the output pin of the source module and starts dragging, generates a temporary connection line following the cursor movement in real time, and continuously detects the area passed by the cursor, highlights the input pin of the potential target module when the cursor hovers over the input pin, and indicates that the connection can be released to complete the connection; When it is monitored that the user end releases the mouse on the target input pin, i.e. the release, the action is immediately responded, a signal type compatibility check is first performed, if the types match, a permanent directional connection line is formally drawn between the two pins, a stable signal transmission channel is established internally, the channel represents the data flow direction of the digital logic signal, and the connection relationship is included in the logical topology structure of the simulation circuit.

[0011] Further, in S104, the internal logic function of the module is calculated, and a new output signal is generated according to its logic function. The output signal is automatically transmitted to the input pins of all downstream connected modules through the signal transmission channel, triggering a chain-like logic calculation process, including: The simulation engine in the logic simulation operation control device schedules and calculates the internal logic function of the affected module, performs its specific Boolean operation or signal processing, and generates a new output signal value based on the calculation result; The new output signal value is then written to the output pin and automatically and in parallel transmitted to the input pins of all connected downstream modules through the previously established signal transmission channel, thereby triggering the next level of chain logic calculation process. As the signal propagates through the topology network, the device assigns dynamic state attributes to each pin and renders them in real time. When an input or output pin receives a valid logic level, its graphical appearance immediately turns bright green. If there is no signal or a signal error is detected, it is displayed in gray or red, thus completing the signal propagation path and processing status in the entire logic circuit.

[0012] Furthermore, the new output signal value is then written to the output pin and automatically and in parallel transmitted to the input pins of all connected downstream modules through the previously established signal transmission channel, including: Once the new output signal value is calculated by the simulation engine, it is immediately written into the internal register of the corresponding output pin of the source module to update its electrical state. This state change event is captured by the device, indicating that the signal is ready for transmission. The device then activates all signal transmission channels connected to the output pin, and automatically distributes the new signal value as a data packet to the input pin of each downstream target module in a parallel and asynchronous manner. At the same time, this signal change event and the new topology state will be recorded in the project file in JSON or XML format, so that the file continuously and completely records the latest logic state and real-time topology connection relationship of the simulation circuit.

[0013] Furthermore, in S105, based on the file information, all module entities, connection lines, and circuit states are completely reconstructed in the design editing area, achieving lossless preservation and reuse of simulation operation control, including: The device reads and parses the locally stored project files, and extracts the structured data recorded in the files, such as module types, coordinate positions, attribute parameters, and connection relationships, through deserialization operations, in order to prepare data for reconstructing the visualization interface; Based on the parsed structured data, each module entity is instantiated one by one according to the record type and coordinates in the design editing area, and its saved attributes are loaded. According to the connection relationship data, the connection lines between the corresponding module pins are redrawn and the internal signal channels are established, accurately restoring all states of the entire simulation circuit and realizing lossless reconstruction from file to runtime environment.

[0014] Compared with the prior art, the software logic simulation operation control method and system for audio processors provided by the present invention have the following beneficial effects: 1. Through a highly integrated graphical interface and intelligent interactive design, the design and simulation efficiency of audio processor logic circuits is significantly improved. The "drag and drop to generate" module instantiation mechanism, bidirectional real-time attribute synchronization technology, and visual connection and signal type checks enable users to intuitively and quickly build complex circuit topologies, greatly reducing the professional threshold. The dynamic color-coded rendering of pin status realizes real-time visualization of signal flow and circuit status, providing designers with an unprecedented intuitive debugging experience and effectively avoiding logical errors that are difficult to detect in traditional text simulation. 2. It achieves high-fidelity simulation and complete design lifecycle management. The simulation engine based on event-driven and dependency graphs ensures the accuracy of signal propagation and logic calculation, and can realistically simulate the timing logic and electrical characteristics in audio processors. At the same time, the open-format structured engineering files not only completely record the circuit topology and real-time status, but also realize the lossless preservation and accurate reconstruction of the design, and facilitate version management and collaborative sharing. It seamlessly integrates design, simulation, debugging and preservation for reuse, forming an efficient, reliable and user-friendly integrated solution, which greatly promotes the innovative development and verification process of audio processors.

[0015] An audio processor software logic simulation operation control system, used to execute the above-mentioned software logic simulation operation control method, wherein the software logic simulation operation control system includes: The graphical interface generation module is used to receive the audio processor simulation run request sent by the user terminal, generate a graphical user interface including a logic module list area, a design editing area, an attribute bar and an information display area, and respond to the user's release action of dragging logic circuit component icons from the list area to the design editing area, and instantiate and generate graphical module entities at the corresponding positions. The attribute management module is used to automatically parse all configurable attributes of a module entity when the user selects it in the design editing area, generate an attribute editing form, and load it into the attribute bar for display. It captures the attribute modification operations performed by the user through the input controls in real time through an internal two-way data binding mechanism, and transmits the modified data to the corresponding module entity to trigger an update. The connection control module is used to respond to the user's connection operation in the design editing area, draw directional connection lines between the output pins of the source module and the input pins of the target module, establish an internal signal transmission channel, and perform signal type compatibility checks when establishing a connection; The simulation engine module is used to continuously monitor changes in the level signals of all pins. When a change in the input signal value is detected, it marks the event to be processed and schedules the internal logic function of the calculation module to generate a new output signal, which is then transmitted to the downstream connection module through the signal transmission channel to trigger the chain logic calculation process. The file management module is used to convert the types, locations, attribute parameters, and inter-module connections of all module entities in the design editing area into structured engineering files and store them in local non-volatile memory. It can also completely reconstruct all module entities, connection lines, and circuit states based on the file information.

[0016] Specifically, the simulation engine module includes: The signal processing unit is used to write the calculated new output signal value into the internal register of the output pin of the source module, update the electrical state, and activate all connected signal transmission channels to distribute the signal value data packet to the input pin of the downstream target module in a parallel and asynchronous manner. The status rendering unit is used to assign dynamic status attributes to each pin and perform real-time rendering. When a pin receives a valid logic level, its appearance is highlighted in green. When there is no signal or a signal error, it is displayed in gray or red, thus dynamically visualizing the signal propagation and processing process. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating the software logic simulation and operation control method for the audio processor proposed in this invention. Figure 2 This is a flowchart illustrating the process of scheduling and calculating the internal logic function of a module in the software logic simulation and operation control method for an audio processor proposed in this invention, generating a new output signal based on its logic function, and automatically transmitting the output signal to the input pins of all downstream connected modules through a signal transmission channel, triggering a chain-like logic calculation process. Figure 3 This is a schematic diagram of the software logic simulation and operation control system in the audio processor proposed in this invention; Figure 4 This is a schematic diagram of the simulation engine module in the software logic simulation operation control system of the audio processor proposed in this invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0019] The implementation of the present invention will be described in detail below with reference to specific embodiments.

[0020] In the accompanying drawings of this embodiment, the same or similar reference numerals correspond to the same or similar components. In the description of this invention, it should be understood that if terms such as "upper," "lower," "left," and "right" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting this invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0021] Reference Figures 1-2 As shown, the software logic simulation operation control method in the audio processor, applied to logic simulation operation control equipment, specifically includes the following steps: S101: Receives an audio processor simulation run request sent by the user terminal, generates a graphical user interface according to the run request, the graphical user interface includes a logic module list area, a design editing area, an attribute bar and an information display area. The user terminal drags an icon of a logic circuit element from the logic module list area to the design editing area. The device responds to the user terminal's release action and instantiates a graphical module entity with standard logic functions at the mouse hover position. In this process, when a user drags an icon of a logic circuit element from the logic module list area to the design editing area, the device responds to the user's release action, including: In the logic module list area on the left, the user selects the icon of a target element from a variety of preset logic circuit elements. The logic circuit elements include basic logic gates, input / output modules, and composite logic components. Then, the user moves the graphical icon of the element from the list area to the central design editing area by continuously pressing and dragging. When the device detects that the user releases the mouse or touchscreen after performing the above drag operation, i.e., a release action occurs, the device immediately responds to the action, determines it as a placement command, and generates an interactive module entity instance that is completely corresponding to the target component type at the coordinate position of the current mouse pointer in the design editing area, completing the transformation from logical symbol to concrete instance. S102: When the user selects a graphical module entity in the design editing area, the device automatically parses all configurable attributes of the module, generates an attribute editing form and dynamically loads it into the attribute bar. The user can modify any attribute value through the input controls in the attribute bar. The modification operation is captured in real time and transmitted to the corresponding module entity through the internal two-way data binding mechanism, triggering the graphical display update of the module entity and the reconfiguration of the internal logical parameters. In this system, the user can modify any attribute value through the input controls in the attribute bar. The modification operation is captured in real time and transmitted to the corresponding module entity through an internal two-way data binding mechanism, including: When a user operates on the input control in the right-hand property panel to modify a property value, the operation will immediately trigger a specific event. This event carries the modified property identifier and the new property value data, and is captured by the built-in event listener mechanism. After the event listener mechanism captures a modification event, it immediately activates the internal two-way data binding process. This process transmits the encapsulated new attribute value data package to the corresponding specific module entity in the design editing area in real time and automatically through a predefined data channel, driving the module to update its internal state and graphical representation according to the new parameters. S103: The device responds to the connection operation of the user terminal in the design editing area. When the user terminal operates in the design editing area, the device automatically draws a directional connection line between the two pins and establishes a signal transmission channel internally. When the connection is established in the transmission channel, a signal type compatibility check is performed. If the types match, the connection is successfully established. If the types conflict, the connection is rejected and an error is prompted. S104: Continuously monitors the level signal changes of all pins. When the input signal value of any module changes, the event is marked as a pending event. The internal logic function of the module is scheduled to be calculated, and a new output signal is generated according to its logic function. The output signal is automatically transmitted to the input pins of all downstream connected modules through the signal transmission channel, triggering a chain-like logic calculation process to realize the simulation logic simulation operation control. Specifically, the module's internal logic function is calculated, and a new output signal is generated based on its logic function. The output signal is automatically transmitted to the input pins of all downstream connected modules through the signal transmission channel, triggering a chain-like logic calculation process, including: The simulation engine in the logic simulation operation control equipment schedules and calculates the internal logic function of the affected module, performs its specific Boolean operations or signal processing, and generates new output signal values ​​based on the calculation results; The new output signal value is then written to the output pin and automatically and in parallel transmitted to the input pins of all connected downstream modules through the previously established signal transmission channel, thereby triggering the next level of chain logic calculation process. As the signal propagates through the topology network, the device assigns dynamic state attributes to each pin and renders them in real time. When an input or output pin receives a valid logic level, its graphical appearance immediately turns bright green. If there is no signal or a signal error is detected, it is displayed in gray or red, thus completing the signal propagation path and processing status in the entire logic circuit. S105: The design editing area displays the types, locations, attribute parameters, and all connection relationships between all module entities, and converts them into structured engineering files stored in local non-volatile memory. The memory responds to the user's open operation and, based on the file information, completely reconstructs all module entities, connection lines, and circuit states within the design editing area, achieving lossless preservation and reuse of simulation operation control. Through a highly integrated graphical interface and intelligent interactive design, it significantly improves the design and simulation efficiency of audio processor logic circuits. The "drag and drop to generate" module instantiation mechanism, bidirectional real-time attribute synchronization technology, and visualized connection and signal type checks enable users to intuitively and quickly construct complex circuit topologies, greatly reducing the professional threshold. Dynamic color-coded rendering of pin states enables real-time visualization of signal flow and circuit states, providing designers with an unprecedented intuitive debugging experience and effectively avoiding logical errors that are difficult to detect in traditional text simulations.

[0022] In S101 of this embodiment, when it is detected that the user releases the mouse or touchscreen after performing the above-mentioned drag operation, i.e., a release action occurs, the device immediately responds to the action, determines it as a placement command, and places the mouse pointer at the current coordinate position of the design editing area, including: When a user drags a component icon from the logic module list area organized in a tree-like classification structure, the device obtains the predefined metadata of the component in real time, including its functional description, electrical characteristics and simulation model information. Upon detecting the user's release action, the device immediately responds to the placement command, generates a module entity instance at the mouse pointer position in the design editing area based on the acquired metadata, and calls the simulation model defined in the metadata to initialize the internal behavior logic of the entity, thus completing the creation of a module with specific circuit functions and simulation rules.

[0023] In S103 of this embodiment, the device responds to the user's connection operation in the design editing area. When the user operates in the design editing area, the device automatically draws a directional connection line between the two pins, including: The user presses the mouse on the output pin of the source module and starts dragging. A temporary connection is generated in real time to follow the cursor's movement and the area the cursor passes through is continuously detected. When the cursor hovers over the input pin of the potential target module, the pin is highlighted to indicate that the connection can be completed by releasing the mouse. When the system detects that the user has released the mouse on the target input pin, it immediately responds to the action, first performing a signal type compatibility check. If the type matches, it formally draws a directional permanent connection line between the two pins and establishes a stable signal transmission channel internally. This channel represents the data flow of the digital logic signal, and this connection relationship is incorporated into the logic topology of the simulation circuit.

[0024] In S104 of this embodiment, the new output signal value is then written to the output pin and automatically and in parallel transmitted to the input pins of all connected downstream modules through the previously established signal transmission channel, including: Once the new output signal value is calculated by the simulation engine, it is immediately written into the internal register of the corresponding output pin of the source module to update its electrical state. This state change event is captured by the device, indicating that the signal is ready for transmission. The device then activates all signal transmission channels connected to the output pin, and automatically distributes the new signal value as a data packet to the input pin of each downstream target module in a parallel and asynchronous manner. At the same time, this signal change event and the new topology state will be recorded in the project file in JSON or XML format, so that the file continuously and completely records the latest logic state and real-time topology connection relationship of the simulation circuit.

[0025] In S105 of this embodiment, all module entities, connection lines, and circuit states are completely reconstructed in the design editing area based on file information, realizing the lossless preservation and reuse of simulation operation control, including: The device reads and parses the locally stored project files, and extracts the structured data recorded in the files, such as module types, coordinate positions, attribute parameters, and connection relationships, through deserialization operations, in order to prepare data for reconstructing the visualization interface; Based on the parsed structured data, each module entity is instantiated one by one according to the record type and coordinates in the design editing area, and its saved attributes are loaded. According to the connection relationship data, the connection lines between the corresponding module pins are redrawn and the internal signal channels are established, accurately restoring all states of the entire simulation circuit and realizing lossless reconstruction from file to runtime environment.

[0026] This technical solution achieves high-fidelity simulation and complete design lifecycle management. The simulation engine based on event-driven and dependency graphs ensures the accuracy of signal propagation and logic calculation, and can realistically simulate the timing logic and electrical characteristics in audio processors. At the same time, the open-format structured engineering files not only fully record the circuit topology and real-time status, but also realize lossless preservation and accurate reconstruction of the design, and facilitate version management and collaborative sharing. It seamlessly integrates design, simulation, debugging and preservation for reuse, forming an efficient, reliable and user-friendly integrated solution, which greatly promotes the innovative development and verification process of audio processors.

[0027] Reference Figures 3-4 As shown, the audio processor software logic simulation operation control system is used to execute the above-mentioned software logic simulation operation control method. The software logic simulation operation control system includes: a graphical interface generation module, used to receive the audio processor simulation operation request sent by the user terminal, generate a graphical user interface including a logic module list area, a design editing area, an attribute bar, and an information display area, and respond to the user's release action of dragging logic circuit component icons from the list area to the design editing area, and instantiate graphical module entities at the corresponding positions; an attribute management module, used to automatically parse all configurable attributes of a module entity when the user selects a module entity in the design editing area and generate an attribute editing form to be loaded into the attribute bar for display, and capture the attribute modification operation performed by the user through the input control in real time through an internal two-way data binding mechanism, and transmit the modified data to the corresponding module entity to trigger an update; and a connection control module, used to respond to the user's connection operation in the design editing area, and connect the source module output pin to the target module. The module draws directional connection lines between input pins to establish internal signal transmission channels and performs signal type compatibility checks during connection establishment. The simulation engine module continuously monitors changes in the level signals of all pins. When a change in the input signal value is detected, it marks the event to be processed and schedules the internal logic function of the calculation module to generate a new output signal, which is transmitted to the downstream connection module through the signal transmission channel, triggering a chain logic calculation process. The file management module converts the type, location, attribute parameters, and inter-module connection relationships of all module entities in the design editing area into structured engineering files and stores them in local non-volatile memory. It can also completely reconstruct all module entities, connection lines, and circuit states based on file information. Through a highly integrated graphical interface and intelligent interactive design, the design and simulation efficiency of audio processor logic circuits is significantly improved. It adopts a "drag and drop to generate" module instantiation mechanism, bidirectional real-time attribute synchronization technology, and visual connection and signal type checks.

[0028] In this embodiment, the simulation engine module includes: a signal processing unit, used to write the calculated new output signal value into the internal register of the source module's output pin, update the electrical state, and activate all connected signal transmission channels to distribute the signal value data packet to the input pin of the downstream target module in a parallel and asynchronous manner; and a state rendering unit, used to assign dynamic state attributes to each pin and perform real-time rendering, turning its appearance into a bright green when the pin receives a valid logic level, and displaying it as gray or red when there is no signal or a signal error, thus dynamically visualizing the signal propagation and processing process.

[0029] This technical solution enables users to intuitively and quickly construct complex circuit topologies, significantly lowering the professional threshold. The dynamic color-coded rendering of pin states enables real-time visualization of signal flow and circuit status, providing designers with an unprecedented intuitive debugging experience. It effectively avoids logical errors that are difficult to detect in traditional text simulations. The simulation engine based on event-driven and dependency graphs ensures the accuracy of signal propagation and logic calculations, and can realistically simulate the timing logic and electrical characteristics in audio processors. At the same time, the structured engineering files in an open format not only completely record the circuit topology and real-time status, but also achieve lossless preservation and accurate reconstruction of the design, making version management and collaborative sharing easier. It seamlessly integrates design, simulation, debugging, and storage reuse, forming an efficient, reliable, and user-friendly integrated solution that greatly promotes the innovative development and verification process of audio processors.

[0030] The logic module list area is organized using a tree-like classification structure, including at least the categories of "Basic Gate Circuits," "Input / Output Devices," "Sequential Logic Circuits," "Combinational Logic Circuits," and "User-defined Modules." Each logic circuit element has predefined metadata. When drawing connection lines, the intelligent wiring tool automatically uses a right-angle routing algorithm for path planning, avoiding overlapping and crossing of lines and improving the readability of the circuit diagram. When the user drags a connection line over other pins, the tool provides hover highlighting prompts to assist the user in making correct connection operations. Established connection lines can be selected and deleted; the deletion operation will also remove the signal transmission channels established within the system.

[0031] The simulation engine is a time-stepping discrete event simulator. Internally, it maintains a priority event queue, and the event priority is determined by the electrical delay time attribute of signal propagation. When an input pin signal changes, the engine calculates the effective time point of its output signal according to the predefined delay time of the module, and inserts this output event into the event queue according to the timestamp. The simulation engine processes the events in the queue in chronological order to simulate the real propagation delay of digital signals in the circuit, thereby achieving more accurate simulation of sequential logic circuits.

[0032] In this process, users can select multiple connected module entities and connecting lines in the design editing area, and then select the "Create Composite Module" command through the right-click menu or the top menu bar. The system will encapsulate the selected modules and their internal logic topology into a new, reusable composite logic module and automatically generate new input / output pins for it. The icon of this composite module will be added to the "User-defined Module" category in the logic module list area on the left. After that, users can use the composite module to build more complex logic circuits by dragging and dropping, just like using basic modules.

[0033] The project file is a JSON or XML-based text file, using a hierarchical structure to store data. The top layer contains canvas information, which is divided into a "modules" module list layer and a "wires" connection layer. The "modules" layer stores the instance ID, type, position coordinates, and all attribute key-value pairs of each module in array form. The "wires" layer stores the instance ID, source module ID and pin name, and target module ID and pin name of each connection line in array form. This open format facilitates parsing, generation, or modification by third-party tools, enhancing the system's interoperability and integrability.

[0034] In this embodiment, the entire operation process can be controlled by a computer to provide signal feedback and implement the steps sequentially. These are all conventional knowledge in current automation control, and will not be elaborated on in this embodiment.

[0035] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A software logic simulation and operation control method for an audio processor, characterized in that, Applied to logic simulation and operation control equipment, the specific steps include: S101: Receive an audio processor simulation run request sent by the user terminal, generate a graphical user interface according to the run request, the graphical user interface includes a logic module list area, a design editing area, an attribute bar and an information display area, the user terminal drags an icon of a logic circuit element from the logic module list area to the design editing area, the device responds to the user terminal's release action, and instantiates a graphical module entity with standard logic functions at the mouse hover position. S102: When the user selects a graphical module entity in the design editing area, the device automatically parses all configurable attributes of the module, generates an attribute editing form and dynamically loads it into the attribute bar. The user can modify any attribute value through the input controls in the attribute bar. The modification operation is captured in real time and transmitted to the corresponding module entity through the internal two-way data binding mechanism, triggering the graphical display update of the module entity and the reconfiguration of the internal logical parameters. S103: The device responds to the connection operation of the user terminal in the design editing area. When the user terminal operates in the design editing area, the device automatically draws a directional connection line between the two pins and establishes a signal transmission channel internally. When the connection is established in the transmission channel, a signal type compatibility check is performed. If the types match, the connection is successfully established. If the types conflict, the connection is rejected and an error is prompted. S104: Continuously monitor the level signal changes of all pins. When the input signal value of any module changes, mark the event as a pending event, schedule the calculation of the internal logic function of the module, and generate a new output signal according to its logic function. The output signal is automatically transmitted to the input pins of all downstream connected modules through the signal transmission channel, triggering a chain-like logic calculation process to realize the simulation logic simulation operation control. S105: The types, locations, attribute parameters, and all connection relationships between all module entities in the design editing area are converted into structured engineering files and stored in local non-volatile memory. The memory responds to the user's open operation and, based on the file information, completely reconstructs all module entities, connection lines, and circuit states in the design editing area, realizing lossless preservation and reuse of simulation operation control.

2. The software logic simulation and operation control method for an audio processor as described in claim 1, characterized in that, In S101, the user terminal drags an icon of a logic circuit element from the logic module list area to the design editing area, and the device responds to the user terminal's release action, including: In the logic module list area on the left, the user selects the icon of a target element from a variety of preset logic circuit elements. The logic circuit elements include basic logic gates, input / output modules, and composite logic components. Then, the user moves the graphical icon of the element from the list area to the central design editing area by continuously pressing and dragging. When the device detects that the user releases the mouse or touchscreen after performing the above drag operation, i.e., a release action occurs, the device immediately responds to the action, determines it as a placement command, and generates an interactive module entity instance that is completely corresponding to the target component type at the coordinate position of the current mouse pointer in the design editing area, completing the transformation from logical symbol to concrete instance.

3. The software logic simulation and operation control method for an audio processor as described in claim 2, characterized in that, When the device detects that the user releases the mouse or touchscreen after performing the drag-and-drop operation (i.e., a release action occurs), it immediately responds to the action, determines it as a placement command, and places the mouse pointer at the current coordinates of the design editing area, including: When a user drags a component icon from the logic module list area organized in a tree-like classification structure, the device obtains the predefined metadata of the component in real time, including its functional description, electrical characteristics and simulation model information. Upon detecting the user's release action, the device immediately responds to the placement command, generates a module entity instance at the mouse pointer position in the design editing area based on the acquired metadata, and calls the simulation model defined in the metadata to initialize the internal behavior logic of the entity, thus completing the creation of a module with specific circuit functions and simulation rules.

4. The software logic simulation and operation control method for an audio processor as described in claim 3, characterized in that, In S102, the user can modify any attribute value through the input controls in the attribute bar. The modification operation is captured in real time and transmitted to the corresponding module entity through the internal two-way data binding mechanism, including: When a user operates on the input control in the right-hand property panel to modify a property value, the operation will immediately trigger a specific event. This event carries the modified property identifier and the new property value data, and is captured by the built-in event listener mechanism. After the event listener mechanism captures a modification event, it immediately activates the internal two-way data binding process. This process transmits the encapsulated new attribute value data package to the corresponding specific module entity in the design editing area in real time and automatically through a predefined data channel, driving the module to update its internal state and graphical representation according to the new parameters.

5. The software logic simulation and operation control method for an audio processor as described in claim 4, characterized in that, In S103, the device responds to the user's connection operation within the design editing area. When the user operates within the design editing area, the device automatically draws a directional connection line between the two pins, including: The user presses the mouse on the output pin of the source module and starts dragging. A temporary connection is generated in real time to follow the cursor's movement and the area the cursor passes through is continuously detected. When the cursor hovers over the input pin of the potential target module, the pin is highlighted to indicate that the connection can be completed by releasing the mouse. When the system detects that the user has released the mouse on the target input pin, it immediately responds to the action, first performing a signal type compatibility check. If the type matches, it formally draws a directional permanent connection line between the two pins and establishes a stable signal transmission channel internally. This channel represents the data flow of the digital logic signal, and this connection relationship is incorporated into the logic topology of the simulation circuit.

6. The software logic simulation and operation control method for an audio processor as described in claim 5, characterized in that, In S104, the internal logic function of the module is calculated, and a new output signal is generated based on its logic function. The output signal is automatically transmitted to the input pins of all downstream connected modules through the signal transmission channel, triggering a chain-like logic calculation process, including: The simulation engine in the logic simulation operation control device schedules and calculates the internal logic function of the affected module, performs its specific Boolean operation or signal processing, and generates a new output signal value based on the calculation result; The new output signal value is then written to the output pin and automatically and in parallel transmitted to the input pins of all connected downstream modules through the previously established signal transmission channel, thereby triggering the next level of chain logic calculation process. As the signal propagates through the topology network, the device assigns dynamic state attributes to each pin and renders them in real time. When an input or output pin receives a valid logic level, its graphical appearance immediately turns bright green. If there is no signal or a signal error is detected, it is displayed in gray or red, thus completing the signal propagation path and processing status in the entire logic circuit.

7. The software logic simulation and operation control method for an audio processor as described in claim 6, characterized in that, The new output signal value is then written to the output pin and automatically and in parallel transmitted to the input pins of all connected downstream modules through the previously established signal transmission channel, including: Once the new output signal value is calculated by the simulation engine, it is immediately written into the internal register of the corresponding output pin of the source module to update its electrical state. This state change event is captured by the device, indicating that the signal is ready for transmission. The device then activates all signal transmission channels connected to the output pin, and automatically distributes the new signal value as a data packet to the input pin of each downstream target module in a parallel and asynchronous manner. At the same time, this signal change event and the new topology state will be recorded in the project file in JSON or XML format, so that the file continuously and completely records the latest logic state and real-time topology connection relationship of the simulation circuit.

8. The software logic simulation and operation control method for an audio processor as described in claim 7, characterized in that, In S105, based on the file information, all module entities, connection lines, and circuit states are completely reconstructed in the design editing area, achieving lossless preservation and reuse of simulation operation control, including: The device reads and parses the locally stored project files, and extracts the structured data recorded in the files, such as module types, coordinate positions, attribute parameters, and connection relationships, through deserialization operations, in order to prepare data for reconstructing the visualization interface; Based on the parsed structured data, each module entity is instantiated one by one according to the record type and coordinates in the design editing area, and its saved attributes are loaded. According to the connection relationship data, the connection lines between the corresponding module pins are redrawn and the internal signal channels are established, accurately restoring all states of the entire simulation circuit and realizing lossless reconstruction from file to runtime environment.

9. A software logic simulation and operation control system in an audio processor, characterized in that, The software logic simulation operation control system is used to execute the software logic simulation operation control method according to any one of claims 1-8, wherein the software logic simulation operation control system comprises: The graphical interface generation module is used to receive the audio processor simulation run request sent by the user terminal, generate a graphical user interface including a logic module list area, a design editing area, an attribute bar and an information display area, and respond to the user's release action of dragging logic circuit component icons from the list area to the design editing area, and instantiate and generate graphical module entities at the corresponding positions. The attribute management module is used to automatically parse all configurable attributes of a module entity when the user selects it in the design editing area, generate an attribute editing form, and load it into the attribute bar for display. It captures the attribute modification operations performed by the user through the input controls in real time through an internal two-way data binding mechanism, and transmits the modified data to the corresponding module entity to trigger an update. The connection control module is used to respond to the user's connection operation in the design editing area, draw directional connection lines between the output pins of the source module and the input pins of the target module, establish an internal signal transmission channel, and perform signal type compatibility checks when establishing a connection; The simulation engine module is used to continuously monitor changes in the level signals of all pins. When a change in the input signal value is detected, it marks the event to be processed and schedules the internal logic function of the calculation module to generate a new output signal, which is then transmitted to the downstream connection module through the signal transmission channel to trigger the chain logic calculation process. The file management module is used to convert the types, locations, attribute parameters, and inter-module connections of all module entities in the design editing area into structured engineering files and store them in local non-volatile memory. It can also completely reconstruct all module entities, connection lines, and circuit states based on the file information.

10. The software logic simulation and operation control system in the audio processor as described in claim 9, characterized in that, The simulation engine module includes: The signal processing unit is used to write the calculated new output signal value into the internal register of the output pin of the source module, update the electrical state, and activate all connected signal transmission channels to distribute the signal value data packet to the input pin of the downstream target module in a parallel and asynchronous manner. The status rendering unit is used to assign dynamic status attributes to each pin and perform real-time rendering. When a pin receives a valid logic level, its appearance is highlighted in green. When there is no signal or a signal error, it is displayed in gray or red, thus dynamically visualizing the signal propagation and processing process.

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