Display device

By forming trenches on the substrate and mounting pixel driving circuits, and filling the gaps with inorganic and organic insulating layers, the step problem between the bending area and the display area in the display device is solved, achieving device thinning, process optimization and life extension, improving the transfer rate of microLEDs and reducing power consumption.

CN121152452APending Publication Date: 2025-12-16LG DISPLAY CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202510734985.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-07-22
Filing Date
2025-06-04
Publication Date
2025-12-16

AI Technical Summary

Technical Problem

Existing display devices suffer from reduced flatness due to steps between the curved area and the display area, and there are also flatness issues in the display area caused by the inflow of organic insulating material into the curved area, which affect the transfer rate of micro-LEDs and the lifespan of the display device.

Method used

Trenches are formed on the substrate and pixel driving circuits are installed in the trenches. Inorganic and organic insulating layers are used to fill the gaps, the planarization process is omitted, and an adhesive pattern is set to reduce defects caused by impurities, ensuring the flatness of the display area and the removal of bubbles.

Benefits of technology

This enables thinner display devices, optimizes manufacturing processes, reduces costs and time, improves the transfer rate of microLEDs, reduces defects, extends device lifespan, and lowers power consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121152452A_ABST
    Figure CN121152452A_ABST
Patent Text Reader

Abstract

A display apparatus is provided. The display device includes: a substrate; a display area; a non-display area outside the display area; a trench disposed in the display area; an inorganic insulating layer disposed in a region other than the trench in the display region; the pixel driving circuit is arranged in the groove; and a plurality of micro LEDs, wherein the micro LEDs are arranged on the pixel driving circuit and are electrically connected to the pixel driving circuit. Accordingly, the transfer rate of the micro-LED may be improved by securing the flatness of a region in which the pixel driving circuit is disposed over the substrate in the display area and a region surrounding the region.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit and priority of Korean Patent Application No. 10-2024-0077235, filed on June 13, 2024, and Korean Patent Application No. 10-2024-0096698, filed on July 22, 2024, the entire contents of each of which are incorporated herein by reference for all purposes. Technical Field

[0003] This invention relates to a display device. Background Technology

[0004] Display devices are used in a variety of electronic devices such as TVs, mobile phones, laptops, and tablets.

[0005] Display devices include self-emissive organic light-emitting display (OLED) devices and liquid crystal display (LCD) devices that require a separate light source.

[0006] Recently, display devices, including those using light-emitting diodes (LEDs), have been attracting attention as the next generation of display devices. Because LEDs are made of inorganic materials rather than organic materials, they offer faster illumination speeds and superior luminous efficiency compared to liquid crystal displays or organic light-emitting displays, and can display high-brightness images.

[0007] The description of related technologies should not be construed as prior art solely because of its reference in or association with this section. The description of related technologies includes information describing one or more aspects of the subject matter, and the description in this section does not limit the scope of the invention. Summary of the Invention

[0008] One aspect of the present invention is to provide a display device that achieves thinning.

[0009] Another aspect of the present invention is to provide a display device that can minimize or reduce the problem of reduced flatness of the display area caused by the inflow of organic insulating material disposed in the display area into the curved area by mitigating the step between the display area and the curved area.

[0010] Another aspect of the present invention is to provide a display device in which the transfer rate of a microLED is improved by ensuring the flatness of the region in the display area where the pixel driving circuit is disposed and the region surrounding the region.

[0011] Another aspect of the present invention is to provide a display device in which process optimization is achieved by omitting additional processes for ensuring the flatness of the display area, and wherein manufacturing processes and costs are reduced.

[0012] Another aspect of the present invention is to provide a display device having reduced defects caused by impurities.

[0013] Another aspect of the present invention is to provide a display device that minimizes or reduces potential defects and improves the lifespan of the display device by blocking bubbles around the pixel driving circuit, and can be driven at low power from the perspective of reducing production energy.

[0014] The invention is not limited to the aspects described above, and other aspects not mentioned above will be clearly understood by those skilled in the art from the following description.

[0015] A display device according to an exemplary embodiment of the present invention may include: a substrate; a display area; a non-display area outside the display area; a trench disposed in the display area; an inorganic insulating layer disposed in the area other than the trench in the display area; a pixel driving circuit disposed in the trench; and a plurality of microLEDs disposed on and electrically connected to the pixel driving circuit. Therefore, by ensuring the flatness of the area in the display area where the pixel driving circuit is disposed above the substrate and the area surrounding this area, the transfer rate of the microLEDs can be improved.

[0016] A display device according to another exemplary embodiment of the present invention may include: a substrate; a plurality of trenches disposed on the substrate; a plurality of pixel driving circuits disposed in each of the plurality of trenches on the substrate; a plurality of inorganic insulating layers configured to surround the plurality of pixel driving circuits while being spaced apart from the plurality of pixel driving circuits on the substrate; an organic insulating layer located on the plurality of inorganic insulating layers and the plurality of pixel driving circuits; and a plurality of microLEDs disposed on the organic insulating layer and electrically connected to the plurality of pixel driving circuits.

[0017] Further details of exemplary embodiments are included in the detailed description and accompanying drawings.

[0018] According to an exemplary embodiment of the present invention, by forming a trench in the substrate and mounting the pixel driving circuit in the trench, the components for planarizing the area where the pixel driving circuit is disposed and the area surrounding the area can be omitted, thereby achieving a thinner display device.

[0019] According to an exemplary embodiment of the present invention, process optimization and reduction of process cost and time can be achieved by omitting the additional process for planarizing the region where the pixel driving circuit is disposed and the region surrounding the region.

[0020] According to an exemplary embodiment of the present invention, by omitting the components used to flatten the area where the pixel driving circuit is disposed, the step between the curved area and the display area can be minimized or reduced, thereby minimizing or reducing the problem of reduced flatness of the display area due to the flow of organic insulating material disposed in the display area into the curved area.

[0021] According to an exemplary embodiment of the present invention, the transfer rate of microLEDs can be improved by ensuring the flatness of the upper part of the substrate in the display area.

[0022] According to an exemplary embodiment of the present invention, by providing a passivation layer made of organic insulating material to fill the gap between the pixel driving circuit and the trench, bubbles around the pixel driving circuit can be removed, thereby minimizing or reducing potential defects and improving the lifespan of the display device, thereby achieving low-power operation of the display device from the perspective of reducing production energy.

[0023] According to an exemplary embodiment of the present invention, by providing the adhesive pattern only in the trench of the substrate on which the pixel driving circuit is provided, defects caused by unnecessary impurities attached to the adhesive pattern can be minimized or reduced.

[0024] The effects of the present invention are not limited to those illustrated above; many more effects are included in the present invention.

[0025] Additional features, advantages, and aspects of the invention are set forth in part in the description which follows, and in part will become apparent from the disclosure of the invention, or may be learned by practice of the inventive concept provided herein. Other features, advantages, and aspects of the invention may be realized and obtained from the description provided in the disclosure of the invention, or derivatives thereof, the claims, and the drawings. All such features, advantages, and aspects are intended to be included in this specification, fall within the scope of the invention, and are protected by the appended claims. Nothing in this section should be considered as limiting the claims. Further aspects and advantages are discussed below in conjunction with embodiments of the invention.

[0026] It will be understood that the foregoing description and the following description of the invention are illustrative and intended to provide further explanation of the claimed invention. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate various aspects and embodiments of the invention and, together with the description, serve to explain the principles and examples of the invention. In the drawings:

[0028] Figure 1 This is an exploded perspective view of a display device according to an exemplary embodiment of the present invention;

[0029] Figure 2 This is a plan view of a display device according to an exemplary embodiment of the present invention;

[0030] Figure 3 This is an enlarged view of a display device according to an exemplary embodiment of the present invention;

[0031] Figure 4 This is a diagram illustrating the circuit structure according to an exemplary embodiment of the present invention;

[0032] Figure 5 This is a plan view of a display device according to an exemplary embodiment of the present invention;

[0033] Figure 6 This is a plan view of a display device according to an exemplary embodiment of the present invention;

[0034] Figure 7 This is a plan view of a display device according to an exemplary embodiment of the present invention;

[0035] Figure 8 It is along Figure 3 A sectional view taken by line VIII-VIII';

[0036] Figure 9 This is a cross-sectional view of a display device according to an exemplary embodiment of the present invention;

[0037] Figures 10A to 10C This is a process diagram of a method for manufacturing a display device according to an exemplary embodiment of the present invention;

[0038] Figures 11 to 14 This is a diagram illustrating the device to which the display device according to an exemplary embodiment of the present invention is applied.

[0039] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. Dimensions, lengths, and thicknesses of layers, regions, and elements, and their depiction, may be exaggerated for clarity, illustration, and / or convenience. Detailed Implementation

[0040] The advantages and features of the present invention, and the methods for achieving these advantages and features, are described below with reference to the appendix. Figure 1 The exemplary embodiments described in detail will make it clear. However, the invention is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. Exemplary embodiments are provided by way of example only so that those skilled in the art can fully understand the disclosure and scope of the invention.

[0041] The shapes, dimensions, proportions, angles, quantities, etc., shown in the accompanying drawings for the purpose of describing exemplary embodiments of the invention are merely examples, and the invention is not limited thereto. Similar reference numerals throughout the application generally denote similar elements. Furthermore, in the following description of the invention, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the invention. Terms such as “comprising,” “having,” and “including” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Any singular reference may include a plural unless explicitly stated otherwise. For example, an element may be one or more elements. An element may include multiple elements. The word “exemplary” is used to indicate as an example or illustration. An embodiment is an exemplary embodiment. An aspect is an exemplary aspect. In one or more embodiments, “embodiment,” “example,” “aspect,” etc., should not be construed as being superior or advantageous compared to other embodiments. Embodiment, example, exemplary embodiment, aspect, etc., may refer to one or more embodiments, one or more examples, one or more exemplary embodiments, one or more aspects, etc., unless otherwise specified. Furthermore, the term “may” encompasses all meanings of the term “can.”

[0042] The components are interpreted to include the normal error range, even if not explicitly stated.

[0043] When using terms such as “on top of,” “above,” “below,” and “after” to describe the positional relationship between two parts, one or more parts may be placed between the two parts, unless these terms are used with the terms “immediately following” or “directly.”

[0044] When using terms such as “after,” “successively,” “next,” and “before,” to describe a sequential relationship of time, this order may not be continuous unless these terms are used with the terms “immediately following” or “directly.”

[0045] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from other components. Therefore, within the scope of the present invention, the first component mentioned below can also be the second component.

[0046] In describing the components of the present invention, terms such as first, second, A, B, (a) or (b) may be used. These terms are intended only to distinguish a component from other components, and the nature, order, sequence, or number of components is not limited by these terms.

[0047] When a component is described as “connected,” “joined,” “combined,” or “attached” to another component, it should be understood that the component may be directly connected, joined, combined, or attached to the other component, but other components may also be inserted between components that may be indirectly connected, joined, combined, or attached, unless otherwise expressly indicated.

[0048] When a component or layer is described as overlapping another component or layer, it should be understood that the component or layer may directly contact or overlap the other component or layer, but other components may also be inserted between components that may indirectly overlap each other, unless otherwise specifically specified.

[0049] "At least one" should be understood as any combination of one or more of the relevant components. For example, "at least one of the first, second and third components" can be understood as any combination of two or more of the first, second and third components, as well as the first, second or third component.

[0050] The terms “first direction,” “second direction,” “third direction,” “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted as merely geometric relationships in which they are perpendicular to each other, but rather can refer to a wider range of directions within the scope of the functionality of the construction of this invention.

[0051] The features of the various embodiments of the present invention can be combined or integrated with each other in part or in whole, and can be interlocked and operated in various ways. The embodiments can be implemented independently of each other or implemented in conjunction with each other.

[0052] Hereinafter, a display device according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0053] Figure 1 This is a perspective view of a display device according to an exemplary embodiment of the present invention. Figure 2 This is a plan view of a display device according to an exemplary embodiment of the present invention. Figure 3 This is an enlarged view of a display device according to an exemplary embodiment of the present invention.

[0054] Reference Figures 1 to 3 According to an exemplary embodiment of the present invention, the display device 1000 may include a display panel 100, a polarizing layer 293, an adhesive layer 295, a cover member 120, a support substrate 170, a flexible circuit board FCB, and a printed circuit board 160.

[0055] For example, the display panel 100 of the display device 1000 may include a substrate 110. The substrate 110 may be a component supporting other components of the display device 1000. The substrate 110 may be made of an insulating material. For example, the substrate 110 may be made of glass, resin, or the like. Furthermore, the substrate 110 may be made of a flexible material. For example, the substrate 110 may be made of an organic insulating material such as polyimide (PI), which is a flexible plastic material. However, exemplary embodiments of the present invention are not limited thereto.

[0056] The display panel 100 can display information, video, and / or images provided to a user. For example, the display panel 100 may include a display area AA and a non-display area NA surrounding the display area AA. For example, the substrate 110 may include the display area AA and the non-display area NA. The display area AA and the non-display area NA are not limited to the substrate 110, but can be described throughout the entire display device 1000.

[0057] The display area AA can be the area where an image is displayed. The display area AA can include multiple pixels PX. Each of the multiple pixels PX can be composed of multiple sub-pixels. Multiple micro-LEDs can be disposed in each of the multiple sub-pixels.

[0058] The non-display area NA can be an area in which no image is displayed. Various wiring and circuits for driving the multiple pixels PX of the display area NA can be provided in the non-display area NA. For example, various wiring and driving circuits can be installed in the non-display area NA. For example, various wiring and driving circuits can be installed in the non-display area NA, and pad portions PADs connected to integrated circuits, printed circuits, etc. can be provided, but exemplary embodiments of the present invention are not limited thereto.

[0059] For example, the driving circuit may be a data driving circuit and / or a gate driving circuit, but exemplary embodiments of the present invention are not limited thereto. Wiring may be provided to which control signals for controlling the driving circuit are supplied. For example, the control signals may include various timing signals, including clock signals, input data enable signals, and synchronization signals, but exemplary embodiments of the present invention are not limited thereto. The control signals may be received via the pad portion PAD. For example, linkwirings LL for transmitting signals may be provided in the non-display area NA. For example, driving components such as flexible circuit boards FCB and printed circuit boards 160 may be connected to the pad portion PAD.

[0060] According to the present invention, the non-display area NA may include a first non-display area NA1, a curved area BA, and a second non-display area NA2. For example, the first non-display area NA1 may be a region surrounding at least a portion of the display area AA. The curved area BA is a region extending from at least one of a plurality of sides of the first non-display area NA1, and may be a flexible region. The second non-display area NA2 is a region extending from the curved area BA, and may have pad portions PAD disposed therein. For example, the curved area BA may be in a curved state, and the remaining area of ​​the substrate 110 other than the curved area BA may be in a flat state. In this case, as the curved area BA bends, the second non-display area NA2 may be located on the rear surface of the display area AA. However, exemplary embodiments of the present invention are not limited thereto.

[0061] The display area AA of the substrate 110 or the display device 1000 can be configured in various shapes according to the design of the display device 1000. For example, the display area AA can be configured as a rectangle with four corners formed in a rounded shape, but exemplary embodiments of the present invention are not limited thereto. As another example, the display area AA can be configured as a rectangle with four corners formed in a right angle, a circle, etc., but exemplary embodiments of the present invention are not limited thereto.

[0062] According to the present invention, the width of the second non-display area NA2, in which a plurality of pad electrodes PE are provided, can be greater than the width of the curved area BA, in which only a plurality of connection wirings LL are provided. Furthermore, the width of the display area AA, in which a plurality of sub-pixels are provided, can be greater than the width of the curved area BA, in which only a plurality of connection wirings LL are provided. In the accompanying drawings, the width of the curved area BA is illustrated as narrower than the width of other areas of the substrate 110; however, the shape of the substrate 110 including the curved area BA is exemplary, and the exemplary embodiments of the present invention are not limited thereto.

[0063] Reference Figure 3 Multiple pixel driving circuits (PDs) can be disposed in the display area AA. The multiple pixel driving circuits (PDs) can be circuits for driving multiple sub-pixels of micro-LEDs. Each of the multiple pixel driving circuits (PDs) includes multiple transistors containing driving transistors, storage capacitors, etc., and can control the light-emitting operation of the multiple micro-LEDs by providing control signals, power supplies, and driving currents to the multiple sub-pixel micro-LEDs. For example, the pixel driving circuit (PD) may include signal wiring and power wiring for controlling the light-emitting on / off and / or light-emitting time of the micro-LEDs. For example, the multiple pixel driving circuits (PDs) can be driving drivers manufactured on a semiconductor substrate using a metal-oxide-semiconductor field-effect transistor (MOSFET) manufacturing process, but exemplary embodiments of the present invention are not limited thereto. The driving driver includes multiple pixel driving circuits (PDs) and can drive multiple sub-pixels.

[0064] Refer to together Figure 1 The flexible circuit board (FCB) and the printed circuit board 160 may be disposed below the display panel 100. The FCB and the printed circuit board 160 may be disposed at least on one edge of the display panel 100, but exemplary embodiments of the present invention are not limited thereto. One side of the flexible circuit board FCB may be attached to the display panel 100, and the other side may be attached to the printed circuit board 160, but exemplary embodiments of the present invention are not limited thereto. The FCB may be a flexible film, but exemplary embodiments of the present invention are not limited thereto.

[0065] A pad portion PAD, including multiple pad electrodes PE, can be disposed in the second non-display area NA2. A driving assembly including one or more flexible circuit boards (or flexible films) FCB and printed circuit board 160 can be attached or bonded to the pad portion PAD. The multiple pad electrodes PE of the pad portion PAD are electrically connected to one or more flexible circuit boards (or flexible films) FCB and can transmit various signals (or power supplies) from the printed circuit board 160 and the flexible circuit board (or flexible film) FCB to multiple pixel driving circuits PD of the display area AA.

[0066] A flexible circuit board (or flexible film) FCB can be a film in which various components are disposed on a flexible base film. For example, a driver IC, such as a gate driver IC or a data driver IC, can be disposed on the flexible circuit board (or flexible film) FCB, but exemplary embodiments of the present invention are not limited thereto. The driver IC can be a component that processes drive signals and data for displaying images. The driver IC can be disposed in a manner such as chip-on-glass (COG), chip-on-film (COF), or tape-on-carrier (TCP) depending on the mounting method, but exemplary embodiments of the present invention are not limited thereto. The flexible circuit board (or flexible film) FCB can be attached or bonded to multiple pad electrodes PE via a conductive adhesive layer, but exemplary embodiments of the present invention are not limited thereto.

[0067] Printed circuit board 160 may be electrically connected to one or more flexible circuit boards (or flexible films) FCBs and may be a component that provides signals to a driver IC. Printed circuit board 160 may be disposed on one side of a flexible circuit board (or flexible film) FCB and may be electrically connected to the flexible circuit board (or flexible film) FCB. Various components for providing various signals to the driver IC may be disposed on printed circuit board 160. For example, various components such as timing controllers, power supplies, memory, or processors may be disposed on printed circuit board 160. For example, printed circuit board 160 may include a power management integrated circuit (PMIC), but exemplary embodiments of the invention are not limited thereto.

[0068] The printed circuit board 160 may include at least one hole 180, but exemplary embodiments of the present invention are not limited thereto. Internal components for detecting ambient light, temperature, etc., which can be provided to multiple sensors, may be disposed in the area corresponding to the at least one hole 180. For example, the internal components may include an ambient light sensor (ALS), a temperature sensor, etc., but exemplary embodiments of the present invention are not limited thereto. For example, the hole 180 may be a transparent hole, but exemplary embodiments of the present invention are not limited thereto.

[0069] Reference Figure 1 The polarization layer 293 can be disposed on the display panel 100. The polarization layer 293 can suppress or reduce the light generated from external light sources from entering the display panel 100 and affecting micro-LEDs, etc.

[0070] Cover member 120 may be disposed on polarizing layer 293. Cover member 120 may be a component for protecting display panel 100. Adhesive layer 295 may be disposed between polarizing layer 293 and cover member 120. Cover member 120 may be attached to display panel 100 using adhesive layer 295. Adhesive layer 295 may include optically clear adhesive (OCA), optically clear resin (OCR), pressure-sensitive adhesive (PSA), etc., but exemplary embodiments of the present invention are not limited thereto.

[0071] A support substrate 170 may be disposed between the display panel 100 and the printed circuit board 160. The support substrate 170 may enhance the rigidity of the display panel 100. The support substrate 170 may be a backplate, but exemplary embodiments of the present invention are not limited thereto.

[0072] Reference Figures 1 to 3 Multiple connection lines LL can be disposed on the non-display area NA. These connection lines LL can be wiring that transmits various signals from one or more flexible circuit boards (or flexible films) FCB and printed circuit board 160 to the display area AA. The connection lines LL can extend from multiple pad electrodes PE of the second non-display area NA2 towards the bending area BA and the first non-display area NA1, and can be electrically connected to multiple drive lines VL of the display area AA. Signals from one or more flexible circuit boards (or flexible films) FCB and printed circuit board 160 can be received via the drive lines VL of the display area AA and the connection lines LL of the non-display area NA, driving multiple pixel drive circuits PD.

[0073] For example, multiple drive lines VL can be used, together with multiple connection lines LL, to transmit signals output from the flexible circuit board (or flexible film) FCB and printed circuit board 160 to multiple pixel driving circuits PD. The multiple drive lines VL can be disposed in the display area AA and electrically connected to each of the multiple pixel driving circuits PD. The multiple drive lines VL can extend from the display area AA towards the non-display area NA and can be electrically connected to the multiple connection lines LL respectively. Therefore, signals output from the flexible circuit board (or flexible film) FCB and printed circuit board 160 can be transmitted to each of the multiple pixel driving circuits PD via the multiple connection lines LL and the multiple drive lines VL.

[0074] As the bending region BA bends, some of the multiple connecting wires LL may bend together. Stress concentrates on some of the bent connecting wires LL, which can cause cracks to appear in the connecting wires LL. Therefore, the multiple connecting wires LL can be made of a conductive material with excellent flexibility to reduce cracks when the bending region BA bends. For example, the multiple connecting wires LL can be made of conductive materials with excellent flexibility such as gold (Au), silver (Ag), and aluminum (Al), but exemplary embodiments of the present invention are not limited thereto. In addition, the multiple connecting wires LL can be made of one of the various conductive materials used in the display area AA. For example, the multiple connecting wires LL can be made of an alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), or an alloy thereof, but exemplary embodiments of the present invention are not limited thereto. The multiple connecting wires LL can be composed of a multilayer structure comprising various conductive materials. For example, the multiple connecting wires LL can be composed of a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but exemplary embodiments of the present invention are not limited thereto.

[0075] Multiple connecting wires LL can be configured in various shapes to reduce stress. At least some of the multiple connecting wires LL disposed on the bending region BA can extend in the same direction as the extension direction of the bending region BA, or can extend in a direction different from the extension direction of the bending region BA, thereby reducing stress. For example, when the bending region BA extends from the first non-display area NA1 to the second non-display area NA2 in one direction, at least some of the connecting wires LL disposed on the bending region BA can extend in a direction inclined to this direction. As another example, at least some of the multiple connecting wires LL can be configured as patterns of various shapes. For example, at least some of the multiple connecting wires LL disposed on the bending region BA can have the following shapes: wherein a conductive pattern having at least one of a diamond shape, rhombus shape, trapezoidal waveform, triangular waveform, sawtooth waveform, sine waveform, circle, and omega (Ω) shape is repeatedly disposed, but exemplary embodiments of the present invention are not limited thereto. Therefore, in order to minimize or reduce the stress concentrated on the multiple connecting wires LL and the resulting cracks, the shape of the multiple connecting wires LL can be formed in various shapes including the above-mentioned shapes, but exemplary embodiments of the present invention are not limited thereto.

[0076] Figure 4 This is a diagram illustrating the circuit structure according to an exemplary embodiment of the present invention.

[0077] The pixel driving circuit (PD) may include a micro-driver (μDriver). A micro-LED (ED) may be electrically connected to and driven by the micro-driver (μDriver) of the pixel driving circuit (PD). Figure 4 An example is shown of a micro LED connected to a micro driver (μDriver), but the invention is not limited thereto. For example, eight micro LEDs can be connected to one micro driver (μDriver). As another example, 16 micro LEDs can be connected to one micro driver (μDriver). Alternatively, 32 or 64 micro LEDs can be connected to one micro driver (μDriver) simultaneously.

[0078] A microdriver μDriver may include a driving transistor T DR and light-emitting transistor T EM However, the exemplary embodiments of the present invention are not limited thereto.

[0079] For example, a high-potential power supply voltage VDD can be applied to the driving transistor T. DR The first electrode, the light-emitting transistor T EM The first electrode can be connected to the driving transistor T DR The second electrode, the scan signal SC, can be applied to the driving transistor T. DR The gate of the driving transistor T. DRThe gate scan signal SC is a DC power supply, and a fixed reference voltage can be applied for each frame, but exemplary embodiments of the present invention are not limited thereto.

[0080] Drive transistor T DR The second electrode can be connected to the light-emitting transistor T. EM The first electrode, the micro LED ED, can be connected to the light-emitting transistor T. EM The second electrode allows the light-emitting signal EM to be applied to the light-emitting transistor T. EM The gate of the light-emitting transistor T. EM The light emission signal EM of the gate can be a pulse width modulation (PWM) signal that varies with each frame, but exemplary embodiments of the present invention are not limited thereto.

[0081] The first electrode of the micro LED can be connected to the light-emitting transistor T. EM The second electrode of the micro LED can be grounded. For example, the first electrode can be the anode and the second electrode can be the cathode, but exemplary embodiments of the present invention are not limited thereto.

[0082] Drive transistor T DR and light-emitting transistor T EM Each of them can be an n-type transistor or a p-type transistor.

[0083] Drive transistor T DR The light-emitting transistor T can be turned on by the scan signal SC applied from the timing controller to the micro-driver μDriver. EM It can be turned on by the light-emitting signal EM. Therefore, the drive current is applied to the drive transistor T. DR The high potential power supply voltage VDD of the first electrode is driven by transistor T. DR and light-emitting transistor T EM An energy source is applied to the microLED ED, which then emits light.

[0084] Figures 5 to 7 This is a plan view of a display device according to an exemplary embodiment of the present invention. For example, Figure 5 It is a magnified planar view of a display area that includes multiple pixels. For example, Figure 6 It is a magnified planar view that includes a display area of ​​one pixel. For example, Figure 7 It is a magnified planar view of a display area that includes multiple pixels. Figure 5 and 6 The illustration only shows multiple signal wirings TL, multiple communication wirings NL, multiple first electrodes CE1, multiple embankment BNK, and multiple micro LEDs ED, but the exemplary embodiments of the present invention are not limited thereto. Figure 7 It is additionally provided with multiple second electrodes CE2. Figure 5Enlarged plan view.

[0085] Reference Figure 5 and 6 Multiple pixels PX, consisting of multiple sub-pixels, can be disposed in the display area AA. Each of the multiple sub-pixels includes a micro-LED ED and can emit light independently. The multiple sub-pixels can be configured in a matrix form forming multiple rows and multiple columns, but exemplary embodiments of the present invention are not limited thereto.

[0086] Multiple sub-pixels may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, any one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be a red sub-pixel, another may be a green sub-pixel, and the remaining one may be a blue sub-pixel. The types of multiple sub-pixels are exemplary, and exemplary embodiments of the present invention are not limited thereto.

[0087] Each of a plurality of pixels PX may include one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, a pixel PX may include a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. A pair of first sub-pixels SP1 may be composed of first-1 sub-pixels SP1a and first-2 sub-pixels SP1b. A pair of second sub-pixels SP2 may be composed of second-1 sub-pixels SP2a and second-2 sub-pixels SP2b. A pair of third sub-pixels SP3 may be composed of third-1 sub-pixels SP3a and third-2 sub-pixels SP3b. For example, a pixel PX may include first-1 sub-pixels SP1a and first-2 sub-pixels SP1b, second-1 sub-pixels SP2a and second-2 sub-pixels SP2b, and third-1 sub-pixels SP3a and third-2 sub-pixels SP3b, but exemplary embodiments of the present invention are not limited thereto.

[0088] Multiple subpixels forming a pixel PX can be arranged in various ways. For example, in a pixel PX, a pair of first subpixels SP1 can be arranged in the same column, a pair of second subpixels SP2 can be arranged in the same column, and a pair of third subpixels SP3 can be arranged in the same column. The first subpixels SP1, second subpixels SP2, and third subpixels SP3 can be arranged in the same row. The number and arrangement of subpixels constituting a pixel PX are examples, and exemplary embodiments of the present invention are not limited thereto.

[0089] Multiple signal traces TL can be positioned in the region between multiple sub-pixels. Multiple signal traces TL can extend along the column direction between multiple sub-pixels. Multiple signal traces TL can be traces that transmit the anode voltage from the pixel driving circuit PD to the multiple sub-pixels. For example, multiple signal traces TL can be electrically connected to the first electrode CE1 of the multiple sub-pixels and the multiple pixel driving circuits PD. The anode voltage output from the pixel driving circuit PD can be transmitted to the first electrode CE1 of the multiple sub-pixels via the multiple signal traces TL. For example, the first electrode CE1 can be electrically connected to the anode 134 of the micro LED ED (see...). Figure 9 The electrode of the micro LED ED. Therefore, the anode voltage from the signal wiring TL can be transmitted to the anode 134 of the micro LED ED via the first electrode CE1.

[0090] Therefore, instead of forming multiple transistors and storage capacitors in each of the multiple sub-pixels, the structure of the display device 1000 can be simplified by employing a pixel drive circuit PD that integrates multiple pixel circuits. Furthermore, since the circuitry provided in each of the multiple sub-pixels is integrated into a single pixel drive circuit PD, high-efficiency and low-power driving is possible.

[0091] Multiple signal traces TL may include a first signal trace TL1, a second signal trace TL2, a third signal trace TL3, a fourth signal trace TL4, a fifth signal trace TL5, and a sixth signal trace TL6. Each of the first signal trace TL1 and the second signal trace TL2 is electrically connected to each of a pair of first sub-pixels SP1. Each of the third signal trace TL3 and the fourth signal trace TL4 is electrically connected to each of a pair of second sub-pixels SP2. Each of the fifth signal trace TL5 and the sixth signal trace TL6 is electrically connected to each of a pair of third sub-pixels SP3.

[0092] The first signal wiring TL1 can be disposed on one side of a pair of first sub-pixels SP1, and the second signal wiring TL2 can be disposed on the other side of the pair of first sub-pixels SP1. The first signal wiring TL1 can be electrically connected to either of the pair of first sub-pixels SP1, such as the first electrode CE1 of the first sub-pixel SP1a. The second signal wiring TL2 can be electrically connected to the other of the pair of first sub-pixels SP1, such as the first electrode CE1 of the first sub-pixel SP1b.

[0093] The third signal wiring TL3 can be disposed on one side of a pair of second sub-pixels SP2, and the fourth signal wiring TL4 can be disposed on the other side of the pair of second sub-pixels SP2. For example, the third signal wiring TL3 can be disposed adjacent to the second signal wiring TL2. The third signal wiring TL3 can be electrically connected to one of the pair of second sub-pixels SP2, such as the first electrode CE1 of the second-1st sub-pixel SP2a. The fourth signal wiring TL4 can be electrically connected to the other one of the pair of second sub-pixels SP2, such as the first electrode CE1 of the second-2nd sub-pixel SP2b.

[0094] The fifth signal wiring TL5 can be disposed on one side of a pair of third sub-pixels SP3, and the sixth signal wiring TL6 can be disposed on the other side of the pair of third sub-pixels SP3. For example, the fifth signal wiring TL5 can be disposed adjacent to the fourth signal wiring TL4. The sixth signal wiring TL6 can be disposed adjacent to the first signal wiring TL1 connected to the adjacent pixel PX. The fifth signal wiring TL5 can be electrically connected to one of the pair of third sub-pixels SP3, such as the first electrode CE1 of the 3-1st sub-pixel SP3a. The sixth signal wiring TL6 can be electrically connected to the other one of the pair of third sub-pixels SP3, such as the first electrode CE1 of the 3-2nd sub-pixel SP3b.

[0095] Multiple signal traces (TLs) can be made of conductive materials. For example, multiple signal traces (TLs) can be made of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc., but exemplary embodiments of the present invention are not limited thereto. As another example, multiple signal traces (TLs) can be composed of a multilayer structure of conductive materials. For example, multiple signal traces (TLs) can be composed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but exemplary embodiments of the present invention are not limited thereto.

[0096] Multiple communication lines NL can be disposed in the region between multiple pixels PX. The multiple communication lines NL can be configured to extend along the row direction in the region between multiple pixels PX. The multiple communication lines NL are disposed in the region between multiple second electrodes CE2 and may not overlap with the multiple second electrodes CE2. For example, the multiple communication lines NL can be wiring for short-range communication such as near-field communication (NFC). The multiple communication lines NL can be used as antennas. For example, the multiple communication lines NL can be multiple connection lines, etc., but exemplary embodiments of the present invention are not limited thereto.

[0097] According to the present invention, a plurality of embankment BNKs may be disposed on each sub-pixel. The plurality of embankment BNKs may be a structure on which a plurality of micro-LEDs are mounted. The plurality of embankment BNKs may guide the position of the plurality of micro-LEDs during the transfer process of transferring the plurality of micro-LEDs to the display device 1000. During the transfer process of the plurality of micro-LEDs, the plurality of micro-LEDs may be transferred onto the plurality of embankment BNKs. The plurality of embankment BNKs may be embankment patterns, structures, etc., but exemplary embodiments of the present invention are not limited thereto.

[0098] The dam portion BNK of the first sub-pixel SP1, the dam portion BNK of the second sub-pixel SP2, and the dam portion BNK of the third sub-pixel SP3 can be arranged at intervals. Alternatively, the dam portion BNK of the first sub-pixel SP1, the dam portion BNK of the second sub-pixel SP2, and the dam portion BNK of the third sub-pixel SP3 can be configured to be separate from each other. Therefore, it is easy to identify the dam portion BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 where different types of micro-LEDs are transferred.

[0099] The dam portions BNK of sub-pixels SP1a and SP1b can be connected to each other, or formed to be spaced apart or separated from each other. For example, considering design requirements such as transfer process requirements, the dam portions BNK of sub-pixels SP1a and SP1b, which are provided with the same micro-LEDs, can be connected to each other, or formed to be spaced apart or separated from each other. Furthermore, the dam portions BNK of sub-pixels SP2a and SP2b can be connected to each other, or formed to be spaced apart or separated from each other. The dam portions BNK of sub-pixels SP3a and SP3b can be connected to each other, or formed to be spaced apart or separated from each other. Therefore, the dam portions BNK of a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3 can be formed in various ways, and the exemplary embodiments of the present invention are not limited thereto.

[0100] For example, multiple dammed brick walls (BNKs) can be made of organic insulating materials. Multiple dammed brick walls (BNKs) can be composed of a single layer or multiple layers of organic insulating material. For example, multiple dammed brick walls (BNKs) can be made of photoresist, polyimide (PI), acrylic materials, etc., but exemplary embodiments of the present invention are not limited thereto.

[0101] A first electrode CE1 may be disposed on each of a plurality of sub-pixels. The first electrode CE1 may be disposed on a dam BNK. The first electrode CE1 may be electrically connected to one of a plurality of signal wirings TL. At least some of the first electrodes CE1 may extend outside the dam BNK and be electrically connected to the signal wiring TL adjacent to the first electrode CE1. For example, some of the first electrodes CE1 of sub-pixel SP1a may extend to a region on one side of sub-pixel SP1a and be electrically connected to the first signal wiring TL1; some of the first electrodes CE1 of sub-pixel SP1b may extend to a region on the other side of sub-pixel SP1b and be electrically connected to the second signal wiring TL2. Some of the first electrodes CE1 of sub-pixel SP2a may extend to a region on one side of sub-pixel SP2a and be electrically connected to the third signal wiring TL3; some of the first electrodes CE1 of sub-pixel SP2b may extend to a region on the other side of sub-pixel SP2b and be electrically connected to the fourth signal wiring TL4. Some of the first electrode CE1 of the 3-1 sub-pixel SP3a may extend to one side of the 3-1 sub-pixel SP3a and may be electrically connected to the fifth signal wiring TL5; some of the first electrode CE1 of the 3-2 sub-pixel SP3b may extend to the other side of the 3-2 sub-pixel SP3b and may be electrically connected to the sixth signal wiring TL6.

[0102] The first electrode CE1 can be disposed below the micro LED ED, electrically connected to the anode 134 of the micro LED ED, and can transmit the anode voltage from the pixel driving circuit PD to the micro LED ED via signal wiring TL. Different voltages can be applied to the first electrode CE1 of each of the plurality of sub-pixels according to the image to be displayed. For example, different voltages can be applied to the first electrode CE1 of each of the plurality of sub-pixels. Therefore, the first electrode CE1 can be a pixel electrode, and exemplary embodiments of the present invention are not limited thereto.

[0103] The first electrode CE1 may be made of a conductive material. For example, the first electrode CE1 may be integrally formed with multiple signal wirings TL. For example, the first electrode CE1 may be made of the same conductive material as the multiple signal wirings TL, but exemplary embodiments of the present invention are not limited thereto. For example, the first electrode CE1 may be made of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc., but exemplary embodiments of the present invention are not limited thereto. As another example, the first electrode CE1 may be composed of a multilayer structure of conductive material. For example, multiple first electrodes CE1 may be composed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but exemplary embodiments of the present invention are not limited thereto.

[0104] Micro-LEDs can be disposed in each of a plurality of sub-pixels. The plurality of micro-LEDs can be light-emitting diodes (LEDs) or micro-light-emitting diodes (micro-LEDs), but exemplary embodiments of the present invention are not limited thereto. The plurality of micro-LEDs can be disposed on the embankment BNK and the first electrode CE1. The plurality of micro-LEDs can be disposed on the first electrode CE1 and can be electrically connected to the first electrode CE1. Therefore, the micro-LEDs can receive the anode voltage from the pixel driving circuit PD via signal wiring TL and the first electrode CE1 to emit light.

[0105] Multiple microLEDs may include a first microLED 130, a second microLED 140, and a third microLED 150. The first microLED 130 may be disposed in a first sub-pixel SP1. The second microLED 140 may be disposed in a second sub-pixel SP2. The third microLED 150 may be disposed in a third sub-pixel SP3. For example, any one of the first microLED 130, the second microLED 140, and the third microLED 150 may be a red microLED, another may be a green microLED, and the remaining one may be a blue microLED, but exemplary embodiments of the present invention are not limited thereto. Therefore, red, green, and blue light emitted from multiple microLEDs can be combined to achieve light of various colors, including white. The type of multiple microLEDs is exemplary, and exemplary embodiments of the present invention are not limited thereto.

[0106] The first microLED 130 may include a first-1 microLED 130a disposed in the first-1 sub-pixel SP1a and a first-2 microLED 130b disposed in the first-2 sub-pixel SP1b. The second microLED 140 may include a second-1 microLED 140a disposed in the second-1 sub-pixel SP2a and a second-2 microLED 140b disposed in the second-2 sub-pixel SP2b. The third microLED 150 may include a third-1 microLED 150a disposed in the third-1 sub-pixel SP3a and a third-2 microLED 150b disposed in the third-2 sub-pixel SP3b.

[0107] Refer to together Figure 5 , 6 7. The second electrode CE2 can be disposed on each of the multiple sub-pixels. The second electrode CE2 can be disposed on the micro LED ED. The second electrode CE2 can be electrically connected to the pixel driving circuit PD via multiple contact electrodes CCE.

[0108] For example, the second electrode CE2 can be electrically connected to the cathode 135 of the micro LED ED (see...). Figure 9 The cathode voltage from the pixel driving circuit PD is transmitted to the micro LED ED. The same cathode voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels. For example, the same voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels and the cathode 135 of the micro LED ED. Therefore, the second electrode CE2 can be a common electrode, but exemplary embodiments of the present invention are not limited thereto.

[0109] At least some of a plurality of sub-pixels may share a second electrode CE2. At least some of the second electrodes CE2 of each of the plurality of sub-pixels may be electrically connected to each other. Since the same voltage is applied to the second electrodes CE2, the second electrodes CE2 of at least some sub-pixels may be shared. For example, the second electrodes of at least some pixels PX arranged in the same row may be connected to each other. For example, a second electrode CE2 may be provided in multiple pixels PX. One second electrode CE2 may be provided for every n sub-pixels.

[0110] For example, some of the second electrodes CE2 of each of the plurality of sub-pixels can be configured to be spaced apart or separated from each other. For example, the second electrode CE2 connected to pixel PX in row n and the second electrode CE2 connected to pixel PX in row n+1 can be configured to be spaced apart or separated from each other. For example, the plurality of second electrodes CE2 can be spaced apart from each other with multiple communication lines NL extending along the row direction interspersed therebetween. Therefore, the number of sub-pixels can be greater than the number of second electrodes CE2. As another example, all the second electrodes CE2 of the plurality of sub-pixels can be connected to each other, so that only one second electrode CE2 can be provided on the substrate 110, but exemplary embodiments of the present invention are not limited thereto.

[0111] Multiple second electrodes CE2 may be made of a transparent conductive material, but exemplary embodiments of the present invention are not limited thereto. The multiple second electrodes CE2 may be made of a transparent conductive material so that light emitted from the micro-LED ED can be guided towards the upper part of the second electrodes CE2. For example, the second electrodes CE2 may be made of transparent conductive materials such as indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but exemplary embodiments of the present invention are not limited thereto.

[0112] Multiple contact electrodes CCE may be disposed on the substrate 110. For example, the multiple contact electrodes CCE may be configured to be spaced apart from multiple embankments BNK and multiple signal traces TL. Each of the multiple second electrodes CE2 may overlap with at least one contact electrode CCE. For example, one second electrode CE2 may overlap with multiple contact electrodes CCE.

[0113] For example, multiple contact electrodes CCE can be electrically connected to multiple second electrodes CE2. The multiple contact electrodes CCE can be disposed between the substrate 110 and the multiple second electrodes CE2 to deliver the cathode voltage from the pixel driving circuit PD to the second electrodes CE2.

[0114] For example, when microLEDs are used as microLED EDs, multiple microLEDs can be formed on a wafer, and the microLEDs can be transferred to the substrate 110 of the display device 1000 to manufacture the display device 1000. Various defects can occur during the process of transferring multiple microLED EDs with micro-sized dimensions from the wafer to the substrate 110. For example, in some sub-pixels, non-transfer defects may occur, where no microLED EDs are transferred; in some other sub-pixels, defects may occur where the microLED EDs are not transferred to their correct positions due to alignment errors. Furthermore, even if the transfer process is performed normally, the transferred microLED EDs themselves may be defective. Therefore, during the process of transferring multiple microLED EDs, considering defects, multiple identical microLED EDs can be transferred to a single sub-pixel. Illumination tests of multiple microLED EDs can be performed, and only one microLED ED that is ultimately determined to be normal can be used.

[0115] For example, microLED 1-1 130a and microLED 1-2 130b can be transferred together to a pixel PX to test whether they are defective. If both microLED 1-1 130a and microLED 1-2 130b are determined to be normal, only microLED 1-1 130a can be used, and microLED 1-2 130b can be omitted. As another example, when only microLED 1-2 130b is determined to be normal, microLED 1-1 130a can be omitted, and only microLED 1-2 130b can be used. Therefore, even if multiple identical microLEDs are transferred to a pixel PX, only one microLED can ultimately be used.

[0116] Therefore, either one of a pair of microLEDs can be the primary (or main) microLED, and the other microLED can be a redundant microLED. The redundant microLED can be a backup microLED prepared to be transferred in response to defects in the primary microLED. In the event of a defect in the primary microLED, the redundant microLED can be used as a replacement. Therefore, by transferring both the primary and redundant microLEDs together to a single pixel (PX), the degradation in display quality caused by defects in both the primary and redundant microLEDs can be minimized or reduced.

[0117] For example, the first-1 microLED 130a, the second-1 microLED 140a, and the third-1 microLED 150a transferred to a pixel PX can be used as main microLED EDs, and the first-2 microLED 130b, the second-2 microLED 140b, and the third-2 microLED 150b can be used as redundant microLED EDs.

[0118] Figure 8 It is along Figure 3 A sectional view taken from line VIII-VIII'. Figure 9 This is a cross-sectional view of a display device according to an exemplary embodiment of the present invention. Figure 8 This is a cross-sectional view of a display device according to an exemplary embodiment of the present invention. For example, Figure 8 This is a cross-sectional view of the display area AA, the first non-display area NA1, the curved area BA, and the second non-display area NA2. For example, Figure 9 This is an enlarged cross-sectional view of the first subpixel. Also, for ease of illustration, in... Figure 3 In the diagram, the cut lines VIII-VIII', as well as the drive wiring VL and the connection wiring LL, are shown as not overlapping, but Figure 3 The cutting line VIII-VIII' is intended to indicate the same position as the adjacent drive wiring VL and connection wiring LL.

[0119] Reference Figure 8 The substrate 110 may include trenches G. Trench G is a mounting location for pixel driving circuits PD, and may be disposed within a display area AA in which the pixel driving circuits PD are disposed. Since multiple pixel driving circuits PD are disposed on the substrate 110, multiple trenches G may also be provided for mounting multiple pixel driving circuits PD.

[0120] Simultaneously, the trench G can be formed by partially removing the substrate 110 in the thickness direction. Therefore, the thickness of the substrate 110 in the region overlapping with the trench G can be thicker than the thickness of the substrate 110 in the remaining regions. The width of the trench G can be greater than the width of the pixel driving circuit PD, thereby allowing the pixel driving circuit PD to be mounted, but is not limited thereto.

[0121] Pixel driving circuits PD can be disposed on trenches G in display area AA. Specifically, each of the plurality of pixel driving circuits PD can be disposed on each of the plurality of trenches G. Pixel driving circuits PD can be fixed to trenches G by adhesive pattern Adh. When pixel driving circuits PD are implemented as driving drivers, driving drivers can be mounted on trenches G of substrate 110 by transfer process, but exemplary embodiments of the present invention are not limited thereto.

[0122] An adhesive pattern Adh may be disposed on the substrate 110. Specifically, the adhesive pattern Adh may be disposed between the substrate 110 and the pixel driving circuit PD to fix the pixel driving circuit PD in the trench G. The adhesive pattern Adh may be disposed only in the minimum area required to suppress unwanted impurities from adhering to the adhesive pattern Adh during the process. For example, the adhesive pattern Adh may be disposed only in the trench G in which the pixel driving circuit PD is disposed. The adhesive pattern Adh may be disposed only in the trench G in which the pixel driving circuit PD is disposed, and only in a portion of the display area AA, but is not limited thereto. The width of the adhesive pattern Adh may be the same as the width of the trench G, but is not limited thereto.

[0123] The adhesive pattern Adh can be made of an organic insulating material. For example, the adhesive pattern Adh can be made of any of the following: adhesive polymers, epoxy resins, UV-curable resins, polyimide series, acrylate series, polyurethane series, and polydimethylsiloxane PDMS, but exemplary embodiments of the present invention are not limited thereto.

[0124] Meanwhile, the adhesive pattern Adh can be disposed on the substrate 110 and can be in direct contact with the substrate 110. As described above, both the adhesive pattern Adh and the substrate 110 can be made of organic insulating material. Therefore, since the adhesive pattern Adh and the substrate 110 are made of the same series of materials and are in contact with each other, the adhesive strength between the adhesive pattern Adh and the substrate 110 can be improved.

[0125] The first buffer layer 111a and the second buffer layer 111b may be disposed in the remaining areas of the substrate 110 except for the bending region BA.

[0126] The first buffer layer 111a and the second buffer layer 111b can be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2.

[0127] Specifically, the first buffer layer 111a and the second buffer layer 111b can be disposed in a region other than the trench G of the substrate 110 in the display area AA. That is, the first buffer layer 111a and the second buffer layer 111b can be disposed around the region in the display area AA where the trench G is disposed, and can be disposed around the pixel driving circuit PD disposed in the trench G.

[0128] Meanwhile, the first buffer layer 111a and the second buffer layer 111b can be disposed in areas other than the trench G, and can be disposed on relatively thicker areas of the substrate 110. Therefore, the first buffer layer 111a and the second buffer layer 111b can be disposed at a position relatively higher than the adhesive pattern Adh disposed in the trench G (which is a relatively thin area of ​​the substrate 110), but are not limited thereto.

[0129] Therefore, the bottom surfaces of the first buffer layer 111a and the second buffer layer 111b can be located at a higher position than the bottom surface of the pixel driving circuit PD on the adhesive pattern Adh in the trench G, but are not limited thereto.

[0130] The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be made of an inorganic insulating material and can be referred to as inorganic insulating layers. The adhesive pattern Adh can be configured to be spaced apart from the inorganic insulating layers. For example, the first buffer layer 111a and the second buffer layer 111b can be composed of a single layer or multiple layers of silicon oxide SiOx or silicon nitride SiNx, but exemplary embodiments of the present invention are not limited thereto.

[0131] For example, the first buffer layer 111a and the second buffer layer 111b on the bending region BA can be partially removed. The top surface of the substrate 110 located in the bending region BA can be exposed from the first buffer layer 111a and the second buffer layer 111b. By removing the first buffer layer 111a and the second buffer layer 111b, which are made of inorganic insulating material, from the bending region BA, cracks that may occur in the first buffer layer 111a and the second buffer layer 111b during bending can be minimized or reduced.

[0132] Multiple alignment keys MK may be disposed between the first buffer layer 111a and the second buffer layer 111b. The multiple alignment keys MK may be configured to identify the location of the pixel driving circuit PD during the manufacturing process of the display device 1000. For example, the multiple alignment keys MK may be configured to align the location of the pixel driving circuit PD transferred on the trench G of the substrate 110. In another example, the multiple alignment keys MK may be omitted.

[0133] For example, a plurality of alignment marks MK may be disposed on the first buffer layer 111a. In this case, since the first buffer layer 111a on which the plurality of alignment marks MK are disposed is disposed in a relatively thick region on the substrate 110, and compared with the pixel driving circuit PD disposed in the trench G which is a relatively thin region, the bottom surface of the plurality of alignment marks MK may be disposed at a relatively higher position than the bottom surface of the pixel driving circuit PD, but is not limited thereto.

[0134] According to the present invention, a plurality of first connection wirings 121 may be disposed on the second buffer layer 111b in the display area AA. The plurality of first connection wirings 121 may be wirings for electrically connecting a pixel driving circuit PD to other components. For example, the pixel driving circuit PD may be electrically connected to a plurality of signal wirings TL, a plurality of contact electrodes CCE, etc., via the plurality of first connection wirings 121. For example, the plurality of first connection wirings 121 may include first-1 connection wiring 121a, first-2 connection wiring 121b, first-3 connection wiring 121c, and first-4 connection wiring 121d, but exemplary embodiments of the present invention are not limited thereto.

[0135] For example, multiple first-1 connection wires 121a may be disposed on and in contact with the second buffer layer 111b. The multiple first-1 connection wires 121a may be electrically connected to the pixel driving circuit PD. The multiple first-1 connection wires 121a may transmit the voltage output from the pixel driving circuit PD to the first electrode CE1 or the second electrode CE2.

[0136] For example, the protective layer 112 may be disposed on the first buffer layer 111a, the second buffer layer 111b, and the pixel driving circuit PD. The protective layer 112 may be disposed on the entire display area AA and the non-display area NA.

[0137] The protective layer 112 may be made of an organic insulating material. For example, the protective layer 112 may be made of photoresist, polyimide (PI), photo acrylic-based materials, etc., but exemplary embodiments of the present invention are not limited thereto. Therefore, the protective layer 112 may be referred to as an organic insulating layer, but is not limited thereto.

[0138] Simultaneously, a portion of the protective layer 112 may be configured to extend into the trench G. Specifically, a portion of the protective layer 112 may be configured to fill the gap in the trench G between the pixel driving circuit PD and the first buffer layer 111a and the second buffer layer 111b. Therefore, a portion of the protective layer 112 may be configured to remove air bubbles in the trench G between the pixel driving circuit PD and the first buffer layer 111a and the second buffer layer 111b, and surround the side surface of the pixel driving circuit PD, thereby fixing and protecting the pixel driving circuit PD.

[0139] Furthermore, a portion of the protective layer 112 can contact the adhesive pattern Adh in the trench G. Since both the protective layer 112 and the adhesive pattern Adh can be made of organic insulating materials, the adhesive strength between the protective layer 112 and the adhesive pattern Adh can be improved. Therefore, the pixel drive circuit PD can be more effectively fixed by the adhesive pattern Adh disposed in the trench G.

[0140] Multiple first-second connection wires 121b may be disposed on the protective layer 112. These first-second connection wires 121b may be indirectly or directly connected to the pixel driving circuit PD. For example, a portion of the first-second connection wires 121b may be directly connected to the pixel driving circuit PD via contact holes in the protective layer 112. Another portion of the first-second connection wires 121b may be electrically connected to the first-first connection wire 121a via contact holes in the protective layer 112. However, exemplary embodiments of the present invention are not limited thereto. The voltage output from the pixel driving circuit PD may be transmitted to the first electrode CE1 or the second electrode CE2 via the first-second connection wires 121b and other connection wires.

[0141] The first insulating layer 113a may be disposed on multiple first-second connection wires 121b. The first insulating layer 113a may be disposed throughout the entire display area AA and the non-display area NA, but exemplary embodiments of the present invention are not limited thereto. The first insulating layer 113a may be made of an organic insulating material, but exemplary embodiments of the present invention are not limited thereto. For example, the first insulating layer 113a may be made of photoresist, polyimide (PI), optical acrylic-based materials, etc., but exemplary embodiments of the present invention are not limited thereto. Therefore, the first insulating layer 113a may be referred to as a first organic insulating layer, but is not limited thereto.

[0142] Multiple first-to-third connection wires 121c may be disposed on the first insulating layer 113a. The multiple first-to-third connection wires 121c may be electrically connected to multiple first-to-second connection wires 121b. For example, the first-to-third connection wires 121c may be electrically connected to the first-to-second connection wires 121b through contact holes in the first insulating layer 113a.

[0143] The second insulating layer 113b may be disposed on multiple first-to-third connection wirings 121c. The second insulating layer 113b may be disposed in areas other than the bending region BA, but exemplary embodiments of the present invention are not limited thereto. The second insulating layer 113b may be disposed in the display region AA, the first non-display region NA1, and the second non-display region NA2, but exemplary embodiments of the present invention are not limited thereto. For example, the second insulating layer 113b disposed in the bending region BA may be partially removed. The second insulating layer 113b may be made of an organic insulating material, but exemplary embodiments of the present invention are not limited thereto. For example, the second insulating layer 113b may be made of photoresist, polyimide PI, optical acrylic-based materials, etc., but exemplary embodiments of the present invention are not limited thereto. Therefore, the second insulating layer 113b may be referred to as a second organic insulating layer, but is not limited thereto.

[0144] Multiple first-to-fourth connection wires 121d may be disposed on the second insulating layer 113b. The multiple first-to-fourth connection wires 121d may be electrically connected to multiple first-to-third connection wires 121c. For example, the first-to-fourth connection wires 121d may be electrically connected to the first-to-third connection wires 121c through contact holes in the second insulating layer 113b.

[0145] According to the present invention, a plurality of second connection wirings 122 may be disposed on a second buffer layer 111b in the non-display area NA. The plurality of second connection wirings 122 may be for connecting the flexible circuit board (or flexible film) FCB and the printed circuit board 160 (see...) Figure 1 The signal transmitted to the pad PAD is routed to the pixel drive circuit PD of the display area AA. For example, multiple second connection lines 122 can be electrically connected to multiple pad electrodes PE to receive signals from the flexible circuit board (or flexible film) FCB and the printed circuit board.

[0146] For example, multiple second connection lines 122 may extend from the pad portion PAD toward the display area AA to transmit signals to the display area AA. In this case, the multiple second connection lines 122 may be used as connection lines LL. The multiple second connection lines 122 may include second-1 connection line 122a, second-2 connection line 122b, second-3 connection line 122c, and second-4 connection line 122d.

[0147] Multiple second-first connection lines 122a may be disposed on the second buffer layer 111b. These multiple second-first connection lines 122a may extend from the second non-display area NA2 to the bending area BA and the first non-display area NA1. Therefore, the second-first connection lines 122a may contact the first buffer layer 111a and the second buffer layer 111b in the display area AA, the first non-display area NA1, and the second non-display area NA2, and may contact the substrate 110 in the bending area BA, but are not limited thereto. The multiple second-first connection lines 122a may transmit signals from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 to the pad portion PAD to the pixel driving circuit PD in the display area AA. For example, the second-first connection wiring 122a extends from the second non-display area NA2 to the first non-display area NA1, and can be electrically connected to any one of the first-first connection wiring 121a, the first-second connection wiring 121b, the first-third connection wiring 121c, and the first-fourth connection wiring 121d. For example, the second-first connection wiring 122a can be directly connected to the first-first connection wiring 121a disposed on the same layer, or it can be connected to the first-second connection wiring 121b disposed on a different layer through the contact hole of the protective layer 112, but is not limited thereto.

[0148] Multiple second-second connection wires 122b may be disposed on the protective layer 112. Multiple second-second connection wires 122b may be disposed in the second non-display area NA2. The second-second connection wires 122b may be electrically connected to the second-first connection wire 122a through contact holes in the third protective layer 112. Therefore, signals from the flexible circuit board (or flexible film) FCB and the printed circuit board can be transmitted to the second-first connection wire 122a via the second-second connection wires 122b.

[0149] The second-third connection wiring 122c can be disposed on the first insulating layer 113a. The second-third connection wiring 122c can be disposed in the second non-display area NA2. The second-third connection wiring 122c can be electrically connected to the second-second connection wiring 122b through the contact hole of the first insulating layer 113a. Therefore, signals from the flexible circuit board (or flexible film) PCB and the printed circuit board can be transmitted to the second-first connection wiring 122a through the second-third connection wiring 122c and the second-second connection wiring 122b.

[0150] The second-fourth connection wiring 122d can be disposed on the second insulating layer 113b. The second-fourth connection wiring 122d can be disposed in the second non-display area NA2. The second-fourth connection wiring 122d can be electrically connected to the second-third connection wiring 122c through the contact hole of the second insulating layer 113b. Therefore, signals from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 can be transmitted to the second-first connection wiring 122a through the second-fourth connection wiring 122d, the second-third connection wiring 122c, and the second-second connection wiring 122b.

[0151] The plurality of first connection wires 121 and the plurality of second connection wires 122 may be made of a conductive material with excellent flexibility or any of a variety of conductive materials used in the display area AA. For example, the second connection wires 122 (a portion of which is disposed in the bending area BA) may be formed of a conductive material with excellent flexibility such as gold (Au), silver (Ag), or aluminum (Al), but exemplary embodiments of the present invention are not limited thereto. As another example, the plurality of first connection wires 121 and the plurality of second connection wires 122 may be made of an alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), or an alloy thereof, but exemplary embodiments of the present invention are not limited thereto.

[0152] The third insulating layer 113c may be disposed on multiple first connecting wires 121 and multiple second connecting wires 122. The third insulating layer 113c may be disposed in areas other than the bending region BA, but exemplary embodiments of the present invention are not limited thereto. The third insulating layer 113c may be disposed in the display region AA, the first non-display region NA1, and the second non-display region NA2. The third insulating layer 113c in the bending region BA may be partially removed. The third insulating layer 113c may be made of an organic insulating material, but exemplary embodiments of the present invention are not limited thereto. For example, the third insulating layer 113c may be made of photoresist, polyimide PI, optical acrylic-based materials, etc., but exemplary embodiments of the present invention are not limited thereto. Therefore, the third insulating layer 113c may be referred to as a third organic insulating layer, but is not limited thereto.

[0153] The number of insulating layers disposed in the curved area BA may be less than the number of insulating layers disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. For example, the first insulating layer 113a may be disposed in all of the display area AA, the first non-display area NA1, the curved area BA, and the second non-display area NA2. On the other hand, the second insulating layer 113b and the third insulating layer 113c may be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2, excluding the curved area BA. Therefore, the height of the insulating layer disposed in the curved area BA may be relatively lower than the height in the areas excluding the curved area BA, but is not limited thereto.

[0154] Multiple dammed pixels (BNKs) may be disposed on the third insulating layer 113c in the display area AA. The multiple dammed pixels (BNKs) may be configured to overlap with each of the multiple sub-pixels. One or more identical micro-LEDs (EDs) may be disposed above each of the multiple dammed pixels (BNKs).

[0155] Multiple signal traces TL can be disposed on the third insulating layer 113c in the display area AA. Multiple signal traces TL can be disposed in the area between multiple dikes BNK. For example, multiple signal traces TL can be disposed adjacent to any one of the multiple dikes BNK.

[0156] Multiple contact electrodes CCE can be disposed on the third insulating layer 113c in the display area AA. The multiple contact electrodes CCE can provide the cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0157] The first electrode CE1 may be disposed on the embankment BNK. For example, the first electrode CE1 may be configured to extend from the adjacent signal wiring TL toward the upper part of the embankment BNK. The first electrode CE1 may be disposed on the top surface and the side surface of the embankment BNK. For example, the first electrode CE1 may be configured to extend from the signal wiring TL on the top surface of the third insulating layer 113c to the side surface and the top surface of the embankment BNK.

[0158] Reference Figure 9 The first electrode CE1 may be composed of multiple conductive layers. For example, the first electrode CE1 may include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but the exemplary embodiments of the present invention are not limited thereto.

[0159] A first conductive layer CE1a may be disposed on the embankment BNK. A second conductive layer CE1b may be disposed on the first conductive layer CE1a. A third conductive layer CE1c may be disposed on the second conductive layer CE1b, and a fourth conductive layer CE1d may be disposed on the third conductive layer CE1c. For example, each of the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d may be made of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but exemplary embodiments of the present invention are not limited thereto.

[0160] According to the present invention, some of the conductive layers with high reflectivity among the plurality of conductive layers constituting the first electrode CE1 can be configured as alignment marks and / or reflectors for aligning the micro-LED ED. For example, the second conductive layer CE1b among the plurality of conductive layers of the first electrode CE1 may include a reflective material. For example, the second conductive layer CE1b may include aluminum (Al), but exemplary embodiments of the present invention are not limited thereto. Therefore, the second conductive layer CE1b can be configured as a reflector. Furthermore, due to the high reflectivity of the second conductive layer CE1b, it can be easily identified in the manufacturing process, and thus the position or transfer position of the micro-LED ED can be aligned based on the second conductive layer CE1b.

[0161] For example, to configure the second conductive layer CE1b as a reflector, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, the third conductive layer CE1c and the fourth conductive layer CE1d disposed on the embankment BNK can be partially removed or etched to expose the top surface of the second conductive layer CE1b. For example, the central and corner (or edge) portions of the solder pattern SDP in the third conductive layer CE1c and the fourth conductive layer CE1d can be left unetched, and the remaining portions can be removed. For example, the corner (or edge) portions of the fourth conductive layer CE1d made of indium tin oxide (ITO) and the third conductive layer CE1c made of titanium (Ti) can be left unetched, respectively. Therefore, the other conductive layers of the first electrode CE1 can be prevented from being etched by the tetramethylammonium hydroxide (TMAH) solution used in the masking process of the first electrode CE1.

[0162] According to the present invention, the first conductive layer CE1a and the third conductive layer CE1c may comprise titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b may comprise aluminum (Al). The fourth conductive layer CE1d may comprise a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the solder pattern SDP, corrosion resistance, and acid resistance. However, exemplary embodiments of the present invention are not limited thereto.

[0163] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be deposited sequentially and then patterned by performing photolithography and etching processes, but the exemplary embodiments of the present invention are not limited thereto.

[0164] According to the present invention, the signal wiring TL, contact electrode CCE, and pad electrode PE disposed on the same layer as the first electrode CE1 can be composed of multilayer conductive materials, but the exemplary embodiments of the present invention are not limited thereto. For example, the signal wiring TL, contact electrode CCE, and pad electrode PE can be composed of multilayers of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the exemplary embodiments of the present invention are not limited thereto.

[0165] According to the present invention, a solder pattern SDP can be disposed on a first electrode CE1 in each of a plurality of sub-pixels. The solder pattern SDP can electrically connect the first electrode CE1 and the micro-LED ED by bonding the micro-LED ED to the first electrode CE1. For example, the first electrode CE1 and the anode 134 of the micro-LED ED can be electrically connected by eutectic bonding using the solder pattern SDP, but exemplary embodiments of the present invention are not limited thereto. For example, when the solder pattern SDP is made of indium (In) and the anode 134 of the micro-LED ED is made of gold (Au), the solder pattern SDP and the anode 134 can be bonded by applying heat and pressure during the transfer process of the micro-LED ED. Through eutectic bonding, the micro-LED ED can be bonded to the solder pattern SDP and the first electrode CE1 without a separate adhesive. For example, the solder pattern SDP can be made of indium (In), tin (Sn) or alloys thereof, but exemplary embodiments of the present invention are not limited thereto. For example, the solder pattern SDP can be a bonding pad, a solder pad, etc., but exemplary embodiments of the present invention are not limited thereto.

[0166] According to the present invention, a passivation layer 114 may be disposed on multiple signal traces TL, multiple first electrodes CE1, multiple contact electrodes CCE, and a third insulating layer 113c. For example, the passivation layer 114 may be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. The passivation layer 114 disposed in the bending area BA may be partially removed. The passivation layer 114 covering the multiple pad electrodes PE in the second non-display area NA2 may be partially removed. Since the passivation layer 114 is configured to cover the area other than the area where the bending area BA, the multiple pad electrodes PE, and the solder pattern SDP are disposed, the penetration of moisture or impurities into the micro LED ED can be reduced. For example, the passivation layer 114 may be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but exemplary embodiments of the present invention are not limited thereto. For example, the passivation layer 114 may be a passivation layer, an insulating layer, etc., but exemplary embodiments of the present invention are not limited thereto. For example, the passivation layer 114 may include holes exposing the solder pattern SDP.

[0167] Micro-LEDs can be disposed on the solder pattern SDP in each of multiple sub-pixels. A first micro-LED 130 can be disposed in the first sub-pixel SP1. A second micro-LED 140 can be disposed in the second sub-pixel SP2. A third micro-LED 150 can be disposed in the third sub-pixel SP3.

[0168] Micro LEDs can be formed on silicon wafers by methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but exemplary embodiments of the present invention are not limited thereto.

[0169] Reference Figure 9 The first microLED 130 may include an anode 134, a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, a cathode 135, and an encapsulation film 136, but exemplary embodiments of the present invention are not limited thereto. For example, the encapsulation film 136 may not be included in the first microLED 130.

[0170] The first semiconductor layer 131 may be disposed on the solder pattern SDP. The second semiconductor layer 133 may be disposed on the first semiconductor layer 131.

[0171] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a compound semiconductor of group III-V, group II-VI, etc., and may be doped with impurities or dopants. For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a semiconductor layer doped with n-type impurities, and the other may be a semiconductor layer doped with p-type impurities, but exemplary embodiments of the present invention are not limited thereto. For example, at least one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a layer in which n-type or p-type impurities are doped in a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs), but exemplary embodiments of the present invention are not limited thereto. For example, n-type impurities can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), tin (Sn), etc., but the exemplary embodiments of the present invention are not limited thereto. For example, p-type impurities can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), beryllium (Be), etc., but the exemplary embodiments of the present invention are not limited thereto.

[0172] For example, the first semiconductor layer 131 and the second semiconductor layer 133 may be a nitride semiconductor including n-type impurities and a nitride semiconductor including p-type impurities, respectively, but the exemplary embodiments of the present invention are not limited thereto. For example, the first semiconductor layer 131 may be a nitride semiconductor including p-type impurities, and the second semiconductor layer 133 may be a nitride semiconductor including n-type impurities, but the exemplary embodiments of the present invention are not limited thereto.

[0173] An active layer 132 may be disposed between a first semiconductor layer 131 and a second semiconductor layer 133. The active layer 132 may receive holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133 and emit light. For example, the active layer 132 may be configured as one of a single-well structure, a multi-well structure, a single quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but exemplary embodiments of the present invention are not limited thereto. For example, the active layer 132 may be configured as indium gallium nitride (InGaN), gallium nitride (GaN), etc., but exemplary embodiments of the present invention are not limited thereto.

[0174] As another example, the active layer 132 may include a multiple quantum well (MQW) structure, which includes a well layer and a blocking layer having a higher bandgap than the well layer. For example, the active layer 132 may be composed of an InGaN layer as the well layer and an AlGaN layer as the blocking layer, but exemplary embodiments of the present invention are not limited thereto.

[0175] An anode 134 may be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode 134 may be electrically connected to the first semiconductor layer 131 and the first electrode CE1. The anode voltage output from the pixel driving circuit PD may be applied to the first semiconductor layer 131 through signal wiring TL, the first electrode CE1, and the anode 134. For example, the anode 134 may be made of a conductive material capable of eutectic bonding with the solder pattern SDP, but exemplary embodiments of the present invention are not limited thereto. For example, the anode 134 may be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), copper (Cu), and their alloys, but exemplary embodiments of the present invention are not limited thereto.

[0176] A cathode 135 may be disposed on the second semiconductor layer 133. For example, the cathode 135 may be electrically connected to the second semiconductor layer 133 and the second electrode CE2. The cathode voltage output from the pixel driving circuit PD may be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode 135. The cathode 135 may be made of a transparent conductive material, such that light emitted from the micro LED ED can be guided towards the upper part of the micro LED ED, but exemplary embodiments of the present invention are not limited thereto. For example, the cathode 135 may be made of materials such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but exemplary embodiments of the present invention are not limited thereto.

[0177] An encapsulation film 136 may be disposed on at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, and the cathode 135. For example, the encapsulation film 136 may surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, and the cathode 135. For example, the encapsulation film 136 may protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation film 136 may be disposed on the side surface of the first semiconductor layer 131, the side surface of the active layer 132, and the side surface of the second semiconductor layer 133.

[0178] For example, the encapsulation film 136 may be disposed on at least a portion of the anode 134 and the cathode 135, such as on the edge portion (or corner portion or side) of the anode 134 and the edge portion (or corner portion or side) of the cathode 135. At least a portion of the anode 134 may be exposed from the encapsulation film 136, such that the anode 134 and the solder pattern SDP can be connected. For example, at least a portion of the cathode 135 may be exposed from the encapsulation film 136, such that the cathode 135 and the second electrode CE2 can be connected. For example, the encapsulation film 136 may be made of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but exemplary embodiments of the invention are not limited thereto.

[0179] As another example, the encapsulation film 136 may have a structure in which reflective material is dispersed in a resin layer, but exemplary embodiments of the invention are not limited thereto. For example, the encapsulation film 136 may be manufactured as a reflector of various structures, but exemplary embodiments of the invention are not limited thereto. Light emitted from the active layer 132 through the encapsulation film 136 can be reflected upwards, thereby improving light extraction efficiency. For example, the encapsulation film 136 may be a reflective layer, but exemplary embodiments of the invention are not limited thereto. According to the invention, the microLED ED is described as having a vertical structure, but exemplary embodiments of the invention are not limited thereto. For example, the microLED ED may have a lateral structure or a flip-chip structure.

[0180] Although it has been referenced Figure 9 The first microLED 130 has been described, but the second microLED 140 and the third microLED 150 may have substantially the same structure as the first microLED 130. For example, the second microLED 140 and the third microLED 150 may have substantially the same structure as the first semiconductor layer 131, active layer 132, second semiconductor layer 133, anode 134, cathode 135 and encapsulation film 136 of the first microLED 130.

[0181] According to the present invention, the first optical layer 115a may be configured to surround a plurality of micro-LEDs ED in the display area AA. For example, the first optical layer 115a may be configured to cover a plurality of micro-LEDs ED and a dam BNK in a region of a plurality of sub-pixels. For example, the first optical layer 115a may cover between the dam BNK, a portion of the passivation layer 114, and the plurality of micro-LEDs ED. The first optical layer 115a may be disposed or covered between a plurality of micro-LEDs ED included in a pixel PX and a plurality of dam BNK. For example, the first optical layer 115a may extend in the row direction and be configured to be spaced apart from each other in the column direction. For example, the first optical layer 115a may be configured to surround the dam BNK located between the passivation layer 114 and the second electrode CE2 and the sides of the micro-LEDs ED, but exemplary embodiments of the present invention are not limited thereto. For example, the first optical layer 115a may be a diffusion layer, a sidewall diffusion layer, etc., but exemplary embodiments of the present invention are not limited thereto.

[0182] The first optical layer 115a may comprise an organic insulating material having fine particles dispersed therein, but exemplary embodiments of the present invention are not limited thereto. For example, the first optical layer 115a may be made of a siloxane having fine metal particles, such as titanium dioxide (TiO2) particles dispersed therein, but exemplary embodiments of the present invention are not limited thereto. Light from the multiple micro-LEDs can be scattered and emitted to the outside of the display device 1000 by the fine particles dispersed in the first optical layer 115a. Therefore, the first optical layer 115a can improve the extraction efficiency of light emitted from the multiple micro-LEDs.

[0183] For example, the first optical layer 115a may be disposed on each of the plurality of pixels PX, or may be disposed together on some pixels PX located in the same row, but exemplary embodiments of the present invention are not limited thereto. For example, the first optical layer 115a may be disposed on each pixel of the plurality of pixels PX, or the plurality of pixels PX may share a first optical layer 115a. As another example, each of the plurality of sub-pixels may separately include the first optical layer 115a, but exemplary embodiments of the present invention are not limited thereto.

[0184] According to the present invention, the second optical layer 115b may be disposed on the passivation layer 114 in the display area AA. For example, the second optical layer 115b may be configured to surround the first optical layer 115a. For example, the second optical layer 115b may be in contact with the side surface of the first optical layer 115a. For example, the second optical layer 115b may be disposed in the region between a plurality of pixels PX. However, exemplary embodiments of the present invention are not limited thereto. For example, the second optical layer 115b may be a diffusion layer, a diffusion layer window, a window diffusion layer, etc., but exemplary embodiments of the present invention are not limited thereto.

[0185] The second optical layer 115b may be made of an organic insulating material, but exemplary embodiments of the present invention are not limited thereto. The second optical layer 115b may be made of the same material as the first optical layer 115a, but exemplary embodiments of the present invention are not limited thereto. For example, the first optical layer 115a may include fine particles, and the second optical layer 115b may not include fine particles. For example, the second optical layer 115b may be made of siloxane, but exemplary embodiments of the present invention are not limited thereto.

[0186] For example, the thickness of the first optical layer 115a may be less than the thickness of the second optical layer 115b, but exemplary embodiments of the present invention are not limited thereto. Therefore, when viewed from a plan view, the area where the first optical layer 115a is disposed may include a recessed portion that is further recessed inward compared to the top surface of the second optical layer 115b.

[0187] According to the present invention, the second electrode CE2 may be disposed on the first optical layer 115a and the second optical layer 115b. For example, the second electrode CE2 may be electrically connected to a plurality of contact electrodes CCE through contact holes in the second optical layer 115b. For example, the second electrode CE2 may be disposed on a plurality of micro LEDs ED. For example, the second electrode CE2 may comprise a transparent conductive oxide, such as indium tin oxide (ITO) or indium zinc oxide (IZO), but exemplary embodiments of the present invention are not limited thereto. For example, the second electrode CE2 may be configured to contact the cathode 135. For example, the second electrode CE2 may overlap with the first optical layer 115a. For example, the second electrode CE2 may cover a flat surface on the outer side of the first optical layer 115a.

[0188] The second electrode CE2 can extend continuously in a first direction of the substrate 110. Therefore, the second electrode CE2 can be connected to a plurality of pixels PX arranged along the first direction of the substrate 110. For example, the second electrode CE2 can be connected to a plurality of pixels PX.

[0189] According to the present invention, the second electrode CE2 may extend continuously on the first optical layer 115a, the second optical layer 115b, and the micro LED ED. The region where the first optical layer 115a is disposed may include a recessed portion that is further recessed inward compared to the top surface of the second optical layer 115b. Therefore, the first portion of the second electrode CE2 disposed on the first optical layer 115a is disposed along the recessed portion, and thus can be disposed at a lower position than the second portion of the second electrode CE2 disposed on the second optical layer 115b.

[0190] A third optical layer 115c may be disposed on the second electrode CE2. The third optical layer 115c may be configured to overlap with the plurality of micro-LEDs and the first optical layer 115a. Since the third optical layer 115c is disposed above the second electrode CE2 and the plurality of micro-LEDs, it can improve the appearance of mura on some of the micro-LEDs. For example, when the plurality of micro-LEDs are transferred onto the substrate 110 of the display device 1000, areas of uneven spacing between the micro-LEDs may appear due to process variations, etc. When the spacing between the micro-LEDs is uneven, the light-emitting area of ​​each of the micro-LEDs may be unevenly distributed, thus allowing the user to see mura. Therefore, since a third optical layer 115c is formed to uniformly diffuse light over the plurality of micro-LEDs, the visibility of light emitted from some micro-LEDs as mura can be reduced. Therefore, since the light emitted from multiple micro LEDs is uniformly diffused by the third optical layer 115c and extracted to the outside of the display device 1000, the brightness uniformity of the display device 1000 can be improved.

[0191] The third optical layer 115c may be made of an organic insulating material in which fine particles are dispersed, but exemplary embodiments of the present invention are not limited thereto. For example, the third optical layer 115c may be made of a siloxane having fine metal particles, such as titanium dioxide (TiO2) particles dispersed therein, but exemplary embodiments of the present invention are not limited thereto. For example, the third optical layer 115c may be made of the same material as the first optical layer 115a, but exemplary embodiments of the present invention are not limited thereto. For example, the third optical layer 115c may be a diffusion layer or a top surface diffusion layer, but exemplary embodiments of the present invention are not limited thereto.

[0192] According to the present invention, light from multiple micro-LEDs can be scattered by fine particles dispersed in the third optical layer 115c and emitted to the outside of the display device 1000. The third optical layer 115c can uniformly mix the light emitted from the multiple micro-LEDs, thereby further improving the brightness uniformity of the display device 1000. In addition, the light extraction efficiency of the display device 1000 can be improved by the light scattered from the multiple fine particles, thus enabling the display device 1000 to be driven with low power.

[0193] A black matrix BM can be disposed on the second electrode CE2, the first optical layer 115a, the second optical layer 115b, and the third optical layer 115c in the display area AA. For example, the black matrix BM can fill the contact holes of the second optical layer 115b. Since the black matrix BM is configured to cover the display area AA, color mixing of light from multiple sub-pixels and external light reflection can be reduced. For example, since the black matrix BM is also disposed within the contact holes connecting the second electrode CE2 and the contact electrode CCE, light leakage between multiple adjacent sub-pixels can be suppressed. For example, the black matrix BM can be made of an opaque material, but exemplary embodiments of the present invention are not limited thereto. For example, the black matrix BM can be an organic insulating material with added black pigment or black dye, but exemplary embodiments of the present invention are not limited thereto.

[0194] A cover layer 116 may be disposed on the black matrix BM in the display area AA. The cover layer 116 protects the components beneath it. For example, the cover layer 116 may be made of an organic insulating material, but exemplary embodiments of the present invention are not limited thereto. For example, the cover layer 116 may be made of a photoresist, polyimide (PI), optical acrylic-based materials, etc., but exemplary embodiments of the present invention are not limited thereto. For example, the cover layer 116 may be an overcoating layer or an insulating layer, but exemplary embodiments of the present invention are not limited thereto.

[0195] The polarizing layer 293 may be disposed on the cover layer 116 via the first adhesive layer 291. The cover member 120 may be disposed on the polarizing layer 293 via the second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 may include optically transparent adhesive (OCA), optically transparent resin (OCR), pressure-sensitive adhesive (PSA), etc., but exemplary embodiments of the present invention are not limited thereto.

[0196] According to the present invention, a plurality of pad electrodes PE may be disposed on a third insulating layer 113c in a second non-display area NA2. For example, at least some of the plurality of pad electrodes PE may be exposed from a passivation layer 114. For example, the plurality of pad electrodes PE may be electrically connected to the second-fourth connection wiring 122d through contact holes in the third insulating layer 113c.

[0197] An adhesive layer (anisotropic conductive film) ACF can be disposed on multiple pad electrodes PE. The adhesive layer ACF can be an adhesive layer in which conductive balls are dispersed in an insulating material, but exemplary embodiments of the present invention are not limited thereto. When heat or pressure is applied to the adhesive layer ACF, the conductive balls can be electrically connected at the portions where heat or pressure is applied, thus exhibiting conductive properties. Multiple pad electrodes PE can be attached or bonded to a flexible circuit board (or flexible film) FCB by providing the adhesive layer ACF between the multiple pad electrodes PE and the flexible circuit board (or flexible film) FCB. For example, the adhesive layer ACF can be an anisotropic conductive film ACF, but exemplary embodiments of the present invention are not limited thereto.

[0198] A flexible circuit board (or flexible film) FCB can be disposed on an adhesive layer ACF. The flexible circuit board (or flexible film) FCB can be electrically connected to multiple pad electrodes PE through the adhesive layer ACF. Therefore, signals output from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 can be transmitted to the pixel driving circuit PD of the display area AA through multiple pad electrodes PE, second-4 connection wiring 122d, second-3 connection wiring 122c, second-2 connection wiring 122b, and second-1 connection wiring 122a.

[0199] In display devices, a pixel driving circuit, including a micro-driver, can be positioned below a micro-LED to drive it. In this case, since the micro-LED is positioned above the pixel driving circuit, the flatness of the lower portion of the micro-LED is important for proper micro-LED transfer. That is, the flatness of the upper portion of the pixel driving circuit can affect the transfer rate of the micro-LED. Therefore, to planarize the upper portion of the substrate, multiple organic insulating layers can be provided around the pixel driving circuit, and these organic insulating layers can be set to be at least as thick as the pixel driving circuit.

[0200] Simultaneously, to ensure minimal visibility of the non-display area to the user, narrow bezels are implemented in various ways, such as bending a portion of the non-display area towards the rear surface of the display area. That is, the non-display area may include a curved area bent towards the rear surface of the display panel. In this case, multiple organic insulating layers can be partially removed from the curved area to alleviate bending stress. Therefore, the number of organic insulating layers in the display area can be greater than the number in the curved area, and the height of the organic insulating layers in the display area can be greater than the height of the organic insulating layers in the curved area. Thus, depending on the difference in the number of organic insulating layers, steps may appear in the display area and the curved area. In this case, the following phenomenon may occur: during the manufacturing process of the display device, the pre-cured organic insulating layer flows from the display area to the curved area based on the steps. Therefore, differences in flatness on the upper part of the organic insulating layer may appear between areas adjacent to the curved area and areas separated from the curved area by a considerable distance.

[0201] In a display device according to an exemplary embodiment of the present invention, the substrate 110 and the first buffer layer 111a and the second buffer layer 111b disposed on the substrate 110 can be partially removed to mount the pixel driving circuit PD. Therefore, the substrate 110 may include a trench G disposed in the display area AA, and the pixel driving circuit PD may be disposed in the trench G of the substrate 110. That is, since the pixel driving circuit PD is mounted in the trench G of the substrate 110, the substrate 110 can accommodate a pixel driving circuit PD as deep as the trench G. Therefore, in the display area AA where the pixel driving circuit PD is disposed, components for planarizing the area where the pixel driving circuit PD is disposed and the area surrounding this area can be omitted or minimized. Therefore, in the display device 1000 according to an exemplary embodiment of the present invention, the display device 1000 can be thinned. Furthermore, since the additional processes for planarizing the area where the pixel driving circuit PD is disposed in the display area AA and the area surrounding this area can be omitted, process costs and time can be reduced.

[0202] Furthermore, in the display device 1000 according to an exemplary embodiment of the present invention, by omitting the components used for planarizing the display area AA, the step between the display area AA and the curved area BA can be minimized or reduced. Therefore, the problem that organic insulating material constituting the layers (e.g., protective layer 112, first insulating layer 113a, second insulating layer 113b, and third insulating layer 113c) provided on the substrate 110 in the display area AA flows into the curved area BA due to the step between the display area AA and the curved area BA can be suppressed. Therefore, the phenomenon of reduced flatness of the display area AA can be suppressed. In other words, in the display device 1000 according to an exemplary embodiment of the present invention, the flatness of the lower part of the micro-LED ED in the display area AA can be ensured to improve the transfer rate of the micro-LED ED.

[0203] Simultaneously, an adhesive layer can be disposed between the substrate and the pixel driving circuit to fix the pixel driving circuit onto the substrate. In this case, when the adhesive layer is disposed on the entire substrate, impurities can adhere to areas other than the area where the pixel driving circuit is disposed during the process. Furthermore, when multiple organic insulating layers are disposed simultaneously with the adhering impurities, the deterioration of the flatness of the upper parts of the multiple organic insulating layers can be further aggravated. Therefore, the following problem exists: an additional impurity removal process must be performed to suppress the adhesion of impurities.

[0204] Therefore, in the display device 1000 according to an exemplary embodiment of the present invention, the adhesive pattern Adh for fixing the pixel driving circuit PD to the substrate 110 can be provided only in the necessary minimum area (e.g., the trench G of the substrate 110). Thus, unnecessary impurities adhering to the adhesive pattern Adh can be minimized or reduced, thereby suppressing flatness degradation due to impurities. Furthermore, since the process for removing impurities can be omitted, manufacturing processes and costs can be reduced.

[0205] Figures 10A to 10C This is a process diagram of a method for manufacturing a display device according to an exemplary embodiment of the present invention. Figures 10A to 10C For ease of description, the illustration of the second non-display area NA2 within the non-display area NA is omitted.

[0206] Reference Figure 10AAfter sequentially depositing the substrate 110, the first buffer layer 111a, and the second buffer layer 111b, the substrate 110, the first buffer layer 111a, and the second buffer layer 111b can be partially etched to mount the pixel driving circuit PD. Therefore, trenches G can be formed in the substrate 110, and the first buffer layer 111a and the second buffer layer 111b can each be spaced apart from each other based on the trenches G. That is, the first buffer layer 111a and the second buffer layer 111b can be disposed only in the area other than the trenches G. Simultaneously, since multiple pixel driving circuits PD are disposed on the substrate 110, multiple trenches G can also be formed. In this case, the width of the trenches G can be greater than the width of the pixel driving circuit PD, allowing the pixel driving circuit PD to be mounted.

[0207] After partially etching the substrate 110, the first buffer layer 111a, and the second buffer layer 111b, an adhesive pattern Adh can be disposed on the substrate 110. In this case, the adhesive pattern Adh can be disposed only in the minimum area required to adhere and fix the pixel driving circuit PD to the substrate 110, and the adhesion of unnecessary impurities is suppressed. Therefore, the adhesive pattern Adh can be disposed only in the trench G of the substrate 110. Therefore, the width of the adhesive pattern Adh can be the same as the width of the trench G.

[0208] In this case, since the adhesive pattern Adh and the substrate 110, which are in contact with each other, are both made of organic insulating material, the bonding force between the adhesive pattern Adh and the substrate 110 can be improved.

[0209] Meanwhile, the adhesive pattern Adh is disposed in the trench G of the substrate 110, that is, in a relatively thin region on the substrate 110, and may be disposed at a position relatively lower than the first buffer layer 111a and the second buffer layer 111b disposed in the region on the substrate 110 other than the trench G, but is not limited thereto.

[0210] Next, refer to Figure 10B The pixel driving circuit PD can be disposed in the trench G. Specifically, multiple pixel driving circuits PD can be disposed in each of the multiple trenches G. At the same time, the pixel driving circuit PD is disposed in the trench G of the substrate 110, that is, in a relatively thin region on the substrate 110, such that the bottom surface of the pixel driving circuit PD can be disposed at a lower position than the bottom surfaces of the first buffer layer 111a and the second buffer layer 111b disposed in the region on the substrate 110 other than the trench G, but is not limited thereto.

[0211] Furthermore, the height of the top surface of the pixel driving circuit PD and the second buffer layer 111b is shown as being set on the same plane in the figure, but is not limited thereto. The height of the top surface of the pixel driving circuit PD can be designed in various ways according to the depth of the trench G.

[0212] Meanwhile, since the width of the trench G is greater than or equal to the width of the pixel driving circuit PD, even if the pixel driving circuit PD is disposed in the trench G, a blank space can be generated inside the trench G. For example, the first buffer layer 111a and the second buffer layer 111b are configured to surround the area in the display area AA where the trench G is disposed. Therefore, the pixel driving circuit PD can be configured to be spaced apart from the first buffer layer 111a and the second buffer layer 111b. Thus, a gap can be generated between the pixel driving circuit PD and the first buffer layer 111a and the second buffer layer 111b, but it is not limited to this.

[0213] Next, refer to Figure 10C Various components, including the protective layer 112, can be sequentially disposed on the first buffer layer 111a, the second buffer layer 111b, and the pixel driving circuit PD, thereby completing the manufacturing process of the display device 1000.

[0214] Specifically, the protective layer 112 can be disposed in the gap between the first buffer layer 111a and the second buffer layer 111b in the trench G and the pixel driving circuit PD. Therefore, air bubbles in the gap between the first buffer layer 111a and the second buffer layer 111b in the trench G and the pixel driving circuit PD can be removed. Furthermore, the protective layer 112 can be configured to surround the side surface of the pixel driving circuit PD in the trench G to fix and passivate the pixel driving circuit PD. In this case, a portion of the protective layer 112 can contact the adhesive pattern Adh in the trench G, and since both the protective layer 112 and the adhesive pattern Adh are made of organic insulating material, the pixel driving circuit PD can be fixed more effectively.

[0215] Figures 11 to 14 This is a diagram illustrating the device to which the display device according to an exemplary embodiment of the present invention is applied.

[0216] Reference Figures 11 to 14 The display device 1000 according to an exemplary embodiment of the present invention may be included in various devices or electronic devices. For example, refer to Figures 11 to 14 Various electronic devices may include wearable devices 1100, mobile devices 1200, laptops 1300, and monitors or TVs 1400, but exemplary embodiments of the present invention are not limited thereto.

[0217] Each of the wearable device 1100, mobile device 1200, laptop computer 1300, and monitor or TV 1400 may include housing portions 1005, 1010, 1015, and 1020, and according to Figures 1 to 10C The display panel 100 and display device 1000 of the present invention are described in the exemplary embodiments of the present invention.

[0218] For example, the display device according to exemplary embodiments of the present invention can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, bending devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation systems, vehicle display devices, cinema display devices, televisions, wallpaper devices, signage devices, game consoles, laptops, monitors, cameras, portable cameras, home appliances, etc.

[0219] Exemplary embodiments of the present invention can also be described as follows:

[0220] According to one aspect of the present invention, a display device is provided. The display device includes: a substrate; a display area; a non-display area outside the display area; a trench disposed in the display area; an inorganic insulating layer disposed in a region other than the trench in the display area; a pixel driving circuit disposed in the trench; and a plurality of micro light-emitting diodes (microLEDs) disposed on and electrically connected to the pixel driving circuit.

[0221] The width of the trench may be greater than or equal to the width of the pixel driving circuit.

[0222] The display device may further include an adhesive pattern disposed between a substrate and a pixel driving circuit in the trench. The width of the adhesive pattern may be the same as the width of the trench.

[0223] The adhesive pattern can be made of organic insulating material.

[0224] The adhesive pattern may be spaced apart from the inorganic insulating layer.

[0225] The display device may further include a protective layer disposed on the inorganic insulating layer and the pixel driving circuit. A portion of the protective layer may be disposed in the trench.

[0226] The pixel driving circuit and the inorganic insulating layer may be spaced apart from each other. A portion of the protective layer may be disposed between the pixel driving circuit and the inorganic insulating layer within the trench.

[0227] The portion of the protective layer may come into contact with the adhesive pattern.

[0228] The protective layer may be made of organic insulating materials.

[0229] The display device may further include a plurality of first connection wires disposed on the inorganic insulating layer and electrically connected to the pixel driving circuit. Some of the plurality of first connection wires may contact the inorganic insulating layer.

[0230] The non-display area may include a first non-display area, a curved area extending from the first non-display area, and a second non-display area extending from the curved area. The display device may also include a plurality of second connection wires disposed in the display area and non-display area on the substrate and electrically connected to the pixel driving circuit. Some of the plurality of second connection wires may contact the inorganic insulating layer in the display area, the first non-display area, and the second non-display area, and may contact the substrate in the curved area.

[0231] The display device may further include a plurality of organic insulating layers disposed on the substrate in the display area and the non-display area. The number of the plurality of organic insulating layers disposed in the bending area may be less than the number of the plurality of organic insulating layers disposed in the display area, the first non-display area, and the second non-display area.

[0232] The height of the bottom surface of the pixel driving circuit can be lower than the height of the bottom surface of the inorganic insulating layer.

[0233] The plurality of microLEDs may include an anode, a first semiconductor layer disposed on the anode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode disposed on the second semiconductor layer.

[0234] The display device may further include: a first electrode disposed below a plurality of microLEDs to electrically connect the pixel driving circuit and the anodes of the plurality of microLEDs; and a solder pattern disposed between the first electrode and the anodes. The first electrode and the anodes may be electrically connected by eutectic bonding using the solder pattern.

[0235] The width of the second non-display area may be greater than the width of the curved area, and the width of the display area may be greater than the width of the curved area.

[0236] Both the adhesive pattern and the substrate can be made of organic insulating materials.

[0237] The height of the organic insulating layer disposed in the bending region may be lower than the height of the organic insulating layer disposed in areas other than the bending region.

[0238] The display device may further include a plurality of alignment marks disposed on the inorganic insulating layer. The bottom surface of the plurality of alignment marks may be disposed at a position higher than the bottom surface of the pixel driving circuit.

[0239] The plurality of organic insulating layers may include: a first insulating layer disposed throughout the display area and the non-display area; a second insulating layer disposed on the first insulating layer, the second insulating layer being disposed in the remaining area except for the bending area; and a third insulating layer disposed on the second insulating layer, the third insulating layer being disposed on the second connecting wire and being disposed in the area except for the bending area.

[0240] The display device may further include: a passivation layer disposed on the protective layer; a first optical layer disposed on the passivation layer and surrounding a plurality of microLEDs in the display area; a second optical layer disposed on the passivation layer in the display area and surrounding the first optical layer; and a third optical layer overlapping the plurality of microLEDs and the first optical layer. The third optical layer may be made of the same organic insulating material as the first optical layer.

[0241] According to another aspect of the present invention, a display device is provided. The display device includes: a substrate; a plurality of trenches disposed on the substrate; a plurality of pixel driving circuits disposed in each of the plurality of trenches on the substrate; a plurality of inorganic insulating layers configured to surround the plurality of pixel driving circuits while being spaced apart from them on the substrate; an organic insulating layer located on the plurality of inorganic insulating layers and the plurality of pixel driving circuits; and a plurality of microLEDs disposed on the organic insulating layer and electrically connected to the plurality of pixel driving circuits.

[0242] The display device may further include an adhesive pattern disposed between the plurality of pixel driving circuits and the substrate. The adhesive pattern may be disposed only in a plurality of trenches on the substrate.

[0243] The height of the adhesive pattern may be lower than the height of the plurality of inorganic insulating layers.

[0244] A portion of the organic insulating layer may be configured to fill the gaps between the plurality of inorganic insulating layers and the plurality of pixel driving circuits located in the plurality of trenches.

[0245] A portion of the organic insulating layer may be configured to surround the side surface of the plurality of pixel driving circuits.

[0246] The plurality of inorganic insulating layers may include a first inorganic insulating layer and a second inorganic insulating layer disposed on the first inorganic insulating layer. The display device may further include alignment marks disposed between the first and second inorganic insulating layers. The height of the bottom surface of the alignment marks may be higher than the height of the bottom surface of the plurality of pixel driving circuits.

[0247] The plurality of microLEDs may include an anode, a first semiconductor layer disposed on the anode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode disposed on the second semiconductor layer, and may have a vertical structure.

[0248] The display device may further include: a first electrode disposed below the plurality of microLEDs; and a solder pattern disposed between the first electrode and the anode. The anode may be bonded to the first electrode by eutectic bonding using the solder pattern.

[0249] Both the adhesive pattern and the substrate can be made of organic insulating materials.

[0250] A portion of the organic insulating layer may contact the adhesive pattern of one of the plurality of trenches.

[0251] The adhesive pattern can be made of organic insulating material.

[0252] Although exemplary embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and can be implemented in many different forms without departing from the inventive concept. Therefore, the exemplary embodiments of the present invention are provided for illustrative purposes only and are not intended to limit the inventive concept. The scope of the inventive concept is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are exemplary in all respects and do not limit the present invention. All inventive concepts within the equivalent scope of the present invention should be interpreted as falling within the scope of the present invention.

Claims

1.A display apparatus comprising: a substrate; a display area; a non-display area outside of the display area; a trench disposed in the display area; an inorganic insulating layer disposed in an area other than the trench in the display area; a pixel driving circuit disposed in the trench; and a plurality of micro light emitting diodes (micro-LEDs) disposed on and electrically connected to the pixel driving circuit. 2.The display apparatus of claim 1, wherein a width of the trench is greater than or equal to a width of the pixel driving circuit. 3.The display apparatus of claim 1, further comprising an adhesive pattern disposed between the substrate and the pixel driving circuit in the trench, wherein a width of the adhesive pattern is the same as a width of the trench. 4.The display apparatus of claim 3, wherein the adhesive pattern is made of an organic insulating material. 5.The display apparatus of claim 3, wherein the adhesive pattern is spaced apart from the inorganic insulating layer. 6.The display apparatus of claim 3, further comprising a protective layer disposed on the inorganic insulating layer and the pixel driving circuit, wherein a portion of the protective layer is disposed in the trench. 7.The display apparatus of claim 6, wherein the pixel driving circuit and the inorganic insulating layer are spaced apart from each other, the portion of the protective layer is disposed between the pixel driving circuit and the inorganic insulating layer in the trench. 8.The display apparatus of claim 6, wherein the portion of the protective layer is in contact with the adhesive pattern. 9.The display apparatus of claim 6, wherein the protective layer is made of an organic insulating material. 10.The display apparatus of claim 1, further comprising: a plurality of first connection wirings disposed on the inorganic insulating layer and electrically connected to the pixel driving circuit, wherein some of the plurality of first connection wirings are in contact with the inorganic insulating layer. 11.The display apparatus of claim 1, wherein the non-display area comprises: a first non-display area; a curved area extending from the first non-display area; and a second non-display area extending from the curved area, wherein the display apparatus further comprises a plurality of second connection wirings disposed in the display area and the non-display area on the substrate and electrically connected to the pixel driving circuit, some of the plurality of second connection wirings are in contact with the inorganic insulating layer in the display area, the first non-display area, and the second non-display area, and in contact with the substrate in the curved area. 12.The display apparatus of claim 11, further comprising a plurality of organic insulating layers disposed on the substrate in the display area and the non-display area, wherein a number of the plurality of organic insulating layers disposed in the curved area is less than a number of the plurality of organic insulating layers disposed in the display area, the first non-display area, and the second non-display area. 13.The display apparatus of claim 1, wherein a height of a bottom surface of the pixel driving circuit is lower than a height of a bottom surface of the inorganic insulating layer. ​ ​ 14.The display apparatus of claim 1, wherein the plurality of micro-LEDs comprises: an anode; a first semiconductor layer disposed on the anode; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a cathode disposed on the second semiconductor layer. 15.The display apparatus of claim 14, further comprising: a first electrode disposed under the plurality of micro-LEDs to electrically connect the pixel driving circuit and the anodes of the plurality of micro-LEDs; and a solder pattern disposed between the first electrode and the anodes, wherein the first electrode and the anodes are electrically connected by eutectic bonding using the solder pattern. 16.The display apparatus of claim 11, wherein a width of the second non-display area is greater than a width of the bending area, and a width of the display area is greater than the width of the bending area. 17.The display apparatus of claim 3, wherein the adhesive pattern and the substrate are each made of an organic insulating material. 18.The display apparatus of claim 12, wherein a height of the organic insulating layer disposed in the bending area is lower than a height of the organic insulating layer disposed in areas other than the bending area. 19.The display apparatus of claim 1, further comprising a plurality of alignment marks disposed on the inorganic insulating layer, wherein bottom surfaces of the plurality of alignment marks are disposed at a position higher than a position of a bottom surface of the pixel driving circuit. 20.The display apparatus of claim 12, wherein the plurality of organic insulating layers comprises: a first insulating layer disposed in the entire display area and the non-display area; a second insulating layer disposed on the first insulating layer, the second insulating layer being disposed in the remaining areas other than the bending area; and a third insulating layer disposed on the second insulating layer, the third insulating layer being disposed on the second connection wiring and in areas other than the bending area. 21.The display apparatus of claim 6, further comprising: a passivation layer disposed on the protective layer; a first optical layer disposed on the passivation layer and surrounding the plurality of micro-LEDs in the display area; a second optical layer disposed on the passivation layer in the display area, the second optical layer surrounding the first optical layer; and a third optical layer overlapping the plurality of micro-LEDs and the first optical layer, wherein the third optical layer is made of the same organic insulating material as the first optical layer. 22.A display apparatus comprising: a substrate; a plurality of trenches disposed on the substrate; a plurality of pixel driving circuits disposed in each of the plurality of trenches on the substrate; a plurality of inorganic insulating layers disposed to surround the plurality of pixel driving circuits while being spaced apart from the plurality of pixel driving circuits on the substrate; an organic insulating layer on the plurality of inorganic insulating layers and the plurality of pixel driving circuits; and a protective layer on the organic insulating layer. ​ ​ ​ ​ a plurality of micro-LEDs disposed on the organic insulating layer and electrically connected to the plurality of pixel driving circuits. 23.The display device of claim 22, further comprising an adhesive pattern disposed between the plurality of pixel driving circuits and the substrate. wherein the adhesive pattern is disposed only in the plurality of trenches on the substrate. 24.The display device of claim 23, wherein a height of the adhesive pattern is lower than a height of the plurality of inorganic insulating layers. 25.The display device of claim 22, wherein a portion of the organic insulating layer is disposed to fill a gap between the plurality of inorganic insulating layers and the plurality of pixel driving circuits located in the plurality of trenches. 26.The display device of claim 25, wherein a portion of the organic insulating layer is disposed to surround a side surface of the plurality of pixel driving circuits. 27.The display device of claim 22, wherein the plurality of inorganic insulating layers comprises: a first inorganic insulating layer; and a second inorganic insulating layer disposed on the first inorganic insulating layer, wherein the display device further comprises an alignment mark disposed between the first inorganic insulating layer and the second inorganic insulating layer, a bottom surface of the alignment mark has a height higher than a height of a bottom surface of the plurality of pixel driving circuits. 28.The display device of claim 22, wherein the plurality of micro-LEDs comprise an anode, a first semiconductor layer disposed on the anode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode disposed on the second semiconductor layer, and have a vertical type structure. 29.The display device of claim 28, further comprising: a first electrode disposed under the plurality of micro-LEDs; and a solder pattern disposed between the first electrode and the anode, wherein the anode is bonded to the first electrode by eutectic bonding using the solder pattern. 30.The display device of claim 23, wherein the adhesive pattern and the substrate are each made of an organic insulating material. 31.The display device of claim 23, wherein a portion of the organic insulating layer is in contact with the adhesive pattern of one of the plurality of trenches. 32.The display device of claim 31, wherein the adhesive pattern is made of an organic insulating material. ​ ​

Citation Information

Patent Citations

  • Cooling plate and plasma processing chamber including the same

    KR1020240077235A

  • Determining whether a given task is assigned to a given one of multiple logically homogeneous processor cores.

    KR1020240096698A