Data processing method, device, medium and program product

Abstract

The application relates to the technical field of artificial intelligence, and provides a data processing method, equipment, a medium and a program product, wherein the method comprises the following steps: performing a target calculation task on input data to generate a first precision result; before the first precision result is written into a global memory, the local absolute maximum values corresponding to each result block in the first precision result are calculated in parallel, and based on the local absolute maximum values of each result block, a global absolute maximum value in the first precision result is determined; based on the global absolute maximum value, a scaling factor is calculated, and the first precision result is quantitatively processed by using the scaling factor to obtain a second precision result. According to the application, the local absolute maximum value of the first precision result is calculated by using an on-chip memory before the first precision result is written into the global memory, so that the redundant memory reading and writing operations on the first precision result are effectively avoided, the memory bandwidth occupation and processing delay are significantly reduced, and the overall execution efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of artificial intelligence technology, and in particular to a data processing method, device, medium, and program product. Background Technology

[0002] In the training and inference processes of deep learning models, in order to improve computational efficiency and reduce memory usage and power consumption, low-precision data types (such as 8-bit floating-point numbers FP8) are often used instead of high-precision data types (such as 32-bit floating-point numbers FP32) for calculations. However, due to the huge differences in the numerical representation range and precision between high-precision and low-precision data, directly and forcibly converting high-precision calculation results to low-precision formats can easily lead to serious loss of data information, specifically data overflow or underflow, which in turn affects the convergence and final accuracy of the model.

[0003] To address these issues, a common quantization strategy is Current Recipe Scaling (CRS) to improve the accuracy of low-bit training. While this strategy can convert high-precision data to low-precision data, its execution process is typically broken down into multiple independent computational kernels executed serially. This requires multiple reads and writes between the computational kernels and the relatively slow global memory to obtain high-precision computation results, resulting in significant memory bandwidth overhead and latency, severely impacting overall processing efficiency. Summary of the Invention

[0004] This invention provides a data processing method, device, medium, and program product to solve the performance defects caused by multiple global memory reads and writes when quantizing data in related technologies.

[0005] This invention provides a data processing method, comprising:

[0006] The target calculation task is performed on the input data to generate a first-precision result, which is temporarily stored in the on-chip memory.

[0007] Before writing the first precision result into global memory, the maximum local absolute value corresponding to each result block in the first precision result is calculated in parallel.

[0008] Based on the maximum local absolute value of each result block in the first precision result, determine the maximum global absolute value in the first precision result;

[0009] Based on the maximum global absolute value, a scaling factor is calculated, and the scaling factor is applied to quantize the first precision result to obtain a second precision result.

[0010] According to a data processing method provided by the present invention, the parallel calculation of the local absolute maximum value corresponding to each result block in the first precision result includes:

[0011] Based on multiple thread blocks, parallel reduction processing is performed on each result block in the first precision result to obtain the maximum local absolute value corresponding to each result block. Each thread block is used to perform intra-block reduction processing on one result block using shared memory.

[0012] According to a data processing method provided by the present invention, determining the global absolute value maximum value in the first precision result based on the local absolute value maximum value corresponding to each result block in the first precision result includes:

[0013] Based on a single thread within each thread block, atomic operations are performed to compare the local absolute maximum value corresponding to each result block, and the global absolute maximum value is determined based on the comparison results.

[0014] According to a data processing method provided by the present invention, the target computation task is matrix multiplication, and the step of performing the target computation task on the input data to generate a first-precision result includes:

[0015] Based on a preset segmentation strategy, the input data is divided into multiple input matrix blocks;

[0016] Matrix multiplication is performed in parallel on multiple input matrix blocks to obtain multiple block operation results, each of which is a result block in the first precision result.

[0017] According to a data processing method provided by the present invention, the steps of executing the target calculation task, calculating the local absolute maximum value, and determining the global absolute maximum value are integrated into a first calculation kernel for execution.

[0018] The steps of calculating the scaling factor and applying the scaling factor to quantize the first precision result are integrated and executed in the second computing kernel.

[0019] According to a data processing method provided by the present invention, the target computation task is an activation function operation, and the steps of executing the target computation task, calculating the local absolute maximum value, determining the global absolute maximum value, calculating the scaling factor, and performing quantization processing are all integrated into the same computation kernel.

[0020] According to a data processing method provided by the present invention, the step of calculating a scaling factor based on the maximum global absolute value and applying the scaling factor to quantize the first precision result to obtain a second precision result includes:

[0021] The scaling factor is calculated by a single thread based on the maximum global absolute value;

[0022] The scaling factor is applied in parallel by multiple threads to quantize the first precision result, thereby obtaining the second precision result.

[0023] The present invention also provides a data processing apparatus, comprising:

[0024] The task execution unit is used to perform target calculation tasks on the input data and generate a first-precision result, which is temporarily stored in the on-chip memory.

[0025] The local determination unit is used to calculate the maximum local absolute value corresponding to each result block in the first precision result in parallel before writing the first precision result into global memory.

[0026] A global determination unit is used to determine the global absolute value in the first precision result based on the local absolute value maximum value corresponding to each result block in the first precision result;

[0027] The quantization processing unit is used to calculate a scaling factor based on the maximum global absolute value, and apply the scaling factor to quantize the first precision result to obtain a second precision result.

[0028] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the computer program to implement the data processing method as described above.

[0029] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the data processing method as described above.

[0030] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements any of the data processing methods described above.

[0031] The data processing method, apparatus, medium, and program product provided by this invention, after generating a first-precision result by performing a target calculation task on the input data, pre-calculates the local absolute maximum value of each result block while the data is still temporarily stored in on-chip memory, before writing the result into global memory. This avoids the costly, cross-storage-level write-then-read operation performed on the first-precision result to calculate the maximum value, effectively reducing memory bandwidth usage and shortening data processing latency. Furthermore, the calculation of the local absolute maximum value of each result block is performed in parallel, fully utilizing the hardware's parallel processing capabilities and improving hardware utilization and processing efficiency. In addition, when subsequently determining the global absolute maximum value, only a very small set of local absolute maximum values ​​needs to be processed, rather than the entire first-precision result, thereby reducing data processing volume and communication overhead and improving overall processing efficiency. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in this invention or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a flowchart illustrating the data quantization process in related technologies;

[0034] Figure 2 This is a schematic diagram of the structure of the computing device provided by the present invention;

[0035] Figure 3 This is a flowchart illustrating the data processing method provided by the present invention;

[0036] Figure 4 This is a schematic diagram of the block operation of matrix multiplication provided by the present invention;

[0037] Figure 5 This is a schematic diagram of the data quantization process in the matrix multiplication operation scenario provided by the present invention;

[0038] Figure 6 This is a schematic diagram of the data quantization process in the activation function operation scenario provided by the present invention;

[0039] Figure 7 This is a schematic diagram of the data processing device provided by the present invention;

[0040] Figure 8 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0042] In FP8 low-precision training, to prevent data distortion (overflow or underflow) caused by excessive differences in numerical range and precision during the conversion from high to low precision, a quantization strategy called Current Recipe Scaling is typically used to improve the accuracy of low-bit training. The core idea of ​​this strategy is that instead of performing a hard type conversion before converting high-precision data (e.g., a tensor composed of FP32 data types) to low-precision data (e.g., FP8), the high-precision data is first analyzed to find the maximum absolute value (amax). Then, an appropriate scaling factor is calculated based on this maximum absolute value. Finally, the entire batch of high-precision data is scaled proportionally using this scaling factor, mapping its values ​​to a range that the low-precision data type can safely represent, before performing the quantization conversion. In this way, the dynamic range and precision of the original data can be preserved to the maximum extent, avoiding data distortion.

[0043] However, in practical applications, it has been found that the above quantification methods have significant performance bottlenecks and efficiency problems in their implementation. Figure 1 This is a flowchart illustrating the data quantization process in related technologies, such as... Figure 1 As shown, its typical execution flow on a general-purpose computing on graphics processing units (GPGPU) is usually broken down into multiple independent computing kernels and executed serially, specifically including:

[0044] First, the GPGPU starts a kernel for a computationally intensive task, such as... Figure 1 The kernel1 shown performs corresponding computational tasks, such as General Matrix Multiply (GEMM) or activation function operations, to obtain a high-precision result. For subsequent processing, this high-precision result must be transferred from the GPGPU's on-chip memory (such as registers) to the slower global memory.

[0045] Next, the system boots a completely new kernel, such as Figure 1 The kernel2 shown here has the task of retrieving the high-precision result stored in the previous step from global memory, then iterating through all the data to calculate the global absolute maximum value, amax.

[0046] After obtaining the amax kernel, the system boots a third kernel, such as... Figure 1 The kernel3 shown uses the amax value obtained in the previous step to calculate the final scaling factor.

[0047] Finally, the system boots the fourth kernel, such as... Figure 1 As shown in kernel4, this kernel once again reads the huge high-precision result from global memory, applies the scaling factor calculated in the previous step, scales and converts the data, and finally obtains a low-precision quantization result and stores it back.

[0048] The step-by-step, serial implementation described above has certain performance drawbacks. First, in the entire process, high-precision calculation results need to be written to global memory at least once and read from global memory twice. This repeated read and write operation across slower storage media results in huge memory bandwidth overhead and time latency, becoming the performance bottleneck of the entire calculation process.

[0049] Secondly, in the GPGPU architecture, each kernel startup requires interaction between the Central Processing Unit (CPU) and the GPGPU, which inherently introduces significant host-side overhead. The aforementioned process breaks down a complete quantization task into four independent kernels, resulting in frequent kernel startup overhead and further extending the overall computation time.

[0050] Furthermore, the process is not user-friendly in terms of task partitioning. For example, when performing scaling factor calculations in kernel3 and application scaling in kernel4, these operations are typically memory-bound rather than computationally intensive, failing to fully utilize the powerful parallel computing cores of the GPGPU and resulting in wasted computing power. In particular, calculating the scaling factor itself might only require a single thread, but it launches the entire kernel for this purpose. At the same time, when executing kernel1 (such as GEMM), some computing units (such as vector cores) may be idle, leading to low utilization of computing resources.

[0051] Furthermore, because intermediate results are written back to global memory, the on-chip registers or shared memory on the GPGPU, which have extremely fast access speeds, are not effectively utilized to temporarily store data, resulting in insufficient utilization of on-chip storage resources.

[0052] Therefore, while the aforementioned quantization method based on Current Recipe Scaling can guarantee model accuracy, its serialization, multi-core, and high memory interaction implementation leads to significant performance overhead and resource waste. To address this, this invention provides a data processing method applicable to low-precision computing scenarios. By rearranging and optimizing the computational process, it significantly improves the efficiency of data quantization processing, thereby overcoming the aforementioned shortcomings.

[0053] Figure 2 This is a schematic diagram of the structure of the computing device provided by the present invention, as shown below. Figure 2 As shown, the execution entity of the data processing method provided by this invention can be a computing device. This computing device 200 includes at least multiple processing units 201 and video memory 202. Each processing unit 201 can be a Streaming Processor Cluster (SPC), which can include multiple computing units 203. Each computing unit 203 can specifically be a tensor computing unit or a vector computing unit. Here, the tensor computing unit and the vector computing unit are heterogeneous units. The tensor computing unit is mainly used to perform tensor calculations (such as matrix multiplication, convolution, etc.). The tensor computing unit includes multiple tensor cores for performing specific computational tasks. The vector computing unit is mainly used to perform arithmetic and logical operations, such as accumulation, reduction, and conventional addition, subtraction, multiplication, and division. The vector computing unit includes multiple vector cores for performing specific computational tasks.

[0054] Each computing unit 203 may include a register 204, an on-chip cache 205, and shared memory 206. The video memory 202 may be high-bandwidth memory (HBM) or other types of memory. The on-chip cache 205 is a temporary memory with a smaller capacity than the video memory 202, but a faster data exchange speed. The on-chip cache 205 may include a general-purpose matrix main buffer (GMB).

[0055] Compared to the on-chip cache 205, register 204 has a smaller capacity but a faster data exchange speed. Register 204 may include thread-local registers (TLRs). Shared memory 206 can be used for data sharing among multiple threads.

[0056] It should be noted that the computing device 200 of this invention may include other structures besides those described above, and this invention does not specifically limit these. Specifically, the computing device 200 may be a GPGPU, a Graphics Processing Unit (GPU), a Tensor Processing Unit (TPU), etc.

[0057] based on Figure 2 The diagram illustrates the architecture of a computing device. This embodiment of the invention provides a data processing method applicable to various artificial intelligence computing scenarios, particularly those involving low-precision computations in deep learning model training and inference, such as text processing, image processing, and speech processing. In different application scenarios, the input data has different physical meanings. For example, in text processing, the input data can be text data related to text generation and text recognition. Similarly, in image processing, the input data can be image data used in tasks such as image preprocessing, image segmentation, and object detection. And in speech processing, the input data can be speech data used in tasks such as speech recognition and speech synthesis. The following description uses a GPGPU as an example to illustrate the specific flow of the data processing method provided by this invention.

[0058] Figure 3 This is a flowchart illustrating the data processing method provided by the present invention, as shown below. Figure 3 As shown, the method includes:

[0059] Step S10: Perform a target calculation task on the input data to generate a first precision result, which is temporarily stored in the on-chip memory.

[0060] Specifically, the target computational task can be any computationally intensive task involved in the training or inference of a deep learning model. For example, this task may include, but is not limited to, matrix multiplication (GEMM) operations and activation function operations. The input data is typically high-precision formatted data, such as tensors composed of 32-bit floating-point numbers (FP32).

[0061] Input data is typically stored in global memory (e.g., Figure 2In the video memory shown, when performing a target computation task on input data, the computing unit loads the input data from global memory into on-chip memory for corresponding computation. After performing the target computation task on the input data, an intermediate result, namely the first-precision result, is generated. The precision of this result is usually consistent with the precision of the input data or the computation process, for example, it is also in FP32 format. It should be understood that the first-precision result is not immediately written to the slower global memory after it is generated, but is temporarily retained inside the computing core or in the high-speed on-chip memory adjacent to the computing core.

[0062] Here, on-chip memory refers to a storage unit integrated within a computing unit that has extremely high access speed and extremely low latency. Depending on the hardware architecture and specific implementation, on-chip memory can be a register, such as a thread-local register (TLR); it can also be shared memory, which can be shared by multiple threads within a thread block; or it can be an on-chip cache, such as an L1 cache.

[0063] In this embodiment of the invention, by temporarily storing the first precision result in the on-chip memory, it is helpful to quickly read the result from the on-chip memory for maximum value calculation without having to write the result back to global memory and then read it from global memory. This avoids redundant read and write operations between the computing core and global memory, thereby reducing memory bandwidth overhead and time latency.

[0064] Step S20: Before writing the first precision result into global memory, calculate the maximum local absolute value corresponding to each result block in the first precision result in parallel.

[0065] Specifically, before the time-consuming operation of writing this potentially large high-precision result back to global memory occurs, this embodiment of the invention utilizes the time window during which the first-precision result is still temporarily stored in the high-speed on-chip memory to analyze it first.

[0066] Specifically, to efficiently utilize the hardware's parallel processing capabilities, the first-precision result is logically divided into multiple result blocks. This division can be one-dimensional, such as by row or column; or two-dimensional, such as by dividing into multiple sub-matrices. Each result block contains a portion of the data from the first-precision result.

[0067] Subsequently, computing devices (such as GPGPUs) schedule a large number of parallel processing units (e.g., hundreds or thousands of threads) to compute the local absolute maximum value of these result blocks in parallel. Here, the local absolute maximum value refers to the largest absolute value among all values ​​within the data range of a single result block. For example, a large number of threads can be divided into multiple thread blocks, with one thread block assigned to each result block. These thread blocks can traverse the data within their respective result blocks in parallel and independently, and find the maximum absolute value within each block.

[0068] Step S30: Based on the maximum local absolute value of each result block in the first precision result, determine the maximum global absolute value in the first precision result.

[0069] Specifically, after obtaining the local absolute maximum value for each result block in parallel, the goal of this step is to summarize these local values ​​to find the global absolute maximum value in the entire first-precision result. This is essentially a reduction operation.

[0070] There are several ways to implement this reduction. For example, all local absolute maximum values ​​can be written to an intermediate storage area, which can be in shared memory or global memory. In this case, the amount of data to be processed is drastically reduced from the entire first-precision result to a small number of local maximum values, resulting in minimal overhead. Then, one or more threads compare this small set to find the final global absolute maximum value. Alternatively, in a more efficient parallel implementation, a tree-like reduction structure can be used, or hardware-supported atomic operations can be leveraged to ensure the atomicity and correctness of operations when multiple threads update the same global maximum value variable, thereby efficiently determining the global absolute maximum value.

[0071] Step S40: Based on the maximum global absolute value, calculate the scaling factor, and apply the scaling factor to quantize the first precision result to obtain the second precision result.

[0072] Specifically, after obtaining the global maximum absolute value (denoted as amax), the final step of the quantization process can proceed smoothly. First, the scaling factor is calculated based on this global maximum absolute value. The scaling factor maps the dynamic range of the first-precision result to a safe range that the target low-precision data type (such as FP8) can represent. Here, when calculating the scaling factor, it can be obtained by dividing the maximum representable value of the target data type (e.g., max_fp8 for FP8) by the global maximum absolute value, i.e., scaling factor = max_fp8 / amax.

[0073] Next, the scaling factor is used to quantize the first-precision result. This quantization process involves two core actions: scaling and typecasting. Scaling multiplies each value in the first-precision result by the calculated scaling factor. Typecasting converts the scaled high-precision (i.e., first precision, such as FP32) value to the target low-precision (i.e., second precision, such as FP8) format. It should be understood that when quantizing the first-precision result using the scaling factor, if the first-precision result is still stored in on-chip memory, this operation can be performed directly in registers or shared memory, which is extremely fast.

[0074] After quantization, the final data obtained is the second-precision result. Here, the data bit width of the second-precision result is smaller than that of the first-precision result; for example, it is a tensor in FP8 format. This second-precision result, with its significantly reduced data size, is stored in global memory for use in subsequent computational steps or as the final output.

[0075] The method provided in this invention, after generating a first-precision result by performing a target calculation task on the input data, pre-calculates the local absolute maximum value of each result block while the data is still temporarily stored in on-chip memory, before writing the result into global memory. This avoids the costly, cross-storage-level write-then-read operation performed on the first-precision result to calculate the maximum value, effectively reducing memory bandwidth usage and shortening data processing latency. Furthermore, the calculation of the local absolute maximum value of each result block is performed in parallel, fully utilizing the hardware's parallel processing capabilities and improving hardware utilization and processing efficiency. In addition, when determining the global absolute maximum value, only a very small set of local absolute maximum values ​​needs to be processed, rather than the entire first-precision result, thereby reducing data processing volume and communication overhead and improving overall processing efficiency.

[0076] Based on the above embodiments, step S20, which involves parallel calculation of the local absolute maximum value corresponding to each result block in the first precision result, includes:

[0077] Based on multiple thread blocks, parallel reduction processing is performed on each result block in the first precision result to obtain the maximum local absolute value corresponding to each result block. Each thread block is used to perform intra-block reduction processing on one result block using shared memory.

[0078] It should be noted that the above embodiments have already described the basic idea of ​​dividing the first-precision result into multiple result blocks and processing these result blocks in parallel to obtain the maximum local absolute value of each. The embodiments of this invention will provide a detailed explanation of the internal mechanism of this parallel processing. For ease of understanding, several key terms in the embodiments of this invention will first be explained.

[0079] In parallel computing architectures such as GPGPU, the thread block is the basic unit of thread scheduling. A thread block contains multiple threads that can be scheduled to execute on the same computing unit. All threads within a thread block can work together efficiently, can synchronize quickly, and can exchange data through a high-speed on-chip storage area (such as shared memory).

[0080] Shared memory is a type of on-chip memory that is accessed much faster than global memory but slower than thread-private registers. The lifecycle of shared memory is bound to a thread block, and its space is shared by all threads within that block. Therefore, it becomes a storage area for efficient data communication and cooperation between threads within a block.

[0081] Parallel reduction is a common parallel computing pattern that aims to combine a set of input data into a single result using a binary operator (such as summation, finding the maximum or minimum value). For example, to find the maximum value among 10,000 numbers, the task can be assigned to 100 thread blocks. Each thread block first finds the maximum value among its assigned 100 numbers in parallel, and then reduces these 100 local maximum values ​​to obtain the final global maximum value.

[0082] Specifically, based on the above concepts, the specific implementation process of this embodiment of the invention is as follows: When performing a target computation task (such as matrix multiplication), the entire task is usually divided into a grid and thread blocks. This division method is used up to the maximum value calculation stage. Specifically, the first precision result is logically divided into several result blocks. At the same time, the hardware threads that perform the computation are also organized into several thread blocks, and a one-to-one correspondence is established, that is, one thread block is responsible for processing one result block.

[0083] Within a thread block, a reduction process is performed on the corresponding result block to find the local maximum absolute value. Specifically, each thread within the thread block is first responsible for calculating and generating its small subset of data in the corresponding result block (i.e., a portion of the first-precision result). This data is typically temporarily stored in the thread's local register. Subsequently, each thread independently calculates the maximum absolute value of all values ​​in its register. All threads within the thread block write their respective local maximum values ​​to a designated location in the shared memory of that thread block. For example, if a thread block contains 256 threads, an array of size 256 can be allocated in shared memory, and each thread can write its calculated maximum value to the location in the array corresponding to its thread ID.

[0084] At this point, the problem of finding the local maximum absolute value of the result block is transformed into finding the maximum value within this small array of shared memory. To accomplish this step efficiently, a tree-based reduction approach can be used. For example, in the first round, the thread with the even index reads the value of the adjacent thread with the odd index in shared memory, compares it with its own value, and then updates it; in the second round, the step size is doubled, and the comparison and update are performed again. This process is repeated continuously, with the number of threads participating in the calculation halved in each round. After multiple rounds of comparison and updates, the final local maximum absolute value will be reduced to the first position in shared memory, or held by the first thread in the block (such as the thread with thread ID 0).

[0085] The method provided in this invention binds result blocks to thread blocks and utilizes high-speed shared memory for intra-block reduction processing, achieving efficient calculation of local absolute maximum values. Compared to having each thread access and update a variable located in global memory, this invention restricts most comparison and communication operations to high-speed on-chip shared memory, greatly reducing the number of accesses to slow global memory, significantly improving the efficiency and parallelism of intra-block reduction, thereby contributing to improved overall data processing performance.

[0086] Based on any of the above embodiments, step S30 specifically includes:

[0087] Based on a single thread within each thread block, atomic operations are performed to compare the local absolute maximum value corresponding to each result block, and the global absolute maximum value is determined based on the comparison results.

[0088] It should be noted that in the above embodiments, intra-block reduction has been used to calculate the local absolute maximum value of the corresponding result block for each thread block. At this time, these local absolute maximum values ​​are scattered across various thread blocks (one for each thread block). To obtain the final global absolute maximum value, a second reduction can be performed on these local absolute maximum values.

[0089] Specifically, atomic operations can be performed by a single thread within each thread block to compare the local absolute maximum value corresponding to each result block, thereby determining the final global absolute maximum value. Here, in concurrent programming, an atomic operation refers to one or a series of uninterruptible operations. When multiple threads simultaneously perform atomic operations on the same memory address, the hardware ensures that these operations are executed serially in a certain order, thus avoiding data races and inconsistent results caused by concurrent reads and writes. For example, the atomicMax operation in the GPGPU architecture ensures that when multiple threads attempt to update a shared maximum value variable with their own values, the final value of that variable will always be the largest among all the values ​​involved in the update, without any lost updates.

[0090] Specifically, after the reduction within a block is completed, the local maximum absolute value of each thread block has been calculated and is typically held by a single thread within the block (e.g., the thread with thread ID 0). Embodiments of this invention can utilize this designated single thread to represent the entire thread block in the competition for the global maximum value.

[0091] In global memory, a variable can be pre-allocated to store the final global absolute maximum value and initialized to a very small value (such as 0 or negative infinity). Subsequently, the thread specified in each thread block (e.g., the thread with ID 0 in all thread blocks) will read its local absolute maximum value and perform an atomic maximum value operation on the aforementioned global memory variable (e.g., call the atomicMax function).

[0092] In this way, representative threads from different thread blocks attempt to update the same global maximum value variable. The hardware's atomic operation mechanism ensures the integrity of each read, comparison, and write operation. For example, thread A arrives with a local maximum value of 8 and updates the global variable from 0 to 8; then thread B arrives with a local maximum value of 12, reads the current value of 8, compares it, finds that its 12 is larger, and updates the global variable to 12; then thread C arrives with a local maximum value of 9, reads the current value of 12, compares it, finds that its 9 is smaller, and abandons the write. This process continues until the representative threads of all thread blocks have completed their atomic operations. At this point, the variable stored at the global memory address is the global absolute maximum value in the entire first-precision result.

[0093] In this embodiment of the invention, by specifying a single thread within each thread block and utilizing hardware-supported atomic operations to aggregate all local absolute maximum values, a highly efficient global reduction mechanism is provided. This avoids additional kernel startup latency and global synchronization overhead, and determines the global absolute maximum value in a lock-free, high-concurrency manner.

[0094] Based on any of the above embodiments, the target computation task is matrix multiplication. In deep learning models, matrix multiplication (GEMM) is one of the most core and computationally intensive operators. This embodiment of the invention uses matrix multiplication as a typical example of the target computation task. In this scenario, step S10 specifically includes:

[0095] Step S11: Based on a preset segmentation strategy, the input data is divided into multiple input matrix blocks.

[0096] Specifically, in matrix multiplication scenarios, the input data is typically two high-precision (e.g., FP32) matrices that need to be multiplied, referred to as matrix A and matrix B. To fully utilize the storage hierarchy of GPGPUs (especially high-speed shared memory) and parallel computing capabilities, directly performing operations on two large matrices is inefficient.

[0097] Therefore, a pre-defined block partitioning strategy (also known as the Tiling strategy) is usually required. This strategy logically divides the large input matrices A and B into multiple smaller input matrix blocks (or tiles). The advantage of doing this is that when calculating a small block of the output matrix, only a few corresponding input matrix blocks need to be loaded into the cache or shared memory, thereby greatly improving data reuse and reducing access to slow global memory.

[0098] Step S12: Perform matrix multiplication operations in parallel on multiple input matrix blocks to obtain multiple block operation results, each of which is a result block in the first precision result.

[0099] Specifically, after the input matrix is ​​divided into blocks, the computing device schedules a large number of parallel processing units (e.g., multiple thread blocks) to process these computational tasks in parallel. Typically, one thread block is responsible for computing the result of one block of operations in the output matrix.

[0100] For example, Figure 4 This is a schematic diagram of the block operation of matrix multiplication provided by the present invention, as shown below. Figure 4As shown, matrices A and B are two input matrices, each of which can be divided into multiple smaller input matrix blocks. During parallel computation, the computation unit (or thread block) processes these input matrix blocks in parallel, resulting in an output matrix D. This output matrix D is the first-precision result, which is composed of multiple block operation results, such as tile1, tile2, ..., tile25. Each block operation result constitutes a result block in the first-precision result.

[0101] Taking the block operation result tile1 as an example, in order to calculate this block operation result, the thread block iteratively loads the multiple input matrix blocks it needs (i.e., the matrix block in the first row of matrix A and the matrix block in the first column of matrix B) into its shared memory and performs local matrix multiplication and accumulation operations. When the thread block completes all its allocated calculation tasks, it will obtain a complete block operation result, i.e., tile1. This result is usually temporarily stored in the registers of each thread within the thread block.

[0102] The method provided in this invention concretizes the target computation task into block matrix multiplication and directly defines the results of the block operations as result blocks for subsequent processing, achieving seamless integration of computation tasks and data processing flows. This design allows the data partitioning strategy inherent in high-performance computing to be directly reused in subsequent quantization preprocessing steps, avoiding the reorganization of data structures. This makes integrating operations such as maximum value lookup within the computation core a natural and efficient implementation, laying the foundation for subsequent kernel fusion optimization.

[0103] Based on any of the above embodiments, the steps of executing the target computation task, calculating the local maximum absolute value, and determining the global maximum absolute value are integrated into the first computation kernel for execution.

[0104] The steps of calculating the scaling factor and applying the scaling factor to quantize the first precision result are integrated and executed in the second computing kernel.

[0105] It's important to note that in traditional data quantization processing, a kernel is typically started first to perform the GEMM operation. After the GEMM operation is complete, another kernel is started to calculate the maximum value of the complete output matrix. Each kernel startup incurs system overhead, and data exchange between different kernels usually requires using slow global memory. Therefore, this approach not only results in unnecessary memory bandwidth consumption and time latency but also incurs significant overhead due to the frequent startup and invocation of computation kernels.

[0106] To address this issue, in the matrix multiplication scenario, this invention proposes a two-stage kernel fusion scheme. First, the steps of performing matrix multiplication, calculating the local maximum absolute value, and determining the global maximum absolute value are fused into the first computational kernel. This means that the invention rearranges the order of computational tasks, advancing the maximum value calculation operation to the GEMM operation, thereby saving data read / write overhead. Second, the steps of calculating the scaling factor and applying the scaling factor for quantization are fused into the second computational kernel, thereby reducing kernel startup overhead.

[0107] Specifically, when the first computational kernel starts, a grid of thread blocks is created. Each thread block is responsible for computing a result block (the result of the block operation) of the output matrix and temporarily storing it in a register. Then, within the same kernel, each thread block uses its shared memory to perform intra-block reduction on the result block that was just computed and is still stored in the register, obtaining the local absolute maximum value of that result block. Subsequently, a designated thread within each thread block uses atomic operations to compare and update this local absolute maximum value with a global maximum value variable stored in global memory to obtain the final global absolute maximum value.

[0108] After the first computation kernel completes its execution, two results are obtained: the output of the GEMM operation, i.e., the first-precision result, and the global maximum absolute value. Both results are stored in global memory. It should be understood that during the process of determining the global maximum absolute value, each thread within a thread block writes its calculated partial result data to global memory, thus forming a complete first-precision result in global memory.

[0109] The second computational kernel starts immediately after the first one and typically uses the same thread grid and block configuration to ensure the correspondence between threads and data. After the second kernel starts, a single thread first reads the maximum global absolute value calculated by the first kernel from global memory and calculates a uniform scaling factor based on this. Subsequently, each thread reads the corresponding high-precision data from the first-precision result from global memory, multiplies it by the scaling factor, and performs type conversion to obtain a low-precision (e.g., FP8) quantized value, which is the second-precision result.

[0110] Figure 5 This is a schematic diagram of the data quantization processing flow in the matrix multiplication operation scenario provided by the present invention, as shown below. Figure 5 As shown, it specifically includes the following steps:

[0111] Step A1: First, set up the block strategy for matrix multiplication operations;

[0112] Step A2: According to the block partitioning strategy, load the block data of input matrices A and B, and calculate the block partitioning result of output matrix block D based on the loaded input blocks, denoted as D_tile;

[0113] Step A3: After calculating D_tile, it is not immediately written to global memory, but the maximum local absolute value of D_tile is calculated within the current thread block;

[0114] Step A4: A single thread within the current thread block performs an atomic operation (such as the atomicMax operation) to compare and update the local maximum absolute value with the global maximum absolute value.

[0115] Step A5: Repeat steps A2-A4 until the results of all output matrix blocks have been calculated. At this point, the output results of GEMM and the global absolute maximum value have been obtained. Finally, start a fused kernel, calculate the scaling factor based on the final global absolute maximum value, and use this scaling factor to perform scaling and type conversion operations on the output results of GEMM to obtain the final low-precision result.

[0116] The method provided in this invention integrates matrix multiplication and global maximum value calculation into a first computational kernel, eliminating the significant overhead of reading and writing high-precision results in global memory. Although a second kernel is still required to complete quantization, this is to address an inherent synchronization problem: all threads must wait for the global maximum value calculation to complete before quantization can begin. This two-kernel design balances the correctness of the algorithm logic and execution efficiency, reducing memory bandwidth pressure and execution latency.

[0117] Based on any of the above embodiments, the target computation task is activation function operation. Activation functions (such as ReLU, Sigmoid, GeLU, etc.) are another important type of operation in neural networks. Unlike matrix multiplication, most activation function operations are element-wise, meaning that the value of each element in the output data (such as the output tensor) depends only on the value of the corresponding element in the input data (such as the input tensor), and is independent of elements at other positions. This characteristic creates conditions for achieving deeper kernel fusion.

[0118] Therefore, in the activation function operation scenario, the steps of executing the target calculation task, calculating the local absolute maximum value, determining the global absolute maximum value, calculating the scaling factor, and performing quantization are all integrated into the same computing kernel.

[0119] Specifically, the embodiments of the present invention integrate four independent kernels in the traditional technology into a complete kernel, which can complete all calculations with a single startup, completely eliminating the interaction between all intermediate results and global memory, achieving zero additional read and write overhead, while maximizing the use of on-chip resources and reducing data movement.

[0120] The implementation of this single-kernel, end-to-end fusion approach is as follows: After kernel startup, each thread within a thread block is responsible for processing one or more elements in the input tensor. The thread reads the input value from global memory, executes the activation function operation, obtains a high-precision result, and temporarily stores it in its local register. Within the thread block, the local maximum absolute value is calculated using shared memory reduction, and then a designated single thread updates the global maximum absolute value through atomic operations.

[0121] Understandably, since all steps occur within the same kernel, a mechanism is needed to ensure that the global maximum value is finalized before all threads perform quantization. This can be achieved by inserting a lightweight synchronization or wait mechanism into the kernel code. For example, after all thread blocks complete their atomic operations, global synchronization can be performed using some high-level synchronization primitives; alternatively, a loop can be set after the atomic operations to wait until a flag is set (by the last thread block to complete its atomic operation), indicating that the global maximum value is ready. After synchronization, the threads then read this final global absolute maximum value from global memory.

[0122] When reading the maximum absolute value from global memory, only a single thread is needed for the reading, and a scaling factor is calculated based on the read value. After calculating the scaling factor, it can be temporarily stored in shared memory so that other threads within the same thread block can read it and use the scaling factor to process the high-precision result data stored in their respective registers, performing scaling and type conversion to obtain a low-precision result. Finally, each thread writes the final low-precision result to the output location in global memory.

[0123] Figure 6 This is a schematic diagram of the data quantization processing flow in the activation function operation scenario provided by the present invention, as shown below. Figure 6 As shown, it specifically includes the following steps:

[0124] Step B1: Start the merged kernel and load the input data once from global memory;

[0125] Step B2: Perform activation function operation on the input data and store the high-precision result directly in the high-speed on-chip register instead of writing it back to global memory;

[0126] Step B3: Within each thread block, the results in the registers are efficiently reduced in parallel using shared memory to obtain the maximum local absolute value within the block.

[0127] Step B4: A single thread in the thread block compares and updates the local maximum absolute value with the global maximum absolute value through an atomic operation (such as the atomicMax operation);

[0128] In step B5, after all thread blocks have completed execution, the final global absolute maximum value can be obtained. At this point, only a single thread needs to read this global absolute maximum value and calculate the scaling factor. Finally, the high-precision result stored in the register is scaled and type-converted using this scaling factor to obtain the final low-precision result, which is then written back to global memory.

[0129] The method provided in this invention completely eliminates all additional kernel startup overhead by integrating all steps from function computation to final quantization write-back into a single computing kernel. This processing flow maximizes the retention of data in high-speed storage within the computing kernel, reducing the memory swapping overhead of intermediate data to almost zero, thereby providing highly efficient processing performance and efficiency for the element-wise quantization process.

[0130] Based on any of the above embodiments, step S40 specifically includes:

[0131] Step S41: The scaling factor is calculated by a single thread based on the maximum global absolute value.

[0132] It should be noted that in parallel computing, especially in computing based on a single-instruction multithreaded model, rationally allocating tasks to different threads can maximize hardware efficiency. Based on this, the embodiments of the present invention have finely divided the internal process of the quantization step, which can be applied to both matrix multiplication and activation function operations.

[0133] Specifically, the calculation of the scaling factor is a single, non-parallel task. Regardless of the sheer volume of data in the first-precision result, there will ultimately only be a single global maximum absolute value, from which a scaling factor applicable to all data can be calculated. Having all threads repeatedly perform this identical calculation is a clear waste of resources. Therefore, this embodiment of the invention employs an efficient strategy: assigning a single thread specifically to handle this calculation.

[0134] Here, the single thread can be any pre-defined thread. In practical programming, a thread with a distinctive identity is usually chosen, such as the thread with a global thread ID of 0, or the thread with ID 0 in each thread block (in conjunction with conditional statements to ensure that only one of them actually executes in the end).

[0135] The designated thread first reads the maximum absolute value of the global memory, which has been calculated and stored in the previous steps, from a predetermined address in global memory. Then, it performs a simple floating-point division to obtain the scaling factor. The calculated scaling factor needs to be accessible to all threads participating in subsequent quantization processing. Therefore, this single thread can write the calculation result to a location accessible to all threads, such as a specific address in global memory, or, in some implementations (such as the single-kernel fusion scheme in the above embodiment), to shared memory, which can then be read by other threads within the block.

[0136] Step S42: The scaling factor is applied in parallel by multiple threads to quantize the first precision result and obtain the second precision result.

[0137] Specifically, in contrast to the singular nature of scaling factor calculation, quantization using scaling factors is a data-intensive task that can be massively parallelized. Each data element in the first-precision result can be processed independently. Therefore, this step leverages the hardware's parallel capabilities, with multiple threads executing this task in parallel.

[0138] Specifically, first, all participating threads read the pre-calculated, unique scaling factor from the aforementioned shared location (such as global memory or shared memory). Then, each thread, based on its thread ID, locates the value of one or more first-precision results it is responsible for, reads this data, multiplies it by the read scaling factor, and then performs type conversion on the multiplication result to obtain the low-precision value. After quantization, each thread writes its calculated low-precision value, a portion of the second-precision result, to the final output location in global memory.

[0139] The method provided in this invention divides the quantization step into two sub-processes: single-threaded computation and multi-threaded application. This achieves refined and optimized use of computing resources, avoiding the waste of power consumption and clock cycles caused by redundant computation of the same scalar by a large number of threads. Simultaneously, it concentrates the hardware's parallel processing capabilities on data-intensive quantization operations that truly require parallelization. This task division strategy further reduces unnecessary computational overhead without increasing complexity, thus improving the execution efficiency of the entire data processing flow.

[0140] The data processing apparatus provided by the present invention will be described below. The data processing apparatus described below can be referred to in correspondence with the data processing method described above.

[0141] Based on any of the above embodiments Figure 7 This is a schematic diagram of the data processing device provided by the present invention, as shown below. Figure 7 As shown, the device includes:

[0142] The task execution unit 710 is used to perform a target calculation task on the input data and generate a first precision result, which is temporarily stored in the on-chip memory.

[0143] The local determination unit 720 is used to calculate the maximum local absolute value corresponding to each result block in the first precision result in parallel before writing the first precision result into the global memory.

[0144] The global determination unit 730 is used to determine the global absolute value of the first precision result based on the local absolute value maximum value corresponding to each result block in the first precision result;

[0145] The quantization processing unit 740 is used to calculate a scaling factor based on the maximum global absolute value, and apply the scaling factor to quantize the first precision result to obtain a second precision result.

[0146] The apparatus provided in this invention, after generating a first-precision result by performing a target calculation task on the input data, pre-calculates the local absolute maximum value of each result block while the data is still temporarily stored in the on-chip memory, before writing the result into global memory. This avoids the costly, cross-storage-level write-then-read operation performed on the first-precision result to calculate the maximum value, effectively reducing memory bandwidth usage and shortening data processing latency. Furthermore, the calculation of the local absolute maximum value of each result block is performed in parallel, fully utilizing the hardware's parallel processing capabilities and improving hardware utilization and processing efficiency. In addition, when determining the global absolute maximum value, only a very small set of local absolute maximum values ​​needs to be processed, rather than the entire first-precision result, thereby reducing data processing volume and communication overhead and improving overall processing efficiency.

[0147] Based on any of the above embodiments, the local determination unit 720 is specifically used for:

[0148] Based on multiple thread blocks, parallel reduction processing is performed on each result block in the first precision result to obtain the maximum local absolute value corresponding to each result block. Each thread block is used to perform intra-block reduction processing on one result block using shared memory.

[0149] Based on any of the above embodiments, the global determination unit 730 is specifically used for:

[0150] Based on a single thread within each thread block, atomic operations are performed to compare the local absolute maximum value corresponding to each result block, and the global absolute maximum value is determined based on the comparison results.

[0151] Based on any of the above embodiments, the target computation task is matrix multiplication, and accordingly, the task execution unit 710 is specifically used for:

[0152] Based on a preset segmentation strategy, the input data is divided into multiple input matrix blocks;

[0153] Matrix multiplication is performed in parallel on multiple input matrix blocks to obtain multiple block operation results, each of which is a result block in the first precision result.

[0154] Based on any of the above embodiments, the steps of executing the target computation task, calculating the local maximum absolute value, and determining the global maximum absolute value are integrated into the first computation kernel for execution.

[0155] The steps of calculating the scaling factor and applying the scaling factor to quantize the first precision result are integrated and executed in the second computing kernel.

[0156] Based on any of the above embodiments, the target computation task is an activation function operation, and the steps of executing the target computation task, calculating the local maximum absolute value, determining the global maximum absolute value, calculating the scaling factor, and performing quantization are all integrated into the same computation kernel.

[0157] Based on any of the above embodiments, the quantization processing unit 740 is specifically used for:

[0158] The scaling factor is calculated by a single thread based on the maximum global absolute value;

[0159] The scaling factor is applied in parallel by multiple threads to quantize the first precision result, thereby obtaining the second precision result.

[0160] Figure 8 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 8As shown, the electronic device may include a processor 810, a communication interface 820, a memory 830, and a communication bus 840, wherein the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call logical instructions in the memory 830 to execute a data processing method, which includes: performing a target calculation task on the input data to generate a first-precision result, the first-precision result being temporarily stored in on-chip memory; before writing the first-precision result to global memory, parallelly calculating the local absolute maximum values ​​corresponding to each result block in the first-precision result; determining the global absolute maximum value in the first-precision result based on the local absolute maximum values ​​corresponding to each result block in the first-precision result; calculating a scaling factor based on the global absolute maximum value, and applying the scaling factor to quantize the first-precision result to obtain a second-precision result.

[0161] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to related technologies, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0162] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the data processing methods provided by the above methods. The method includes: performing a target calculation task on input data to generate a first-precision result, the first-precision result being temporarily stored in an on-chip memory; before writing the first-precision result into global memory, calculating in parallel the local absolute maximum values ​​corresponding to each result block in the first-precision result; determining the global absolute maximum value in the first-precision result based on the local absolute maximum values ​​corresponding to each result block in the first-precision result; calculating a scaling factor based on the global absolute maximum value, and applying the scaling factor to quantize the first-precision result to obtain a second-precision result.

[0163] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When executed by a processor, the computer program implements the data processing methods provided by the above methods. The method includes: performing a target computation task on input data to generate a first-precision result, the first-precision result being temporarily stored in an on-chip memory; before writing the first-precision result into global memory, calculating in parallel the local absolute maximum values ​​corresponding to each result block in the first-precision result; determining the global absolute maximum value in the first-precision result based on the local absolute maximum values ​​corresponding to each result block in the first-precision result; calculating a scaling factor based on the global absolute maximum value, and applying the scaling factor to quantize the first-precision result to obtain a second-precision result.

[0164] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0165] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of software products. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0166] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data processing method, characterized in that, include: The target calculation task is performed on the input data to generate a first-precision result, which is temporarily stored in the on-chip memory. Before writing the first precision result into global memory, the maximum local absolute value corresponding to each result block in the first precision result is calculated in parallel. Based on the maximum local absolute value of each result block in the first precision result, determine the maximum global absolute value in the first precision result; Based on the maximum global absolute value, a scaling factor is calculated, and the scaling factor is applied to quantize the first precision result to obtain a second precision result.

2. The data processing method according to claim 1, characterized in that, The parallel computation of the local absolute maximum value corresponding to each result block in the first precision result includes: Based on multiple thread blocks, parallel reduction processing is performed on each result block in the first precision result to obtain the maximum local absolute value corresponding to each result block. Each thread block is used to perform intra-block reduction processing on one result block using shared memory.

3. The data processing method according to claim 2, characterized in that, The step of determining the global absolute maximum value in the first precision result based on the local absolute maximum value corresponding to each result block in the first precision result includes: Based on a single thread within each thread block, atomic operations are performed to compare the local absolute maximum value corresponding to each result block, and the global absolute maximum value is determined based on the comparison results.

4. The data processing method according to claim 1, characterized in that, The target computation task is matrix multiplication. The step of performing the target computation task on the input data to generate a first-precision result includes: Based on a preset segmentation strategy, the input data is divided into multiple input matrix blocks; Matrix multiplication is performed in parallel on multiple input matrix blocks to obtain multiple block operation results, each of which is a result block in the first precision result.

5. The data processing method according to claim 4, characterized in that, The steps of performing the target computation task, calculating the local maximum absolute value, and determining the global maximum absolute value are integrated into the first computation kernel for execution. The steps of calculating the scaling factor and applying the scaling factor to quantize the first precision result are integrated and executed in the second computing kernel.

6. The data processing method according to claim 1, characterized in that, The target computation task is an activation function operation. The steps of executing the target computation task, calculating the local maximum absolute value, determining the global maximum absolute value, calculating the scaling factor, and performing quantization are all integrated into the same computation kernel.

7. The data processing method according to any one of claims 1 to 6, characterized in that, The process of calculating a scaling factor based on the maximum global absolute value and applying the scaling factor to quantize the first precision result to obtain a second precision result includes: The scaling factor is calculated by a single thread based on the maximum global absolute value; The scaling factor is applied in parallel by multiple threads to quantize the first precision result, thereby obtaining the second precision result.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the data processing method as described in any one of claims 1 to 7.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the data processing method as described in any one of claims 1 to 7.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the data processing method as described in any one of claims 1 to 7.

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