Production method of low-contact-resistance TOPcon battery
By using laser selective texturing and PECVD front-side doping, the problems of long boron doping diffusion time and high contact resistance in TOPCon cells have been solved, achieving cell production with low contact resistance and high efficiency.
Patent Information
- Application Number
- CN202511315762.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-16
- Publication Date
- 2025-12-19
AI Technical Summary
The existing TOPCon battery production method using boron doping has problems such as long diffusion time, high temperature leading to increased defects, high contact resistance, and low efficiency. In addition, the poor contact between silver paste and the substrate during the metallization process affects the carrier collection capability.
A pyramid structure is formed by selective texturing with laser, followed by deposition of a poly layer on the front side using PECVD and initial doping with borane. Annealing is then performed to form a uniform boron-doped layer, reducing the surface recombination rate and contact resistance.
It effectively reduces the reflectivity of the crystalline silicon surface, improves photoelectric conversion efficiency, reduces contact resistance, enhances battery efficiency, and reduces the negative impact of high-temperature processes.
Smart Images
Figure CN121174673A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to the technical field of TOPcon battery, in particular to a production method of a low-contact-resistance TOPcon battery. BACKGROUND
[0002] TOPCon is a kind of tunnel oxide passivated contact solar cell technology based on the principle of selective carrier, and the cell structure is N-type silicon substrate cell. An ultrathin silicon oxide layer is prepared on the back surface of the cell, and then a doped silicon thin layer is deposited, and the two together form a passivation contact structure, which effectively reduces surface recombination and metal contact recombination. In the B diffusion process, currently, BCl3 thermal decomposition is generally used to generate B element, and B diffuses from the surface of the Cz-Si to the inside of the Cz-Si in the form of concentration difference. The current problems of this method are as follows:
[0003] (1) B diffusion is different from P diffusion. The solid solubility of B in silicon is much lower than that of P in silicon, which results in that the chamber temperature and diffusion time required for B diffusion in silicon are much higher than those required for P diffusion in silicon. The silicon wafer is exposed to a high-temperature environment for a long time, which is more likely to induce internal defect amplification and form defect centers, resulting in large recombination and serious low short-circuit current and open-circuit voltage.
[0004] (2) BCl3 thermal decomposition produces intermediate product B2O3. At normal process temperature, B2O3 is in liquid state, which not only corrodes quartz devices such as furnace tube and gas tube, but also corrodes the surface of the silicon wafer, resulting in uneven doping degree on the surface of the silicon wafer;
[0005] (3) Since the separation coefficient of B at the Si / SiO2 interface is less than 1, and B element tends to diffuse from Si to SiO2, this characteristic results in a large amount of B enrichment on the surface of Si, forming a boron-rich layer, which not only easily leads to low efficiency, but also easily leads to EL blackening and other defects.
[0006] (4) In the metallization process, silver paste is printed on the surface of the cell wafer in a certain pattern by screen printing, and then high-temperature sintering is carried out to make the glass powder contained in the silver paste corrode the SiN and Al2O3 layer on the surface of the silicon wafer, and directly contact the silicon substrate. According to the current process flow, there is a pyramid texture on the printed area, and the uneven surface of the silicon wafer is not conducive to the formation of the grid line, resulting in large grid line resistance. At the same time, because the texture is uneven, the corrosion depth of the paste is not consistent, which leads to poor contact between the silver paste and the substrate and large contact resistance. It affects the carrier collection ability and directly leads to the loss of product efficiency.
[0007] Therefore, finding a B-doping method has become an urgent task for reducing costs and improving efficiency in production lines. Summary of the Invention
[0008] The purpose of this application is to provide a method for manufacturing low-contact-resistance TOPcon cells. In the current texturing process, the texturing tank is removed, but the cleaning tank is retained. After cleaning, the first step is to deposit a poly layer on the front side while simultaneously depositing elemental boron (B). After this, an annealing process is performed. Then, a texturing tank is added in the back-side BSG process to form a pyramid structure on the silicon wafer surface, increasing light absorption. Specifically, the technical solution adopted in this application is as follows:
[0009] On the one hand, this application provides a method for producing a low contact resistance TOPcon battery, comprising the following steps:
[0010] S1. Inspection and cleaning of silicon wafers;
[0011] S2, Laser selective texturing, forming a pyramidal surface in the light absorption area;
[0012] S3. Poly deposition is performed on the front side using PECVD process, and borane is introduced to form preliminary boron doping;
[0013] S4, High-temperature annealing.
[0014] Compared with the prior art, the embodiments of this application have at least the following advantages or beneficial effects:
[0015] 1. This application employs laser selective texturing. By using lasers to create light-trapping structures, various textured surfaces with good anti-reflection effects can be obtained, effectively reducing the reflectivity of the crystalline silicon surface and improving the photoelectric conversion efficiency of photovoltaic cells. At the same time, since there is no textured surface with high and low undulations in the printing area, the silver paste directly contacts the flat silicon wafer surface. Therefore, compared with the pyramidal textured area, the flat silicon wafer surface is more likely to obtain an ideal linear shape, that is, an aspect ratio that is infinitely close to 50%. At this time, a good grid line morphology can achieve a lower contact resistance.
[0016] 2. This application employs front-side poly deposition to further reduce the carrier recombination rate on the battery surface and decrease contact resistance, thereby further improving battery efficiency. Simultaneously, the use of PECVD for doping reduces the negative impacts of high-temperature processes. Attached Figure Description
[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a surface morphology image of a silicon wafer after laser selective texturing in Example 1 of this application;
[0019] Figure 2 This is a schematic diagram of the light-trapping principle used to enhance light absorption in Embodiment 1 of this application. Detailed Implementation
[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased commercially.
[0021] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present application will now be described in detail with reference to specific embodiments.
[0022] A method for producing a low contact resistance TOPcon battery, characterized by comprising the following steps:
[0023] S1. Silicon wafer inspection and cleaning: Incoming material inspection mainly includes the inspection of the silicon wafer's perpendicularity, line marks, missing corners, microcracks, resistivity, warpage, O content, minority carrier lifetime, and C content; The cleaning involves using different cleaning solutions for primary cleaning, secondary cleaning, and tertiary cleaning to remove oil, organic matter, impurities, and surface damage from the silicon wafer surface. This damaged layer comes from defects such as dislocations generated during silicon wafer cutting.
[0024] S2. Laser Selective Texturing: Laser etching technology is characterized by isotropic processing. It utilizes high-energy laser pulses to irradiate the surface of a silicon wafer, causing localized rapid heating, melting, and vaporization of the material. This creates an uneven surface structure in the irradiated area, resulting in a unique surface texture. This method can create textured areas on a silicon wafer with a specific pattern. The original surface morphology of the silicon wafer is maintained in the printed grid area, while a pyramidal surface with varying heights is formed in the light-absorbing area, utilizing the light-trapping principle to enhance light absorption.
[0025] Light trapping principle: Utilizing the principle of light reflection, the light is repeatedly reflected between the pyramids. With each reflection, a portion of the energy is absorbed by the silicon wafer. Through multiple reflections, the proportion of sunlight energy absorbed by the silicon wafer is increased.
[0026] Since the grid line printing area does not involve light absorption, a textured surface is not required. In fact, the presence of a textured surface can lead to inconsistent ink etching depth, resulting in poor grid line morphology and increased contact resistance.
[0027] S3. Front-side poly deposition (PECVD): PECVD (Plasma-enhanced Chemical Vapor Deposition or Plasma-assisted Chemical Vapor Deposition) is a thin film growth technique that utilizes plasma to deposit material at relatively low temperatures. PECVD is a vacuum-based process, typically performed at pressures <0.1 Torr, allowing for relatively low substrate temperatures, from room temperature to 350°C. Instead of heating the substrate to very high temperatures, it uses plasma to provide energy for these deposition reactions. Due to the lower deposition temperature of PECVD, the deposited film has lower stress and stronger adhesion. In a vacuum environment, radio frequency energy ignites the feed gas (SiH4) to form plasma, composed of high-energy electrons and Si ions. Si ions capture electrons to form silicon atoms that deposit on the silicon wafer surface, forming a uniform and dense amorphous silicon film. Simultaneously with poly deposition, BH4 (borane) is introduced. BH4 is also affected by radio frequency energy, forming high-energy electrons and B ions. B ions capture electrons to form elemental B, which is uniformly distributed in the poly layer, forming initial doping. Depositing a poly layer on the front side further reduces the carrier recombination rate at the battery surface and decreases the contact resistance, thereby further improving battery efficiency.
[0028] S4 annealing: During high-temperature annealing, doping diffuses through the oxide layer or its pinholes, forming locally highly doped regions in the silicon substrate. Current converges to these localized contact regions, resulting in lower minority carrier recombination and lower majority carrier transport resistance. (Deposited SiN) x Alternatively, an Al2O3 coating layer can be used to further reduce surface bonding.
[0029] In some embodiments of this application, the cleaning solution for the first cleaning is prepared by mixing NH4OH, H2O2, and H2O at 70-80°C in a ratio of 1:1:5, and the cleaning time is 200-500 seconds. H2O2 oxidizes organic matter, while NH4OH dissolves and peels off particles.
[0030] In some embodiments of this application, the cleaning solution for the secondary cleaning is prepared by mixing HCl, H2O2, and H2O at 70-80°C in a ratio of 1:1:6, and the cleaning time is 200-500 seconds. HCl complexes metal ions (such as Fe). 3+ Cu 2+ H2O2 prevents the re-adsorption of metals, thus removing metal impurities.
[0031] In some embodiments of this application, the cleaning solution for the three cleaning cycles is prepared by mixing HF and H2O in a ratio of 1:(50-100), and the cleaning time is 80-200 seconds. This removes the natural oxide layer (SiO2) on the silicon wafer surface, forming a hydrogen-terminated surface.
[0032] In some embodiments of this application, the laser wavelength in step S2 is 355nm (ultraviolet) and 532nm (green light). Shorter wavelengths have higher absorption rates and higher processing precision; the pulse width is 10... -9 -10 -15 s, ultrashort pulse reduces the heat-affected zone; energy density is 0.5-5 J / cm³. 2 Excessive scanning speed leads to over-ablation, while insufficient scanning speed results in incomplete structures. The optimal scanning speed is 1-10 m / s, and the optimal scanning frequency is 10-100 kHz. Both excessively high and low speeds will affect production efficiency and structural uniformity.
[0033] In some embodiments of this application, the pyramid size in step S2 is 1-10 μm, which needs to match the incident light wavelength (visible to near-infrared). SF6 or Cl2 gas chemical etching is used to enhance structure formation during laser scanning; the structure density is adjusted by the laser scanning path (e.g., spiral, parallel lines) and overlap.
[0034] In some embodiments of this application, the poly deposition temperature in step S3 is 200-400℃ to avoid thermal damage to the substrate and to be compatible with temperature-sensitive structures; the radio frequency power is 10-100W to excite plasma and decompose the reactive gases; the gas pressure is 50-500mTorr, which affects the film uniformity and deposition rate; the gas flow ratio of doped borane is SiH4∶B2H6=(100-10)∶1 to adjust the doping concentration; the deposition rate is 0.1-5nm / s to control the film thickness (typically 50-200nm).
[0035] In some embodiments of this application, the annealing in step S4 is performed using rapid thermal annealing or laser annealing; the rapid thermal annealing temperature is 800-1000℃, and the time is 30-45 min. Annealing activates boron atoms and repairs defects. High temperatures may cause boron to diffuse into the substrate; therefore, this application uses optimized temperature and time.
[0036] The features and performance of this application will be further described in detail below with reference to the embodiments.
[0037] Example 1
[0038] A method for producing a low contact resistance TOPcon battery includes the following steps:
[0039] S1. Inspection and Cleaning of Silicon Wafers: Incoming inspection mainly includes checking the perpendicularity, line marks, missing corners, microcracks, resistivity, warpage, O content, minority carrier lifetime, and C content of the silicon wafers. Cleaning involves using a cleaning solution to remove oil, organic matter, impurities, and surface damage from the silicon wafer surface. This damage layer originates from defects such as dislocations generated during silicon wafer cutting. The cleaning steps in this embodiment are as follows: First, a cleaning solution is prepared using NH4OH, H2O2, and H2O at 70°C in a 1:1:5 ratio, and the cleaning time is 300 seconds. Then, a cleaning solution prepared using HCl, H2O2, and H2O at 70°C in a 1:1:6 ratio is used for 300 seconds. Finally, a cleaning solution prepared using HF and H2O in a 1:60 ratio is used for 150 seconds.
[0040] S2. Laser selective texturing to form a pyramidal surface in the light absorption region; the laser wavelength is 355nm; the pulse width is 10. -10 s; energy density is 2J / cm 2 The scanning speed is 6 m / s. The surface morphology of the silicon wafer after this process step is as follows: Figure 1 As shown, it has an uneven surface structure. The light absorption region forms a pyramidal surface with varying heights, utilizing the light-trapping principle to enhance light absorption, as follows: Figure 2 As shown.
[0041] S3. Poly deposition was performed on the front side using PECVD, followed by the introduction of borane to form preliminary boron doping: the poly deposition temperature was 350℃, the RF power was 50W, and the gas pressure was 300mTorr; the gas flow rate ratio of the doped borane was SiH4∶B2H6=50∶1; the deposition rate was 2nm / s.
[0042] S4. High-temperature annealing: RTA thermal annealing is used at a temperature of 850℃ for 40 minutes.
[0043] Example 2
[0044] A method for producing a low contact resistance TOPcon battery includes the following steps:
[0045] S1. Inspection and Cleaning of Silicon Wafers: Incoming inspection mainly includes checking the perpendicularity, line marks, missing corners, microcracks, resistivity, warpage, O content, minority carrier lifetime, and C content of the silicon wafers. Cleaning involves using a cleaning solution to remove oil, organic matter, impurities, and surface damage from the silicon wafer surface. This damage layer originates from defects such as dislocations generated during silicon wafer cutting. The cleaning steps in this embodiment are as follows: First, a cleaning solution is prepared using NH4OH, H2O2, and H2O at 70°C in a 1:1:5 ratio, and the cleaning time is 200 seconds. Then, a cleaning solution prepared using HCl, H2O2, and H2O at 70°C in a 1:1:6 ratio is used for 500 seconds. Finally, a cleaning solution prepared using HF and H2O in a 1:90 ratio is used for 200 seconds.
[0046] S2. Laser selective texturing to form a pyramidal surface in the light absorption region; the laser wavelength is 355nm; the pulse width is 10. -10 s; energy density is 4 J / cm³ 2 The scanning speed is 5 m / s.
[0047] S3. Poly deposition was performed on the front side using PECVD, followed by the introduction of borane to form preliminary boron doping: the poly deposition temperature was 350℃, the RF power was 50W, and the gas pressure was 200mTorr; the gas flow rate ratio of the doped borane was SiH4∶B2H6=60∶1; the deposition rate was 2.5nm / s.
[0048] S4. High-temperature annealing: RTA thermal annealing is used at a temperature of 850℃ for 40 minutes.
[0049] Experimental Example
[0050] 1. The characterization data of different napped surface treatments in this experiment are shown in Table 1.
[0051] Table 1
[0052]
[0053] Note: BL is the texturing data of the conventional TopCon-PE process route (the steps include texturing, boron diffusion emitter, etching, ALD deposition of silicon dioxide, PECVD deposition and in-situ doping of polysilicon and annealing); SY is the texturing data of the process in Example 1 of this application.
[0054] In the table: Size: Size of the pile pyramid; Height: Height of the pile pyramid; Count: Number of pile pyramids; Ratio: Pile yield.
[0055] 2. This experimental example compares the differences in electrical performance of batteries prepared by different processes, as shown in Table 2.
[0056] Table 2
[0057]
[0058]
[0059] Note: BSL is the efficiency of a conventional TopCon-PE process cell; SY is the efficiency of a cell produced using the process described in Example 1 of this application.
[0060] According to the verification data in Tables 1 and 2, the efficiency of the cells using this application is 0.025-0.031% higher than that of cells using the conventional TopCon process. This is mainly reflected in an increase of 0.015-0.021A in Isc and 0.137-0.23% in FF.
[0061] In summary, the method for producing a low contact resistance TOPcon battery according to the embodiments of this application has the following advantages:
[0062] 1. This application employs laser selective texturing. By using lasers to create light-trapping structures, various textured surfaces with good anti-reflection effects can be obtained, effectively reducing the reflectivity of the crystalline silicon surface and improving the photoelectric conversion efficiency of photovoltaic cells. At the same time, since there is no textured surface with high and low undulations in the printing area, the silver paste directly contacts the flat silicon wafer surface. Therefore, compared with the pyramidal textured area, the flat silicon wafer surface is more likely to obtain an ideal linear shape, that is, an aspect ratio that is infinitely close to 50%. At this time, a good grid line morphology can achieve a lower contact resistance.
[0063] 2. This application employs front-side poly deposition to further reduce the carrier recombination rate on the battery surface and decrease contact resistance, thereby further improving battery efficiency. Simultaneously, the use of PECVD for doping reduces the negative impacts of high-temperature processes.
[0064] The embodiments described above are some, but not all, of the embodiments of this application. The detailed description of the embodiments of this application is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
Claims
1. A method for producing a low contact resistance TOPcon battery, characterized in that, Includes the following steps: S1. Inspection and cleaning of silicon wafers; S2, Laser selective texturing, forming a pyramidal surface in the light absorption area; S3. Poly deposition is performed on the front side using PECVD, and borane is introduced to form preliminary boron doping; S4, High-temperature annealing.
2. The method for producing a low contact resistance TOPcon battery according to claim 1, characterized in that, The inspection in step S1 includes the inspection of the silicon wafer's perpendicularity, line marks, missing corners, microcracks, resistivity, warpage, O content, minority carrier lifetime, and C content; the cleaning involves using different cleaning solutions to perform primary, secondary, and tertiary cleaning to remove oil, organic matter, impurities, and surface damage from the silicon wafer surface.
3. The method for producing a low contact resistance TOPcon battery according to claim 2, characterized in that, The cleaning solution for the first cleaning is prepared by mixing NH4OH, H2O2 and H2O at 70-80℃ in a ratio of 1:1:5, and the cleaning time is 200-500s.
4. The method for producing a low contact resistance TOPcon battery according to claim 2, characterized in that, The cleaning solution for the secondary cleaning is prepared by mixing HCl, H2O2 and H2O at 70-80℃ in a ratio of 1:1:6, and the cleaning time is 200-500s.
5. The method for producing a low contact resistance TOPcon battery according to claim 2, characterized in that, The cleaning solution for the three cleanings is prepared by mixing HF and H2O in a ratio of 1:(50-100), and the cleaning time is 80-200s.
6. The method for producing a low contact resistance TOPcon battery according to claim 1, characterized in that, In step S2, the laser wavelengths are 355nm and 532nm; the pulse width is 10. -9 -10 -15 s; energy density is 0.5-5 J / cm³ 2 The scanning speed is 1-10 m / s, and the scanning frequency is 10-100 kHz.
7. The method for producing a low contact resistance TOPcon battery according to claim 1, characterized in that, The pyramid size in step S2 is 1-10 μm, and the structure is enhanced by chemical etching with SF6 or Cl2 gas during laser scanning.
8. The method for producing a low contact resistance TOPcon battery according to claim 1, characterized in that, The poly deposition temperature in step S3 is 200-400℃, the radio frequency power is 10-100W, and the gas pressure is 50-500mTorr; the gas flow rate ratio of doped borane is SiH4∶B2H6=(100-10)∶1; and the deposition rate is 0.1-5nm / s.
9. The method for producing a low contact resistance TOPcon battery according to claim 1, characterized in that, The annealing in step S4 is performed using rapid thermal annealing or laser annealing; the rapid thermal annealing temperature is 800-1000℃ and the time is 30-45min.