LED driving device
By using a ripple remover SMPS converter in the LED driver and adjusting the operating modes of the PFC circuit and auxiliary SMPS, the problem of balancing THD and efficiency under dimming conditions was solved, achieving efficient and stable driving under different load conditions.
Patent Information
- Application Number
- CN202480032402.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-03
- Filing Date
- 2024-05-08
- Publication Date
- 2025-12-30
AI Technical Summary
Existing LED driver devices struggle to balance total harmonic distortion (THD) and efficiency under dimming conditions, especially in deep dimming where high output voltage is required, leading to increased cost and size.
The SMPS converter employs a ripple remover. By switching modes of the PFC circuit and auxiliary SMPS, the output voltage is adjusted to adapt to input voltage variations within the suboptimal range, ensuring the normal operation of the PFC circuit and reducing THD.
Under different dimming conditions, the THD and efficiency of the drive unit were improved, flickering was reduced, and the need for expensive components was decreased.
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Figure CN121241658A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of lighting, and more particularly to a field driving device for lighting. Background Technology
[0002] LED drivers have stringent power factor (PF) and total harmonic distortion (THD) requirements to ensure efficient operation. These drivers consume significant amounts of power, thus impacting the power grid. Typically, power factor correction (PFC) circuits are used in LED drivers to achieve high PF and low THD. Different types of topologies can be selected for PFC circuits, such as buck converters, boost converters, etc.
[0003] When driving LED devices using this type of driver, the output voltage of the PFC circuit is often limited / clamped by the relatively / substantially fixed forward voltage of any LED in the LED device. However, to maintain the operation of many types of PFC circuits, there are certain conditions between the input and output voltages. This condition often conflicts with the relatively fixed forward voltage of the LED.
[0004] More specifically, for buck PFC circuits, high output voltage is preferred for driving LED devices to improve efficiency. However, high output voltage results in significant THD because buck PFC circuits cannot operate when the input voltage is lower than the output voltage, thus requiring longer no-load times. Therefore, balancing total harmonic distortion (THD) and efficiency is challenging. Some applications (such as TLEDs) have stringent THD requirements and also demand high efficiency, making addressing this challenge crucial for viable operation.
[0005] For boost PFC circuits, the PFC output voltage needs to be greater than the maximum peak voltage of the AC input to ensure proper circuit operation. Specifically, for dimmable lighting applications, the LED forward voltage drops rapidly as the LED current decreases. For example, when operating under full load (i.e., undimmed) conditions, the LED forward voltage is typically designed to be higher than the AC input voltage. However, under dimming conditions, the LED forward voltage drops, and the boost PFC output voltage also drops. When the PFC output voltage is lower than the peak value of the AC input voltage, the boost cannot function effectively. In some cases, the voltage at 10% lumen load can be only about 50% to 60% of the voltage under full load (i.e., undimmed) conditions. Simply put, it is difficult to design an effective boost PFC for dimming circuits under deep dimming conditions because it requires very high-voltage, high-capacity E-CAPs and MOSFETs, with undesirable high cost and large size.
[0006] Therefore, there is a need for a driver for LED lighting devices that can provide low THD with appropriate efficiency, and a driver that allows cost-effective dimming of LED lighting.
[0007] US2017 / 0288557A1 discloses a single-stage power converter for driving LEDs, wherein there is a first output circuit primarily used for power factor correction and generating a first output, and a second output circuit for generating a second output superimposed on the first output, for substantially eliminating ripple in the first output as seen by the load. Figure 1 The architecture is illustrated schematically. Summary of the Invention
[0008] The basic idea of this invention is to use a so-called ripple remover SMPS converter, similar to the second output circuit in the aforementioned prior art, to help alleviate the constraint of the LED forward voltage on the PFC circuit. More specifically, when the input voltage is in a suboptimal range that does not satisfy the aforementioned operating conditions between the input and output voltages of the PFC circuit, the output voltage of the PFC circuit can be overridden to have a specific amplitude pattern that satisfies the conditions, thereby maintaining the operation of the PFC circuit. Simultaneously, the ripple remover SMPS converter initiates the generation of additional signal patterns to compensate for the specific amplitude patterns in the overridden output voltage of the PFC circuit, so that the superimposed output voltage of the PFC circuit and the output voltage of the SMPS converter remain smooth, and flicker in the driven LED device is reduced / avoided. In the prior art, the SMPS converter is designed to compensate only for the natural PFC ripple in the PFC output voltage, rather than for the specific amplitude patterns in the overridden PFC output voltage.
[0009] This invention is defined by the claims.
[0010] According to one aspect of the present invention, a driving device for an LED lighting device is provided, the driving device comprising: an input terminal adapted to receive a rectified AC voltage having a first ripple corresponding to a frequency of the rectified AC voltage; a power factor correction (PFC) circuit configured to operate in a first PFC amplitude modulation mode, in which the PFC circuit converts the rectified AC voltage into a PFC output voltage for implementing power factor correction, the PFC circuit including a follower circuit to cause the PFC output voltage to have a second ripple corresponding to a frequency of the rectified AC voltage and following the first ripple; and an auxiliary switching mode power supply (SMPS) configured to generate an offset signal provided in series with the PFC output voltage to produce a superimposed signal for application to a load, wherein the auxiliary SMPS is configured to operate in a first SMPS amplitude modulation mode. To generate a third ripple out of phase with the second ripple in the offset signal, such that the superimposed signal has a smooth second ripple, and wherein, in response to a rectified AC voltage within a suboptimal range that does not satisfy the operating conditions between the rectified AC voltage and the PFC output voltage of the PFC circuit: the PFC circuit is further configured to switch from a first PFC amplitude modulation mode to a second amplitude modulation mode, wherein the PFC circuit further includes a generation circuit for generating a first signal pattern in the PFC output voltage that corresponds to the frequency of the rectified AC voltage and is different from the second ripple, using the first signal pattern to satisfy the operating conditions in order to maintain the operation of the PFC circuit; and the auxiliary SMPS is further configured to switch from a first SMPS amplitude modulation mode to a second SMPS amplitude modulation mode, in which the auxiliary SMPS generates a second signal pattern in the offset signal, the second signal pattern being different from the third ripple and adapted to compensate for the first signal pattern.
[0011] The embodiments proposed in this invention are based on the understanding that, for certain rectified AC voltage amplitudes, the PFC circuit (e.g., a buck converter or boost converter) and the auxiliary SMPS (e.g., a micro-converter) may be unable to provide a satisfactory output voltage to the load (e.g., an LED device). Therefore, when the rectified AC voltage is within a suboptimal range, the PFC circuit and the auxiliary SMPS each switch to a second operating mode, in which they output signal patterns different from their normal / conventional operating modes.
[0012] By altering the output of the PFC circuit and auxiliary SMPS in response to the rectified AC voltage within a suboptimal range (i.e., a predetermined voltage window), the total harmonic distortion (THD) and efficiency of the driver device can be improved, while reducing / avoiding flicker in the final output of the LED device. In other words, a normally operating PFC circuit can perform poorly in terms of efficiency and THD in response to certain input AC voltages. One way to address this is to change the output voltage of the PFC circuit; however, this can negatively impact the power of the LED device and requires expensive additional components.
[0013] Therefore, enabling the PFC circuit and auxiliary SMPS to switch to the second operating mode can, on the one hand, facilitate the reduction of PFC circuit downtime, reduce THD and improve efficiency (depending on the PFC circuit topology (e.g., buck converter, boost converter, etc.), and on the other hand, maintain the stability of the total / superimposed output to the LEDs by enabling the auxiliary SMPS to operate in an output expansion or output compression mode that complements the output compression or output expansion mode of the PFC circuit.
[0014] In some embodiments, the PFC circuit operating in the second amplitude modulation mode may be adapted to modify the amplitude of the PFC output voltage provided in the first PFC amplitude modulation mode so as to maintain operation when the difference between the amplitude of the rectified AC voltage and the voltage at the load is less than a threshold voltage.
[0015] In other words, in the prior art, the PFC circuit cannot operate when the difference between the rectified AC voltage and the load voltage is less than a threshold. In contrast, embodiments of the present invention modify the amplitude of the PFC output voltage of the PFC circuit to maintain its operation. Therefore, the overall THC and efficiency of the drive device can be improved. Implicitly, the modification amplitude of the PFC output voltage is compensated by an auxiliary SMPS.
[0016] More specifically, in some cases, by allowing an additional difference between the amplitude of the rectified AC voltage and the PFC output voltage within the operating range of the PFC circuit, the PFC circuit can be adapted to operate when the difference is less than a threshold voltage, thereby ensuring that the PFC circuit maintains operation when the amplitude of the rectified AC voltage differs from the voltage amplitude of the load by at least the difference.
[0017] By ensuring that the PFC circuit continues to operate when the amplitude of the rectified AC voltage and the amplitude of the load exceed a certain amount, the total downtime of the circuit within the rectified AC voltage cycle can be reduced.
[0018] In some embodiments, the PFC circuit may be configured to switch between a first PFC amplitude modulation mode and a second amplitude modulation mode in each cycle of the rectified AC voltage, and the auxiliary SMPS may be configured to switch between a first SMPS amplitude modulation mode and a second SMPS amplitude modulation mode in each cycle of the rectified AC voltage.
[0019] In other words, the PFC circuit and auxiliary SMPS are configured to switch operating modes at least once per cycle, thus compensating for periodic transient voltage variations in the rectified AC voltage during each cycle (improving THC, efficiency, and downtime). In this case, the mode is short-lived.
[0020] In alternative embodiments, embodiments of the invention can also be used if the RMS amplitude of the rectified AC voltage varies over a relatively long period due to unstable effects. For example, during off-peak hours, the RMS amplitude of the rectified AC voltage can be relatively moderate, such as 220V, and the drive operates at its rated input and works well without activating the second amplitude modulation mode and the second SMPS amplitude modulation; during off-peak hours, the RMS amplitude of the rectified AC voltage can be relatively high, such as 240V, and the drive can activate the second amplitude modulation mode and the second SMPS amplitude modulation. For example, if the PFC circuit is a boost converter, the PFC output can be modulated to a mode with a higher average value during off-peak hours so that the boost converter can operate for as long as possible. In this case, the mode is long-term. Crucially, the auxiliary SMPS will reduce the offset signal in such a way that the superimposed signal to the load remains the same.
[0021] Furthermore, the PFC circuit can be a buck converter. Therefore, the suboptimal range can include rectified AC voltage below the first threshold voltage. In this case, the first signal mode can be a voltage-down pulse relative to the second ripple, and the second signal mode can be a voltage-up pulse.
[0022] As summarized above, a high output voltage is preferred for improving efficiency. However, when the PFC circuit is a buck converter, this increases the idle time of the PFC circuit, thereby increasing THD. To address this issue, the PFC circuit is allowed to output a lower output voltage to match the reduced rectified AC voltage. When the rectified AC voltage drops below a threshold voltage, this embodiment of the invention achieves a low THD and high efficiency drive circuit as both a PFC circuit and an auxiliary SMPS switching operation mode, allowing the circuit to operate for a longer period. Therefore, this reduces idle time, improves THD, and simultaneously provides a high output voltage for improved efficiency.
[0023] The buck converter can be a buck converter, and the first threshold voltage can be equal to or less than the forward voltage of the load, so that the PFC circuit can maintain operation when the amplitude of the rectified AC voltage is less than the forward voltage of the load.
[0024] Alternatively, the PFC circuit can be a boost converter. In this case, the suboptimal range can include a rectified AC voltage exceeding a second threshold voltage, the first signal mode can be a voltage-up pulse relative to the second ripple, and the second signal mode can be a voltage-up pulse.
[0025] As mentioned above, for boost converters, the PFC output voltage needs to be greater than the maximum peak voltage of the AC input to ensure normal circuit operation. This is particularly important for dimmable LED devices, where the PFC circuit output voltage may need to be much lower than during normal operation. However, by switching the PFC circuit's operating mode to provide a higher output voltage when the AC voltage exceeds a certain level, the PFC circuit can continue to operate while the rectified AC voltage approaches or even exceeds the positive voltage of the load. This allows for normal operation of the driver circuit, even during deep dimming of the LED as a load (without the need for expensive and high-capacity E-CAPs and MOSFETs). A second mode involves a reduced or even negative amplitude in the offset signal to complement the increased output voltage of the PFC circuit, thereby providing the desired LED voltage.
[0026] Specifically, the boost converter can be a boost converter, and the second threshold voltage can be equal to or greater than the forward voltage of the load, so that the PFC circuit can maintain operation when the amplitude of the rectified AC voltage is close to or even higher than the forward voltage of the load.
[0027] In some embodiments, under the condition that the forward voltage of the load meets a predetermined requirement, in response to a rectified AC voltage within a suboptimal range, the PFC circuit can be configured to switch from a first PFC amplitude modulation mode to a second amplitude modulation mode, and the auxiliary SMPS can be configured to switch from the first SMPS amplitude modulation mode to the second SMPS amplitude modulation mode. Otherwise, the PFC circuit can be configured to remain in the first PFC amplitude modulation mode, and even in response to a rectified AC voltage within a suboptimal range, the auxiliary SMPS can also be configured to remain in the first SMPS amplitude modulation mode.
[0028] In other words, the forward voltage of the LED load can vary under different operating conditions. In some conditions, the forward voltage and the rectified AC voltage within a suboptimal range still have an acceptable relationship for the operation of the PFC circuit, while in others this is not the case. Therefore, the driver circuit can be configured to change its operating mode only when the forward voltage of the load causes the problems discussed above (no-load time, inappropriate operation, etc.) to occur; otherwise, it can maintain the original mode. This provides a flexible driver that achieves optimal performance under all different operating conditions.
[0029] Specifically, the PFC circuit can be a buck converter, and when the PFC circuit is a buck converter, it can meet the predetermined requirements when the forward voltage of the load is higher than the first voltage level.
[0030] Alternatively, the PFC circuit can be a boost converter, and the suboptimal range can include the amplitude of the rectified AC voltage exceeding the load forward voltage. The load can be an LED, and a predetermined load forward voltage corresponds to the LED being dimmed, thus reducing its forward voltage. In this case, the first signal mode can be a voltage upward pulse relative to the second ripple, and the second signal mode can be a voltage downward pulse. The predetermined load forward voltage can correspond to the LED being dimmed, thus reducing its forward voltage. In this embodiment, when the LED is not dimmed, its forward voltage is sufficiently high, and the PFC circuit without activating the second amplitude modulation mode can operate with good THD. And when the LED is dimmed, its forward voltage decreases, therefore the PFC circuit needs to activate the second amplitude modulation mode to increase its output voltage.
[0031] In some embodiments, in response to the rectified AC voltage no longer meeting a predetermined amplitude condition, the PFC circuit can also be configured to switch from a second amplitude modulation mode to a first PFC amplitude modulation mode. Furthermore, the auxiliary SMPS can also be configured to switch from a second SMPS amplitude modulation mode to a first SMPS amplitude modulation mode.
[0032] In other words, when the amplitude condition of the rectified AC voltage is no longer applicable, the drive unit can switch back to the first (typical / normal) operating mode, thereby ensuring the effective and efficient operation of the drive unit.
[0033] According to another aspect of the present invention, an LED lighting circuit is provided, which includes a driving device according to an embodiment of the present invention and an LED device as a load.
[0034] Furthermore, according to other aspects of the present invention, an LED lighting device is provided, which includes an LED lighting circuit.
[0035] These and other aspects of the invention will become apparent and will be explained with reference to one or more embodiments described below. Attached Figure Description
[0036] To better understand the invention and to more clearly illustrate how to practice it, reference will now be made to the accompanying drawings by way of example only, in which:
[0037] Figure 1 This is a block diagram of a known device for driving LED lighting;
[0038] Figure 2 Presented the corresponding Figure 1 A waveform graph of the device;
[0039] Figure 3 This is a block diagram of a driving device for an LED lighting device according to an embodiment of the present invention;
[0040] Figure 4 This is a block diagram of a driving device for an LED lighting apparatus according to another embodiment of the present invention.
[0041] Figure 5 Presented the corresponding Figure 4 A waveform graph of the device;
[0042] Figure 6 This is a block diagram of a driver for an LED lighting device according to another embodiment of the present invention; and
[0043] Figure 7 Presented the corresponding Figure 6 The waveform curve of the device. Detailed Implementation
[0044] The invention will be described with reference to the accompanying drawings.
[0045] It should be understood that while the detailed description and specific examples indicate exemplary embodiments of the apparatus, system, and method, they are for illustrative purposes only and are not intended to limit the scope of the invention. These and other features, aspects, and advantages of the apparatus, system, and method of the present invention will become more readily understood from the following description, the appended claims, and the accompanying drawings. It should be understood that the drawings are merely schematic and are not drawn to scale. It should also be understood that in all the drawings, the same reference numerals are used to indicate the same or similar parts.
[0046] Based on a study of the accompanying drawings, the disclosure, and the appended claims, those skilled in the art can understand and implement variations of the disclosed embodiments in practicing the claimed invention. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite articles "a" or "an" do not exclude a plurality. If the term "suitable" is used in the claims or description, it should be noted that the term "suitable" is intended to be equivalent to the term "configured as."
[0047] Based on the proposed concept, many possible solutions can be implemented individually or in combination. That is, although these possible solutions can be described separately below, two or more of these possible solutions can be implemented in one combination or another.
[0048] A driver for LED lighting devices is provided that adaptively adjusts the output voltage of a power factor correction (PFC) circuit to improve total harmonic distortion (THD), increase efficiency, and extend dimming performance. More specifically, the PFC circuit and an auxiliary switching mode power supply (SMPS) have series-connected outputs and change operating modes in response to a suboptimal input rectified AC voltage. Therefore, the PFC circuit can maintain consistent operation for a longer period within the cycle of the rectified AC input voltage.
[0049] In other words, embodiments of the present invention provide a high power factor (PF), low ripple driver based on a micro-converter suitable for LED lighting devices. Embodiments of the present invention can efficiently and adaptively adjust the output voltage of the PFC stage to improve THD. Other embodiments are able to operate the PFC circuit even during deep dimming of the output LED, even when it is attached as a load (i.e., a load with a low forward voltage).
[0050] A method / mode is proposed to adjust the amplitude of the output voltage of the modulation PFC circuit according to changes in the input voltage, and preferably also according to changes in the load. Therefore, the circuit can have a short no-load time. Simultaneously, the miniature converter can compensate for the adjusted voltage amplitude to maintain a constant load current / voltage in the load (i.e., the LED). This results in an increased on-time, reduced no-load time of the input current, and lower THD without affecting load performance. In various embodiments, the PFC circuit can be a buck converter or a boost converter. Other types of converters, such as flyback converters, can also be used as PFC circuits.
[0051] According to various embodiments, the LED lighting driver includes an input terminal adapted to receive a rectified AC power input voltage having ripple corresponding to the AC power frequency. It also includes a power factor correction circuit configured with a first PFC output voltage amplitude modulation mode to implement PFC on the rectified AC power input voltage as a PFC output voltage (the PFC output voltage following the ripple) at the PFC output. An auxiliary SMPS is also provided, having an output in series with the PFC output and adapted to output an offset signal out of phase with the PFC output voltage using the first auxiliary SMPS voltage amplitude modulation mode, and to superimpose the offset signal onto the PFC output voltage (thereby smoothing the PFC output voltage with the superimposed signal).
[0052] Furthermore, embodiments of the present invention specify that when the AC power input voltage is at a predetermined point or a suboptimal range, the PFC circuit is also adapted to switch from a first PFC output voltage amplitude modulation mode to a second output voltage amplitude modulation mode, and generate a signal (mode) in the PFC output voltage that has a different voltage amplitude than that corresponding to the first output voltage amplitude modulation mode. Additionally, the auxiliary SMPS is also adapted to use the second auxiliary SMPS voltage amplitude modulation mode to generate a second signal (mode) in the offset signal to compensate for the first signal (mode).
[0053] More specifically, when the PFC circuit is a buck converter, one embodiment reduces the output voltage of the buck converter near the zero-crossing point of the AC power supply to shorten the no-load time, and a miniature ripple remover increases its output voltage to compensate for this reduced buck output voltage, so that the total superimposed voltage and the current to the load remain substantially unchanged.
[0054] Alternatively, when the PFC circuit is a boost converter, one embodiment increases the boost converter's output voltage to near the peak of the AC supply to allow the boost voltage to operate properly (especially in dimming conditions with low LED voltage and smaller size and lower cost E-CAP). A miniature ripple remover reduces its output voltage or even reverses its polarity to compensate for this increased boost output voltage, so that the total superimposed voltage and the current to the load remain essentially unchanged. This achieves a greater dimming depth. The miniature ripple remover reduces the output voltage to compensate for this increased boost output voltage.
[0055] Buck PFC plus micro-converter driver architecture such as Figure 1As shown. That is, a buck topology PFC circuit 110 and a micro-converter 120 are provided, and the outputs of the PFC circuit 110 and the micro-converter 120 are connected in series with a set of LEDs 130. Note that the input of the micro-converter 120 is shown to be connected within the buck PFC, or alternatively, it can also be directly connected to the input.
[0056] A typical 12Wbuck PFC was tested, which has Figure 1 The configuration of the miniature converter circuit, and the shape of the key waveform as shown Figure 2 As shown. The PFC output voltage is represented by the dashed line, which is the input AC voltage, and the solid line is the input current.
[0057] Based on the test, it can be determined that when V in =230V、V pfc_out =128V, V led =144.76V, V mini_out =16V, P in At 12.08W, the drive efficiency is 95.43%, PF is 0.9494, THD is 26.83%, and the no-load time is 1.5ms. When V in =230V、V pfc_out =91.5Vdc、V led =103.96V, P in =12.06W. In this case, the efficiency is 94.51%, PF is 0.9678, THD is 16.26%, and the idle time is 1ms.
[0058] This demonstrates that a lower output voltage is required from the PFC circuit (e.g., a buck converter) to meet the THD < 20% requirement, which also results in lower efficiency. For the given example, when the LED voltage drops from 103.96Vdc to 144.76Vdc, the efficiency decreases by 1%, while the THD decreases from 26.83% to 16.26%. Therefore, this illustrates the trade-off required to achieve a sufficient THD level with satisfactory efficiency.
[0059] Figure 3 A simplified block diagram of a driver 200 for an LED lighting device 230 according to the present invention is presented. The driver is a system that supplies appropriate current and voltage to an LED from a rectified AC voltage.
[0060] The drive unit 200 has an input terminal adapted to receive a rectified AC voltage having a first ripple corresponding to the frequency of the rectified AC voltage. That is, a rectified AC voltage can be provided to the input terminal of the drive unit. The rectified AC voltage can be obtained from a rectifier (e.g., a full-wave rectifier or a half-wave rectifier).
[0061] Furthermore, the drive device includes a PFC circuit 210. The PFC circuit 210 is configured to operate in a first PFC control mode (i.e., a first PFC amplitude modulation mode), in which the PFC circuit 210 converts the rectified AC voltage into a PFC output voltage. Thus, the PFC circuit 210 performs power factor correction on the rectified AC voltage. Consequently, the PFC output voltage has a second ripple that follows the first ripple (i.e., lags behind the first ripple). This type of first PFC amplitude modulation mode for performing power factor correction is a well-known technique in the art. For example, switching-mode PFC circuits operating in critical conduction mode typically use a constant Ton switching scheme.
[0062] An auxiliary switching mode power supply (SMPS) 220 is also provided, which is configured to generate an offset signal. The offset signal is provided in series with the PFC output voltage to generate a superimposed signal for application to a load (e.g., LED lighting 230). The auxiliary SMPS 220 is configured to operate in a first SMPS control (i.e., amplitude modulation) mode to generate a third ripple in the offset signal that is out of phase with (i.e., preferably 180 degrees behind or ahead of) the second ripple. Therefore, the third ripple is complementary to the second ripple, and the superimposed signal has a smoothed second ripple.
[0063] In other words, the PFC circuit 210 and the auxiliary SMPS 220 are configured with rectified AC voltage input and output voltages connected in series. When the PFC circuit 210 operates in the first PFC amplitude modulation mode, and the auxiliary SMPS 220 operates in the first SMPS amplitude modulation mode, a superimposed signal with a smooth second ripple is generated. The superimposed signal can then be provided to a load, such as LED lighting 230 (i.e., an LED device). This is very similar to the operation of a typical LED lighting driver.
[0064] Importantly, both the PFC circuit 210 and the auxiliary SMPS 220 are also configured to switch from a first operating mode to a second operating mode in response to a rectified AC voltage that meets specific conditions. For the PFC circuit 210 and the auxiliary SMPS 220, this can occur substantially simultaneously (i.e., synchronous switching).
[0065] More specifically, the PFC circuit 210 is also configured to switch from a first PFC amplitude modulation mode to a second amplitude modulation mode, in which the PFC circuit 210 generates a first signal mode in the PFC output voltage. The first signal mode is different from the second ripple.
[0066] In other words, the PFC circuit 210 is also configured to switch from a PFC amplitude modulation mode to a second amplitude modulation mode, in which the PFC circuit generates a first signal mode different from the second ripple, such that the PFC output voltage has the first signal mode. In this way, the PFC circuit 210 is controlled to generate the first signal mode as its output. The first signal mode is used to adjust the operation of the PFC circuit 210 to achieve specific performance characteristics. For example, the PFC circuit can maintain operation when such a first signal mode is provided, thereby improving THD.
[0067] Furthermore, the auxiliary SMPS 220 is configured to switch from a first SMPS amplitude modulation mode to a second SMPS amplitude modulation mode, in which the auxiliary SMPS 220 generates a second signal mode in the offset signal. The second signal mode differs from the third ripple and is suitable for compensating for the first signal mode, ensuring that the first signal mode does not affect or flicker the LED load.
[0068] Therefore, both the auxiliary SMPS 220 and the PFC circuit 210 change their operating modes in response to a rectified AC voltage that meets a specific condition. This specific condition may be that the magnitude of the AC voltage relative to the load forward voltage reaches or exceeds a predetermined threshold, which may depend on the topology of the PFC circuit.
[0069] In some cases, it may be advantageous for the PFC circuit 210 to be configured to switch between a first PFC amplitude modulation mode and a second amplitude modulation mode during each cycle of the rectified AC voltage. This, of course, means that the auxiliary SMPS 210 is configured in this case to switch between a first SMPS amplitude modulation mode and a second SMPS amplitude modulation mode during each cycle of the rectified AC voltage.
[0070] Furthermore, the PFC circuit 210 can also be configured to switch from a second amplitude modulation mode to a first PFC amplitude modulation mode in response to the rectified AC voltage no longer meeting a predetermined amplitude condition. Additionally, the auxiliary SMPS 220 can also be configured to switch from a second SMPS amplitude modulation mode to a first SMPS amplitude modulation mode in response to the rectified AC voltage no longer meeting a predetermined amplitude condition (e.g., simultaneously / synchronously with the PFC circuit 210).
[0071] In other words, when the conditions (i.e., the predetermined amplitude conditions) are no longer met, both the PFC circuit 210 and the auxiliary SMPS 220 can switch back to normal / regular operation.
[0072] In a specific implementation of the invention, the PFC circuit 210 may be a buck converter (e.g., a buck converter). In this case, specific conditions may include the rectified AC voltage falling below a first threshold voltage. In this case, the first signal mode may be a voltage-down pulse relative to the second ripple, and the second signal mode may be a voltage-up pulse.
[0073] To clarify, this means that when the rectified AC voltage drops below a specific / predetermined threshold voltage, the PFC circuit 210 and the auxiliary SMPS 220 can switch to their second operating modes. In those second operating modes, the PFC circuit 210 generates a voltage-down pulse, and the auxiliary SMPS 220 generates a voltage-up pulse.
[0074] In one example, the first threshold voltage can be equal to or less than the forward voltage of the load. As a result, the PFC circuit 210 (here: the buck circuit) is able to maintain operation because when the amplitude of the rectified AC voltage is less than the forward voltage of the load (e.g., LED lighting 230), the PFC circuit 210 only outputs a downward pulse with a reduced amplitude. This would not occur if the PFC circuit 210 and the auxiliary SMPS 220 remained in their first (normal / conventional) operating mode, in which case the PFC circuit 210 would not operate because the input voltage is already lower than the non-reduced output voltage.
[0075] Alternatively, the PFC circuit 210 may be a boost converter (e.g., a boost converter). In this case, specific conditions may include the rectified AC voltage exceeding a second threshold voltage (i.e., a threshold voltage different from the first threshold voltage). For example, the first signal pattern may be a voltage upward pulse relative to the second ripple, and the second signal pattern may be a voltage downward pulse (i.e., the opposite of when the PFC circuit 210 is a buck converter).
[0076] Specifically, the second threshold voltage can be equal to or greater than the forward voltage of the load. As a result, the PFC circuit 210 will be able to maintain operation when the amplitude of the rectified AC voltage is close to or even higher than the forward voltage of the load (e.g., LED lighting 230). This situation would not occur if the PFC circuit 210 and the auxiliary SMPS 220 remained in their first (normal / conventional) operating mode, in which case the PFC circuit 210 would not operate because the input voltage is already higher than the unincreased output voltage.
[0077] The following is for reference. Figure 4-7 Let's explain the two examples above in more detail.
[0078] Furthermore, generally speaking, the PFC circuit 210 operating in the second amplitude modulation mode can be adapted to modify the amplitude of the PFC output voltage provided in the first PFC amplitude modulation mode so as to maintain operation even when the difference between the amplitude of the rectified AC voltage and the voltage at the load is less than a threshold voltage. For example, if the PFC circuit is a buck converter, the input voltage can be slightly greater than, equal to, or even less than the load voltage. In contrast, the original buck PFC circuit requires the input voltage to be at least slightly larger than the output voltage.
[0079] More specifically, in some cases, a PFC circuit can be adapted to maintain operation when the difference between the amplitude of the rectified AC voltage and the PFC output voltage is less than a threshold voltage, by allowing an additional difference within the operating range between them. For example, to allow the input voltage to be slightly greater than, equal to, or even less than the load voltage, the output voltage of the PFC circuit is gradually reduced so that the input voltage remains greater than the PFC circuit output, and the PFC circuit maintains operation. The reduced PFC output voltage is compensated by the SMPS output voltage.
[0080] This ensures that the PFC circuit 210 maintains operation when the amplitude of the rectified AC voltage differs from the voltage amplitude of the load by at least the stated difference.
[0081] In the final modification, PFC circuit 210 can be configured to switch from a first PFC amplitude modulation mode to a second amplitude modulation mode, and auxiliary SMPS 220 can be configured to switch from the first SMPS amplitude modulation mode to the second SMPS amplitude modulation mode in response to a rectified AC voltage that meets a specific condition (i.e., a predetermined amplitude condition), but only under other conditions where the forward voltage of the load meets a predetermined requirement. That is, the switching of PFC circuit 210 and auxiliary SMPS 220 can only occur when the forward voltage of the load (e.g., LED lighting 230) meets a predetermined requirement. Otherwise, the PFC circuit is configured to remain in the first PFC amplitude modulation mode, and even in response to a rectified AC voltage that meets a specific condition (i.e., a predetermined amplitude condition), the auxiliary SMPS can also be configured to remain in the first SMPS amplitude modulation mode.
[0082] For example, when the PFC circuit 210 is a buck converter (e.g., a buck converter), a predetermined requirement can be met when the forward voltage of the load / LED lighting 230 is higher than a first voltage level. If the forward voltage of the load 230 is lower than the first voltage level, the PFC circuit 210 and the auxiliary SMPS can remain in normal operation without switching to their second mode. This is because the downtime of the PFC circuit operation can be minimized when the forward voltage of the load 230 is lower than the first voltage level (therefore, switching modes may not be beneficial to THD and efficiency overall). When the forward voltage of the load 230 drops too low, the downtime of the PFC circuit operation becomes so severe and unacceptable that it is necessary to start or operate in the second mode to correct it.
[0083] In an alternative example, when the PFC circuit 210 is a boost converter and the predetermined requirement includes the amplitude of the rectified AC voltage exceeding the forward voltage of the load (e.g., LED lighting 230), and the first signal mode is a voltage upward pulse relative to the second ripple, and the second signal mode is a voltage downward pulse, the forward voltage of the load that meets the predetermined requirement may correspond to the load (e.g., LED lighting 230) being dimmed, thereby reducing its forward voltage.
[0084] In other words, as described above, if the forward voltage of the load decreases, the PFC circuit 210 and the auxiliary SMPS 220 will be able to switch operating modes. This decrease in the forward voltage of the load corresponds to the dimming of the load / LED lighting 230. Therefore, while maintaining the operation of the PFC circuit 210, the load 230 can be dimmed more deeply.
[0085] Of course, the aforementioned driving device can be used in LED lighting circuits that include a driving device and an LED device (i.e., one or more LEDs) as a load. Alternatively, LED lighting devices that include the aforementioned LED lighting circuit can also be provided.
[0086] Go to Figure 4 The following illustrates a specific embodiment of the proposed invention, with key waveforms of the driving device as shown. Figure 5 As shown.
[0087] As an explanation, in response to the AC input voltage (V in The voltage drops below a specific value, such as dropping to near or below the PFC output voltage (V) generated for ordinary PFC purposes. pfc_out The PFC output voltage decreases, while the micro-converter 320 (i.e., auxiliary SMPS) at its output voltage (V) mini_outA boost mode is provided in the PFC circuit to compensate for the reduced PFC output voltage, thereby maintaining a constant load current in the load (e.g., an LED device). This can increase the on-time of the PFC circuit, reduce the no-load time of the input current, and improve THD. In this embodiment, a voltage buck block 315 with a switch connected to the PFC circuit 310 is shown. This switch is logically closed to apply the voltage buck function to the PFC circuit, thereby generating a buck signal mode in the PFC output for an appropriate duration. Similarly, a voltage boost block 325 with a switch connected to the microconverter 320 is shown. This switch is logically closed to apply the voltage boost function to the microconverter for an appropriate duration, thereby generating a boost signal mode. It should be noted that the voltage boost blocks and corresponding switches shown are logical / functional, and there may be actual physical circuitry to boost the output voltage of the microconverter, or the microconverter may use its own control loop to boost its output voltage. Both implementations are within the scope of this invention.
[0088] Figure 5 Graph 340 presents the main waveforms of a typical buck converter driver as a reference, while graph 350 presents... Figure 4 The main waveform of the driver. When comparing Figure 5 As can be seen from the curves at 340 and 350, as a specific example, when V in When the voltage is greater than 91.5V and less than 128V, the second mode is activated to override the first mode. In this embodiment of the invention, the second mode of the PFC circuit is determined by the PFC output voltage V. pfc_out A buck mode is formed in the middle, and I can be increased. in The conduction time (shaded area in graph 320).
[0089] The voltage boost block / second mode of the SMPS converter can be used with the offset signal V. mini_out A voltage boost mode is generated to compensate for the voltage drop at the PFC output. In this mode, the operating time is... When V in When the voltage is less than 91.5V or greater than 128V, the boost module 325 can stop operating, and the buck converter / PFC circuit 310 directly outputs the LED voltage.
[0090] Because micro-converters can be designed to have a standard SMPS output V mini_outWithout a boost mode, the efficiency of the microconverter 320 under normal operation is 85%, and this efficiency could be lower if the microconverter were adapted to generate a boost mode. In the simulation, when the microconverter 320 outputs an offset signal including the boost mode, the equivalent total efficiency of the microconverter 320 is 84.1%. Furthermore, the microconverter 320 delivers only a small fraction of the total power to the LED 330. Therefore, assuming the portion of the total power delivered by the microconverter 320 is 10%, and the efficiency of the PFC stage 310 is 97%, the equivalent efficiency of the driver is 95.4%. When V in At 128V, the efficiency is 95.5%. Therefore, with only a 0.1% difference in efficiency, the proposed drive device has a limited impact on efficiency, but achieves a significant improvement in THD.
[0091] Similar to Figure 4 , Figure 6 Specific embodiments of the proposed invention are presented, wherein Figure 7 The key waveforms of the drive unit are shown.
[0092] like Figure 7 As shown in graph 440, in a typical driver, when the LED is at full load (i.e., undimmed), the boost PFC output voltage must be much greater than the maximum peak value of the AC input voltage. The product is designed for these operating conditions. However, when the LED is dimmed, its forward voltage drops, and the boost PFC output voltage clamped by the forward voltage also drops. Therefore, it cannot be guaranteed that the PFC output voltage in dimming mode will be greater than the AC input voltage in deep dimming mode, and the boost converter may stop operating. Therefore, the output capacitor will require high cost and large size to compensate for this.
[0093] However, this problem can be solved by Figure 6The device overcomes this limitation. The PFC output bus voltage can be set close to the maximum AC input voltage, which can be equivalent to the LED voltage at full load (undimmed conditions). Under dimming load conditions, the LED voltage can be lower than the AC input voltage (especially when the AC input voltage is close to its peak). Therefore, when the transient value of the input AC voltage is lower than the PFC output voltage, the boost PFC 410 operates normally. However, when the transient input AC voltage is higher than the LED voltage, by activating the second mode / voltage boost block 415 of the boost PFC, the output voltage of the boost PFC circuit increases to the peak value of the maximum input AC voltage or even higher, so that the boost can operate normally. In this case, the micro-converter 420 is configured with a second mode / voltage buck block 425 to generate a buck mode to compensate for the increased voltage of the PFC output voltage, so as to provide a constant voltage / current to the LED load 430 together with the boost PFC 410. Therefore, under normal boost conditions, the rated voltage of the capacitor can be much lower, thereby reducing the required size and cost. This also facilitates a deeper dimming depth.
[0094] The fact that certain measures are described only in mutually distinct dependent claims does not indicate that a combination of these measures cannot be used advantageously.
[0095] No reference numerals in the claims should be construed as limiting the scope.
Claims
1. A driving apparatus (200) for an LED lighting apparatus (230), comprising: an input adapted to receive a rectified AC voltage having a first ripple corresponding to a frequency of the rectified AC voltage; a power factor correction, PFC, circuit (210) configured to be operable in a first PFC amplitude modulation mode in which the PFC circuit converts the rectified AC voltage into a PFC output voltage for implementing power factor correction, the PFC circuit comprising a follower circuit to cause the PFC output voltage to have a second ripple corresponding to the frequency of the rectified AC voltage and to follow the first ripple; and an auxiliary switched mode power supply, SMPS (220) configured to generate an offset signal provided in series with the PFC output voltage to produce a superimposed signal for application to a load, wherein the auxiliary SMPS is configured to be operable in a first SMPS amplitude modulation mode to generate a third ripple in the offset signal out of phase with the second ripple, such that the superimposed signal has a smoothed second ripple, and wherein, in response to the rectified AC voltage being in a suboptimal range of operating conditions between the rectified AC voltage and the PFC output voltage of the PFC circuit that cannot be satisfied: the PFC circuit is further configured to switch from the first PFC amplitude modulation mode to a second amplitude modulation mode in which the PFC circuit further comprises a generation circuit to generate a first signal pattern in the PFC output voltage corresponding to the frequency of the rectified AC voltage and different from the second ripple, with which the operating conditions are satisfied in order to maintain the PFC circuit operation; and the auxiliary SMPS is further configured to switch from the first SMPS amplitude modulation mode to a second SMPS amplitude modulation mode in which the auxiliary SMPS generates a second signal pattern in the offset signal different from the third ripple and adapted to compensate the first signal pattern.
2. The driving apparatus of claim 1, wherein the PFC circuit (210) operating in the second amplitude modulation mode is adapted to modify an amplitude of the PFC output voltage provided in the first PFC amplitude modulation mode in order to maintain operation when a difference between an amplitude of the rectified AC voltage and a voltage at the load is less than a threshold voltage.
3. The driving apparatus of claim 2, wherein the PFC circuit (210) is adapted to operate when the difference is less than the threshold voltage by allowing a further difference between the amplitude of the rectified AC voltage and the PFC output voltage within an operable range of the PFC circuit, thereby ensuring that the PFC circuit maintains operation when the amplitude of the rectified AC voltage differs from a voltage amplitude of the load by at least the difference.
4. The drive apparatus of any one of claims 1 to 3, wherein: in response to the rectified AC voltage within the sub-optimal range including a time-averaged amplitude of the rectified AC voltage within the sub-optimal range, the PFC circuit (210) is configured to switch between the first PFC amplitude modulation mode and the second amplitude modulation mode across multiple cycles of the rectified AC voltage, and the auxiliary SMPS (220) is configured to switch between the first SMPS amplitude modulation mode and the second SMPS amplitude modulation mode across multiple cycles of the rectified AC voltage.
5. The drive apparatus of any one of claims 1 to 4, wherein the PFC circuit (210) is a buck converter, wherein the sub-optimal range includes the rectified AC voltage falling below a first threshold voltage, and the first signal mode is a voltage down pulse relative to the second ripple, and the second signal mode is a voltage up pulse.
6. The drive apparatus of claim 5, wherein the buck converter is a buck converter, and the first threshold voltage is equal to or less than a forward voltage of the load, such that the PFC circuit (210) is able to remain operational when the amplitude of the rectified AC voltage is less than the forward voltage of the load.
7. The drive apparatus of any one of claims 1 to 4, wherein the PFC circuit (210) is a boost converter, wherein the sub-optimal range includes the rectified AC voltage exceeding a second threshold voltage, and the first signal mode is a voltage up pulse relative to the second ripple, and the second signal mode is a voltage up pulse.
8. The drive apparatus of claim 7, wherein the boost converter is a boost converter, and the second threshold voltage is equal to or greater than a forward voltage of the load, such that the PFC circuit (210) is able to remain operational when the amplitude of the rectified AC voltage is approaching or above the forward voltage of the load. 9. The drive apparatus of any one of claims 1 to 8, wherein on condition that a forward voltage of the load meets a predetermined requirement, in response to the rectified AC voltage being in the sub-optimal range, the PFC circuit (210) is configured to switch from the first PFC amplitude modulation mode to the second amplitude modulation mode, and the auxiliary SMPS (220) is configured to switch from the first SMPS amplitude modulation mode and the second SMPS amplitude modulation mode; otherwise the PFC circuit is configured to remain in the first PFC amplitude modulation mode, and the auxiliary SMPS is configured to remain in the first SMPS amplitude modulation mode, in response to the rectified AC voltage being in the sub-optimal range.
10. The drive apparatus of claim 9, wherein the PFC circuit (210) is a buck converter, and wherein the predetermined requirement is met when the forward voltage of the load is higher than a first voltage level when the PFC circuit is a buck converter.
11. The drive apparatus of claim 9, wherein the PFC circuit (210) is a boost converter, the sub-optimal range includes a magnitude of the rectified AC voltage that exceeds a forward voltage of the load, and the load is an LED, and wherein the first signal pattern is a voltage up pulse relative to the second ripple, and the second signal pattern is a voltage down pulse, wherein the forward voltage of the load that meets the predetermined requirement corresponds to the LED being dimmed such that its forward voltage is reduced.
12. The drive apparatus of any one of claims 1 to 11, wherein in response to the rectified AC voltage no longer being in the sub-optimal range: the PFC circuit (210) is further configured to switch from the second amplitude modulation mode to the first PFC amplitude modulation mode; and the auxiliary SMPS (220) is further configured to switch from the second SMPS amplitude modulation mode to the first SMPS amplitude modulation mode.
13. An LED lighting circuit comprising the drive apparatus (200) of any one of claims 1 to 12 and an LED device as the load.
14. An LED lighting device comprising the LED lighting circuit of claim 13.
Citation Information
Patent Citations
Energy Channelling Single Stage Power Converter
US20170288557A1