Wafer side defect detection method, system, and generation method of reference template set thereof

By constructing grayscale and structural reference template sets, the problem of false defects caused by process fluctuations and mechanical vibrations in wafer side inspection was solved, achieving highly accurate defect identification and improving inspection results.

CN121280449BActive Publication Date: 2026-08-25SUZHOU HUAXING YUANCHUANG TECH CO LTD
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Patent Information

Application Number
CN202511861308.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-11
Publication Date
2026-08-25
Estimated Expiration
2045-12-11

AI Technical Summary

Technical Problem

Existing technologies are difficult to adapt to changes in grayscale values ​​on the wafer side under normal process fluctuations, and the interference from false defects caused by mechanical jitter and alignment deviations is high, affecting the accuracy of inspection and production efficiency.

Method used

By constructing a set of benchmark templates for grayscale benchmark information and structural benchmark information, the grayscale fluctuation range and inherent structural features of good products are characterized respectively. By comparing with the image under test, false defects caused by process fluctuations and mechanical vibrations are eliminated, and real defects are accurately identified.

Benefits of technology

It significantly improves the accuracy and anti-interference ability of wafer side defect detection, reduces the over-inspection rate, and improves production efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a wafer side defect detection method, a wafer side defect detection system and a generation method of a reference template group thereof. The wafer side defect detection method comprises the following steps: obtaining a to-be-detected image of a wafer side to be detected; obtaining a reference template group constructed in advance; determining a gray scale abnormal candidate area based on a comparison result of the to-be-detected image and gray scale reference information; determining a structure interference area based on a matching condition of real-time structure features of the to-be-detected image and structure reference information; and determining a defect detection result of the wafer side to be detected according to the gray scale abnormal candidate area and the structure interference area. The method constructs a gray scale tolerance range suitable for normal process differences of good products, effectively avoids over-detection caused by reasonable gray scale fluctuations of the good products, accurately eliminates false defect signals caused by misplacement of inherent texture edges of the good products due to mechanical shaking or alignment deviation in the detection process, and significantly improves the accuracy and anti-interference ability of wafer side defect detection.
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Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing, and in particular to a method, system, and method for generating a reference template set for detecting wafer side defects. Background Technology

[0002] As semiconductor manufacturing processes become increasingly sophisticated, wafer quality control is becoming more and more important. Defects on the sides of the wafer (such as chipping, cracks, scratches, etc.) that are not detected in time may cause the wafer to break during subsequent high-temperature or stress processes, resulting in serious yield losses.

[0003] Traditional wafer side inspection methods face several significant challenges, such as: Misjudgments due to process variations. During the manufacturing process, the surface grayscale values ​​and textures of a normal wafer often exhibit reasonable fluctuations due to minor differences in processes such as cutting, grinding, or coating. Traditional inspection methods struggle to accommodate these normal process variations, easily misreporting areas within the normal fluctuation range as defects, i.e., over-inspection.

[0004] Interference from inherent structural features and mechanical jitter. Wafer sides often have complex film layer textures. During inspection, due to mechanical factors such as wafer rotation and camera capture triggering, minute pixel-level alignment deviations (i.e., physical jitter) are inevitable between the image under test and the template image. This minute misalignment causes the normal texture edges of the image under test to not completely align with the template. Existing technologies often struggle to distinguish between these structural pseudo-defects caused by jitter and real physical defects, resulting in a high false alarm rate and severely impacting production efficiency. Summary of the Invention

[0005] The purpose of this application is to provide a method, system, and method for generating a reference template set for detecting wafer side defects that can adapt to grayscale fluctuations of good products and effectively eliminate interference from pseudo-defects caused by alignment deviations or inherent structural features.

[0006] To achieve the above-mentioned objective, one embodiment of this application provides a method for detecting defects on the side surface of a wafer, characterized by comprising the following steps: Acquire the image of the side of the wafer to be inspected; Obtain a pre-constructed benchmark template set, which includes at least grayscale benchmark information characterizing the grayscale fluctuation range of good products, and structural benchmark information characterizing the inherent structural features of good products; Based on the comparison results between the image to be tested and the grayscale reference information, grayscale anomaly candidate regions are determined; Based on the matching between the real-time structural features of the image under test and the structural reference information, the structural interference region is determined; Based on the grayscale anomaly candidate region and the structural interference region, the defect detection result of the side surface of the wafer to be inspected is determined; wherein, the defect detection result excludes the portion of the grayscale anomaly candidate region that belongs to the structural interference region.

[0007] As a further improvement to this application, the grayscale reference information includes the highest grayscale template and the lowest grayscale template; The determination of grayscale anomaly candidate regions based on the comparison results between the image to be tested and the grayscale reference information includes: The grayscale value of the image under test is compared with the grayscale values ​​at the corresponding positions of the highest grayscale template and the lowest grayscale template, respectively. When the grayscale value of the image under test is higher than the highest grayscale template or lower than the lowest grayscale template, and the difference exceeds a preset grayscale tolerance threshold, the area where the corresponding position is located is marked as the grayscale anomaly candidate area.

[0008] As a further improvement to this application, the structural reference information includes a contour template; The defined structural interference region includes: Extract the real-time edge contours of the image under test; The real-time edge contour and the contour template are subjected to a difference operation or masking to obtain the area where the real-time edge contour and the contour template do not overlap, which is used as the structural interference area. The determination of the defect detection result on the side of the wafer to be inspected includes: The defect detection result is obtained by subtracting the structural interference region from the gray-scale anomaly candidate region.

[0009] As a further improvement to this application, the step of acquiring the image of the side surface of the wafer to be inspected includes: A complete annular image of the side surface of the wafer to be inspected is acquired, wherein the complete annular image is acquired by a line scan camera; Based on the perimeter of the wafer to be tested and the preset pixel precision, the complete annular image is divided into multiple local sub-images of uniform size along the length direction, wherein the reference template group corresponds to the size of the local sub-images to be tested; The determination of grayscale anomaly candidate regions and the determination of structural interference regions are based on the test images, and are performed on each of the local test sub-images.

[0010] As a further improvement to this application, the following steps are also included: In the image to be tested, identify the feature region of the notch and determine the coordinates of the center position of the notch in the side image coordinate system; When a real defect area exists in the defect detection result, the coordinates of the real defect area in the side image coordinate system are determined based on the distance between the real defect area and the center position of the groove.

[0011] As a further improvement to this application, the following steps are also included: Based on the coordinates of the actual defect area in the side image coordinate system, and combined with the wafer size information, the mapped coordinates of the actual defect area in the front image coordinate system are calculated.

[0012] To achieve one of the above-mentioned objectives, one embodiment of this application provides a wafer sidewall defect detection system, comprising: Storage module, used to store computer programs; The processing module, when executing the computer program, can implement the steps in the above-described method for detecting defects on the side of a wafer.

[0013] To achieve one of the above-mentioned objectives, one embodiment of this application provides a method for generating a reference template group for wafer side surface inspection, comprising the following steps: Acquire several sample images from the side of a good quality wafer; Statistical traversal is performed on the grayscale values ​​at the same pixel coordinate position in each of the sample images; Based on the statistical traversal results, determine the grayscale reference information that characterizes the grayscale fluctuation range of good products; Based on the grayscale reference information or the sample image, extract edge information that characterizes the inherent structural features of the good product, and generate structural reference information; The grayscale reference information and the structural reference information are associated and stored as a reference template group for wafer side inspection.

[0014] As a further improvement to this application, the acquisition of several sample images originating from the side of a good-quality wafer includes: The images of the side surface of the good wafer are acquired and segmented to obtain several candidate local images; Calculate the standard deviation of grayscale values ​​and edge sharpness of the candidate local image; If the standard deviation of the grayscale value of the candidate local image is less than a preset standard deviation threshold, and the edge sharpness is greater than a preset sharpness threshold, then the candidate local image is used as a sample image, wherein the number of sample images is at least 3.

[0015] As a further improvement to this application, the grayscale reference information for determining the grayscale fluctuation range of good products based on statistical traversal results includes: Iterate through the maximum grayscale value of each pixel coordinate position in all the sample images, and combine them to generate the highest grayscale template; Iterate through the minimum grayscale value of each pixel coordinate position in all the sample images, and combine them to generate the lowest grayscale template. The highest grayscale template and the lowest grayscale template together constitute the grayscale reference information.

[0016] As a further improvement to this application, the generation of structural reference information includes: Edge detection processing is performed on the synthesized highest grayscale template to extract feature lines and generate a contour template as the structural reference information.

[0017] Compared with commonly used technologies, this application has the following advantages: The wafer side defect detection method introduces grayscale reference information that characterizes the grayscale fluctuation range of good products, and constructs a grayscale tolerance range that adapts to the normal process differences of good products, effectively avoiding over-inspection caused by reasonable grayscale fluctuations of good products themselves; at the same time, combined with structural reference information that characterizes the inherent structural features of good products, the method identifies structural interference areas by matching and analyzing real-time structural features with reference information, and removes the structural interference areas from the grayscale anomaly candidate areas, thereby accurately eliminating false defect signals caused by mechanical jitter or alignment deviation leading to misalignment of the inherent texture edges of good products during the detection process, significantly improving the accuracy and anti-interference capability of wafer side defect detection. Attached Figure Description

[0018] Figure 1 This is a flowchart of a method for generating a reference template set for wafer side surface defects according to an embodiment of this application.

[0019] Figure 2 This is a flowchart of a wafer side defect detection method according to an embodiment of this application.

[0020] Figure 3 This is a structural block diagram of a wafer side defect detection system according to an embodiment of this application. Detailed Implementation

[0021] The present application will now be described in detail with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present application, and any structural, methodological, or functional modifications made by those skilled in the art based on these embodiments are included within the scope of protection of this application.

[0022] One embodiment of this application provides a method, system, and method for generating a reference template set for detecting wafer side defects that can adapt to grayscale fluctuations in good products and effectively eliminate interference from pseudo-defects caused by alignment deviations or inherent structural features in existing wafer side inspection technologies.

[0023] The following are three embodiments, namely, a wafer side defect detection system, a method for generating a reference template set for wafer side defects, and a wafer side defect detection method.

[0024] Example 1: Wafer Side Surface Defect Detection System This embodiment provides a wafer side defect detection system, which may include only an image processing subsystem or also an image acquisition subsystem. The following description uses a wafer side defect detection system that includes both an image acquisition subsystem and an image processing subsystem as an example. Figure 3 As shown. The image acquisition subsystem is responsible for acquiring complete surface information of the wafer's side surface with high precision, while the image processing subsystem executes the method for detecting defects on the wafer's side surface.

[0025] The image acquisition subsystem includes a line scan camera, a ring light source system, and a high-precision rotating stage.

[0026] Line scan cameras use high-resolution, high-sensitivity line scan cameras, with their field of view aligned with the side edge region of the wafer. Unlike area scan cameras that capture single still images, line scan cameras capture only one extremely narrow "line" at a time.

[0027] The ring light source system preferably uses a blue ring light source with a wavelength of 450nm±10nm. Short-wavelength light has better scattering characteristics on the surface of semiconductor materials, which can more clearly reveal fine scratches, defects, and film texture features on the sides. A high-precision rotating stage is used to support the wafer to be inspected and drive its rotation.

[0028] The image acquisition subsystem uses rotational scanning to unfold the side of the annular wafer into a two-dimensional strip image. The specific scanning process is as follows: The wafer to be inspected is placed on a rotating stage, and a mechanical or visual alignment mechanism is used to ensure that the geometric center of the wafer is highly aligned with the rotation center of the stage, so as to avoid image defocusing or distortion caused by eccentric shaking during rotation.

[0029] The stage drives the wafer to rotate at a constant speed. At the same time, the stationary line scan camera starts to acquire data. The camera's line sampling frequency is strictly synchronized with the stage's rotational angular velocity.

[0030] As the wafer rotates a tiny angle, the camera captures a line of pixels. With each full rotation (360°) of the wafer, the line scan camera continuously acquires complete rows of pixel data. The image acquisition subsystem stitches these data together along the rotation direction to ultimately generate a complete, elongated two-dimensional grayscale image.

[0031] The width of this elongated image covers the thickness direction of the wafer's side surface, and its length corresponds to the wafer's circumference. The total pixel length of the image, circumference L = D × π / p, where D is the wafer diameter and p is the pixel resolution. For example, for a 300mm wafer, if the pixel resolution p = 5µm, the total length of the scanned image is 1.884 × 10⁻⁶. 5 Pixel.

[0032] Using the scanning method described above, this system successfully transformed the three-dimensional, curved wafer side into a flat, high-resolution two-dimensional digital image, laying a high-quality data foundation for subsequent "block processing" and "template comparison".

[0033] Example 2: Method for generating a reference template set for wafer side surface defects Before conducting formal testing, a baseline template set needs to be generated using high-quality wafers. The following section combines... Figure 1 This application describes a method for generating a reference template group for wafer side defects according to an embodiment of the present application. Although the present application provides method operation steps as shown in the following embodiments or flowcharts, the execution order of these steps is not limited to the execution order provided in the embodiments of the present application, based on conventional or non-creative labor, where there is no necessary causal relationship in the logical process.

[0034] The method for generating a reference template set for wafer side defects includes the following steps: Step S10': Obtain several sample images from the side of the good wafer.

[0035] Step S20': Perform a statistical traversal of the grayscale values ​​at the same pixel coordinate position for each of the sample images.

[0036] Step S30': Determine the grayscale reference information that characterizes the grayscale fluctuation range of good products based on the statistical traversal results.

[0037] Step S40': Based on the grayscale reference information or the sample image, extract edge information that characterizes the inherent structural features of the good product, and generate structural reference information.

[0038] Step S50': The grayscale reference information and the structural reference information are associated and stored as a reference template group for wafer side inspection.

[0039] In step S10', to construct a high-quality benchmark, it is first necessary to acquire side images of defect-free, high-quality wafers and segment them into multiple local images. This is to ensure the purity and representativeness of the template. Step S10' specifically includes: Step S11': Acquire an image of the side of the good wafer and segment it to obtain several candidate local images.

[0040] Step S12': Calculate the standard deviation of grayscale values ​​and edge sharpness of the candidate local image.

[0041] Step S13': If the standard deviation of the grayscale value of the candidate local image is less than a preset standard deviation threshold, and the edge sharpness is greater than a preset sharpness threshold, then the candidate local image is used as a sample image, wherein the number of sample images is at least 3.

[0042] In step S11', the control line scan camera scans the good wafer and divides the acquired complete annular image into multiple candidate local images of uniform size. Specifically, a complete, elongated two-dimensional grayscale image is divided into N local image units of uniform size, such as N small blocks of 256×1024 pixels.

[0043] Not all of the N candidate partial images in step S11' are suitable as templates. Steps S12' and S13' remove inferior images caused by shooting shake, lighting flicker, or inaccurate focus.

[0044] In step S12' of this embodiment, the standard deviation σ of grayscale values ​​is used to measure the uniformity of the overall brightness of the image, representing uniform illumination; edge sharpness is used to measure the focus quality of the image, representing sharp focus, for example, calculated by the Sobel operator.

[0045] The threshold for step S13' is a grayscale standard deviation σ≤15, which corresponds to stable lighting conditions, edge sharpness ≥0.8, and a clear image. If it meets these conditions, the candidate local image is marked as a qualified sample image.

[0046] Thus, only candidate local images that simultaneously meet both of the above conditions are marked as "qualified sample images". The system cumulatively filters out N' (N'≥3) qualified sample images for subsequent statistical analysis.

[0047] Steps S20' and S30' establish a dynamic grayscale envelope, characterizing the "envelope" or "range" of grayscale fluctuations in a good wafer under normal process conditions. In this embodiment, the grayscale reference information characterizes the "highest grayscale template" representing the upper limit of grayscale fluctuations and the "lowest grayscale template" representing the lower limit of grayscale fluctuations. These two templates constitute the legal grayscale range (i.e., the "grayscale safety channel") allowed to exist at each pixel in a qualified sample image. This legal grayscale range can tolerate normal grayscale changes in good wafers caused by batch differences, slight differences in coating thickness, or minor fluctuations in illumination.

[0048] That is, grayscale reference information can be used to tolerate grayscale fluctuations in good products within the normal process range. This embodiment uses a pixel-level extreme value statistical method to construct the grayscale reference.

[0049] Step S20' logically stacks and aligns the selected N' sample images. For each pixel coordinate position (x, y) in the image matrix, iterates through the grayscale values ​​{G1(x, y), G2(x, y), ..., G...} of these N' images at that coordinate point. N' (x,y)}.

[0050] Step S30' specifically includes: Step S31': Traverse the maximum grayscale value of each pixel coordinate position in all the sample images, and combine them to generate the highest grayscale template.

[0051] Step S32': Traverse the minimum grayscale value of each pixel coordinate position in all the sample images, and combine them to generate the lowest grayscale template.

[0052] Step S33': The highest grayscale template and the lowest grayscale template together constitute the grayscale reference information.

[0053] Step S31' Extract the maximum value from the above N' grayscale values ​​and assign it to the corresponding position T of the highest grayscale template. max (x,y), where T max (x,y)=max{G1(x,y),...,G N' (x,y)}.

[0054] Step S32' Extracts the minimum value among the above N' grayscale values ​​and assigns it to the corresponding position T of the lowest grayscale template. min (x,y), where T min (x,y)=min{G1(x,y),...,G N' (x,y)}.

[0055] In step S33', the highest grayscale template and the lowest grayscale template together constitute "grayscale reference information." This grayscale reference information defines a valid grayscale fluctuation channel, capable of covering normal grayscale variations caused by minor process differences in good products. In subsequent inspections, any grayscale variation between T... min and T max The pixel values ​​between these values ​​are considered normal process fluctuations, thus effectively reducing the over-detection rate.

[0056] To identify the inherent film texture and physical contours on the wafer sidewalls, the system generates structural reference information. Structural reference information characterizes the inherent structural features of the sidewalls of a good wafer, such as physical contours and film stacking textures. It can be a binarized contour template or edge feature map. The structural reference information clarifies which locations on the wafer sidewalls are areas where strong edges or texture transitions should naturally exist.

[0057] Step S40' generates a binary contour template by extracting feature lines. Step S40' specifically includes: Step S41': Perform edge detection processing on the synthesized highest grayscale template, extract feature lines, and generate a contour template as the structural reference information.

[0058] Although contours can be extracted directly from sample images, since the highest grayscale template represents the strongest reflective state, the film texture and physical edges on the wafer side usually appear the most continuous and complete, with the highest signal-to-noise ratio, which can minimize the interference of random noise on the structural reference. Therefore, it is preferable to extract contours from the highest grayscale template.

[0059] Edge detection processing is performed on the highest grayscale template. In this embodiment, the Canny edge detection operator is preferably used. By setting dual thresholds, noise is suppressed and edges are connected to extract significant feature lines.

[0060] Step S50' packages the generated highest grayscale template, lowest grayscale template (grayscale reference information), and contour template (structural reference information) into a reference template group for a specific wafer model, and stores it in the storage module for subsequent online inspection processes.

[0061] The grayscale reference information and the structural reference information here can be three images: the image corresponding to the highest grayscale template, the image corresponding to the lowest grayscale template, and the image corresponding to the binarized contour template; or they can be two databases: a grayscale value range database corresponding to the grayscale reference information and a binary distribution database corresponding to the structural reference information.

[0062] Example 3: Method for detecting defects on the side of a wafer The following is combined Figure 2 This application describes a method for detecting wafer side defects according to an embodiment. Although this application provides method operation steps as shown in the following embodiments or flowcharts, the execution order of these steps is not limited to the execution order provided in the embodiments of this application, based on conventional or non-creative labor, where there is no necessary causal relationship in the logical process.

[0063] The specific methods for detecting defects on the side of a wafer include: Step S10: Obtain the image of the side of the wafer to be inspected.

[0064] Step S20: Obtain a pre-constructed benchmark template group, which includes at least grayscale benchmark information characterizing the grayscale fluctuation range of good products and structural benchmark information characterizing the inherent structural features of good products.

[0065] Step S30: Based on the comparison results between the image to be tested and the grayscale reference information, determine the grayscale anomaly candidate region.

[0066] Step S40: Based on the matching of the real-time structural features of the image under test with the structural reference information, determine the structural interference region.

[0067] Step S50: Determine the defect detection result of the side surface of the wafer to be inspected based on the grayscale anomaly candidate area and the structural interference area; wherein the defect detection result excludes the portion of the grayscale anomaly candidate area that belongs to the structural interference area.

[0068] In step S10, the system acquires image data of the wafer side surface through the image acquisition subsystem described above. The image under test here is a three-dimensional, curved wafer side surface transformed into a flat, high-resolution two-dimensional digital image. The acquired complete annular image can be logically or physically divided into several local image units of uniform size, such as N small patches of 256×1024 pixels.

[0069] In this embodiment, the image to be tested refers to these local image units to be processed. The aforementioned reference template group corresponds to the size of the local sub-image to be tested.

[0070] The grayscale reference information and structural reference information in step S20 are the templates obtained in the method for generating the reference template group of wafer side defects. Step S20 loads the pre-trained or calculated reference template group, such as 3 template images or two databases.

[0071] In step S30, the real-time acquired image to be tested is compared with the grayscale reference information in step S20 at the pixel level to determine whether the grayscale value of each pixel in the image to be tested falls within the "legal range" defined by the grayscale reference information.

[0072] Step S30 specifically includes: Step S31: Compare the grayscale value of the image to be tested with the grayscale values ​​at the corresponding positions of the highest grayscale template and the lowest grayscale template.

[0073] Step S32: When the grayscale value of the image to be tested is higher than the highest grayscale template or lower than the lowest grayscale template, and the difference exceeds the preset grayscale tolerance threshold, the area where the corresponding position is located is marked as the grayscale anomaly candidate area.

[0074] The highest and lowest grayscale templates represent the brightest and darkest states that a good product can reach at that location, respectively. For any pixel P(x,y) in the local sub-image to be tested, the system performs the following judgment: Upper limit overflow judgment: Calculate P(x,y) and the corresponding point T of the highest grayscale template. max The difference between (x, y). If P(x, y) > T max If the difference ΔI between (x,y) and the grayscale tolerance threshold (e.g., 30) is greater than the grayscale tolerance threshold, then the point is determined to be too bright.

[0075] Lower limit overflow judgment: Calculate the relationship between P(x,y) and the corresponding point T of the lowest grayscale template. min The difference between (x, y). If P(x, y) <T min If the difference ΔI between (x,y) and the grayscale tolerance threshold (e.g., 30) is greater than the grayscale tolerance threshold, then the point is determined to be too dark.

[0076] All pixels that meet the above conditions are marked as grayscale anomaly candidate regions. This dual-threshold envelope detection mechanism effectively filters out normal grayscale changes caused by minor fluctuations in illumination, slight oxidation of the wafer surface, or differences in coating thickness.

[0077] Furthermore, the "grayscale anomaly candidate region" identified at this stage is not equivalent to the final defect. In actual inspection, even slight rotational jitter or alignment deviation of the wafer can cause misalignment between the normal texture on the test image and the texture on the template. This misalignment can produce significant grayscale differences at the texture edges, leading to misjudgment as a grayscale anomaly. Additionally, wafer sides typically possess inherent film textures. Therefore, step S30 only yields "candidate" regions, which contain a mixture of real and false defects.

[0078] Step S40 can eliminate false alarms caused by misalignment or inherent film texture. This step introduces a structural feature verification mechanism. Step S40 specifically includes: Step S41: Extract the real-time edge contour of the image to be tested.

[0079] Step S42: Perform a difference operation or masking process on the real-time edge contour and the contour template to obtain the area where the real-time edge contour and the contour template do not overlap, which is used as the structural interference area.

[0080] Step S41 extracts the real-time contour line of the image to be tested using an edge detection algorithm, such as the Canny operator, with a threshold set to 50.

[0081] Step S42 matches or compares this "real-time structural feature" with the "structural baseline information" (such as contour template) in the baseline template group.

[0082] In an ideal, jitter-free state, the two should perfectly overlap. However, in real-world conditions, there will be slight displacement between them. By comparison, such as performing differential operations, masking, or logical XOR analysis, areas that "although there are differences in grayscale, their positions are highly correlated with or overlap with the inherent texture contours of the good product" can be identified. These areas are essentially signals generated by jitter at the structural edges of the good product itself, and are therefore defined as "structural interference areas," i.e., pseudo-defect areas.

[0083] Step S50 uses the logic of "elimination method" to remove or subtract the "structural interference area" identified in step S40 from the "grayscale anomaly candidate area" obtained in step S30.

[0084] Step S50 includes: Step S51: Subtract the structural interference region from the grayscale anomaly candidate region to obtain the defect detection result.

[0085] The logic for the judgment is: final defect = gray-scale anomaly candidate area - structural interference area.

[0086] Here, depending on the data type, there can be different ways to remove structural interference regions. For example, structural reference information can also be presented through gradients, texture blocks, or even frequency domain features. In this way, grayscale anomaly candidate regions can use corresponding algorithms to remove these types of structural interference regions.

[0087] After this removal operation, if the original anomaly was caused by texture misalignment (i.e., it belongs to the structural interference area), it will be cleared away and no longer trigger an alarm.

[0088] If the original anomaly point appears in a flat area or in a location unrelated to the inherent texture (i.e., not belonging to the structural interference area), it will be preserved. These preserved areas satisfy both the grayscale anomaly in step S30 and exclude the "inherent texture interference" in step S40, and are therefore identified as real defects on the side of the wafer to be inspected, such as scratches, dirt, chipping, etc.

[0089] Based on these real defect areas, the system generates the final defect detection results, such as marking defect coordinates and determining whether the wafer is NG / OK.

[0090] In this way, the process fluctuation problem is solved by the "grayscale envelope" in step S30, and the mechanical alignment jitter problem is solved by the "structural feature difference" in step S40, which significantly improves the accuracy and robustness of wafer side defect detection.

[0091] In the above detection process, since the image after unfolding the wafer side is extremely long (for example, the circumference of a 300mm wafer is approximately 942mm), directly processing the entire image places excessive demands on memory and computing power. Therefore, a "blocked parallel / serial processing" strategy can be adopted. Step S10 specifically includes: Step S11: Obtain a complete annular image of the side surface of the wafer to be inspected, wherein the complete annular image is acquired by a line scan camera.

[0092] Step S12: Based on the circumference of the wafer to be tested and the preset pixel precision, the complete annular image is divided into multiple local sub-images of uniform size along the length direction, wherein the reference template group corresponds to the size of the local sub-images to be tested.

[0093] Thus, the images to be tested in steps S30 and S40 are performed on each of the local sub-images to be tested.

[0094] Step S12 involves uniformly cutting the complete annular image along its length into N local sub-images to be tested. Steps S30 and S40 sequentially or in parallel read each local sub-image to be tested and compare it with a common benchmark template set. This "divide and conquer" approach significantly improves the detection speed and makes template matching more flexible. The width of the local sub-image to be tested can be set as needed.

[0095] In addition to embodiments that determine NG / OK for wafers, the specific location of defects can be determined. For example, in one embodiment, the method for detecting defects on the side of a wafer further includes the step of: Step S60: Identify the groove feature area in the image to be tested, and determine the coordinates of the center position of the groove in the side image coordinate system.

[0096] Step S70: When a real defect area exists in the defect detection result, the coordinates of the real defect area in the side image coordinate system are determined based on the distance between the real defect area and the center position of the groove.

[0097] Step S80: Based on the coordinates of the actual defect area in the side image coordinate system and combined with the wafer size information, calculate the mapped coordinates of the actual defect area in the front coordinate system of the wafer.

[0098] Steps S60-S80 enable the detection results to be used by subsequent re-inspection equipment by converting the pixel coordinates in the side line scan image into the physical coordinates of the wafer front side.

[0099] In a complete circular line scan image, the wafer's notch, due to its depth difference, appears as a distinctive black band-shaped region. The system accurately locates the center of this black region through threshold segmentation and morphological processing. Step S60 assigns the coordinates of the notch in the side image coordinate system as P. N (X N ,X N ).

[0100] Assume the coordinates of the center of the detected true defect region in the side image are P. i Step S70 calculates the deflection angle θ of the defect relative to the Notch opening: θ = (∣P N -P i | / C)×360°, where C is the wafer circumference (in pixels).

[0101] Step S80 uses trigonometric functions to convert the angle into Cartesian coordinates (X, Y) on the front side of the wafer. i ,Y i ):X i =X N +0.5×D×sinθ,Y i =Y N -0.5×D×cosθ.

[0102] This achieves a precise mapping from the "side unfolded view" to the "front wafer map," enabling the defect data output by the inspection system to directly guide subsequent process analysis and defect review.

[0103] In one embodiment, the image processing subsystem includes: Storage module, used to store computer programs.

[0104] The processing module, when executing the computer program, can implement the steps in the above-described method for detecting defects on the side of a wafer.

[0105] It should be noted that for details not disclosed in the image processing subsystem of this application embodiment, please refer to the details disclosed in the wafer side defect detection method of this application embodiment.

[0106] The image processing subsystem may also include computing devices such as computers, laptops, PDAs, and cloud servers, as well as, but not limited to, processing modules, storage modules, and computer programs stored in the storage modules and executable on the processing modules, such as the wafer side defect detection method program described above. When the processing module executes the computer program, it implements the steps in the various wafer side defect detection method embodiments described above, for example... Figure 1 The steps are shown.

[0107] The image processing subsystem can be part of a wafer side defect detection system, a local terminal device, or part of a cloud server.

[0108] The processing module can be a Central Processing Unit (CPU), or other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. The processing module is the control center of the wafer side defect detection system, connecting all parts of the system via various interfaces and lines.

[0109] The storage module can be used to store the computer programs and / or modules. The processing module implements various functions of the wafer side defect detection system by running or executing the computer programs and / or modules stored in the storage module and calling the data stored in the storage module. The storage module may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function, etc. In addition, the storage module may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, RAM, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0110] For example, the computer program may be divided into one or more modules / units, which are stored in a storage module and executed by a processing module to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of the computer program in a wafer side defect detection system.

[0111] Compared with commonly used technologies, this embodiment has the following advantages: This wafer side defect detection method introduces grayscale reference information characterizing the grayscale fluctuation range of good products, constructing a grayscale tolerance range that adapts to normal process differences in good products. This effectively avoids over-inspection caused by reasonable grayscale fluctuations in good products themselves. At the same time, by combining structural reference information characterizing the inherent structural features of good products, the method identifies structural interference areas through matching analysis of real-time structural features and reference information, and removes these structural interference areas from the grayscale anomaly candidate areas. This accurately eliminates false defect signals caused by mechanical jitter or alignment deviation leading to misalignment of the inherent texture edges of good products during the detection process, significantly improving the accuracy and anti-interference capability of wafer side defect detection.

[0112] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0113] The detailed descriptions listed above are merely specific descriptions of feasible implementation methods of this application and are not intended to limit the scope of protection of this application. All equivalent implementation methods or modifications made without departing from the specific spirit of this application should be included within the scope of protection of this application.

Claims

1. A method for detecting defects on the side surface of a wafer, characterized in that, Includes the following steps: Acquire the image of the side of the wafer to be inspected; A pre-constructed set of reference templates is obtained. The set of reference templates includes at least grayscale reference information characterizing the grayscale fluctuation range of good products and structural reference information characterizing the inherent structural features of good products. The grayscale reference information includes a highest grayscale template, which is generated by combining the maximum grayscale values ​​at the same pixel coordinate position of several sample images from the side of the good product wafer. The structural reference information includes a contour template, which is generated by performing edge detection processing on the highest grayscale template and extracting feature lines. Based on the comparison results between the image to be tested and the grayscale reference information, grayscale anomaly candidate regions are determined; Based on the matching of the real-time structural features of the image under test with the structural reference information, the structural interference region is determined, specifically including: extracting the real-time edge contour of the image under test; performing a difference operation or masking process on the real-time edge contour and the contour template to obtain the area where the real-time edge contour and the contour template do not overlap, as the structural interference region; Based on the grayscale anomaly candidate area and the structural interference area, the defect detection result of the side surface of the wafer to be inspected is determined; wherein, the defect detection result excludes the portion of the grayscale anomaly candidate area that belongs to the structural interference area, specifically: the structural interference area is subtracted from the grayscale anomaly candidate area to obtain the defect detection result.

2. The method for detecting wafer side surface defects according to claim 1, characterized in that, The grayscale reference information includes the lowest grayscale template; The step of determining grayscale anomaly candidate regions based on the comparison results between the image to be tested and the grayscale reference information includes: The grayscale values ​​of the image to be tested are compared with the grayscale values ​​at the corresponding positions of the highest grayscale template and the lowest grayscale template, respectively. When the grayscale value of the image under test is higher than the highest grayscale template or lower than the lowest grayscale template, and the difference exceeds the preset grayscale tolerance threshold, the area where the corresponding position is located is marked as the grayscale anomaly candidate area.

3. The method for detecting wafer side surface defects according to claim 1, characterized in that, The process of acquiring the image of the side surface of the wafer to be inspected includes: A complete annular image of the side surface of the wafer to be inspected is acquired, wherein the complete annular image is acquired by a line scan camera; Based on the perimeter of the wafer to be tested and the preset pixel precision, the complete annular image is divided into multiple local sub-images of uniform size along the length direction, wherein the reference template group corresponds to the size of the local sub-images to be tested; The determination of grayscale anomaly candidate regions and the determination of structural interference regions are based on the test images, and are performed on each of the local test sub-images.

4. The method for detecting wafer side surface defects according to claim 1, characterized in that, It also includes the following steps: In the image to be tested, identify the feature region of the notch and determine the coordinates of the center position of the notch in the side image coordinate system; When a real defect area exists in the defect detection result, the coordinates of the real defect area in the side image coordinate system are determined based on the distance between the real defect area and the center position of the groove opening. Based on the coordinates of the actual defect area in the side image coordinate system, and combined with the wafer size information, the mapped coordinates of the actual defect area in the front image coordinate system are calculated.

5. A wafer side defect detection system, characterized in that, The system includes an image processing subsystem, which comprises: Storage module, used to store computer programs; The processing module, when executing the computer program, can implement the steps in the wafer side defect detection method according to any one of claims 1 to 4.

6. A method for generating a reference template set for wafer side surface inspection, characterized in that, Includes the following steps: Acquire several sample images from the side of a good quality wafer; Statistical traversal is performed on the grayscale values ​​at the same pixel coordinate position in each of the sample images; Based on the statistical traversal results, grayscale reference information characterizing the grayscale fluctuation range of good products is determined. The grayscale reference information includes the highest grayscale template, which is generated by combining the maximum grayscale values ​​at the same pixel coordinate position of several sample images from the side of the good product wafer. Based on the grayscale reference information or the sample image, edge information representing the inherent structural features of the good product is extracted, and a contour template is generated as structural reference information. The contour template is generated by performing edge detection processing on the highest grayscale template and extracting feature lines. The grayscale reference information and the structural reference information are associated and stored as a reference template group for wafer side inspection.

7. The method for generating a reference template set for wafer side surface inspection according to claim 6, characterized in that, The acquisition of several sample images from the side of a good-quality wafer includes: The images of the side surface of the good wafer are acquired and segmented to obtain several candidate local images; Calculate the standard deviation of grayscale values ​​and edge sharpness of the candidate local image; If the standard deviation of the grayscale value of the candidate local image is less than a preset standard deviation threshold, and the edge sharpness is greater than a preset sharpness threshold, then the candidate local image is used as a sample image, wherein the number of sample images is at least 3.

8. The method for generating a reference template set for wafer side surface inspection according to claim 6, characterized in that, The grayscale reference information for determining the grayscale fluctuation range of good products based on statistical traversal results includes: Iterate through the minimum grayscale value of each pixel coordinate position in all the sample images, and combine them to generate the lowest grayscale template. The highest grayscale template and the lowest grayscale template together constitute the grayscale reference information.

Citation Information

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