Quantum circuit system and encryption method based on AES cipher system

Abstract

The application provides a quantum circuit system and encryption method based on AES encryption system, which comprises a byte substitution module, a row shift module and a column confusion module; the byte substitution module uses a pre-optimized S-box query circuit to realize nonlinear byte substitution; the row shift module completes the cyclic shift of the bytes in the row through a quantum bit exchange operation; the column confusion module realizes a matrix multiplication circuit based on finite field operation, wherein the quantum circuit of the column confusion module is generated by a depth-first matrix decomposition algorithm; the round key addition module uses a CNOT gate array to realize the XOR operation of the round key and the state, and the required key of the round key addition module is dynamically generated through a key expansion circuit. The timing scheduling and resource allocation of each module are optimized by using a compact Z-shaped architecture. Under the premise of keeping the quantum bit resource usage equivalent to the original Z-shaped architecture, the quantum circuit depth is significantly reduced, and higher fidelity and shorter execution time can be realized on NISQ devices.

Description

Technical Field

[0001] This invention relates to the field of quantum encryption technology, and in particular to a quantum circuit system and encryption method based on the AES cryptosystem. Background Technology

[0002] The linear layer is the core module in a quantum circuit that implements linear transformations. It is widely used in key operations such as isomorphism transformations and column mixing in the AES algorithm. Any linear transformation can be implemented using a quantum circuit consisting only of controlled-not (CNOT) gates. From the perspective of a quantum system, the role of the linear layer is equivalent to a... The unitary matrix on the quantum key distribution (CNOT). Since CNOT gates are the basic units for realizing linear transformations in the general quantum gate set, the degree of optimization of their circuit structure, especially the depth (i.e., the number of gate layers on the critical path) and width (i.e., the number of qubits required), directly determines the execution efficiency and resource overhead of the entire quantum algorithm.

[0003] In existing technologies, specific linear transformation matrices can be efficiently decomposed into CNOT gate sequences through local gate substitution rules (including local optimization strategies based on adjacent gate swaps) and optimal subsequence equivalent substitution techniques. Taking the column confusion matrix in the AES algorithm as an example, this technique can achieve quantum circuit implementation using only 92 CNOT gates. To improve the feasibility and scalability of decomposition, this scheme introduces a random selection strategy, effectively avoiding the dead loop problem during the search process, and uses a sliding window for better subsequence substitution, enabling it to handle the decomposition of large-scale matrices (such as 32×32 dimensions). However, this heuristic method has the following obvious limitations:

[0004] First, because it only performs local replacements in each optimization iteration and does not fully consider the possible parallel computation between different line blocks, it is easy for the optimization process to get stuck in local optima, resulting in large fluctuations in the generated line structure and inconsistent results each time.

[0005] Secondly, the optimization objective of this method focuses on minimizing the total number of CNOT gates, failing to adequately align with the key performance indicator of actual quantum hardware—full depth (i.e., the number of gate layers on the longest path in the circuit). On noisy intermediate-scale quantum (NISQ) devices, circuit depth directly affects the fidelity and execution time of the algorithm. Therefore, simply reducing the number of gates while ignoring depth optimization is insufficient to meet the stringent performance requirements of current quantum computing applications.

[0006] Furthermore, round function architecture is a key layout method in quantum cryptography circuit design for arranging each round of encryption operations (such as row shifting, column confusion, and other sub-operations). Common architectures include pipeline architecture and zigzag architecture. Although pipeline architecture has a relatively shallow circuit depth, it consumes too many qubits, resulting in huge resource overhead. While the zigzag strategy and improved zigzag strategy proposed to reduce qubit resource consumption significantly save qubits, their circuit depth increases dramatically. On NISQ devices, circuit depth is directly related to decoherence time; excessively deep circuits significantly reduce algorithm fidelity and increase execution time, severely limiting practical performance. Summary of the Invention

[0007] To address the shortcomings of existing technologies, this invention provides a quantum circuit system and encryption method based on the AES cryptosystem. This invention significantly reduces the depth of quantum circuits while ensuring that the number of qubits required for the quantum circuit is comparable to that of the Z-shaped architecture.

[0008] The technical solution of this invention is: a quantum circuit system based on the AES cryptosystem, which divides each round of encryption operation of the AES quantum circuit into four sub-operation modules:

[0009] The byte replacement module uses a pre-optimized S-box query circuit to achieve non-linear byte replacement;

[0010] The row shift module completes the cyclic shift of bytes within a row through qubit swapping operations;

[0011] The column obfuscation module is based on A matrix multiplication circuit is implemented using finite field operations, wherein the quantum circuit of the column confusion module is generated by a depth-first matrix factorization algorithm;

[0012] The round key addition module uses a CNOT gate array to perform an XOR operation between the round key and the state. The key required by the round key addition module is dynamically generated through a key expansion circuit.

[0013] The round function architecture employs a compact Z-shaped architecture to optimize the timing scheduling and resource allocation of each module.

[0014] Preferably, the S-box receives one byte input. Then use its multiplicative inverse. The S-box substitution, followed by an affine transformation, is represented as:

[0015] ;

[0016] in, Indicates a Defined above affine transformation matrix; (representing the constant term of the affine transformation); Indicates in Addition operation over a finite field.

[0017] Preferably, the row shifting module rearranges the qubit groups encoding data bytes according to a predetermined row shifting rule via physical circuitry or logical logic. Gate operations are used to swap byte positions.

[0018] Preferably, the column obfuscation module first performs the column obfuscation operation corresponding to... Matrix transformation to base field An extended binary matrix is ​​obtained. Then, the binary matrix is ​​decomposed into a product of a series of elementary matrices using a depth-first matrix factorization algorithm. In the implementation of the quantum circuit, each elementary matrix obtained by the decomposition directly corresponds to a combination of one or more CNOT gates. By mapping the above decomposition sequence to a specific CNOT gate operation sequence, a quantum circuit that realizes column confusion function can be constructed.

[0019] Preferably, the quantum circuit of the column confusion module is generated by a depth-first matrix factorization algorithm, specifically including the following steps:

[0020] S11) Obtain the initial operation sequence of the matrix to be decomposed;

[0021] S12) Traverse the sequence using a sliding window and perform equivalent replacements on the subsequences within the window to generate candidate sequences;

[0022] S13) With the goal of reducing the depth of the target quantum circuit, the operation sequence is iteratively selected and updated;

[0023] S14) Output the final operation sequence after depth optimization.

[0024] Preferably, the wheel key addition module first generates the wheel key required for the current wheel in real time based on the initial key using a quantum key expansion circuit, and then the key loading process is implemented through a CNOT gate:

[0025] A CNOT gate operation is applied using each qubit in the round key register as a control bit and the corresponding qubit in the data register as a target bit.

[0026] As a preferred embodiment, the quantum circuit implementation of the compact Z-shaped architecture is as follows:

[0027] Step A1) Prepare the plaintext to be encrypted. As system input, multiple all-zero quantum registers are initialized simultaneously; the width of the key expansion line is set to... The key expansion circuit is used to generate the round keys required for each round;

[0028] Step A2): In round 0, perform the initial round operation of the AES algorithm, inputting plaintext. With the initial key Perform an XOR operation on the first four characters;

[0029] In the quantum circuit implementation, a fixed value is loaded into the quantum register where the key expansion algorithm is located by applying a quantum X gate, thus completing the addition of the initial round key and obtaining the output result of round 0;

[0030] Step A3) Employ a compact Z-shaped architecture, where each round function is denoted as... When the loss of auxiliary qubits is not considered, the round function Achieving quantum state transformation:

[0031] ;

[0032] In the formula, Indicates input to the round function The quantum state; Indicates a by A quantum register consisting of qubits is initially set to a zero state, after which... The output quantum state is then stored as an output register. This indicates that the round function operates on the input state. The output quantum state obtained afterwards;

[0033] Then, the cancellation operation was performed. Will The register is reset to a state of all zeros, enabling dynamic reuse of the quantum register. The corresponding quantum state transformation is:

[0034] ;

[0035] Step A4) After multiple rounds of encryption, the final ciphertext is obtained. Stored in a quantum register.

[0036] Secondly, the present invention provides an encryption method for a quantum circuit system based on the AES cryptosystem, comprising the following steps:

[0037] B1) Encode plaintext data into quantum states and load them into a quantum register;

[0038] B2), Round 0 Operation:

[0039] A round key addition operation is performed on the quantum state of the plaintext, wherein the round key is generated and loaded into the quantum circuit through a quantum key expansion module;

[0040] B3), Rounds 1 to 9:

[0041] In each round, the following sub-operations are executed in sequence:

[0042] Byte substitution: Nonlinear byte substitution is achieved through quantum S-box circuits;

[0043] Row shift: Row shift transformation is achieved through qubit swapping operations, which cyclically shifts the quantum state data block;

[0044] Column obfuscation: The column obfuscation operation is mapped to a matrix, the matrix is ​​decomposed into CNOT gate sequences to generate corresponding column obfuscation circuits, and the column mixing operation is completed;

[0045] Round key addition: XOR the current round key with the quantum state data;

[0046] B4), Round 10 Operations:

[0047] Perform byte substitution, row shifting, and round key addition operations;

[0048] B5) Measure the output quantum state and output the encrypted result.

[0049] The beneficial effects of this invention are as follows:

[0050] 1. The column confusion module of the present invention uses a depth-first matrix factorization algorithm to generate quantum circuits, and the round function architecture adopts a compact Z-shaped architecture. While maintaining the amount of quantum bit resources used as comparable to the original Z-shaped architecture, the depth of the quantum circuit is significantly reduced, and higher fidelity and shorter execution time can be achieved on NISQ devices.

[0051] 2. This invention introduces a depth-first matrix factorization algorithm, which results in shorter sequence lengths and shallower total sequence depth after splicing. By using line depth as the main optimization index for the search, the optimal matrix factorization result can be obtained, ultimately yielding a column confusion matrix decomposition line with a depth of only 14.

[0052] 3. This invention introduces a compact Z-shaped architecture. By optimizing the layout strategy of the round function module, it effectively solves the technical problem of excessive line depth in the existing Z-shaped architecture. While maintaining the same number of qubits as the existing Z-shaped architecture, this architecture reduces the line depth by about 18.7%, which greatly reduces the decoherence effect in the quantum computing process and improves the execution fidelity of the algorithm on the NISQ device. Attached Figure Description

[0053] Figure 1This is a schematic diagram of the system framework in an embodiment of the present invention;

[0054] Figure 2 This is a schematic diagram of a compact Z-shaped architecture in an embodiment of the present invention;

[0055] Figure 3 This is a schematic diagram of the encryption process in an embodiment of the present invention. Detailed Implementation

[0056] The specific embodiments of the present invention will be further described below with reference to the accompanying drawings:

[0057] Example 1

[0058] like Figure 1 As shown, this embodiment provides a quantum circuit system based on the AES cryptosystem, which divides each round of encryption operation of the AES quantum circuit into four sub-operation modules:

[0059] The byte replacement module uses a pre-optimized S-box query circuit to achieve non-linear byte replacement;

[0060] In this embodiment, the S-box receives one byte input. Then use its multiplicative inverse. The S-box substitution, followed by an affine transformation, is represented as:

[0061] ;

[0062] in, Indicates a Defined above An invertible matrix, also known as an affine transformation matrix; This represents an 8-bit constant column vector, which is the constant term of the affine transformation; Indicates in Addition operation over a finite field.

[0063] The row shift module completes the cyclic shift of bytes within a row through qubit swapping operations;

[0064] Specifically, the quantum bit array encoding data bytes is rearranged via physical circuitry or logical operations according to a predetermined row shift rule. Gate operations are used to swap byte positions.

[0065] The column obfuscation module is based on A matrix multiplication circuit is implemented using finite field operations, wherein the quantum circuit of the column confusion module is generated by a depth-first matrix factorization algorithm;

[0066] In this embodiment, the column obfuscation operation is first performed. Matrix transformation to base field The above steps yield an extended binary matrix, which is then decomposed into a product of elementary matrices using a matrix factorization algorithm. In the quantum circuit implementation, each elementary matrix obtained from the decomposition directly corresponds to a combination of one or more CNOT gates. By mapping the above decomposition sequence to specific CNOT gate operation sequences, a quantum circuit that implements column obfuscation can be constructed. Applying this circuit to the quantum register of the encoded data block completes the linear transformation operation of column obfuscation.

[0067] The round key addition module utilizes a CNOT gate array to perform an XOR operation between the round key and the state.

[0068] In this embodiment, the round key addition module first generates the round key required for the current round in real time based on the initial key using a quantum key expansion circuit. Subsequently, the key loading process is implemented through a CNOT gate.

[0069] A CNOT gate operation is applied using each qubit in the round key register as a control bit and the corresponding qubit in the data register as a target bit.

[0070] The round function architecture employs a compact Z-shaped architecture improved from the Z-shaped circuit architecture, such as... Figure 2 As shown.

[0071] Example 2

[0072] This embodiment provides a depth-first matrix factorization algorithm, which specifically includes the following steps:

[0073] Step S1, Initial Decomposition

[0074] For the input matrix Invoke the initial decomposition strategy to generate the operation sequence The current shortest length is obtained through iterative simplification. Then calculate the parallel depth. ;

[0075] Step S2: Setting and Traversing the Sliding Window

[0076] Set window length ,starting point The window slides from left to right in increments, and the window length is adjusted after the coverage area ends. Decrement the value and continue iterating from the beginning; when the window length... End at time;

[0077] Step S3: Generating candidate windows through equivalent replacement

[0078] operation sequence Divided into three segments: left side of the window, inside the window, and right side of the window; the subsequence inside the window corresponds to a submatrix. submatrix Perform equivalent decomposition to obtain new subsequences, and concatenate them with the two sides to form candidate sequences. ; Evaluate candidate sequences Operation length Parallel depth ;

[0079] Step S4, Update and Reset

[0080] If candidate sequence length Smaller than the current or Its depth Less than Then the candidate sequence is adopted. For the new sequence to be optimized, immediately reset the window parameters. ,starting point .

[0081] Step S5: Repeat steps S2)–S4) until the update condition is no longer met, and output the optimized operation sequence. .

[0082] Under the parameter and input matrix conditions of this embodiment, after initial decomposition and equivalent replacement of sliding window, a CNOT gate operation sequence with a parallel depth of 14 and a number of gates of 95 is finally obtained. The sequence and its hierarchical arrangement are detailed in Table 1.

[0083] Table 1. Operation sequence and its hierarchical arrangement

[0084]

[0085] Example 3

[0086] This embodiment provides a compact Z-shaped wheel function architecture.

[0087] This embodiment uses the AES-128 quantum circuit implementation as an example, and specifically includes the following steps:

[0088] Step A1) Prepare the 128-bit plaintext to be encrypted. As system input, four 128-bit all-zero quantum registers are initialized simultaneously; the width of the key expansion line is set to... The key expansion circuit is used to generate the round keys required for each round;

[0089] Step A2): In round 0, perform the initial round operation of the AES-128 algorithm, and input plaintext. With the initial key Perform an XOR operation on the first four characters;

[0090] In the quantum circuit implementation, a fixed value is loaded into the quantum register where the key expansion algorithm is located by applying a quantum X gate, thus completing the addition of the initial round key and obtaining the output result of round 0;

[0091] Step A3) Employ a compact Z-shaped architecture, where each round function is denoted as... When the loss of auxiliary qubits is not considered, the round function Achieving quantum state transformation:

[0092] ;

[0093] In the formula, Indicates input to the round function The quantum state; Indicates a by A quantum register consisting of qubits is initially set to a zero state, after which... The output quantum state is then stored as an output register. This indicates that the round function operates on the input state. The output quantum state obtained afterwards;

[0094] Then, the cancellation operation was performed. Will The register is reset to a state of all zeros, enabling dynamic reuse of the quantum register. The corresponding quantum state transformation is:

[0095] ;

[0096] The specific quantum circuit implementation of this process is as follows: Figure 2 As shown.

[0097] Step A4) After 10 rounds of encryption, the final ciphertext is obtained. It is stored in a second quantum register. The classical form of the AES-128 ciphertext can be obtained through quantum measurement operations.

[0098] Example 4

[0099] like Figure 3 As shown, this embodiment provides an encryption method for a quantum circuit system based on the AES cryptosystem. This embodiment takes the AES-128 quantum circuit implementation as an example and includes the following steps:

[0100] B1) Encode 128 bits of plaintext data into a quantum state and load it into a quantum register;

[0101] In this embodiment, an input register consisting of 128 qubits is used to store 128 bits of plaintext data, and the plaintext loading process is implemented through a quantum XOR operation:

[0102] When a plaintext bit has a value of 1, an X-gate operation is applied to the corresponding qubit; when a plaintext bit has a value of 0, the state of the corresponding qubit remains unchanged.

[0103] This combination of gate operations precisely encodes classical plaintext data into a quantum superposition state, establishing an initial quantum state basis for subsequent quantum encryption operations.

[0104] B2), Round 0 Operation:

[0105] A round key addition operation is performed on the quantum state of the plaintext, wherein the round key is generated and loaded into the quantum circuit through a quantum key expansion module;

[0106] The round key addition module performs a bitwise XOR operation between the initial round key and the input quantum state; each round uses a 128-bit round key, consisting of four 32-bit key words. In the quantum circuit, this XOR operation is implemented using a controlled NOT gate. For each bit of the round key: using the qubit corresponding to that key bit as the control bit and the target qubit in the input data as the target bit, a CNOT gate operation is applied. This operation is equivalent to... The modulo-2 addition (XOR) operation is performed on the key bits and data bits.

[0107] B3), Rounds 1 to 9:

[0108] In each round, the following sub-operations are executed in sequence:

[0109] Byte substitution: Nonlinear byte substitution is achieved through quantum S-box circuits;

[0110] In this embodiment, the S-box receives one byte input. Then use its multiplicative inverse. The substitution is followed by an affine transformation, i.e., the S-box substitution is represented as:

[0111] ;

[0112] in, Indicates a Defined above An invertible matrix, also known as an affine transformation matrix; This represents an 8-bit constant column vector, which is the constant term of the affine transformation; Indicates in Addition operation over a finite field.

[0113] Row shift: Row shift transformation is achieved through qubit swapping operations, which cyclically shifts the quantum state data block;

[0114] In quantum circuit implementation, leveraging the characteristics of quantum computing, the row shift operation is achieved by directly swapping the positions of corresponding qubits. Specifically, the qubit group encoding data bytes is rearranged physically or logically according to a predetermined row shift rule. Gate operations are used to swap byte positions.

[0115] Column obfuscation: The column obfuscation operation is mapped to a matrix, the matrix is ​​decomposed into CNOT gate sequences to generate corresponding column obfuscation circuits, and the column obfuscation operation is completed;

[0116] In this embodiment, the column confusion operation is performed in a finite field. The above can be represented as a The linear transformation matrix. To implement this operation, first, the column confusion operation corresponding to... Matrix transformation to base field An extended binary matrix is ​​obtained. This binary matrix is ​​then decomposed into a product of elementary matrices using a matrix factorization algorithm. In the quantum circuit implementation, each elementary matrix obtained from the decomposition directly corresponds to a combination of one or more CNOT gates. By mapping the above decomposition sequence to specific CNOT gate operation sequences, a quantum circuit implementing column obfuscation can be constructed. Applying this circuit to the quantum register of the encoded data block completes the linear transformation operation of column obfuscation. The deep optimization matrix factorization algorithm in this embodiment follows the specific steps of Embodiment 2.

[0117] Round key addition: XOR the current round key with the quantum state data;

[0118] In this embodiment, the quantum key distribution circuit first generates the 128-bit round key required for the current round in real time based on the initial key. Subsequently, the key loading process is implemented through CNOT gates:

[0119] A CNOT gate operation is applied using each qubit in the round key register as a control bit and the corresponding qubit in the data register as a target bit.

[0120] The round key for each round, plus the required round key, is generated by the key expansion circuit. Taking the AES-128 key expansion algorithm as an example, the detailed steps are given in Algorithm 1:

[0121]

[0122] The key expansion process of the AES-128 algorithm is used to generate the round keys required for each round of encryption. Each round key consists of four 32-bit key words, denoted as . (in The initial key is... to Subsequent key to Iteratively generate according to the steps in Algorithm 2; SubWord operation: replace each byte in the input word with an S-box based on the S-box; RotWord: cyclically shift the 4 bytes of the input word to the left by 1 byte; Rcon(·) is the round constant function, used to obtain the round constant required to generate the key word.

[0123] B4), Round 10 Operations:

[0124] Perform byte substitution, row shifting, and round key addition operations;

[0125] In this embodiment, the quantum circuit implementation of the byte replacement and row shifter operations is completely consistent with the corresponding operations in the 1st to 9th standard rounds.

[0126] B5) Measure the output quantum state and output a 128-bit ciphertext result.

[0127] After all the quantum encryption operations in steps B1)-B4), the 128 qubits storing the final encryption result constitute the output register. To obtain the classical ciphertext data, a projection measurement is performed on each qubit in the output register under the Z-basis. This measurement operation collapses the quantum state of each qubit into a classical bit 0 or 1, thereby converting the 128-bit quantum state data into a defined 128-bit classical ciphertext data. This ciphertext is the final output result of the AES-128 quantum circuit system performing encryption operations on the initial plaintext.

[0128] The embodiments and descriptions above are merely illustrative of the principles and preferred embodiments of the present invention. Various changes and modifications may be made to the present invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed.

Claims

1. A quantum circuit system based on the AES cryptosystem, characterized in that, Each round of encryption operation in the AES quantum circuit is divided into four sub-operation modules: The byte replacement module uses a pre-optimized S-box query circuit to achieve non-linear byte replacement; The row shift module completes the cyclic shift of bytes within a row through qubit swapping operations; The column obfuscation module is based on A matrix multiplication circuit is implemented using finite field operations, wherein the quantum circuit of the column confusion module is generated by a depth-first matrix factorization algorithm; The column obfuscation module first performs the column obfuscation operation corresponding to... Matrix transformation to base field An extended binary matrix is ​​obtained. Then, the binary matrix is ​​decomposed into a product of a series of elementary matrices using a depth-first matrix factorization algorithm. In the quantum circuit implementation, each elementary matrix obtained by decomposition directly corresponds to a combination of one or more CNOT gates. By mapping the decomposed elementary matrices to specific CNOT gate operation sequences, a quantum circuit that realizes column confusion function can be constructed. The quantum circuit of the column confusion module is generated by a depth-first matrix factorization algorithm, specifically including the following steps: S11) Obtain the initial operation sequence of the matrix to be decomposed; S12) Traverse the sequence using a sliding window and perform equivalent replacements on the subsequences within the window to generate candidate sequences; S13) With the goal of reducing the depth of the target quantum circuit, the operation sequence is iteratively selected and updated; S14) Output the final operation sequence after depth optimization; The round key addition module uses a CNOT gate array to perform an XOR operation between the round key and the state. The key required by the round key addition module is dynamically generated through a key expansion circuit. The round function architecture employs a compact Z-shaped architecture to optimize the timing scheduling and resource allocation of each module.

2. A quantum circuit system based on AES cryptography according to claim 1, characterized in that: The S-box receives one byte input. Then use its multiplicative inverse. The S-box substitution, followed by an affine transformation, is represented as: ； in, In a finite field The affine transformation matrix defined on; The constant term represents the affine transformation; Indicates in Addition operation over a finite field.

3. A quantum circuit system based on AES cryptography according to claim 1, characterized in that: The row shifting module rearranges the qubit groups encoding data bytes according to a predetermined row shifting rule via physical circuitry or logical operations. Gate operations are used to swap byte positions.

4. A quantum circuit system based on AES cryptography according to claim 1, characterized in that: The aforementioned round key addition module first generates the round key required for the current round in real time based on the initial key using a quantum key expansion circuit. The key loading process is then implemented using a CNOT gate. A CNOT gate operation is applied using each qubit in the round key register as a control bit and the corresponding qubit in the data register as a target bit.

5. A quantum circuit system based on AES cryptography according to claim 1, characterized in that: The quantum circuit implementation of the compact Z-shaped architecture is as follows: Step A1) Prepare the plaintext to be encrypted. As system input, multiple all-zero quantum registers are initialized simultaneously; the width of the key expansion line is set to... The key expansion circuit is used to generate the round keys required for each round; Step A2): In round 0, perform the initial round operation of the AES algorithm, inputting plaintext. With the initial key Perform an XOR operation on the first four characters; In the quantum circuit implementation, a fixed value is loaded into the quantum register where the key expansion algorithm is located by applying a quantum X gate, thus completing the addition of the initial round key and obtaining the output result of round 0; Step A3) Employ a compact Z-shaped architecture, where each round function is denoted as... When the loss of auxiliary qubits is not considered, the round function Achieving quantum state transformation: ； In the formula, Indicates input to the round function The quantum state; Indicates a by A quantum register consisting of qubits is initially set to a zero state, after which... The output quantum state is then stored as an output register. This indicates that the round function operates on the input state. The output quantum state obtained afterwards; Then, the cancellation operation was performed. Will The register is reset to a state of all zeros, enabling dynamic reuse of the quantum register. The corresponding quantum state transformation is: ； Step A4) After multiple rounds of encryption, the final ciphertext is obtained. Stored in a quantum register.

6. An encryption method for a quantum circuit system based on the AES cryptosystem, characterized in that, The method is implemented using the quantum circuit system according to any one of claims 1-5, and the method includes the following steps: B1) Encode plaintext data into quantum states and load them into a quantum register; B2), Round 0 Operation: A round key addition operation is performed on the quantum state of the plaintext, wherein the round key is generated and loaded into the quantum circuit through a quantum key expansion module; B3), Rounds 1 to 9: In each round, the following sub-operations are executed in sequence: Byte substitution: Nonlinear byte substitution is achieved through quantum S-box circuits; Row shift: Row shift transformation is achieved through qubit swapping operations, which cyclically shifts the quantum state data block; Column obfuscation: The column obfuscation operation is mapped to a matrix, the matrix is ​​decomposed into CNOT gate sequences to generate corresponding column obfuscation circuits, and the column mixing operation is completed; Round key addition: XOR the current round key with the quantum state data; B4), Round 10 Operations: Perform byte substitution, row shifting, and round key addition operations; B5) Measure the output quantum state and output the encrypted result.

7. The encryption method for a quantum circuit system based on the AES cryptosystem according to claim 6, characterized in that: In step B1), the plaintext loading process is implemented through a quantum XOR operation: When a plaintext bit has a value of 1, an X-gate operation is applied to the corresponding qubit; when a plaintext bit has a value of 0, the state of the corresponding qubit remains unchanged.

8. The encryption method for a quantum circuit system based on the AES cryptosystem according to claim 7, characterized in that: The column obfuscation first involves the column obfuscation operation corresponding to... Matrix transformation to base field An extended binary matrix is ​​obtained. Then, the binary matrix is ​​decomposed into a product of a series of elementary matrices using a depth-first matrix factorization algorithm. In the quantum circuit implementation, each elementary matrix obtained by decomposition directly corresponds to a combination of one or more CNOT gates. By mapping the decomposed elementary matrices to specific CNOT gate operation sequences, a quantum circuit that realizes column confusion function is constructed.

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