Backside illuminated image sensor and method of making the same

Abstract

This application relates to a back-illuminated image sensor and its fabrication method, comprising: a substrate and photodiodes and target isolation stacks arranged alternately along a first direction parallel to the first surface and extending toward the substrate on a first surface; the substrate includes a plurality of trench isolation structures extending into the substrate via the first surface and spaced apart along the first direction; the trench isolation structures are located directly below the target isolation stacks arranged one-to-one; the photodiodes include a first photosensitive region and a second photosensitive region stacked along a second direction away from the substrate; the second photosensitive region is formed by solid-phase diffusion within the first photosensitive region; the first photosensitive region includes at least three photosensitive layers of different materials; the conductivity type of the target isolation stack is opposite to that of the first photosensitive region, and its sidewalls are serrated. Different layer structures in the photodiode can increase the number of quantum electrons.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a back-illuminated image sensor and its fabrication method. Background Technology

[0002] Image sensors are photoelectric conversion devices widely used in consumer electronics, security monitoring, automotive electronics, machine vision, and many other fields. Back-illuminated (BSI) image sensors offer advantages such as higher sensitivity, better wiring layout, and the ability to record at high speeds, and are often used in fields where high pixel performance of image sensors is required.

[0003] However, in traditional BSI front-end fabrication processes, high-energy ion implantation (IMP) is required to fabricate the diode structure to form the photosensitive region, which leads to substrate surface damage. Uneven ion implantation can also cause signal crosstalk between different pixels, hindering further improvements in the performance of BSI image sensors. Summary of the Invention

[0004] Therefore, it is necessary to address the technical problems in the prior art by providing a back-illuminated image sensor and its fabrication method, as well as an electronic device, which can at least avoid signal crosstalk of BSI image sensors and unnecessary damage caused by IMP.

[0005] In a first aspect, this application provides a back-illuminated image sensor, comprising: a substrate and photodiodes and a target isolation stack disposed on a first surface of the substrate and alternately arranged along a first direction parallel to the first surface and extending toward the substrate;

[0006] The substrate includes a plurality of trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction; the trench isolation structures are located directly below the target isolation stacks that are configured one-to-one.

[0007] The photodiode includes a first photosensitive region and a second photosensitive region stacked along a second direction away from the substrate; the second photosensitive region is formed by solid-phase diffusion within the first photosensitive region; the first photosensitive region includes at least three photosensitive layers of different materials.

[0008] The conductivity type of the target isolation stack is opposite to that of the first photosensitive region, and its sidewalls are serrated.

[0009] In the above embodiments, the first photosensitive region is arranged according to a preset rule, which can broaden the spectral response range and improve the quantum efficiency of each band. While fully converting the incident light, it helps to reduce carrier recombination and extend carrier lifetime, thereby improving photoelectric response efficiency. At the same time, the second photosensitive region is formed in the first photosensitive region through solid-phase diffusion, ensuring that the electrons excited after incident are not pulled far away from the charge collection area. Under the premise of ensuring sufficient light wavelength response, the average distance that electrons need to diffuse is minimized, thereby reducing recombination rate.

[0010] In addition, the target isolation stack combines electrical isolation (to prevent lateral migration of charge carriers) and optical isolation (to suppress optical crosstalk), thereby enhancing the isolation effect.

[0011] In some embodiments, the first photosensitive region includes a SiAs layer, a SiP layer, a SiSb layer and a SiBi layer stacked sequentially along the second direction;

[0012] The second photosensitive region contains P and penetrates the SiBi layer along the first direction;

[0013] Among them, the SiAs layer is used to represent silicon material doped with As, the SiP layer is used to represent silicon material doped with P, the SiSb layer is used to represent silicon material doped with Sb, and the SiBi layer is used to represent silicon material doped with Bi.

[0014] In some embodiments, the SiBi layer and the second photosensitive region are prepared simultaneously in the same process steps.

[0015] In some embodiments, the target isolation stack includes a first isolation portion, a second isolation portion, a third isolation portion, and a fourth isolation portion arranged sequentially along a second direction;

[0016] The first isolation section penetrates the SiAs layer along the second direction;

[0017] The second isolation section penetrates the SiP layer along the second direction;

[0018] The third isolation section penetrates the SiSb layer along the second direction;

[0019] The fourth isolation section penetrates the SiBi layer and the second photosensitive region along the second direction;

[0020] The first isolation section contains B, the second isolation section contains Ga, the third isolation section contains In, and the fourth isolation section contains Ti.

[0021] In some embodiments, the sidewalls of the target isolation stack are serrated, including:

[0022] The dimensions of the first isolation section and the third isolation section along the first direction are increased or decreased in the second direction;

[0023] The dimensions of the second and fourth isolation sections along the first direction change in the second direction in the opposite direction to those of the first isolation section.

[0024] In some embodiments, the back-illuminated image sensor further includes: a grid located directly above a one-to-one set of target isolation stacks;

[0025] The interface layer is located on the top surface of the photodiodes between adjacent grids;

[0026] The filter is located on the top surface of the interface layer.

[0027] Secondly, this application also provides a method for fabricating a back-illuminated image sensor, comprising:

[0028] A substrate is provided; the substrate includes a plurality of trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction parallel to the first surface;

[0029] A first photosensitive material region and a target isolation stack are formed alternately along a first direction on the first surface of the substrate; the target isolation stack and the trench isolation structure are configured one-to-one, and the conductivity type of the target isolation stack is opposite to that of the first photosensitive material region, and its sidewalls are serrated.

[0030] After forming a second photosensitive material region on the top surface of the first photosensitive material region, a solid-phase diffusion process is used to form a second photosensitive region on the side of the first photosensitive material region near the top surface. At this time, the remaining first photosensitive material region is used to form the first photosensitive region. The first photosensitive region includes at least three photosensitive layers of different materials.

[0031] In the above embodiments, compared with the related technologies that rely on ion implantation to form photosensitive regions on the surface or at a fixed depth, this method forms photosensitive layers through epitaxial growth after stacking multiple photosensitive layers (first photosensitive material region) and second photosensitive material region, and uses solid-phase diffusion to penetrate from the top of the first photosensitive material region downward to form the first photosensitive region and the second photosensitive region, thus avoiding damage to the photodiode by high-energy ion implantation.

[0032] In addition, the serrated sidewalls of the target isolation stack can naturally form a lateral electric field boundary in the photodiode interconnection. At the same time, the serrated geometry enhances the directional driving force of charge carriers by increasing the width of the depletion region, laying a physical foundation for the efficient collection of photogenerated electrons.

[0033] In some embodiments, the first photosensitive region includes a SiAs layer, a SiP layer, a SiSb layer and a SiBi layer sequentially stacked along a second direction away from the substrate.

[0034] The second photosensitive region contains P and penetrates the SiBi layer along the first direction;

[0035] The target isolation stack includes a first isolation section, a second isolation section, a third isolation section, and a fourth isolation section arranged sequentially along the second direction;

[0036] The first isolation section penetrates the SiAs layer along the second direction;

[0037] The second isolation section penetrates the SiP layer along the second direction;

[0038] The third isolation section penetrates the SiSb layer along the second direction;

[0039] The fourth isolation section penetrates the SiBi layer and the second photosensitive region along the second direction;

[0040] The first isolation layer contains B, the second isolation layer contains Ga, the third isolation layer contains In, and the fourth isolation layer contains Ti; the SiAs layer is used to represent As-doped silicon material, the SiP layer is used to represent P-doped silicon material, the SiSb layer is used to represent Sb-doped silicon material, and the SiBi layer is used to represent Bi-doped silicon material.

[0041] In some embodiments, the first isolation portion and the SiAs layer are prepared simultaneously in the same process steps;

[0042] The second isolation layer and the SiP layer are prepared simultaneously in the same process steps.

[0043] The third isolation layer and the SiSb layer are prepared simultaneously in the same process steps.

[0044] The second photosensitive region and the SiBi layer are prepared simultaneously in the same process steps.

[0045] In some embodiments, the dimensions of the first isolation portion and the third isolation portion along the first direction are both increased or decreased in the second direction;

[0046] The dimensions of the second and fourth isolation sections along the first direction change in the second direction in the opposite direction to those of the first isolation section.

[0047] The back-illuminated image sensor and its fabrication method in this application have the following unexpected technical effects:

[0048] A photodiode and target isolation stack are constructed using multiple epitaxial growth techniques on the first surface of the substrate, avoiding lattice damage caused by high-energy ion implantation in related technologies and reducing dark current within the device. Inside the photodiode, the first and second photosensitive regions are doped with different group VA elements in the vertical direction (second direction). Combined with the built-in electric field generated by the carrier concentration gradient, this effectively improves the photoelectric conversion efficiency of the back-illuminated image sensor based on this photodiode.

[0049] The target isolation stack has a different conductivity type than the photodiode, forming a full junction isolation layer. This layer, together with the deep trench isolation layer in the substrate, forms a composite barrier to suppress crosstalk. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0051] Figure 1 This is a schematic cross-sectional view of a back-illuminated image sensor provided in one embodiment;

[0052] Figure 2 This is a flowchart of a back-illuminated image sensor fabrication method provided in one embodiment;

[0053] Figure 3a This is a schematic cross-sectional view of the structure obtained after forming the trench isolation structure in step S302 of the back preparation method provided in one embodiment;

[0054] Figure 3b for Figure 3a A schematic cross-sectional view of the structure obtained after forming a dielectric layer and an interlayer dielectric layer and performing a substrate thinning process;

[0055] Figure 4 This is a schematic cross-sectional view of the structure obtained after forming a SiAs material layer in step S402 of the preparation method provided in one embodiment;

[0056] Figure 5 This is a cross-sectional schematic diagram of the structure obtained after forming the first isolation portion and the SiAs layer in step S404 of the preparation method provided in one embodiment;

[0057] Figure 6 for Figure 5 A cross-sectional schematic diagram of the structure obtained after the second groove is formed.

[0058] Figure 7 for Figure 6 A cross-sectional schematic diagram of the structure obtained after the second isolation section and SiP layer are formed;

[0059] Figure 8 for Figure 7 A schematic diagram of the cross-section of the structure after the third groove is formed;

[0060] Figure 9 for Figure 8 A cross-sectional schematic diagram of the structure obtained after the formation of the third isolation layer and the SiSb layer;

[0061] Figure 10 This is a schematic cross-sectional view of the structure obtained after forming the fourth isolation portion in step S406 of the preparation method provided in one embodiment;

[0062] Figure 11a This is a cross-sectional schematic diagram of the structure obtained after forming the first grid layer, the second grid layer, and the third grid layer in step S602 of the preparation method provided in one embodiment;

[0063] Figure 11b for Figure 11a A cross-sectional schematic diagram of the structure after the grid is formed;

[0064] Figure 12 This is a schematic cross-sectional view of the structure obtained after forming the second photosensitive material region in step S604 of the preparation method provided in one embodiment;

[0065] Figure 13 This is a cross-sectional schematic diagram of the structure obtained after forming the second photosensitive region and the first photosensitive region in step S606 of the preparation method provided in one embodiment;

[0066] Figure 14 for Figure 13 A schematic diagram of the cross-section of the structure after the interface layer is formed;

[0067] Figure 15 for Figure 14 A cross-sectional schematic diagram of the structure after the filter is formed.

[0068] Explanation of reference numerals in the attached figures:

[0069] 1. Initial substrate; 10. Substrate; 11. Dielectric layer; 12. Interlayer dielectric layer; 20. Trench isolation structure; 30. Target isolation stack; 301. First trench; 302. Second trench; 303. Third trench; 31. First isolation portion; 32. Second isolation portion; 33. Third isolation portion; 34. Fourth isolation portion; 41. First photosensitive region; 411. SiAs layer; 412. SiP layer; 413. SiSb layer; 4141. SiBi material layer; 414. SiBi layer; 421. Second photosensitive material region; 42. Second photosensitive region; 501. Grille trench; 50. Grille; 51. First grille layer; 52. Second grille layer; 53. Third grille layer; 60. Interface layer; 70. Filter. Detailed Implementation

[0070] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0071] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0072] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0073] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0074] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0075] Embodiments of the invention are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures) of this application, thus allowing for variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of this application.

[0076] In this embodiment, the substrate may include a first surface located on the front side and a back surface, i.e., a second surface, opposite to the front side. Ignoring the flatness of the first and second surfaces, a first direction parallel to the first surface is defined, and the direction toward the substrate includes a second direction perpendicular to the first surface of the substrate. Intersecting (e.g., perpendicular) first and third directions are defined on the top and bottom surfaces of the substrate (i.e., the plane in which the substrate lies). For example, the arrangement direction of the target isolation stack is the first direction, and the plane in which the substrate lies can be determined based on the first and third directions. The first, second, and third directions may be mutually perpendicular. In this embodiment, the first direction is defined as the Y-axis direction, the second direction as the Z-axis direction, and the third direction as the X-axis direction.

[0077] Please see Figure 1 This application provides a back-illuminated image sensor, including: a substrate 10 and photodiodes and a target isolation stack 30 located on the first surface 10a of the substrate 10 and alternately arranged along the OY direction and extending toward the substrate 10.

[0078] The substrate 10 includes a plurality of trench isolation structures 20 extending into the substrate 10 via a first surface 10a and spaced apart along the OY direction; the trench isolation structures 20 are located directly below the target isolation stack 30, which is arranged in a one-to-one manner.

[0079] The photodiode includes a first photosensitive region 41 and a second photosensitive region 42 stacked along the OZ direction; the second photosensitive region 42 is formed by solid-phase diffusion within the first photosensitive region 41; the first photosensitive region 41 includes at least three photosensitive layers of different materials.

[0080] The conductivity type of the target isolation stack 30 is opposite to that of the first photosensitive region 41, and its sidewalls are serrated.

[0081] For example, the cross-sectional shape of the trench isolation structure 20 along the OY direction may include a regular trapezoid, an inverted trapezoid, a rectangle, etc., or a combination of regular trapezoids, inverted trapezoids, rectangles, etc. In this embodiment, the trench isolation structure only needs to be able to isolate electrons and light energy. Furthermore, this embodiment does not impose specific limitations on the distance between adjacent trench isolation structures, and it can be set according to actual needs.

[0082] For example, in this embodiment, the first photosensitive region 41 includes a SiAs layer 411, a SiP layer 412, a SiSb layer 413 and a SiBi layer 414 stacked sequentially along the OZ direction.

[0083] In the above embodiment, the first photosensitive region 41 has a specific impurity energy level distribution. When incident light is incident, it sequentially penetrates the SiBi layer 414, SiSb layer 413, SiP layer 412 and SiAs layer 411. Through the difference in ionization energy of different donor impurities, it can fully absorb incident light waves of different wavelengths and simultaneously regulate carrier transport.

[0084] Furthermore, the second photosensitive region 42 contains P and penetrates the SiBi layer 414 along the OY direction. The SiBi layer 414 and the second photosensitive region 42 are prepared simultaneously in the same process steps.

[0085] In the above embodiment, the second photosensitive region 42 introduces another layer of impurity energy level on the basic structure of the first photosensitive region 41, which effectively enhances the surface carrier collection efficiency without increasing the pixel size.

[0086] The target isolation stack 30 includes a first isolation portion 31, a second isolation portion 32, a third isolation portion 33, and a fourth isolation portion 34 arranged sequentially along the OZ direction; the first isolation portion 31 penetrates the SiAs layer 411 along the OZ direction; the second isolation portion 32 penetrates the SiP layer 412 along the OZ direction; the third isolation portion 33 penetrates the SiSb layer 413 along the OZ direction; and the fourth isolation portion 34 penetrates the SiBi layer 414 and the second photosensitive region 42 along the OZ direction; wherein, the first isolation portion 31 contains B, the second isolation portion 32 contains Ga, the third isolation portion 33 contains In, and the fourth isolation portion 34 contains Ti.

[0087] Furthermore, in some embodiments, the dimensions of the first isolation portion 31 and the third isolation portion 33 along the OY direction are both increased or decreased in the OZ direction;

[0088] The dimensional variation trends of the second isolation section 32 and the fourth isolation section 34 along the OY direction in the OZ direction are opposite to those of the first isolation section 31.

[0089] The width is used to represent the size in the OY direction, and the depth is used to represent the size in the ZO direction (i.e., the opposite direction of the OZ direction).

[0090] In this embodiment, the widths of the first isolation portion 31 and the third isolation portion 33 gradually increase with increasing depth, while the widths of the second isolation portion 32 and the fourth isolation portion 34 gradually decrease with increasing depth, forming a target isolation stack 30 with serrated sidewalls.

[0091] In the above embodiments, since the first isolation portion contains B, the second isolation portion contains Ga, the third isolation portion contains In, and the fourth isolation portion contains Ti, all of which are P-type doped, they form a junction isolation by contacting the N-type doped first and second photosensitive regions along the OY direction. The sawtooth-shaped sidewalls cause the electric field direction to generate a component along the interface, promoting the migration of photogenerated carriers to the collection region and reducing lateral recombination. In addition, the interfaces with different tilt angles can reflect photons, allowing more photons to be captured by the first photosensitive region.

[0092] The following describes an embodiment of forming a back-illuminated image sensor; please refer to [link to relevant documentation]. Figure 2 The preparation method provided in this application includes:

[0093] Step S20: Provide a substrate; the substrate includes a plurality of trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction parallel to the first surface.

[0094] Step S40: A first photosensitive material region and a target isolation stack are formed on the first surface of the substrate, which are alternately arranged along the first direction; the target isolation stack and the trench isolation structure are set one-to-one, and the conductivity type of the target isolation stack is opposite to that of the first photosensitive material region, and its sidewalls are serrated.

[0095] Step S60: After forming the second photosensitive material region on the top surface of the first photosensitive material region, a solid-phase diffusion process is used to form the second photosensitive region on the side of the first photosensitive material region near the top surface. At this time, the remaining first photosensitive material region is used to form the first photosensitive region. The first photosensitive region includes at least three photosensitive layers of different materials.

[0096] It should be understood that, although Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order in which these steps are executed; they can be performed in other orders. Furthermore, Figure 2 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0097] Figures 3a to 15 This is a schematic diagram illustrating the steps of an exemplary back-illuminated image sensor fabrication method provided in this application embodiment, wherein, Figure 15 This application provides an example of a pixel sensor fabricated using the method described herein. Other suitable examples of pixel sensors fabricated using this application are also possible, and no limitations are imposed herein. The following is a combination of... Figures 3a to 15 The preparation methods provided in the embodiments of this application will be described in detail.

[0098] Please see Figure 3a , Figure 3b The extension step of step S20 further includes:

[0099] Please see Figure 3a Step S202: In the front end of line (FEOL) process, a shallow trench isolation structure (STI) is formed in the initial substrate 1 by etching process and epitaxial growth, which is referred to as trench isolation structure 20.

[0100] For example, the initial substrate 1 can be constructed of semiconductor materials, insulating materials, conductive materials, or any combination thereof. The substrate can be a single-layer structure or a multi-layer structure. For example, the substrate can be such as a silicon (Si) substrate, a silicon-germanium (SiGe) substrate, a silicon-germanium-carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate, or other III / V or II / VI semiconductor substrates. Alternatively, for example, the substrate can be a layered substrate comprising, for example, Si / SiGe, Si / SiC, silicon-on-insulator (SOI), or silicon-germanium-on-insulator. Therefore, the type of substrate should not limit the scope of this disclosure.

[0101] In this embodiment, a P-type silicon wafer is used as the initial substrate 1.

[0102] For example, the material of the trench isolation structure 20 may include, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or combinations thereof.

[0103] Please see Figure 3b Step S204: Any deposition process can be used, but not limited to, to form a dielectric layer 11 covering the trench isolation structure 20 on the initial substrate 1, and then to form an interlayer dielectric layer 12 covering the dielectric layer 11. Subsequently, the above structure is subjected to a thinning process.

[0104] For example, at least one of dry etching, wet etching, chemical mechanical polishing (CMP), and push-pull processes can be used to thin the initial substrate 1 located on the side of the trench isolation structure 20 away from the interlayer dielectric layer 12, so as to expose the top surface 20a of the trench isolation structure 20. In this case, the remaining initial substrate 1 is used to form the substrate 10.

[0105] The dielectric layer 11 can be a single layer or multiple layers. For example, the material of the dielectric layer 11 can be, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide nitride, or combinations thereof. Metal can be deposited after forming the dielectric layer 11 to form a metal wiring structure, and an interlayer dielectric layer 12 can be formed on this basis. The interlayer dielectric layer 12 can be a silicon oxide layer or other low-dielectric material layer. Of course, this embodiment only illustrates one method; any method that ensures the reasonable formation of the metal wiring structure is acceptable. The P-type substrate 10 and the N-type photosensitive stack above it together constitute the PN junction of the photodiode.

[0106] Please see Figures 4-9 Step S40 also includes:

[0107] Step S402: After the epitaxial growth of the SiAs material layer is completed on the first surface 10a, photoresist is coated and patterned. Based on the photoresist layer, photolithography and etching are performed to obtain the first trench 301. The first trench 301 is configured one-to-one with the trench isolation structure 20, and its width is greater than the width of the trench isolation structure 20. The specific structure is as follows... Figure 4 As shown.

[0108] Step S404: A SiB material layer is continuously epitaxially grown within the first trench 301 and planarized using CMP. At this point, the remaining SiAs material layer forms the SiAs layer 411, and the remaining SiB material layer forms the first isolation portion 31, resulting in the following... Figure 5 The structure shown.

[0109] Next, the photolithography, etching, and epitaxial processes are repeated. Based on the above structure, step S404 is performed: a SiP material layer is epitaxially grown and planarized using CMP, followed by etching to create the second trench 302, as detailed below. Figure 6 As shown; a SiGa material layer filling the second trench 302 is formed, and after planarization, a SiP layer 412 and a second isolation portion 32 are obtained simultaneously, with the specific structure as follows. Figure 7 As shown. The SiSb material layer is epitaxially plotted and planarized, and then the third trench 303 is etched, specifically as follows... Figure 8 As shown; after forming a SiGa material layer filling the third trench 303, a SiSb layer 413 and a third isolation portion 33 are formed simultaneously during planarization, with the specific structure as follows. Figure 9 As shown.

[0110] Step S406: Continue epitaxial growth of the SiBi material layer 4141, planarize it, and then etch to obtain the fourth trench. Finally, the fourth isolation portion 34 is formed in the fourth trench. The fourth isolation portion 34 contains Ti, and the specific structure is as follows. Figure 10 As shown.

[0111] In the above embodiments, the SiAs layer, SiP layer, SiSb layer, and SiBi material layer serve as the photosensitive layer of the first photosensitive material region. Their specific doping concentrations are set according to actual conditions and will not be elaborated upon here. The first isolation portion, the second isolation portion, and the third isolation portion are fabricated simultaneously with the SiAs layer, SiP layer, and SiSb layer, respectively, on the same layer. Compared to a single-piece target isolation stack, phased fabrication reduces fabrication difficulty and improves the quality of each isolation portion.

[0112] Please see Figure 11a , Figures 11b-13 Step S60 further includes:

[0113] Step S602: Form a first grid layer 51, a second grid layer 52, and a third grid layer 53 covering the first photosensitive material region, as follows: Figure 11a As shown; photolithography etching forms a grid 50 and grid grooves 501 arranged along the OY direction, with the specific structure as follows. Figure 11b As shown, the grilles 50 are positioned one-to-one directly above the target isolation stack 30.

[0114] Step S604: A SiP material layer is formed within the grid groove 501 as the second photosensitive material region 421, specifically as follows: Figure 12 As shown.

[0115] Step S606: In the solid-state diffusion process, laser annealing is used to locally raise the temperature, causing phosphorus ions in the SiP material layer to diffuse into the SiBi material layer through the contact surface between the SiP material layer and the first photosensitive material region, forming the second photosensitive region 42. At this time, the remaining SiBi material layer is used to form the SiBi layer 414, which, together with the SiSb layer 413, SiP layer 412, and SiAs layer 411, constitutes the first photosensitive region 41, as shown in the specific structure. Figure 13 As shown.

[0116] In the above embodiments, the energy density range of laser annealing is 300mJ-400mJ, for example, 300mJ, 350mJ or 400mJ.

[0117] Please see Figures 14-15 In some embodiments, after step S60, the method further includes: forming an interface layer 60 within the grid groove 501, specifically as follows: Figure 14 As shown; then a filter 70 is formed on the top surface of the interface layer 60, with the specific structure as follows. Figure 15 As shown.

[0118] For example, the material of the interface layer 60 includes, but is not limited to, silicon oxide (SiO2).

[0119] For example, the filter 70 includes, but is not limited to, a red filter, a yellow filter, a blue filter, etc., and the three filters are arranged adjacent to each other as a pixel group.

[0120] In the above embodiments, the interface layer (IL) can be used to improve the interface characteristics between the second photosensitive area and the filter. The color filter maintains high transmittance in specific wavelength bands; specifically, the red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves. Furthermore, the top of the filter has a rounded arc shape, which is beneficial for light convergence. Other microlens structures can also be used to meet the light-gathering requirements; this application does not impose specific limitations.

[0121] In the above embodiments, the unexpected technical effect of this application is:

[0122] Using multiple epitaxial growth techniques on the top surface of a substrate to fabricate photodiodes can effectively avoid unnecessary damage during high-energy ion implantation, reduce dark current caused by substrate damage, and thus improve image clarity. In the photodiode, the first and second photosensitive regions are vertically arranged and doped with different group VA elements to fully absorb incident light waves of different wavelengths and simultaneously regulate carrier transport, significantly improving photoelectric conversion efficiency.

[0123] The target isolation stack forms a junction isolation layer with the first and second photosensitive regions. The sawtooth-shaped sidewalls generate a component of the electric field along the interface, promoting the migration of photogenerated carriers to the collection region and reducing lateral recombination. Together with the trench isolation structure in the substrate, it constructs a highly efficient all-physical isolation barrier, ensuring that the pixel structures are independent of each other, effectively preventing free electron penetration and light scattering, and suppressing the negative impact of crosstalk on image sharpness.

[0124] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0125] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A back-illuminated image sensor, characterized in that, include: A substrate and photodiodes and a target isolation stack arranged alternately on a first surface of the substrate along a first direction parallel to the first surface and extending toward the substrate; The substrate includes a plurality of trench isolation structures extending into the substrate via the first surface and spaced apart along the first direction; the trench isolation structures are located directly below the target isolation stack, which is configured one-to-one. The photodiode includes a first photosensitive region and a second photosensitive region stacked along a second direction away from the substrate; the second photosensitive region is formed within the first photosensitive region by solid-phase diffusion; the first photosensitive region includes at least three photosensitive layers of different materials. The conductivity type of the target isolation stack is opposite to that of the first photosensitive region, and its sidewalls are serrated. The first photosensitive region includes a SiAs layer, a SiP layer, a SiSb layer and a SiBi layer stacked sequentially along a second direction away from the substrate. The second photosensitive region contains P and penetrates the SiBi layer along the first direction; The target isolation stack includes a first isolation section, a second isolation section, a third isolation section and a fourth isolation section arranged sequentially along the second direction; The first isolation portion penetrates the SiAs layer along the second direction; The second isolation portion penetrates the SiP layer along the second direction; The third isolation portion penetrates the SiSb layer along the second direction; The fourth isolation portion penetrates the SiBi layer and the second photosensitive region along the second direction; Wherein, the first isolation portion contains B, the second isolation portion contains Ga, the third isolation portion contains In, and the fourth isolation portion contains Ti; the SiAs layer is used to represent As-doped silicon material, the SiP layer is used to represent P-doped silicon material, the SiSb layer is used to represent Sb-doped silicon material, and the SiBi layer is used to represent Bi-doped silicon material.

2. The back-illuminated image sensor according to claim 1, characterized in that, The first isolation portion and the SiAs layer are prepared simultaneously in the same process steps. The second isolation layer and the SiP layer are prepared simultaneously in the same process steps; The third isolation layer and the SiSb layer are prepared simultaneously in the same process steps.

3. The back-illuminated image sensor according to claim 1, characterized in that, The SiBi layer and the second photosensitive region are prepared simultaneously in the same process steps.

4. The back-illuminated image sensor according to claim 1, characterized in that, The top surface of the trench isolation structure is located inside the bottom surface of the target isolation stack.

5. The back-illuminated image sensor according to claim 4, characterized in that, The sidewalls of the target isolation stack are serrated, including: The dimensions of the first isolation portion and the third isolation portion along the first direction are both increased or decreased in the second direction; The dimensions of the second and fourth isolation portions along the first direction change in the second direction in the opposite direction to those of the first isolation portion.

6. The back-illuminated image sensor according to any one of claims 1-5, characterized in that, Also includes: The grille is located directly above the target isolation stack, which is configured one-to-one; An interface layer is located on the top surface of the photodiode between adjacent grilles; A filter is located on the top surface of the interface layer.

7. A method for fabricating a back-illuminated image sensor, characterized in that, include: Provide substrate; The substrate includes a plurality of trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction parallel to the first surface; A first photosensitive material region and a target isolation stack are formed on the first surface of the substrate, which are alternately arranged along the first direction. The target isolation stack is configured one-to-one with the trench isolation structure, and its conductivity type is opposite to that of the first photosensitive material region, and its sidewalls are serrated. After forming a second photosensitive material region on the top surface of the first photosensitive material region, a solid-state diffusion process is used to form a second photosensitive region on the side of the first photosensitive material region near the top surface. At this time, the remaining first photosensitive material region is used to form the first photosensitive region. The first photosensitive region includes at least three photosensitive layers of different materials. The first photosensitive region includes a SiAs layer, a SiP layer, a SiSb layer, and a SiBi layer stacked sequentially along a second direction away from the substrate. The second photosensitive region contains P and penetrates the SiBi layer along the first direction; The target isolation stack includes a first isolation section, a second isolation section, a third isolation section and a fourth isolation section arranged sequentially along the second direction; The first isolation portion penetrates the SiAs layer along the second direction; The second isolation portion penetrates the SiP layer along the second direction; The third isolation portion penetrates the SiSb layer along the second direction; The fourth isolation portion penetrates the SiBi layer and the second photosensitive region along the second direction; Wherein, the first isolation portion contains B, the second isolation portion contains Ga, the third isolation portion contains In, and the fourth isolation portion contains Ti; the SiAs layer is used to represent As-doped silicon material, the SiP layer is used to represent P-doped silicon material, the SiSb layer is used to represent Sb-doped silicon material, and the SiBi layer is used to represent Bi-doped silicon material.

8. The preparation method according to claim 7, characterized in that, The solid-phase diffusion process includes: With a preset energy density, laser annealing is used to locally raise the temperature, causing phosphorus ions in the second photosensitive material region to diffuse into the first photosensitive material region through the contact surface with the first photosensitive material region to form the second photosensitive region.

9. The preparation method according to claim 8, characterized in that, The first isolation portion and the SiAs layer are prepared simultaneously in the same process steps. The second isolation layer and the SiP layer are prepared simultaneously in the same process steps; The third isolation layer and the SiSb layer are prepared simultaneously in the same process steps. The second photosensitive region and the SiBi layer are prepared simultaneously in the same process steps.

10. The preparation method according to any one of claims 8-9, characterized in that, The dimensions of the first isolation portion and the third isolation portion along the first direction are both increased or decreased in the second direction; The dimensions of the second and fourth isolation portions along the first direction change in the second direction in the opposite direction to those of the first isolation portion.

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