Circuit and method for limiting power based on duty cycle clamping

Abstract

This application relates to the field of switching power supply technology, and provides a circuit and method for power limiting based on duty cycle clamping. The circuit includes a switching power supply circuit, a sawtooth wave generation circuit, a voltage detection circuit, and a current limiting component. The switching power supply circuit includes at least a control chip and a power conversion circuit. The sawtooth wave generation circuit outputs a second ramp voltage after the control chip supplies power. The voltage detection circuit detects the real-time voltage of the power conversion circuit and outputs a third voltage signal. The third voltage signal is superimposed on the second ramp voltage by the current limiting component to obtain a first ramp voltage. The first ramp voltage is connected to the ramp compensation pin of the control chip, so that when the control chip determines that the superimposed first ramp voltage is greater than or equal to a clamping threshold, it controls the current cycle to perform duty cycle clamping, thus achieving output power limiting without changing the power output as the load increases.

Description

Technical Field

[0001] This application relates to the field of switching power supply technology, and in particular to a circuit and method for power limiting based on duty cycle clamping. Background Technology

[0002] Power limiting protection is a safety mechanism in switching power supplies. It limits the output power by reducing voltage or current when the output power exceeds a preset threshold, preventing damage to the power supply and load due to overload or overheating. Power limiting protection is widely used in various power electronic devices and systems, including industrial automation and electric drives, new energy and energy storage systems, aerospace and military equipment, and more. Implemented through hardware, analog circuits, or software algorithms, power limiting protection can significantly improve equipment lifespan, ensure operator safety, and increase system efficiency.

[0003] However, current output power limiting primarily relies on power calculation for protection. This involves measuring the product of the output voltage and current to obtain the output power. When this output power exceeds the limit, the power supply activates over-power protection. This method depends on real-time measurement of the output voltage and current, but variations in sampling resistors, ADC accuracy, or ambient temperature can lead to errors, affecting the accuracy of the protection threshold. Furthermore, the calculation of output power and the implementation of the actual control strategy require time, especially with nonlinear loads (such as motors, capacitors, and transformers). During startup, the output voltage (or current) momentarily approaches zero, potentially causing power calculation failure and underestimating actual losses. Therefore, additional protection measures are needed to ensure power supply protection.

[0004] Therefore, more effective power limiting protection is needed for switching power supplies. Summary of the Invention

[0005] In view of this, embodiments of this application provide a circuit and method for power limiting based on duty cycle clamping, in order to solve the problems of insufficient power limiting protection accuracy and poor real-time performance in existing switching power supplies.

[0006] A first aspect of this application provides a circuit for power limiting based on duty cycle clamping, comprising:

[0007] The circuit includes a switching power supply circuit, a sawtooth wave generator circuit, a voltage detection circuit, and a current limiting component; wherein, the switching power supply circuit includes at least a control chip and a power conversion circuit.

[0008] The sawtooth wave generating circuit outputs a second ramp voltage after the control chip is powered on.

[0009] The input terminal of the voltage detection circuit is connected to the power conversion circuit to detect the real-time voltage of the power conversion circuit, and the voltage detection circuit outputs a third voltage signal.

[0010] The third voltage signal is superimposed on the second ramp voltage through the current limiting component to obtain the first ramp voltage, and the first ramp voltage is connected to the ramp compensation pin of the control chip.

[0011] When the first ramp voltage after superposition is determined to be greater than or equal to the clamping threshold, the control chip controls the duty cycle clamping to occur in the current cycle.

[0012] A second aspect of this application provides a method for power limiting based on duty cycle clamping, the method being used by a control chip to limit the power of a power conversion circuit through adaptive duty cycle clamping;

[0013] The method includes:

[0014] In response to determining the power supply to the control chip, a sawtooth wave is generated by the sawtooth wave generating circuit; the sawtooth wave has a second ramp voltage.

[0015] The real-time current of the power conversion circuit is converted into a third voltage signal through a voltage detection circuit;

[0016] The third voltage signal is superimposed with the second ramp voltage by the current limiting component to obtain the first ramp voltage;

[0017] In response to the determination that the first ramp voltage after superposition is greater than or equal to the clamping threshold, the control chip controls the duty cycle clamping to occur in the current cycle.

[0018] The beneficial effects of the embodiments of this application compared with the prior art are:

[0019] The power limiting circuit based on duty cycle clamping provided in this application includes a switching power supply circuit, a sawtooth wave generation circuit, a voltage detection circuit, and a current limiting component. The switching power supply circuit includes at least a control chip and a power conversion circuit. The sawtooth wave generation circuit outputs a second ramp voltage after the control chip supplies power. The voltage detection circuit detects the real-time voltage of the power conversion circuit and outputs a third voltage signal. The third voltage signal is superimposed on the second ramp voltage by the current limiting component to obtain a first ramp voltage. The first ramp voltage is connected to the ramp compensation pin of the control chip so that when the control chip determines that the superimposed first ramp voltage is greater than or equal to the clamping threshold, it controls the current cycle to perform duty cycle clamping, thereby achieving output power limiting without the power supply output power changing with the increase of load. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of a circuit that achieves power limiting based on duty cycle clamping, provided in an embodiment of this application.

[0022] Figure 2 This is a schematic diagram of another circuit structure for power limiting based on duty cycle clamping provided in an embodiment of this application.

[0023] Figure 3 This is a schematic diagram of another circuit structure for power limiting based on duty cycle clamping provided in the embodiments of this application.

[0024] Figure 4 This is a flowchart illustrating a method for power limiting based on duty cycle clamping, as provided in an embodiment of this application. Detailed Implementation

[0025] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0026] The following will describe in detail, with reference to the accompanying drawings, a circuit and method for power limiting based on duty cycle clamping according to an embodiment of this application.

[0027] As mentioned above, more effective power limiting protection is needed for switching power supplies.

[0028] In view of this, this application provides a circuit for power limiting based on duty cycle clamping. The circuit includes a switching power supply circuit, a sawtooth wave generation circuit, a voltage detection circuit, and a current limiting component. The switching power supply circuit includes at least a control chip and a power conversion circuit. The sawtooth wave generation circuit outputs a second ramp voltage after the control chip supplies power. The voltage detection circuit detects the real-time voltage of the power conversion circuit and outputs a third voltage signal. The third voltage signal is superimposed with the second ramp voltage through the current limiting component to obtain a first ramp voltage. The first ramp voltage is connected to the ramp compensation pin of the control chip so that when the control chip determines that the superimposed first ramp voltage is greater than or equal to the clamping threshold, it controls the current cycle to perform duty cycle clamping, thereby achieving output power limiting when the power supply output power does not change with the increase of load.

[0029] Figure 1 This is a schematic diagram of a circuit for power limiting based on duty cycle clamping, provided in an embodiment of this application. Figure 1 As shown, the circuit includes: a switching power supply circuit, a sawtooth wave generation circuit, a voltage detection circuit, and a current limiting component; wherein, the switching power supply circuit includes at least a control chip and a power conversion circuit. The power conversion circuit can be any type of full-bridge circuit, half-bridge circuit, or other power conversion circuits, and is not limited here.

[0030] In some embodiments of this application, the sawtooth wave generating circuit outputs a second ramp voltage after the control chip is powered on.

[0031] The input terminal of the voltage detection circuit is connected to the power conversion circuit to detect the real-time voltage of the power conversion circuit, and the voltage detection circuit outputs a third voltage signal.

[0032] The third voltage signal is superimposed on the second ramp voltage through the current limiting component to obtain the first ramp voltage, which is then connected to the ramp compensation pin of the control chip.

[0033] When the first ramp voltage after superposition is determined to be greater than or equal to the clamping threshold, the control chip controls the duty cycle clamping to occur in the current cycle.

[0034] In some embodiments of this application, the control chip is, for example, the phase-shift resonant control chip UC1875, or other control chips with similar functions, which are not limited here. The control chip has a ramp compensation pin, and when the voltage value input to the ramp compensation pin is greater than or equal to the clamping threshold, the control chip can control the duty cycle clamping of the current signal cycle.

[0035] In some embodiments of this application, the sawtooth wave generating circuit may include a first resistor. and the first capacitor ; The first end can be connected to the reference voltage pin of the control chip. The second end can be connected The first end is grounded; The second end can be connected to the ramp compensation pin of the control chip.

[0036] The current limiting component includes diodes connected in series. Second resistor ; The input terminal can be connected to the output terminal of a voltage detection circuit. The output terminal can be connected The first end; The second end can be connected to the ramp compensation pin of the control chip.

[0037] In some embodiments of this application, the second ramp voltage can be calculated as follows: ;in, This is the second ramp voltage. To control the reference voltage of the chip, The period of the sawtooth wave is given.

[0038] The third voltage signal needs to meet the following conditions: ;in, This is the third voltage signal. For the second resistor, This is the maximum input limit voltage for the control chip.

[0039] In some embodiments of this application, the voltage detection circuit can detect the real-time output voltage of the power conversion circuit.

[0040] Figure 2 This is a schematic diagram of another circuit structure for power limiting based on duty cycle clamping, provided in an embodiment of this application. For example... Figure 2 As shown, the circuit includes a sawtooth wave generator circuit 1, a control chip 2, a voltage detection circuit 3, a current limiting component 4, and a power conversion circuit 5. The power conversion circuit includes a full-bridge circuit and a rectifier-filter circuit. Furthermore, the voltage detection circuit may include a current detection circuit and a current-conditioning circuit.

[0041] The input terminal of the current detection circuit is connected to the output terminal of the power conversion circuit, and the real-time current of the power conversion circuit is detected through a current transformer. That is, the current detection circuit may include a current transformer (or other current sensors such as Hall sensors, which are not limited here), and the current transformer is placed between the full-bridge circuit and the rectifier and filter circuit to detect the real-time current of the power conversion circuit.

[0042] The input terminal of the current sensing and conditioning circuit is connected to the output terminal of the current sensing circuit. The detected real-time current is converted into a third voltage signal and then output to the first capacitor through the current limiting component to change the first ramp voltage.

[0043] The working mode of sawtooth wave generating circuit 1 and control chip 2 is the same as Figure 1 The sawtooth wave generating circuit and control chip in the illustrated embodiment operate in basically the same way, and will not be described in detail here.

[0044] In some embodiments of this application, the current detection circuit further includes a fourth resistor. ; The two ends are respectively connected to the two ends of the current transformer. In one example, It can be set to 10 kiloohms ( This is to prevent the current transformer from being left floating.

[0045] The current sensing and conditioning circuit includes a rectifier circuit and a third resistor. The first and second terminals of the rectifier circuit are respectively connected to The two ends of the rectifier circuit and the third end of the rectifier circuit. The first terminal is connected to and grounded, and the fourth terminal of the rectifier circuit is connected to... The second terminal is connected and serves as the output terminal of the voltage detection circuit.

[0046] Based on the characteristics of the control chip, its maximum limiting voltage It is 5.3V, according to the formula:

[0047] The sampling resistor can be verified. and superimposed resistance The value of allows for sampling of the primary current. and The superposition within a single cycle shall not exceed the maximum input voltage limit of the control chip.

[0048] In some embodiments of this application, the first ramp voltage can be determined in the following manner: ;in, This is the voltage of the first ramp. This is the second ramp voltage. The third voltage signal, The forward voltage drop of the diode is [value missing]. This is the reference voltage for the control chip. For the first resistor, For the second resistor, For the first capacitor, The period of the sawtooth wave is... The duty cycle is the operating time of the power supply. This duty cycle can be the equivalent duty cycle, and t is time.

[0049] In some embodiments of this application, The value can be determined as follows: First, measure the primary-side output current value at the output terminal of the power conversion circuit. Then, determine the current reduction factor through current mutual inductance, and then pass the reduced current through... This is converted into a voltage, resulting in the third voltage signal. Next, the second ramp voltage can be calculated. Finally, the calculated results Values ​​and based on Substituting the duty cycle of the power supply operating moment, determined by the on-state voltage drop, into the above... The calculation formula can be used to obtain .

[0050] In some embodiments of this application, after calculation After determining the value, the clamping threshold can be determined based on the detected primary-side output current. That is, the output voltage of the current sensing conditioning circuit. pass and The capacitance superimposed on the sawtooth wave generating circuit Therefore, it can be based on the above. The calculation formula determines the clamping threshold.

[0051] For a power supply under normal conditions, as the load increases, the primary output current of the transformer increases, the output of the current detection circuit and the current conditioning circuit increases, and the voltage superimposed on the sawtooth wave generation circuit increases. It also increases, but the voltage... The clamping threshold of the chip comparator has been reached, and the duty cycle remains locked to maintain clamping, ensuring that the energy of the transformer for power conversion remains unchanged. Therefore, in the duty cycle clamped state, as the load increases, the primary current of the transformer does not change, and the transformer's conversion power remains constant, thus achieving output power limitation.

[0052] In one example, the switching frequency of the power supply is set to 50 kHz, resulting in a sawtooth wave with a period of 10 microseconds (µs). If... =39 The measured primary-side output current is 61 amperes (A). It is 8.42 ohms ( Then the converted value can be determined. =61 / 100 8.42 = 5.142 volts (V). Further calculations can be based on... Set the current of the internal current source of the control chip, and determine the current value in each cycle. The second ramp voltage obtained during charging V. If diode The selected Schottky diode is model MBR1100, whose forward voltage drop is... V, at this time the duty cycle of the power supply is 52%, substituting into the above... The calculation formula can be obtained =3.754V.

[0053] In other words, the value calculated based on the primary-side output current measurement can be obtained. As the primary-side output current threshold.

[0054] Meanwhile, since the maximum output value of the error amplifier in the control chip's internal logic can also affect the input of the comparator in the control chip, when the output of the error amplifier reaches its maximum value first, it intersects with the ramp voltage at the ramp compensation pin at a constant point inside the chip, thus preventing further adjustment of the duty cycle. Therefore, the clamping threshold can be determined as the minimum of the first threshold and the maximum output value of the error amplifier in the control chip.

[0055] Figure 3 This is a schematic diagram of another circuit structure for power limiting based on duty cycle clamping, provided in an embodiment of this application. For example... Figure 3 As shown, the circuit includes a sawtooth wave generating circuit 1, a control chip 2, a voltage detection circuit 3, a current limiting component 4, a power conversion circuit 5, and a capacitor 6. The power conversion circuit includes a full-bridge circuit and a rectifier-filter circuit. Furthermore, the voltage detection circuit may include a current detection circuit and a current sensing and conditioning circuit. The capacitor 6 is a second capacitor C2, which is connected between the power supply and ground of the voltage detection circuit 3.

[0056] The input terminal of the current detection circuit is connected to the input terminal of the power conversion circuit, and the real-time current of the power conversion circuit is detected by a current sensor. The current sensor can be placed between the power input capacitor and the full-bridge circuit to measure the current of the full-bridge input bus; in this case, the current signal is unidirectional.

[0057] The input terminal of the current sensing and conditioning circuit is connected to the output terminal of the current sensing circuit. The detected real-time current is converted into a third voltage signal and then output to the first capacitor through the current limiting component to change the first ramp voltage.

[0058] In some embodiments of this application, the current detection circuit may further include a seventh resistor. and the eighth resistor . The first end is connected to the power supply terminal of the current sensor. The second end and The first terminal is connected to and connected to the first input terminal of the current sensing and conditioning circuit. The second end is connected to the ground terminal of the current sensor.

[0059] The current sensing and conditioning circuit includes a differential circuit and a fifth resistor. Ninth resistor The sixth resistor and the tenth resistor . The first terminal serves as the second input terminal of the current sensing and conditioning circuit, connected to the operational amplifier output terminal of the current sensor. The second terminal is connected to the non-inverting input terminal of the differential circuit and connected to... The first end; The first terminal is connected to the first input terminal of the current sensing and conditioning circuit. The second terminal is connected to the inverting input terminal of the differential circuit and connected to... The first end; The second terminal is grounded; The second terminal is connected to the output terminal of the differential circuit.

[0060] In one example, you can set and 1 , and 10 , and 10 .

[0061] A bidirectional current sensor is selected and installed in the forward direction, so that the current flows in the forward direction in the installed current sensor, causing the operational amplifier to... The inverting input current sensor supply voltage is 1 / 2, and the current sensing and conditioning circuit converts the input bus current into... Its maximum limiting voltage It is 5.3V, according to the formula:

[0062] The sampling resistor can be verified. and superimposed resistance The value of allows for sampling of the primary current. and The superposition within a single cycle shall not exceed the maximum input voltage limit of the control chip.

[0063] In some embodiments of this application, Figure 3 The clamping threshold of the circuit shown can be determined as follows: Obtain the primary-side input current threshold of the power conversion circuit, and determine the second threshold of the first ramp voltage based on the primary-side input current threshold. The clamping threshold is determined by comparing the minimum value between the second threshold and the maximum output value of the error amplifier in the control chip.

[0064] The method for calculating the primary-side input current threshold is basically similar to the method for calculating the primary-side output current threshold described above; both can be solved sequentially based on the measured primary-side input current. , and The implementation details are omitted here.

[0065] For a power supply under normal conditions, as the load increases, the primary input current of the transformer increases, the output of the current sensing and conditioning circuit increases, and the voltage superimposed on the sawtooth wave generation circuit increases. It also increased, but the The clamping threshold of the comparator in the control chip has been reached, and the duty cycle remains locked to maintain clamping. The energy of the transformer to complete the power conversion remains unchanged. Therefore, in the duty cycle clamping state, as the load increases, the input current of the transformer primary side does not change, and the transformer conversion power remains constant to achieve output power limitation.

[0066] Figure 4 This is a flowchart illustrating a method for power limiting based on duty cycle clamping, as provided in an embodiment of this application. Figure 4 As shown, the method includes the following steps:

[0067] In step S401, in response to determining that the control chip is powered, a sawtooth wave is generated by the sawtooth wave generating circuit.

[0068] The sawtooth wave has a second ramp voltage.

[0069] In step S402, the real-time current of the power conversion circuit is converted into a third voltage signal by the voltage detection circuit.

[0070] In step S403, the third voltage signal is superimposed with the second ramp voltage by the current limiting component to obtain the first ramp voltage.

[0071] In step S404, in response to determining that the superimposed first ramp voltage is greater than or equal to the clamping threshold, the control chip controls the current cycle to perform duty cycle clamping.

[0072] In some embodiments of this application, a sawtooth wave can be generated by a sawtooth wave generating circuit when the control chip is powered. Then, a voltage detection circuit converts the real-time current of the power conversion circuit into a third voltage signal, which is then superimposed with a second ramp voltage by a current limiting component to obtain a first ramp voltage. Finally, if the superimposed first ramp voltage is determined to be greater than or equal to a clamping threshold, the control chip controls the current cycle to perform duty cycle clamping.

[0073] The technical solution provided in this application utilizes the ramp voltage of the control chip to introduce a current signal. An initial ramp voltage is set using resistors and capacitors, and an internal current ratio signal is added to the power supply. This causes the ramp voltage to reach a clamping threshold near a set value to limit the duty cycle, further restricting the power supply's output power. The power protection method provided in this application can achieve pulse-by-pulse clamping protection, which is faster than power calculation methods. Furthermore, the current sampling in this protection method comes from the power supply's power circuit, preventing protection failure due to different characteristics of the load at the power supply's downstream end.

[0074] All of the above-mentioned optional technical solutions can be combined in any way to form the optional embodiments of this application, and will not be described in detail here.

[0075] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0076] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A circuit for power limiting based on duty cycle clamping, characterized in that, include: The circuit includes a switching power supply circuit, a sawtooth wave generator circuit, a voltage detection circuit, and a current limiting component; wherein the switching power supply circuit includes at least a control chip and a power conversion circuit. The sawtooth wave generating circuit outputs a second ramp voltage after the control chip is powered on. The input terminal of the voltage detection circuit is connected to the power conversion circuit to detect the real-time voltage of the power conversion circuit, and the voltage detection circuit outputs a third voltage signal. The third voltage signal is superimposed on the second ramp voltage through the current limiting component to obtain the first ramp voltage, and the first ramp voltage is connected to the ramp compensation pin of the control chip. When the first ramp voltage after superposition is determined to be greater than or equal to the clamping threshold, the control chip controls the current cycle to perform duty cycle clamping. The sawtooth wave generating circuit includes a first resistor and a first capacitor; the first end of the first resistor is connected to the reference voltage pin of the control chip, the second end of the first resistor is connected to the first end of the first capacitor and grounded; the second end of the first capacitor is connected to the slope compensation pin of the control chip. The current limiting component includes a diode and a second resistor connected in series; the input terminal of the diode is connected to the output terminal of the voltage detection circuit, and the output terminal of the diode is connected to the first terminal of the second resistor; the second terminal of the second resistor is connected to the slope compensation pin of the control chip.

2. The circuit according to claim 1, characterized in that, The second ramp voltage is: ;in, This is the second ramp voltage. This is the reference voltage for the control chip. For the first resistor, For the first capacitor, The period of the sawtooth wave; The third voltage signal satisfies the following condition: ;in, The third voltage signal, For the second resistor, This is the maximum input limit voltage for the control chip.

3. The circuit according to claim 1, characterized in that, The voltage detection circuit includes a current detection circuit and a current sensing and conditioning circuit; The input terminal of the current detection circuit is connected to the output terminal of the power conversion circuit, and the real-time current of the power conversion circuit is detected through a current transformer. The input terminal of the current sensing and conditioning circuit is connected to the output terminal of the current sensing circuit. The detected real-time current is converted into a third voltage signal and then output to the first capacitor through the current limiting component to change the first ramp voltage.

4. The circuit according to claim 3, characterized in that, The current detection circuit further includes a fourth resistor; the two ends of the fourth resistor are respectively connected to the two ends of the current transformer. The current sensing and conditioning circuit includes a rectifier circuit and a third resistor; the first and second terminals of the rectifier circuit are respectively connected to the two ends of the fourth resistor, the third terminal of the rectifier circuit is connected to the first terminal of the third resistor and grounded, and the fourth terminal of the rectifier circuit is connected to the second terminal of the third resistor and serves as the output terminal of the voltage detection circuit.

5. The circuit according to claim 4, characterized in that, The first ramp voltage is: ;in, This is the voltage of the first ramp. This is the second ramp voltage. The third voltage signal, The forward voltage drop of the diode is [value missing]. This is the reference voltage for the control chip. For the first resistor, For the second resistor, For the first capacitor, The period of the sawtooth wave is... Let t be the duty cycle of the power supply during operation, and t be time. The clamping threshold is determined in the following manner: Obtain the primary-side output current threshold of the power change circuit, and determine the first threshold of the first ramp voltage based on the primary-side output current threshold; The clamping threshold is determined to be the minimum value between the first threshold and the maximum output value of the error amplifier in the control chip.

6. The circuit according to claim 1, characterized in that, The voltage detection circuit includes a current detection circuit and a current sensing and conditioning circuit; The input terminal of the current detection circuit is connected to the input terminal of the power conversion circuit, and the real-time current of the power conversion circuit is detected by the current sensor. The input terminal of the current sensing and conditioning circuit is connected to the output terminal of the current sensing circuit. The detected real-time current is converted into a third voltage signal and then output to the first capacitor through the current limiting component to change the first ramp voltage.

7. The circuit according to claim 6, characterized in that, The current detection circuit further includes a seventh resistor and an eighth resistor; the first end of the seventh resistor is connected to the power supply terminal of the current sensor, the second end of the seventh resistor is connected to the first end of the eighth resistor and connected to the first input terminal of the current sensing and conditioning circuit, and the second end of the eighth resistor is connected to the ground terminal of the current sensor. The current sensing and conditioning circuit includes a differential circuit, a fifth resistor, a ninth resistor, a sixth resistor, and a tenth resistor. The first terminal of the fifth resistor serves as the second input terminal of the current sensing and conditioning circuit and is connected to the operational amplifier output terminal of the current sensor. The second terminal of the fifth resistor is connected to the non-inverting input terminal of the differential circuit and to the first terminal of the sixth resistor. The first terminal of the ninth resistor is connected to the first input terminal of the current sensing and conditioning circuit. The second terminal of the ninth resistor is connected to the inverting input terminal of the differential circuit and to the first terminal of the tenth resistor. The second terminal of the sixth resistor is grounded. The second terminal of the tenth resistor is connected to the output terminal of the differential circuit.

8. The circuit according to claim 7, characterized in that, The first ramp voltage is: ;in, This is the voltage of the first ramp. This is the second ramp voltage. The third voltage signal, The forward voltage drop of the diode is [value missing]. This is the reference voltage for the control chip. For the first resistor, For the second resistor, For the first capacitor, The period of the sawtooth wave is... Let t be the duty cycle of the power supply during operation, and t be time. The clamping threshold is determined in the following manner: Obtain the primary-side input current threshold of the power conversion circuit, and determine the second threshold of the first ramp voltage based on the primary-side input current threshold; The clamping threshold is determined to be the minimum value between the second threshold and the maximum output value of the error amplifier in the control chip.

9. A method for power limiting based on duty cycle clamping, characterized in that, The method includes: In response to determining that the control chip is powered, a sawtooth wave is generated by a sawtooth wave generating circuit; the sawtooth wave has a second ramp voltage. The real-time current of the power conversion circuit is converted into a third voltage signal through a voltage detection circuit; The third voltage signal is superimposed with the second ramp voltage by the current limiting component to obtain the first ramp voltage; In response to determining that the superimposed first ramp voltage is greater than or equal to the clamping threshold, the control chip controls the current cycle to perform duty cycle clamping. The sawtooth wave generating circuit includes a first resistor and a first capacitor; the first end of the first resistor is connected to the reference voltage pin of the control chip, the second end of the first resistor is connected to the first end of the first capacitor and grounded; the second end of the first capacitor is connected to the slope compensation pin of the control chip. The current limiting component includes a diode and a second resistor connected in series; the input terminal of the diode is connected to the output terminal of the voltage detection circuit, and the output terminal of the diode is connected to the first terminal of the second resistor; the second terminal of the second resistor is connected to the slope compensation pin of the control chip.

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