Method and device for generating frequency hopping pattern based on m sequence, medium and equipment

Abstract

The invention provides a method and system for generating a frequency hopping pattern based on an m sequence, a medium and equipment, and relates to the technical field of frequency hopping communication. According to the technical scheme provided by the invention, all user terminals share the first frequency hopping pattern formed by the reference frequency hopping sequence in the odd number communication time frame, so that uplink time division multiple access communication is realized. In an even number communication time frame, a shared index value is generated for each time slot through a single m-sequence generator, and a unique exclusive fixed offset value is allocated to each user terminal from an inherent offset list. Because the exclusive fixed offset values of the user terminals are different from each other, the target frequency points of different users in the same time slot are not overlapped with each other, frequency hopping collision is avoided, and orthogonality of the frequency hopping pattern is realized. And meanwhile, the shared index value inherits the pseudo-random characteristic and the uniform distribution characteristic of the m sequence, so that the occurrence probability of each frequency point tends to be consistent, frequency resources are utilized in a balanced manner, the anti-interference capability and the spectrum efficiency of the system are improved, and the frequency hopping pattern effect is integrally improved.

Description

Technical Field

[0001] This application relates to the field of frequency hopping communication technology, specifically to a method, apparatus, medium, and device for generating frequency hopping patterns based on m-sequences. Background Technology

[0002] Frequency hopping patterns are frequency sequences used in frequency-hopping communication systems to guide communication devices to hop between multiple frequency points according to a predetermined pattern in different time slots. During frequency hopping communication, the transmitting and receiving ends synchronously switch their operating frequencies in each time slot according to the same frequency hopping pattern to achieve signal transmission and reception. The quality of the frequency hopping pattern directly affects the reliability, spectral efficiency, and anti-interference performance of the communication system; therefore, the generation method of the frequency hopping pattern is a key technology in the design of frequency-hopping communication systems.

[0003] In related technologies, frequency hopping pattern generation often employs a method of configuring an independent pseudo-random sequence generator for each user. Each user terminal generates uncorrelated frequency hopping sequences through its own sequence generator, reducing the probability of frequency hopping collisions between users through the low correlation between sequences. However, in practical applications, this method suffers from a lack of deterministic orthogonality between multiple sequence generators. When the number of users is large or the communication duration is long, the frequency hopping sequences of different users still pose a risk of collision, leading to a decline in communication quality and ultimately resulting in poor frequency hopping pattern performance. Summary of the Invention

[0004] This application provides a method, apparatus, medium, and device for generating frequency hopping patterns based on m-sequences, which can improve the generation effect of frequency hopping patterns.

[0005] In a first aspect, this application provides a method for generating frequency hopping patterns based on m-sequences, the method comprising: A first number of user terminals that transmit frequency hopping sequences in parallel and a second number of available frequency points for forming a frequency hopping pattern are determined, wherein the second number is greater than the first number; In odd-numbered communication frames, multiple reference frequency points are selected from the available frequency points to form a reference frequency hopping sequence, and the reference frequency hopping sequence is determined as the first frequency hopping pattern used by all the user terminals. Call the preset m-sequence generator to generate the shared index value corresponding to each time slot in the frame during even-numbered communication; Each user terminal is assigned a serial number corresponding to its identity identifier, and based on the serial number, a unique exclusive fixed offset value is determined for each user terminal from a preset list of inherent offsets. Based on the shared index value of the user terminal and the dedicated fixed offset value, the frequency offset of each time slot within the even-numbered communication frame is determined; The frequency offset of each time slot in the even-numbered communication time frame is combined with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern of each user terminal in the even-numbered communication time frame. According to the communication time sequence of the odd-numbered communication time frames and the even-numbered communication time frames, the first frequency hopping pattern and the second frequency hopping pattern are combined into a target frequency hopping pattern.

[0006] By adopting the above technical solution, in odd-numbered communication frames, all user terminals share a first frequency hopping pattern composed of a reference frequency hopping sequence, realizing uplink time-division multiple access communication. In even-numbered communication frames, a shared index value is generated for each time slot through a single m-sequence generator, and a unique dedicated fixed offset value is assigned to each user terminal from the inherent offset list. The shared index value and the dedicated fixed offset value are combined to generate a frequency point offset, which is then combined with the reference frequency point of the first frequency hopping pattern to generate a second frequency hopping pattern. Since the dedicated fixed offset values ​​of each user terminal are different, the target frequency points of different users in the same time slot do not overlap, avoiding frequency hopping collisions and achieving orthogonality of the frequency hopping pattern. At the same time, the shared index value inherits the pseudo-random and uniform distribution characteristics of the m-sequence, making the probability of occurrence of each frequency point tend to be consistent, ensuring balanced utilization of frequency resources, improving the system's anti-interference capability and spectral efficiency, and improving the overall effect of the frequency hopping pattern.

[0007] Optionally, determining the frequency offset of each time slot within the even-numbered communication frame based on the shared index value of the user terminal and the dedicated fixed offset value includes: Substituting the sum of the shared index value and the dedicated fixed offset value, along with the second number of available frequency points, into the first calculation formula, the frequency offset of each time slot within the frame during even-numbered communication is obtained. The first calculation formula is: MOV = mod(m_HA + GU_UL - 1, P); Wherein, MOV represents the frequency offset, mod() represents the modulo operation function, m_HA represents the shared index value, GU_UL represents the dedicated fixed offset value, and P represents the second quantity.

[0008] By adopting the above technical solution, the shared index value is added to the dedicated fixed offset value, then subtracted by one, and then moduloed with the second number of available frequency points to calculate the frequency offset. The modulo operation ensures that the frequency offset falls within the valid range, avoiding frequency index out-of-bounds errors. Since the dedicated fixed offset values ​​of different user terminals are different, even if the shared index value is the same, the summation results of different users will be different. The frequency offsets obtained after the modulo operation do not overlap within the same time slot, ensuring that the target frequency points of each user terminal do not conflict. At the same time, the shared index value inherits the pseudo-random characteristics of the m-sequence, making the frequency offset present a pseudo-random distribution in the time dimension. After the modulo operation, the number of accesses to each available frequency point tends to be balanced, realizing uniform utilization of frequency resources and improving the randomness and anti-interference performance of the frequency hopping pattern.

[0009] Optionally, the step of calling a preset m-sequence generator to generate shared index values ​​corresponding to each time slot within a frame during even-numbered communication includes: The m-sequence generator is configured according to the preset generator polynomial and the initial phase to obtain the preset m-sequence generator. In each time slot of the even-numbered communication frame, the corresponding state value is synchronously extracted from multiple preset register bits inside the m-sequence generator; The status values ​​on each of the register bits are combined to obtain the shared index value corresponding to each time slot within the frame during even-numbered communication.

[0010] By adopting the above technical solution, the m-sequence generator is configured according to a preset generator polynomial and initial phase, establishing a unified sequence generation rule. This enables all user terminals to generate shared index values ​​based on the same m-sequence generator state, achieving resource sharing in sequence generation and reducing hardware resource consumption. In each time slot of even-numbered communication frames, state values ​​are synchronously extracted from multiple preset register bits within the m-sequence generator and combined to obtain the shared index value corresponding to each time slot. This shared index value inherits the pseudo-random and long-period characteristics of the m-sequence, exhibiting a pseudo-random distribution in the time dimension. Since all user terminals extract the same shared index value in the same time slot, when calculating the frequency offset using their respective unique fixed offset values, the frequency differences between users are ensured, while the pseudo-random variation of the shared index value achieves randomness in the frequency hopping pattern, improving the system's anti-interference capability and spectrum utilization efficiency.

[0011] Optionally, configuring the initial m-sequence generator according to a preset generator polynomial and an initial phase to obtain a preset m-sequence generator includes: Load the tap values ​​of the generated polynomial of the preset order into the feedback logic unit that initializes the m-sequence generator; The initial phase with a preset number of bits is loaded into each register unit of the initial m-sequence generator; An m-sequence generator is generated based on an external clock signal, such that the m-sequence generator generates a pseudo-random sequence based on the loaded generator polynomial and the initial phase.

[0012] By adopting the above technical solution, the tap values ​​of the generator polynomial of a preset order are loaded into the feedback logic unit of the m-sequence generator to determine the connection relationship of the feedback path and the XOR operation rules, thus establishing a mathematical model for sequence generation. The initial phase with a preset number of bits is loaded into each register unit, setting the starting state of the m-sequence generator and ensuring that all user terminals start generating sequences from the same initial state. The m-sequence generator is driven by an external clock signal, causing the register states to shift and update according to the feedback logic determined by the generator polynomial, generating pseudo-random sequences with long periods and good randomness. Since the generator polynomial and initial phase are uniformly configured during system initialization, the m-sequence generators of all user terminals generate the same register state in the same clock cycle, ensuring that each user extracts the same shared index value in the same time slot, achieving synchronization and consistency in sequence generation.

[0013] Optionally, combining the status values ​​on each of the register bits to obtain the shared index value corresponding to each time slot within the even-numbered communication frame includes: Define a first preset register bit combination corresponding to the uplink and a second preset register bit combination corresponding to the downlink, wherein the first preset register bit combination and the second preset register bit combination are different; When generating the uplink frequency hopping pattern, the state value is extracted only from the register bits corresponding to the first preset register bit combination and combined into a shared index value dedicated to the uplink. or, When generating the downlink frequency hopping pattern, the state value is extracted only from the register bits corresponding to the second preset register bit combination and combined into a shared index value dedicated to the downlink.

[0014] By adopting the above technical solution, a first preset register bit combination corresponding to the uplink and a second preset register bit combination corresponding to the downlink are defined, and the two are different, realizing differentiated generation of uplink and downlink frequency hopping patterns. When generating the uplink frequency hopping pattern, only the state values ​​are extracted from the register bits corresponding to the first preset register bit combination and combined into a shared index value dedicated to the uplink. When generating the downlink frequency hopping pattern, only the state values ​​are extracted from the register bits corresponding to the second preset register bit combination and combined into a shared index value dedicated to the downlink. Since the state values ​​are extracted from different register bit combinations of the same m-sequence generator, the uplink and downlink obtain different shared index values ​​at the same time, making the uplink and downlink frequency hopping patterns independent of each other, avoiding uplink and downlink frequency point conflicts, and realizing the separate use of frequency resources. At the same time, by selecting different register bit combinations to generate multiple independent sequences based on a single m-sequence generator, hardware resources are saved and the system implementation complexity is simplified.

[0015] Optionally, the step of combining the frequency offset of each time slot within the even-numbered communication time frame with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate a second frequency hopping pattern for each user terminal in the even-numbered communication time frame specifically includes: For any time slot within an even-numbered communication frame, obtain the reference frequency point of the first frequency hopping pattern in the corresponding time slot; Determine the dedicated frequency offset of the user terminal in the same time slot; The reference frequency point and the offset of the dedicated frequency point are added together to generate the target frequency point in the same time slot. The target frequency points under each time slot are combined to obtain the second frequency hopping pattern of the user terminal in the even-numbered communication time frame.

[0016] By adopting the above technical solution, the reference frequency point of the first frequency hopping pattern in any time slot within an even-numbered communication frame is obtained, and the dedicated frequency point offset of the user terminal in the same time slot is determined. The reference frequency point and the dedicated frequency point offset are added together to generate the target frequency point, thus realizing the differentiated generation of frequency hopping patterns for each user terminal. Since the dedicated frequency point offset is calculated from a shared index value and a unique dedicated fixed offset value for each user terminal, the dedicated frequency point offsets of different user terminals in the same time slot are different. The target frequency points obtained after the addition operation do not overlap within the same time slot, avoiding frequency point collisions and achieving orthogonality of multi-user frequency hopping patterns. The target frequency points in each time slot are combined in chronological order to obtain the complete second frequency hopping pattern of the user terminal in the even-numbered communication frame. This frequency hopping pattern inherits the pseudo-random characteristics of the first frequency hopping pattern based on the m-sequence, and also achieves frequency point separation between users through the dedicated frequency point offset, ensuring the reliability of downlink multi-user frequency division multiple access communication.

[0017] Optionally, before assigning a serial number corresponding to its identity identifier to each user terminal, and determining a unique, exclusive fixed offset value for each user terminal from a preset list of inherent offsets based on the serial number, the method further includes: Based on the second number of available frequency points, a range of values ​​is determined, and based on the first number of user terminals, the number of values ​​to be selected is determined. Numerical values ​​are selected within the range of numerical values ​​according to preset constraints, and the selection results are obtained. The constraints are that each selected numerical value is different from the others, and all selected numerical values ​​are approximately uniformly distributed within the range of numerical values. The selection results, which are equal to the first number of user terminals, are determined as elements in a preset list of inherent offsets.

[0018] By adopting the above technical solution, the numerical selection range is determined based on the second number of available frequency points, and the number of values ​​to be selected is determined based on the first number of user terminals, providing boundary conditions for the construction of the inherent offset list. Numerical selection is performed within the numerical selection range according to preset constraints. These constraints require that each selected value is distinct and approximately uniformly distributed within the selection range, ensuring that the dedicated fixed offset values ​​of different user terminals do not overlap and are evenly distributed within the available frequency point range. The selection result equal to the first number of user terminals is determined as an element in the inherent offset list, ensuring that the dedicated fixed offset value obtained by each user terminal from the inherent offset list has uniqueness and uniform distribution characteristics. Because the dedicated fixed offset values ​​are evenly distributed, the frequency point offsets calculated by different user terminals are evenly distributed in the frequency domain, avoiding local frequency band congestion caused by concentrated frequency point use and improving frequency resource utilization efficiency.

[0019] Secondly, this application provides an apparatus for generating frequency hopping patterns based on m-sequences, the apparatus comprising: The terminal determination module is used to determine a first number of user terminals that transmit frequency hopping sequences in parallel and a second number of available frequency points for forming a frequency hopping pattern, wherein the second number is greater than the first number. The first frequency hopping pattern determination module is used to select multiple reference frequency points from the available frequency points to form a reference frequency hopping sequence in odd-numbered communication time frames, and to determine the reference frequency hopping sequence as the first frequency hopping pattern used by all the user terminals. The shared index value generation module is used to call the preset m-sequence generator to generate the shared index value corresponding to each time slot in the frame during even-numbered communication. The fixed offset value determination module is used to assign a serial number corresponding to its identity identifier to each user terminal, and determine a unique exclusive fixed offset value for each user terminal from a preset list of inherent offset values ​​based on the serial number. The frequency offset determination module is used to determine the frequency offset of each time slot in the even-numbered communication frame based on the shared index value of the user terminal and the dedicated fixed offset value. The second frequency hopping pattern generation module is used to combine the frequency offset of each time slot in the even-numbered communication time frame with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern of each user terminal in the even-numbered communication time frame. The frequency hopping pattern combination module is used to combine the first frequency hopping pattern and the second frequency hopping pattern into a target frequency hopping pattern according to the communication time sequence of the odd-numbered communication time frames and the even-numbered communication time frames.

[0020] Thirdly, this application provides a computer storage medium storing a plurality of instructions adapted for loading by a processor and executing any of the methods described above.

[0021] Fourthly, this application provides an electronic device including a processor, a memory, and a transceiver, wherein the memory is used to store instructions, the transceiver is used to communicate with other devices, and the processor is used to execute the instructions stored in the memory to cause the electronic device to perform any of the methods described above.

[0022] In summary, the beneficial effects of the technical solution of this application include: By adopting the above technical solution, in odd-numbered communication frames, all user terminals share a first frequency hopping pattern composed of a reference frequency hopping sequence, realizing uplink time-division multiple access communication. In even-numbered communication frames, a shared index value is generated for each time slot through a single m-sequence generator, and a unique dedicated fixed offset value is assigned to each user terminal from the inherent offset list. The shared index value and the dedicated fixed offset value are combined to generate a frequency point offset, which is then combined with the reference frequency point of the first frequency hopping pattern to generate a second frequency hopping pattern. Since the dedicated fixed offset values ​​of each user terminal are different, the target frequency points of different users in the same time slot do not overlap, avoiding frequency hopping collisions and achieving orthogonality of the frequency hopping pattern. At the same time, the shared index value inherits the pseudo-random and uniform distribution characteristics of the m-sequence, making the probability of occurrence of each frequency point tend to be consistent, ensuring balanced utilization of frequency resources, improving the system's anti-interference capability and spectral efficiency, and improving the overall effect of the frequency hopping pattern. Attached Figure Description

[0023] Figure 1 This is an architecture diagram of time-frequency resource allocation for a multi-user frequency-hopping communication system provided in an embodiment of this application; Figure 2 This is a flowchart illustrating a method for generating frequency hopping patterns based on an m-sequence according to an embodiment of this application; Figure 3 This is a distribution diagram of an exemplary target frequency hopping pattern provided in an embodiment of this application; Figure 4 This is a schematic diagram of the principle of an m-sequence generator provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of an apparatus for generating frequency hopping patterns based on an m-sequence according to an embodiment of this application; Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0024] Explanation of reference numerals in the attached figures: 600, electronic device; 601, processor; 602, communication bus; 603, user interface; 604, network interface; 605, memory. Detailed Implementation

[0025] In the description of the embodiments of this application, words such as "illustrative," "for example," or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "illustrative," "for example," or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Rather, the use of words such as "illustrative," "for example," or "for example" is intended to present the relevant concepts in a specific manner.

[0026] Please see first. Figure 1 This is an architecture diagram of time-frequency resource allocation for a multi-user frequency-hopping communication system provided in an embodiment of this application. The diagram depicts the application of frequency-hopping patterns in actual communication scenarios from both time and user dimensions, and is used to explain the implementation scenario of this application.

[0027] On the timeline, the communication process is divided into multiple consecutive frequency hopping bursts, labeled as frequency hopping burst 1, frequency hopping burst 3, frequency hopping burst 4, up to frequency hopping burst n. These frequency hopping bursts are arranged sequentially in time, and each frequency hopping burst contains a complete time frame. As can be seen from the claims, these frequency hopping bursts correspond to the alternation of odd-numbered and even-numbered communication time frames, where odd-numbered bursts such as frequency hopping burst 1 and frequency hopping burst 3 correspond to odd-numbered communication time frames, and even-numbered bursts such as frequency hopping burst 4 correspond to even-numbered communication time frames. Each time frame is further divided into multiple time slots, which are arranged consecutively in time. The time frame is marked with "Permission Structure" and "Master User No. 1 (Master Rocket Point)", indicating that in odd-numbered communication time frames, all user terminals use the same first frequency hopping pattern, which is uniformly defined by the master user or system control node, serving as the permission structure and synchronization benchmark for the entire communication system.

[0028] At the user level, the figure shows multiple user terminals that transmit frequency hopping sequences in parallel, labeled as User 1#, User 2#, up to User K#. Each user occupies one row in the figure, representing that user's frequency hopping behavior over the entire time series.

[0029] For each user terminal, the frequency hopping pattern used is displayed during different frequency hopping burst periods: In odd-numbered frequency hopping bursts (such as frequency hopping burst 1 and frequency hopping burst 3), all user rows display the same "time frame" identifier, indicating that these users follow the same first frequency hopping pattern in odd-numbered communication time frames, achieving system-level synchronization and a unified frequency usage mode. In even-numbered frequency hopping bursts, different user rows display their own exclusive frequency hopping pattern identifiers, such as "User #1 frequency hopping sequence phase 1", "User #2 frequency hopping sequence phase 2", and "User #K frequency hopping sequence phase K". These identifiers indicate that each user terminal uses its own independent second frequency hopping pattern in even-numbered communication time frames.

[0030] The figure illustrates the orthogonal frequency hopping characteristic of the claim by showing that different users use different frequency hopping pattern phases in even-numbered frequency hopping bursts. Specifically, each user terminal calculates a different frequency offset based on its own fixed offset value, thereby generating its own differentiated second frequency hopping pattern on the basis of the same reference frequency hopping sequence. This design ensures that different user terminals use different frequencies in different time slots within the same even-numbered communication time frame, avoiding frequency collisions and mutual interference.

[0031] The concept of "phase" in the labels "User #1 frequency hopping sequence phase 1" and "User #2 frequency hopping sequence phase 2" in the figure corresponds to the technical feature in the claims that different user terminals have different exclusive fixed offset values. By assigning different offset values ​​(equivalent to different frequency hopping phases) to each user, the frequency hopping sequences of each user are staggered in time, thus realizing the orthogonal allocation of frequency resources.

[0032] Figure 1 The alternating pattern of odd-numbered and even-numbered frequency hopping bursts is clearly demonstrated. During odd-numbered bursts, all users use a unified time frame structure and a first frequency hopping pattern, facilitating signal synchronization and time frame start identification at the receiver. During even-numbered bursts, each user switches to their own independent second frequency hopping pattern, achieving orthogonality in multi-user parallel communication. This alternating odd-even design balances system synchronization performance and multi-user communication capabilities, representing the core application of the frequency hopping pattern generation method of this invention.

[0033] Based on the description in the disclosure document, Figure 1 It also implicitly implies the communication timing relationship between the master user and the terminal users. After the master user (host user 1) transmits a signal in its time slot, each terminal user (user 1# to user K#) transmits a signal sequentially in its assigned transmission time slot after receiving the master user's signal. Through the time-division duplex mechanism, uplink and downlink signals are separated in time, avoiding mutual interference. Each master user and its corresponding multiple terminal users form a frequency hopping pattern group, and the terminals within the group achieve interference-free parallel communication by using orthogonal frequency hopping patterns.

[0034] Please see Figure 2 This is a flowchart illustrating a method for generating frequency hopping patterns based on m-sequences, provided in an embodiment of this application. This method can be implemented using a computer program, a microcontroller, or run on a von Neumann architecture-based device for generating frequency hopping patterns based on m-sequences. The computer program can be integrated into an application or run as a standalone utility application. The specific steps of the method for generating frequency hopping patterns based on m-sequences are described in detail below.

[0035] S101: Determine a first number of user terminals that transmit frequency hopping sequences in parallel, and a second number of available frequency points for forming a frequency hopping pattern, wherein the second number is greater than the first number; In this context, "parallel frequency hopping sequence transmission user terminals" refers to multiple terminal devices that need to perform frequency hopping communication simultaneously within the same communication system. These terminals each perform frequency hopping and data transmission according to their assigned frequency hopping patterns within the same time period. The first quantity represents the total number of user terminals that need to work in parallel simultaneously, and this value determines the number of orthogonal frequency hopping patterns that the system needs to generate. "Available frequency points" refers to the set of all discrete frequency points available for use by the frequency hopping system within the allocated communication frequency band, with each frequency point representing a specific frequency that can be used for data transmission. The second quantity represents the total number of frequency points in the set of available frequency points, and this quantity must be greater than the first quantity to ensure sufficient frequency resources to avoid frequency collisions between different user terminals. The frequency hopping pattern refers to the sequence of frequency point changes used by the user terminals in chronological order during communication, defining which specific frequency point should be used for signal transmission or reception in each time slot.

[0036] Specifically, the process begins by determining the number of user terminals that need to work simultaneously in the current communication scenario. This number may be determined based on network planning, user access requirements, or system capacity design. Next, the total number of frequency points available for frequency hopping within the allocated frequency band is calculated. This total number is determined by the band bandwidth, frequency point spacing, and spectrum allocation strategy. Then, it is verified whether the second number is greater than the first number. This condition is a necessary prerequisite to ensure that different frequency points can be allocated to each user terminal and orthogonal communication between users can be achieved. Finally, the determined first and second numbers are used as the basic parameters for generating the frequency hopping pattern in subsequent steps, guiding the selection of the reference frequency hopping sequence, the configuration of the offset, and the final frequency hopping pattern generation process.

[0037] In some embodiments, the number of user terminals and the number of available frequency points can be determined in a variety of ways: Optionally, the pre-set network parameters can be obtained by reading the system configuration file, wherein the configuration file records a list of user terminal identifiers to be accessed, and the first number is obtained by counting the number of entries in the list. At the same time, the configuration file also defines the frequency band range and frequency point allocation scheme allocated to the communication system. The total number of available frequency points is calculated based on the frequency band start frequency, end frequency and frequency point interval as the second number. Finally, the two number values ​​are compared to confirm that the condition that the second number is greater than the first number is met.

[0038] S102: In odd-numbered communication frames, select multiple reference frequency points from available frequency points to form a reference frequency hopping sequence, and determine the reference frequency hopping sequence as the first frequency hopping pattern used by all user terminals. Among them, odd-numbered communication time frames refer to communication time frames with odd numbers when arranged according to time frame numbers on the time axis, such as frame 1, frame 3, frame 5, etc. These time frames show a regular interval distribution in the time series; reference frequency points refer to specific frequency points selected from the set of available frequency points to form a fixed frequency hopping sequence shared by all users. These frequency points remain unchanged within odd-numbered communication time frames; reference frequency hopping sequence is used to represent the frequency point sequence formed by arranging multiple reference frequency points in chronological order. This sequence defines which fixed frequency points are used in each time slot of the odd-numbered communication time frames; the first frequency hopping pattern refers to the frequency hopping mode that all user terminals follow in odd-numbered communication time frames. This pattern is exactly the same for all user terminals and does not contain user-specific differences.

[0039] Specifically, for communication time frames with odd-numbered addresses, several frequency points are selected as reference frequency points from the available frequency point set determined in step S101 according to preset rules. The number of selected points usually corresponds to the number of time slots contained in a communication time frame, ensuring that each time slot has a corresponding reference frequency point. The selected reference frequency points are arranged in the time order of the time slots to form a complete reference frequency hopping sequence. For example, if a time frame contains 8 time slots, the reference frequency hopping sequence consists of 8 reference frequency points. This reference frequency hopping sequence is defined as the first frequency hopping pattern, and it is stipulated that all user terminals must use this same frequency hopping pattern for communication in odd-numbered communication time frames. Since all users use the same frequency point sequence in odd-numbered time frames, this design facilitates signal synchronization and start time identification at the receiving end.

[0040] In some embodiments, the selection of reference frequency points and the construction of reference frequency hopping sequences can be implemented in a variety of ways: Optionally, a method of equal interval selection is used to extract reference frequency points from available frequency points. First, the ratio of the total number of available frequency points to the number of time slots in a time frame is calculated as the interval step size. Then, starting from the starting position of available frequency points, a frequency point is selected as a reference frequency point at every step size. This process is repeated until the number of selected reference frequency points is equal to the number of time slots. Next, the selected reference frequency points are arranged in ascending order of time slot numbers to form a reference frequency hopping sequence. Finally, this sequence is set as the first frequency hopping pattern used by all user terminals in odd-numbered communication time frames.

[0041] S103: Call the preset m-sequence generator to generate the shared index value corresponding to each time slot in the frame during even-numbered communication; The preset m-sequence generator refers to a maximum-length linear shift register sequence generator pre-configured according to a specific generating polynomial and initial phase. This generator can produce binary sequences with good pseudo-random characteristics. Even-numbered communication time frames refer to communication time frames with even numbers when arranged according to time frame numbers on the time axis, such as frame 2, frame 4, frame 6, etc. Time slots are used to represent the time units further divided within a communication time frame. Each time frame contains multiple consecutive time slots, and each time slot corresponds to one frequency hopping operation. The shared index value refers to the value output by the m-sequence generator at a specific time. This value is the same for all user terminals and is used as a common reference parameter for subsequent calculation of frequency point offset.

[0042] Specifically, when an even-numbered communication time frame arrives, a preset m-sequence generator is activated. Based on its internally configured generator polynomial and initial phase, the m-sequence generator produces a new register state in each clock cycle. For each time slot within the even-numbered communication time frame, a specific positional state value is extracted from the m-sequence generator's register, and these state values ​​are combined according to a predetermined rule to form a single value as the shared index value for that time slot. As the time slots advance, the m-sequence generator continuously updates its internal state, generating a new shared index value for each time slot, thus forming a sequence of shared index values ​​corresponding to the time slot sequence. Since all user terminals use the same configured m-sequence generator and are activated at the same time, the shared index values ​​they obtain in the same time slot are completely identical. This sharing characteristic ensures that in subsequent steps, each user terminal can perform its own frequency offset calculation based on the same reference value.

[0043] In some embodiments, the generation of shared index values ​​can be achieved in a variety of ways: Optionally, the m-sequence generator is controlled by a synchronous triggering mechanism to generate shared index values ​​for each time slot. At the beginning of the even-numbered communication frame, a start signal is sent to the m-sequence generator. The m-sequence generator updates its internal register state once according to each rising edge of the external clock signal. When entering the start of a certain time slot, the current state value is read from multiple preset register bits of the m-sequence generator. The read multi-bit binary state value is concatenated into a complete binary number and converted into a decimal value as the shared index value of that time slot. This process is repeated until all time slots in the even-numbered communication frame have obtained their respective shared index values.

[0044] S104: Assign a serial number corresponding to its identity identifier to each user terminal, and determine a unique fixed offset value for each user terminal from a preset list of inherent offsets based on the serial number; Among them, the identity identifier represents the identification information that can uniquely distinguish different user terminals, such as device serial number, MAC address, or system-assigned user ID; the serial number is used to represent the sequential number assigned according to certain rules based on the user terminal identity identifier, usually a consecutive integer starting from 0 or 1; the inherent offset list is a pre-set ordered set containing multiple offset values, and each element in the list represents an available exclusive fixed offset value; the exclusive fixed offset value is a fixed value uniquely assigned to a specific user terminal from the inherent offset list, and this value remains unchanged throughout the communication process, used to distinguish the frequency hopping patterns of different user terminals.

[0045] Specifically, based on the identification information of each user terminal, a unique serial number is assigned to each user terminal according to a predetermined sorting rule. The sorting rule can be based on the numerical value of the identification, alphabetical order, or access time. A pre-constructed list of inherent offsets is obtained, which contains at least one offset value to ensure that each user terminal obtains an independent offset value. Using the user terminal's serial number as an index, the element at the corresponding position in the inherent offset list is extracted as the user terminal's exclusive fixed offset value. For example, the user terminal with serial number 0 obtains the 0th element in the list, and the user terminal with serial number 1 obtains the 1st element. Each user terminal is bound to its corresponding exclusive fixed offset value and recorded and stored, so that the offset value to be used by each user terminal can be quickly found in the subsequent frequency offset calculation process. Since the elements in the inherent offset list are different and evenly distributed, this allocation mechanism ensures that different user terminals obtain different results when performing frequency offset calculations, thereby achieving orthogonality of frequency hopping patterns among multiple users.

[0046] In some embodiments, serial number allocation and determination of dedicated fixed offset values ​​can be achieved in multiple ways: Optionally, a centralized allocation method is used to allocate serial numbers and dedicated fixed offset values ​​to user terminals. First, the identification information of all user terminals is collected and arranged in ascending order of identification values. Then, serial numbers starting from 0 are assigned to the arranged user terminals in sequence. Next, all offset values ​​are read from the inherent offset list pre-stored in the system database. The offset value at the corresponding position is extracted from the list based on the serial number of each user terminal as an array index. Finally, the serial number and corresponding dedicated fixed offset value of each user terminal are sent to the corresponding user terminal through the control channel.

[0047] S105: Determine the frequency offset of each time slot within the frame during even-numbered communication based on the shared index value and the dedicated fixed offset value of the user terminal. The frequency offset is used to represent the number of frequency points that need to be moved relative to the reference frequency point in a certain time slot within a frame during even-numbered communication. This offset is calculated by combining the shared index value and the dedicated fixed offset value.

[0048] Specifically, for each time slot within an even-numbered communication frame, the shared index value corresponding to that time slot is obtained. This value is a reference parameter used by all user terminals in the same time slot. For each user terminal, its dedicated fixed offset value allocated in step S104 is extracted. Mathematical operations are performed on the shared index value and the dedicated fixed offset value. By summing and combining modulo operations, the frequency offset of the user terminal in the current time slot is obtained. Since different user terminals have different dedicated fixed offset values, even if the same shared index value is used in the same time slot, the calculated frequency offsets will be different. The above calculation process is repeated to traverse all time slots and all user terminals within the even-numbered communication frame, finally obtaining a two-dimensional matrix. The rows of the matrix correspond to different user terminals, and the columns correspond to different time slots. Each element in the matrix represents the frequency offset of a specific user terminal in a specific time slot. This offset matrix provides the necessary frequency position adjustment information for generating the second frequency hopping pattern of each user terminal in subsequent steps.

[0049] Based on the above embodiments, as an optional implementation method, the method of determining the frequency offset of each time slot in the frame during even-numbered communication according to the shared index value and the dedicated fixed offset value of the user terminal in S105 can be implemented through the following steps.

[0050] Substituting the sum of the shared index value and the dedicated fixed offset value, along with the second number of available frequency points, into the first calculation formula, we obtain the frequency offset of each time slot within the frame during even-numbered communication. The first calculation formula is: MOV = mod(m_HA + GU_UL - 1, P); Where MOV represents the frequency offset, mod() represents the modulo operation function, m_HA represents the shared index value, GU_UL represents the dedicated fixed offset value, and P represents the second quantity.

[0051] In practice, the first step is to obtain the shared index value corresponding to the current time slot. This index value is provided by a pseudo-random sequence or a fixed sequence pre-generated by the system. All terminal users read the same shared index value as a reference in the same time slot. The second step is to obtain the dedicated fixed offset value for each terminal user. This offset value is uniformly allocated by the system and stored in the terminal device when the user accesses the network. Then, the shared index value and the dedicated fixed offset value are summed to obtain an intermediate accumulation result. Since the numerical range of this intermediate result is unrestricted, it needs to be subtracted by one before performing a modulo operation on the second number of available frequency points. The modulo operation maps values ​​that may exceed the frequency range back to the effective range of zero to the second number minus one. The result of the operation is the frequency offset of the time slot.

[0052] The purpose of the subtraction operation is to adjust the starting position of the index so that the final frequency offset matches the actual frequency numbering system. Through this calculation method, different terminal users, due to their different dedicated fixed offset values, will obtain different frequency offsets after summation and modulo operations, even when using the same shared index value as a reference in the same time slot. This achieves spatial separation in the frequency domain, preventing signal conflicts caused by multiple users occupying the same frequency in the same time slot. After the calculation is complete, the terminal user selects the corresponding frequency from the available frequency set based on the obtained frequency offset to transmit or receive signals, completing the frequency hopping operation for that time slot. The process is then repeated in the next time slot, sequentially determining the working frequency sequence of all time slots within the entire even-numbered communication frame, forming a complete second frequency hopping pattern.

[0053] S106: Combine the frequency offset of each time slot in the even-numbered communication frame with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern of each user terminal in the even-numbered communication frame. The second frequency hopping pattern refers to the personalized frequency hopping mode used by each user terminal in even-numbered communication frames. This pattern varies due to the different fixed offset values ​​of different user terminals.

[0054] Specifically, for a specific time slot within an even-numbered communication frame, the reference frequency point corresponding to the time slot position is first extracted from the first frequency hopping pattern, i.e., the reference frequency hopping sequence. This reference frequency point is a specific frequency number or index value. Then, the frequency offset of the specific user terminal in that time slot is obtained. This offset indicates the number of frequency points that need to be moved relative to the reference frequency point. The reference frequency point and the frequency offset are added together to obtain the target frequency point that the user terminal should actually use in the current time slot. If the calculation result exceeds the range of available frequency points, a wraparound process is required to ensure that the result falls within the valid frequency point index range. The above process is repeated to traverse all time slots within the even-numbered communication frame, and the target frequency points calculated for each time slot are arranged in chronological order to form the complete frequency point usage sequence of the user terminal in the even-numbered communication frame. This sequence is the second frequency hopping pattern of the user terminal. The above process is performed on all user terminals respectively, and finally, each user terminal obtains its own independent second frequency hopping pattern. Since different user terminals use different frequency offsets, their second frequency hopping patterns are orthogonal to each other and will not collide.

[0055] In some embodiments, the combination of the reference frequency and the frequency offset can be implemented in various ways to generate the second frequency hopping pattern: Optionally, the target frequency is generated by direct addition. For the i-th time slot in an even-numbered communication frame, the reference frequency at the i-th position is read from the first frequency hopping pattern and denoted as frequency point A. The frequency offset of the current user terminal in the i-th time slot is obtained and denoted as offset B. The sum of frequency point A and offset B is calculated by performing addition. It is determined whether the sum exceeds the maximum index of available frequency points. If it does not exceed the maximum index, the sum is directly used as the target frequency point of the i-th time slot. If it exceeds the maximum index, the sum is modulo the total number of available frequency points and used as the target frequency point. All time slots are processed sequentially according to the time slot order to obtain the complete second frequency hopping pattern.

[0056] S107: According to the communication time order of odd-numbered communication frames and even-numbered communication frames, combine the first frequency hopping pattern and the second frequency hopping pattern into the target frequency hopping pattern.

[0057] The communication time sequence indicates the order in which communication frames are arranged according to their chronological order. The target frequency hopping pattern refers to the final generated complete frequency hopping pattern that includes frequency hopping rules for both odd and even time frames. This pattern can be continuously used by the user terminal throughout the entire communication process.

[0058] Specifically, firstly, the temporal order of odd-numbered and even-numbered communication time frames in the actual communication process is determined. Typically, time frames appear sequentially in ascending order of their numbers, i.e., frame 1, frame 2, frame 3, frame 4, etc. Based on this temporal order, a first frequency hopping pattern is applied to all odd-numbered communication time frames, and a second frequency hopping pattern is applied to all even-numbered communication time frames. By alternating between the two frequency hopping patterns, a temporally continuous frequency hopping sequence is constructed. In this sequence, the odd-numbered time frames use the frequencies of the first frequency hopping pattern, and the even-numbered time frames use the frequencies of the second frequency hopping pattern. This complete frequency hopping sequence is defined as the target frequency hopping pattern and assigned to the corresponding user terminals for use in actual communication. For different user terminals, because they use different second frequency hopping patterns in even-numbered time frames and the same first frequency hopping pattern in odd-numbered time frames, the final target frequency hopping pattern exhibits differences in the even-numbered time frame portion and remains consistent in the odd-numbered time frame portion.

[0059] In some embodiments, the combination of the first frequency hopping pattern and the second frequency hopping pattern can be implemented in a variety of ways: Optionally, the two frequency hopping patterns can be combined using a timing splicing method. First, a frequency hopping sequence array with a length sufficient to accommodate multiple communication time frames is created. Then, the time frames are processed one by one in ascending order of their time frame numbers. When an odd-numbered time frame is processed, the frequency point sequence in the first frequency hopping pattern is copied to the corresponding time frame position in the array. When an even-numbered time frame is processed, the frequency point sequence in the second frequency hopping pattern of the user terminal is copied to the corresponding time frame position in the array. This process continues until the planned communication duration is covered or the period length of the m-sequence is reached. Finally, the complete frequency point sequence stored in the array is the target frequency hopping pattern of the user terminal.

[0060] For details regarding the target frequency hopping pattern finally generated in this application, please refer to [link / reference]. Figure 3 , Figure 3 This is a distribution diagram of an exemplary target frequency hopping pattern provided in an embodiment of this application.

[0061] exist Figure 3The upper part of the table shows the network points at different frequency hopping pulse times. The horizontal axis represents the frequency hopping pulse number, and the vertical axis represents the frequency point number of the frequency hopping pattern. Multiple red curves are plotted in the figure, each representing the frequency hopping trajectory of a user terminal in consecutive time slots. It can be observed from the figure that the frequency hopping curves of each user exhibit pseudo-random jumping characteristics in the frequency point space. The frequency point changes between adjacent time slots are relatively large, reflecting the randomness of the frequency hopping pattern. On the vertical cross-section of the same frequency hopping pulse number, the frequency point positions of different users do not overlap, and the curves are completely dispersed vertically. Extensive simulations verify that this design does not produce frequency point collisions. This result shows that only an m-sequence polynomial generator and an initial phase are needed, along with the fixed offset inherent offset of each user, to easily generate orthogonal frequency hopping patterns for K users. This frequency hopping pattern generation method is simple, resource-saving, and meets the dual requirements of orthogonality and uniform distribution, without frequency hopping collisions, ensuring signal isolation when multiple users work simultaneously.

[0062] exist Figure 3 The lower half of the graph shows the statistical distribution of each frequency hopping pattern. The horizontal axis represents the frequency point number of the frequency hopping pattern, and the vertical axis represents the total number of times that frequency point appears across all users and time slots. This simulation result is based on the distribution statistics of frequency hopping patterns across 512 frequency hopping times and 16 user terminals. Theoretically, each frequency hopping pattern appears 16 divided by 42 and multiplied by 512, which equals 195 times. As can be seen from the distribution of the red curve in the graph, the actual number of occurrences of each frequency point fluctuates around the theoretical value of 195 times, with most frequency points appearing between 182 and 215 times, showing a relatively small deviation from the theoretical value. The simulation results indicate that the probability of each frequency point appearing is basically the same, achieving the technical effect of equal probability of occurrence for each frequency participating in frequency hopping. The randomness of the frequency hopping pattern is good, frequency resources are used evenly, the system's anti-interference capability is strong, and the imbalance caused by concentrated frequency point usage—such as local band congestion or long-term idleness of specific frequency bands—is avoided.

[0063] Based on the above embodiments, as an optional implementation method, the method of calling the preset m-sequence generator in S103 to generate the shared index value corresponding to each time slot in the frame during even-numbered communication can be specifically implemented through the following steps S201-S203.

[0064] Please see Figure 4 , Figure 4This diagram illustrates the principle of an m-sequence generator provided in this application embodiment, showing its basic structural principle. The diagram includes multiple cascaded register units, labeled from left to right as an-1, an-2, up to a1, a0. Each register unit stores a binary bit state value. The register units are connected via feedback to form a shift register chain. The circles in the diagram represent XOR gates, used to implement feedback logic operations. The feedback path is controlled by tap coefficients cn-1, cn-2, up to c1. When a tap coefficient is 1, the corresponding register output participates in the feedback XOR operation; when the tap coefficient is 0, that position does not participate in the feedback. The leftmost tap coefficient cn is fixed at 1, ensuring a closed-loop feedback circuit. The dashed lines in the diagram represent omitted register units; in practical applications, the register chain is longer. The "Feedback" label at the bottom indicates that the XOR operation result is fed back to the input of the register chain, forming a cyclic shift and state update mechanism. The output on the right extracts the state value of a specific position from the register chain to generate a frequency hopping pattern sequence. Driven by the clock signal, the register state of the entire structure evolves continuously according to the feedback polynomial law, generating a periodic pseudo-random sequence.

[0065] The m-sequence generator operates on the principle of generating pseudo-random sequences based on a linear feedback shift register structure. Before the system joins the network, the taps and initial phase of the m-sequence generator polynomial are determined by the pattern group number binding parameters issued by the carrier fire control system, ensuring that all users within the same network use the same sequence generation rules. The default value of the generator polynomial taps is set to cn = 1, and the remaining taps cn-1 to c1 form a 61-bit binary sequence. This sequence determines which register bits participate in the feedback XOR operation, forming a specific feedback logic relationship. The default initial values ​​of the registers an-1 to a0 also form a 61-bit binary sequence. This initial value serves as the starting state of the m-sequence generator. Different initial phases generate pseudo-random sequences with the same period but phase offsets. In each clock cycle, the entire register chain undergoes a shift operation. The state value of the least significant bit a0 is output, and the remaining bits are shifted one bit to the lower bit direction. The most significant bit an-1 receives the result of the feedback XOR operation, which XORs all register bits with a tap coefficient of 1 to obtain the new input value. Through continuous shifting and feedback operations, the 61-bit state value of the register changes cyclically according to the pattern determined by the generator polynomial, generating a pseudo-random sequence with a period length of up to 2^61 minus 1. When generating the frequency hopping pattern, it is not necessary to output the entire 61-bit register state. Instead, an address is formed using a structure that uses a long m-sequence with only a small number of register bits for output. For the uplink, the current state value is extracted from four specific positions: bits 60, 23, 15, and 9 of the m-sequence register. These four binary bits are combined to form the address index of the uplink random frequency hopping pattern sequence. For the downlink, the current state value is extracted from five specific positions: bits 61, 23, 15, 8, and 1 of the m-sequence register. These five binary bits are combined to form the address index of the downlink random frequency hopping pattern sequence.

[0066] S201: Configure the initial m-sequence generator according to the preset generator polynomial and initial phase to obtain the preset m-sequence generator; The generator polynomial is a mathematical expression describing the feedback connection relationship of the m-sequence generator. Its coefficients determine which register bits participate in the feedback operation and how they participate. The initial phase is the combination of the initial state values ​​of each register bit before the m-sequence generator starts operating; this initial state determines the starting position of the generated sequence and its subsequent evolution path. The m-sequence generator is a pseudo-random sequence generation device based on a linear feedback shift register. This device generates periodic sequences with good randomness through register shifting and feedback logic operations.

[0067] Specifically, the feedback connection structure of the m-sequence generator is set according to the pre-determined generator polynomial parameters. This is achieved by mapping the coefficients of each term of the generator polynomial to the connection relationships of the feedback logic circuit. The register bit corresponding to a term with a coefficient of one participates in the XOR feedback operation, while the register bit corresponding to a term with a coefficient of zero does not participate in the feedback. Simultaneously, each register bit is initialized to a specific binary state value according to the initial phase parameters. This initialization operation determines the starting point of sequence generation. After configuration, a preset m-sequence generator in a ready state is obtained, which has the ability to generate deterministic pseudo-random sequences.

[0068] Based on the above embodiments, as an optional implementation method, the method of configuring the initial m-sequence generator according to the preset generator polynomial and the initial phase in S201 to obtain the preset m-sequence generator can be specifically implemented through the following steps S2011-S2013.

[0069] S2011: Load the tap value of the generated polynomial of the preset order into the feedback logic unit that initializes the m-sequence generator; The preset order is the total number of register units in the m-sequence generator, which determines the period length and complexity of the generated sequence. The generator polynomial tap values ​​are binary control signal groups derived from the generator polynomial coefficients. These control signal groups indicate which register unit outputs need to participate in the feedback XOR operation. The feedback logic unit is the circuit module in the m-sequence generator that performs the XOR operation and generates the feedback signal. This module performs logical operations on the selected register outputs according to the connection relationship determined by the tap values.

[0070] In practice, the total number of register units required for the m-sequence generator is first determined based on the preset order. For example, if the order is seven, the generator contains seven register units. Then, the pre-selected generator polynomial is converted into tap value form. The conversion method involves extracting the coefficients of each term of the generator polynomial to form a binary bit string. Each binary bit corresponds to a register position. A bit value of one indicates that the position participates in the feedback operation, and a bit value of zero indicates that the position does not participate in the feedback operation. Next, the converted tap values ​​are written to the configuration register or control port of the feedback logic unit. This writing operation is implemented through a software configuration interface or hardware connection. The feedback logic unit establishes the connection relationship of the internal XOR gates based on the received tap values. The output of the register unit corresponding to the tap value of one is connected to the input of the XOR gate, forming a multi-input XOR tree structure. The output of the XOR tree is sent back to the input of the register chain as a feedback signal.

[0071] S2012: Load the initial phase with a preset number of bits into the register units that initialize the m-sequence generator; The initial phase is the combination of the initial state values ​​of each register unit in the m-sequence generator before it starts working. This combination determines the starting position of the generated sequence output. The register units are the basic storage elements inside the m-sequence generator that store binary state values. These units are updated through shift operations and feedback signals to achieve sequence generation.

[0072] In practice, an initial phase parameter of a preset number of bits is obtained. This parameter is represented in binary form, with the number of bits equal to the generator's order. Each bit corresponds to the initial state of a register unit. Then, according to the register unit numbering order or address mapping relationship, each bit of the initial phase is written to its corresponding register unit. The writing operation is implemented through a set signal or a data loading port, with the high-order bits written to the high-order register unit and the low-order bits written to the low-order register unit. After the writing is completed, the state values ​​stored in each register unit constitute the complete initial phase. At this point, the generator is in the initialization completed state but has not yet started sequence generation. The choice of the initial phase affects the starting position of the generated sequence. Different initial phase values ​​cause the generator to start outputting from different periodic positions of the m-sequence. However, due to the periodicity of the m-sequence, as long as the generator polynomial is the same, different initial phases will ultimately produce the same sequence content, only with different starting points.

[0073] S2013: Generate an m-sequence generator based on an external clock signal, so that the m-sequence generator generates a pseudo-random sequence based on the loaded generator polynomial and the initial phase.

[0074] Among them, the pseudo-random sequence is a binary sequence generated by a deterministic algorithm but with similar random statistical properties. This sequence serves as the benchmark for frequency selection in the frequency hopping system.

[0075] In practice, an external clock signal is first connected to the clock input port of the m-sequence generator. This clock signal is generated by dividing the system master clock or by a dedicated synchronous clock source to ensure that the m-sequence generators on all end-user devices receive clock signals of the same frequency and phase, thus achieving time synchronization.

[0076] When the rising or falling edge of the clock signal arrives, the m-sequence generator executes a complete working cycle, which includes two stages: The first stage is a shift operation, in which the current state value of each register unit is shifted to the adjacent next-level register unit, the state value of the least significant register is output and discarded, and the input of the most significant register waits to receive the feedback signal; The second stage is a feedback operation, in which the feedback logic unit extracts the current state value from the specified register position according to the tap value loaded in step S2011, performs an XOR operation on these state values ​​to obtain the feedback signal, and the feedback signal is sent to the most significant register unit in the next clock cycle to complete a state update.

[0077] As the clock signal arrives continuously, the m-sequence generator repeatedly performs shift and feedback operations. The state combination of each register unit evolves sequentially according to the transition rules determined by the generator polynomial. Starting from the initial phase set in step S2012, after several clock cycles, it traverses all non-zero states corresponding to the generator polynomial, forming a periodic pseudo-random sequence.

[0078] S202: In each time slot of an even-numbered communication frame, the corresponding state value is synchronously extracted from multiple preset register bits inside the m-sequence generator; In this context, the preset register bits are specific locations within the storage units that participate in sequence generation within the m-sequence generator, selected for extracting state values. The choice of these locations affects the statistical characteristics of the output sequence. The state value is the binary value stored in the register bit at a certain moment, which is updated and changes as the generator's clock advances.

[0079] Specifically, upon entering an even-numbered communication time frame, at the beginning of each time slot or at a predetermined sampling point, the currently stored state value is read from multiple preset register bits inside the m-sequence generator. The position and number of these register bits are determined according to the bit width of the required shared index value. The read operation is performed synchronously on all end-user devices to ensure that each user obtains the same combination of register state values ​​in the same time slot. After the read is completed, the m-sequence generator performs a shift and feedback operation to update the state values ​​of each register bit, preparing for extraction in the next time slot.

[0080] S203: Combine the status values ​​on each register bit to obtain the shared index value corresponding to each time slot within the frame during even-numbered communication.

[0081] Specifically, the status values ​​extracted from each register bit are combined in binary according to a predetermined bit order to form a multi-bit binary number, which is the shared index value corresponding to the current time slot. The combination method is to use the status values ​​of each register bit as different bit weights of the binary number, with the status values ​​of the high-order register forming the high-order bits and the status values ​​of the low-order register forming the low-order bits. The combined multi-bit binary number is converted into a decimal integer for subsequent frequency offset calculation.

[0082] By repeating steps S202 and S203 in each time slot, a sequence of shared index values ​​corresponding to all time slots within an even-numbered communication frame is generated sequentially. This sequence remains completely consistent across all end-user devices.

[0083] Based on the above embodiments, as an optional implementation method, the method of combining the status values ​​on each register bit in S203 to obtain the shared index value corresponding to each time slot in the frame during even-numbered communication can be specifically implemented through the following steps S2031-S2033.

[0084] S2031: Define the first preset register bit combination corresponding to the uplink and the second preset register bit combination corresponding to the downlink, wherein the first preset register bit combination and the second preset register bit combination are different; The uplink is the communication path for transmitting signals from the terminal user to the master user, carrying data and control information sent by the terminal equipment. The downlink is the communication path for transmitting signals from the master user to the terminal user, carrying data and control information sent by the master user. The first preset register bit combination is a specific set of locations selected from all register units within the m-sequence generator for generating the uplink frequency hopping pattern; this set contains several register bit numbers. The second preset register bit combination is a specific set of locations selected from all register units within the m-sequence generator for generating the downlink frequency hopping pattern; the register bit numbers in this set are not exactly the same as those in the first preset register bit combination.

[0085] In practice, the first preset register bit combination is determined based on the uplink frequency point requirements. The number of register bits in this combination determines the bit width of the uplink shared index value, which in turn determines the range of frequency points that can be represented. For example, when the uplink needs to support 16 frequency points, four register bits are selected to form the first preset register bit combination. These four register bits can be selected as register bits number 60, 23, 15, and 9. The basis for selecting these positions is that the combination of state values ​​of these bits in the overall state space of the m-sequence can produce good random distribution characteristics.

[0086] Then, a second preset register bit combination is determined based on the downlink frequency requirements. The number of register bits in this combination is determined according to the frequency range supported by the downlink. For example, if the downlink needs to support 32 frequencies, 5 register bits are selected to form the second preset register bit combination. These 5 register bits can be selected as register bits 61, 23, 15, 8, and 1. By selecting different register bit position combinations, it is ensured that the state value sequences extracted by the uplink and downlink have different evolution patterns. When selecting register bit positions, the two combinations are allowed to have partially overlapping register bits, but the overall combinations are different. For example, both the first and second preset register bit combinations contain register bits 23 and 15, but because the other register bits in the combination are different and the total number of bits is different, the final extracted state value sequences are still different.

[0087] After the definition is completed, the first and second preset register bit combinations are stored in the system as fixed configuration parameters. When generating frequency hopping patterns, all user equipment performs register bit selection operations according to the same definition, ensuring that all users in the same sub-network use the same register bit extraction rules for uplink and downlink. This differentiated register bit combination definition method makes the uplink and downlink frequency hopping patterns based on the same m-sequence generator but generate different frequency sequence. In time division duplex mode, the master user and the terminal user use the downlink and uplink respectively in different time slots. Since the frequency hopping patterns of the two links come from different register bit combinations, there will be no frequency conflict even when working in adjacent time slots, achieving the technical effect that there is no signal interference between missile-borne and airborne signals.

[0088] S2032: When generating the uplink frequency hopping pattern, extract the status value only from the register bits corresponding to the first preset register bit combination, and combine them into a shared index value dedicated to the uplink. In specific implementation, when an end user needs to send a signal in the uplink time slot, the first step is to determine if the current working link is an uplink. This determination is made by reading the time slot configuration information or frame structure definition. After confirming that it is an uplink, the location of the register bits to be accessed is determined according to the first preset register bit combination defined in step S2031, such as accessing register bits 60, 23, 15, and 9. At the sampling time of the current time slot, the currently stored binary status value is synchronously read from these register bits of the m-sequence generator. The read operation is implemented through the register output port or internal bus. Each register bit provides a one-bit status value, and the four register bits provide a total of four bits of status value. The read status values ​​are combined into binary according to a predetermined bit order relationship. The combination method is to use the status values ​​of each register bit as different bit weights of a multi-bit binary number. For example, the status value of register bit 60 is used as the most significant bit, and the status value of register bit 9 is used as the least significant bit, forming a 4-bit binary number. The combined binary number is converted into a decimal integer, which is the shared index value of the uplink in the current time slot.

[0089] S2033: When generating the downlink frequency hopping pattern, extract the status value only from the register bits corresponding to the second preset register bit combination, and combine them into a shared index value dedicated to the downlink.

[0090] In specific implementation, when a primary user or terminal user needs to receive or transmit signals in a downlink time slot, the first step is to determine if the current working link is a downlink. This determination is made by reading the time slot configuration information or frame structure definition. After confirming it as a downlink, the required register bit positions are determined according to the second preset register bit combination defined in step S2031, such as accessing register bits 61, 23, 15, 8, and 1. At the sampling time of the current time slot, the currently stored binary state value is synchronously read from these register bits of the m-sequence generator. The read operation is performed through... Access is achieved through register output ports or internal buses. Each register bit provides a one-bit status value, and the five register bits provide a total of five bits of status value. The read status values ​​are combined into binary numbers according to a predetermined bit order. The combination method is to use the status values ​​of each register bit as different bit weights of a multi-bit binary number. For example, the status value of register bit 61 is used as the most significant bit, and the status value of register bit 1 is used as the least significant bit to form a five-bit binary number. The combined binary number is converted into a decimal integer, which is the shared index value of the downlink in the current time slot.

[0091] Since only the second preset register bit combination is used to extract the state value, the shared index value sequence of the downlink is independent of the uplink. Even if it is extracted from the same m-sequence generator in the same clock cycle, the shared index values ​​obtained by the uplink and downlink are different due to the different register bit combinations selected. The shared index values ​​of different time slots change with the evolution of the m-sequence generator state, forming a pseudo-randomly distributed index value sequence. This sequence is synchronously obtained by the master user and all terminal users in the same sub-network, and serves as a unified reference for subsequent calculation of the downlink frequency offset by combining their respective exclusive fixed offset values.

[0092] Based on the above embodiments, as an optional implementation method, the determination of the dedicated fixed offset value in S104 can be specifically implemented through the following steps S301-S303.

[0093] S301: Based on the second number of available frequency points, determine a range of values ​​to be selected, and based on the first number of user terminals, determine the number of values ​​to be selected. The range of values ​​selected is a numerical interval determined by the total number of available frequency points in the system. The boundary values ​​of this interval correspond to the minimum and maximum values ​​of the frequency point numbers. The number of values ​​to be selected is a target number determined by the total number of user terminals in the network, which determines the total number of elements that should be included in the inherent offset list.

[0094] In specific implementation, firstly, the second number of available frequency points in the system is obtained. This number represents the total number of frequency resources that the frequency hopping system can actually use. In a frequency division multiple access (FDMA) frequency hopping communication system, the number of available frequency points is obtained by dividing the total system bandwidth by the bandwidth occupied by a single user. This number directly determines the frequency space range that the frequency hopping pattern can use. Then, the second number of available frequency points is used as the upper bound of the numerical selection range. The numerical selection range is set to an integer interval from zero to the second number minus one. The number of integers contained in this interval is exactly equal to the second number of available frequency points. Each integer in the interval corresponds to a possible frequency point offset value. Next, the first number of user terminals in the network is obtained. This number represents the total number of terminal user devices actually working in the current sub-network, including all user nodes that need to be assigned an independent frequency hopping pattern. The first number of user terminals is directly determined as the number of values ​​to be selected. This number indicates how many different integer values ​​should be selected from the numerical selection range. Each selected integer value will be assigned to a user terminal as its exclusive fixed offset value.

[0095] Meanwhile, when determining the range of values ​​to be selected and the number of values ​​to be selected, check whether the first number is less than or equal to the second number. When the first number is less than the second number, the range of values ​​to be selected can accommodate all the required values, which meets the requirement of assigning different exclusive fixed offset values ​​to each user terminal. When the first number is close to or equal to the second number, the range of values ​​to be selected is just or can only accommodate all the required values. At this time, it is necessary to select from almost all available values.

[0096] S302: Select values ​​within the range of values ​​according to preset constraints to obtain selection results. The constraints are that each selected value is different from the others, and all selected values ​​are approximately uniformly distributed within the range of values. Among them, the preset constraints are the limiting rules that must be met during the numerical selection process. These rules include two aspects: the requirement for numerical uniqueness and the requirement for uniform distribution.

[0097] In practical implementation, a uniqueness constraint is first set, requiring that each value in the selected result is different from the others, that is, there are no duplicate values ​​in the set. This ensures that the exclusive fixed offset value obtained by each user terminal is unique, avoiding frequency hopping pattern conflicts caused by different users using the same fixed offset value and generating the same frequency offset after superimposing the shared index value. Then, a uniformity constraint is set, requiring that all selected values ​​form an approximately uniform distribution within the value selection range, that is, the interval between adjacent selected values ​​is approximately equal. This uniform distribution characteristic makes the exclusive fixed offset values ​​of different users evenly distributed throughout the entire available frequency range. When each user superimposes the same shared index value, the final frequency offset is also evenly distributed in the frequency space, avoiding the unbalanced situation where the frequency hopping frequencies of multiple users are concentrated in some frequency bands while other frequency bands are idle, thus improving the utilization efficiency of frequency resources and the anti-interference capability of the system.

[0098] S303: The selection results, which are equal to the first number of user terminals, are determined as elements in the preset inherent offset list.

[0099] In specific implementation, firstly, the number of values ​​contained in the selection result is confirmed. This number is equal to the first number of user terminals after step S302 is executed, verifying the completeness of the selection result. Then, an empty intrinsic offset list data structure is created. This data structure is stored in the form of an array, vector, or list. The length of the list is set to the first number of user terminals, and each position in the list corresponds to one user terminal. The values ​​in the selection result are filled into the positions of the intrinsic offset list one by one in a predetermined order. The filling order adopts the natural sorting or random sorting of the values ​​in the selection result. When natural sorting is used, the values ​​in the selection result are arranged from smallest to largest and then filled into the first position to the last position of the list. When random sorting is used, the values ​​in the selection result are first randomly shuffled, and then the shuffled values ​​are filled into the positions of the list in sequence. The correspondence between the user terminal number and the list position is established. The first user terminal is assigned the value of the first position of the list as its exclusive fixed offset value, the second user terminal is assigned the value of the second position of the list, and so on until all user terminals have obtained their exclusive fixed offset values.

[0100] After filling is completed, the number of elements in the inherent offset list is equal to the first number of user terminals. Each element in the list is an integer value converted from the selection result. These integer values ​​satisfy the characteristics that they are different from each other and are approximately uniformly distributed within the range of numerical selection. The list as a whole constitutes a fixed offset value configuration scheme preset for multi-user frequency hopping communication system.

[0101] Based on the above embodiments, as an optional implementation method, the method of generating the second frequency hopping pattern of each user terminal in even-numbered communication frames in S106 can be implemented through the following steps.

[0102] For any time slot within an even-numbered communication frame, obtain the reference frequency point of the first frequency hopping pattern in the corresponding time slot; determine the dedicated frequency point offset of the user terminal in the same time slot; perform an addition operation between the reference frequency point and the dedicated frequency point offset to generate the target frequency point in the same time slot; combine the target frequency points in each time slot to obtain the second frequency hopping pattern of the user terminal in the even-numbered communication frame.

[0103] In specific implementation, firstly, for any time slot within an even-numbered communication frame, the frequency hopping point corresponding to that time slot is read from the primary user's first frequency hopping pattern. This frequency point is used as the reference frequency point, which is calculated by the primary user based on the downlink shared index value and the primary user's dedicated fixed offset value, representing the primary user's actual operating frequency point in that time slot. Then, the user terminal's dedicated frequency offset in the same time slot is determined. This offset is obtained by adding the user terminal's dedicated fixed offset value to the downlink shared index value in the current time slot. The dedicated fixed offset value is extracted from the inherent offset list according to the user terminal number, and the shared index value is extracted from the register bits corresponding to the second preset register bit combination of the m-sequence generator and combined. The result after addition is... The dedicated frequency offset includes both a fixed component that distinguishes different users and a dynamic component that changes with time slots. Next, the reference frequency value and the dedicated frequency offset value are added together to obtain the target frequency of the user terminal in that time slot. When the calculation result exceeds the available frequency range, a modulo operation is performed on the result to return the excess portion to the effective frequency range, ensuring that the target frequency falls within the frequency space defined by the system. Finally, all time slots within the even-numbered communication time frame are traversed, and the above operations of obtaining the reference frequency, determining the dedicated frequency offset, and calculating the target frequency are repeated for each time slot. The target frequency points calculated for each time slot are arranged and combined sequentially according to time order to form a complete frequency sequence. This sequence is the second frequency hopping pattern of the user terminal in the even-numbered communication time frame.

[0104] Based on the above embodiments, as an optional implementation method, the method of generating the second frequency hopping pattern of each user terminal in even-numbered communication frames in S106 can be implemented through the following steps.

[0105] The following are embodiments of the apparatus of this application, which can be used to execute the embodiments of the method of this application. For details not disclosed in the embodiments of the apparatus of this application, please refer to the embodiments of the method of this application.

[0106] Please see Figure 5This illustration shows a schematic diagram of an apparatus for generating frequency hopping patterns based on m-sequences, provided in an exemplary embodiment of this application. This apparatus can be implemented entirely or partially through software, hardware, or a combination of both. The apparatus for generating frequency hopping patterns based on m-sequences includes: The terminal determination module is used to determine a first number of user terminals that transmit frequency hopping sequences in parallel and a second number of available frequency points for forming a frequency hopping pattern, wherein the second number is greater than the first number. The first frequency hopping pattern determination module is used to select multiple reference frequency points from the available frequency points to form a reference frequency hopping sequence in odd-numbered communication time frames, and determine the reference frequency hopping sequence as the first frequency hopping pattern used by all user terminals. The shared index value generation module is used to call the preset m-sequence generator to generate the shared index value corresponding to each time slot in the frame during even-numbered communication. The fixed offset value determination module is used to assign a serial number corresponding to its identity identifier to each user terminal, and determine a unique fixed offset value for each user terminal from a preset list of inherent offset values ​​based on the serial number. The frequency offset determination module is used to determine the frequency offset of each time slot within a frame during even-numbered communication based on the shared index value and the dedicated fixed offset value of the user terminal. The second frequency hopping pattern generation module is used to combine the frequency offset of each time slot in the even-numbered communication time frame with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern of each user terminal in the even-numbered communication time frame. The frequency hopping pattern combination module is used to combine the first frequency hopping pattern and the second frequency hopping pattern into a target frequency hopping pattern according to the communication time sequence of odd-numbered communication time frames and even-numbered communication time frames.

[0107] This application also provides a computer storage medium that can store multiple instructions. The instructions are adapted to be loaded by a processor and executed as described in the above embodiments for generating frequency hopping patterns based on m-sequences. For details of the execution process, please refer to the specific description of the embodiments, which will not be repeated here.

[0108] Please see Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Figure 6 As shown, the electronic device 600 may include: at least one processor 601, at least one network interface 604, user interface 603, memory 605, and at least one communication bus 602.

[0109] The communication bus 602 is used to enable communication between these components.

[0110] The user interface 603 may include a display screen and a camera.

[0111] The network interface 604 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0112] The processor 601 may include one or more processing cores. The processor 601 connects to various parts of the server using various interfaces and lines, and performs various server functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 605, and by calling data stored in the memory 605. Optionally, the processor 601 may be implemented using at least one hardware form of digital signal processing, field-programmable gate array, or programmable logic array. The processor 601 may integrate one or more of the following: a central processing unit (CPU), a graphics processing unit (GPU), and a modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required for display; and the modem handles wireless communication. It is understood that the modem may also not be integrated into the processor 601 and may be implemented as a separate chip.

[0113] The memory 605 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 605 may include a non-transitory computer-readable medium. The memory 605 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 605 may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data involved in the various method embodiments described above, etc. Optionally, the memory 605 may also be at least one storage device located remotely from the aforementioned processor 601. Figure 6 As shown, the memory 605, which serves as a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application program for a method of generating frequency hopping patterns based on m-sequences.

[0114] exist Figure 6 In the electronic device 600 shown, the user interface 603 is mainly used to provide an input interface for the user and to obtain the user input data; while the processor 601 can be used to call an application program stored in the memory 605 that is a method for generating frequency hopping patterns based on m-sequences. When executed by one or more processors, the electronic device executes one or more methods as described in the above embodiments.

[0115] The above are merely exemplary embodiments of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of other embodiments of this disclosure upon considering the specification and the disclosure of practical truths. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described in this disclosure.

Claims

1. A method for generating frequency hopping patterns based on m-sequences, characterized in that, The method includes: A first number of user terminals that transmit frequency hopping sequences in parallel and a second number of available frequency points for forming a frequency hopping pattern are determined, wherein the second number is greater than the first number; In odd-numbered communication frames, multiple reference frequency points are selected from the available frequency points to form a reference frequency hopping sequence, and the reference frequency hopping sequence is determined as the first frequency hopping pattern used by all the user terminals. Call the preset m-sequence generator to generate the shared index value corresponding to each time slot in the frame during even-numbered communication; Each user terminal is assigned a serial number corresponding to its identity identifier, and based on the serial number, a unique exclusive fixed offset value is determined for each user terminal from a preset list of inherent offsets. Based on the shared index value of the user terminal and the dedicated fixed offset value, the frequency offset of each time slot within the even-numbered communication frame is determined; The frequency offset of each time slot in the even-numbered communication time frame is combined with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern of each user terminal in the even-numbered communication time frame. According to the communication time sequence of the odd-numbered communication time frames and the even-numbered communication time frames, the first frequency hopping pattern and the second frequency hopping pattern are combined into a target frequency hopping pattern.

2. The method according to claim 1, characterized in that, The step of determining the frequency offset of each time slot within the even-numbered communication frame based on the shared index value of the user terminal and the dedicated fixed offset value includes: Substituting the sum of the shared index value and the dedicated fixed offset value, along with the second number of available frequency points, into the first calculation formula, the frequency offset of each time slot within the frame during even-numbered communication is obtained. The first calculation formula is: MOV = mod(m_HA + GU_UL - 1, P); Wherein, MOV represents the frequency offset, mod() represents the modulo operation function, m_HA represents the shared index value, GU_UL represents the dedicated fixed offset value, and P represents the second quantity.

3. The method according to claim 1, characterized in that, The step of calling a preset m-sequence generator to generate shared index values ​​corresponding to each time slot within a frame during even-numbered communication includes: The m-sequence generator is configured according to the preset generator polynomial and the initial phase to obtain the preset m-sequence generator. In each time slot of the even-numbered communication frame, the corresponding state value is synchronously extracted from multiple preset register bits inside the m-sequence generator; The status values ​​on each of the register bits are combined to obtain the shared index value corresponding to each time slot within the frame during even-numbered communication.

4. The method according to claim 3, characterized in that, The step of configuring the initial m-sequence generator according to a preset generator polynomial and an initial phase to obtain a preset m-sequence generator includes: Load the tap values ​​of the generated polynomial of the preset order into the feedback logic unit that initializes the m-sequence generator; The initial phase with a preset number of bits is loaded into each register unit of the initial m-sequence generator; An m-sequence generator is generated based on an external clock signal, such that the m-sequence generator generates a pseudo-random sequence based on the loaded generator polynomial and the initial phase.

5. The method according to claim 3, characterized in that, The step of combining the status values ​​on each of the register bits to obtain the shared index value corresponding to each time slot within the even-numbered communication frame includes: Define a first preset register bit combination corresponding to the uplink and a second preset register bit combination corresponding to the downlink, wherein the first preset register bit combination and the second preset register bit combination are different; When generating the uplink frequency hopping pattern, the state value is extracted only from the register bits corresponding to the first preset register bit combination and combined into a shared index value dedicated to the uplink. or, When generating the downlink frequency hopping pattern, the state value is extracted only from the register bits corresponding to the second preset register bit combination and combined into a shared index value dedicated to the downlink.

6. The method according to claim 1, characterized in that, The step of combining the frequency offset of each time slot within the even-numbered communication time frame with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern for each user terminal in the even-numbered communication time frame specifically includes: For any time slot within an even-numbered communication frame, obtain the reference frequency point of the first frequency hopping pattern in the corresponding time slot; Determine the dedicated frequency offset of the user terminal in the same time slot; The reference frequency point and the offset of the dedicated frequency point are added together to generate the target frequency point in the same time slot. The target frequency points under each time slot are combined to obtain the second frequency hopping pattern of the user terminal in the even-numbered communication time frame.

7. The method according to claim 1, characterized in that, Before assigning a serial number corresponding to its identity identifier to each user terminal, and determining a unique and exclusive fixed offset value for each user terminal from a preset list of inherent offsets based on the serial number, the method further includes: Based on the second number of available frequency points, a range of values ​​is determined, and based on the first number of user terminals, the number of values ​​to be selected is determined. Numerical values ​​are selected within the range of numerical values ​​according to preset constraints, and the selection results are obtained. The constraints are that each selected numerical value is different from the others, and all selected numerical values ​​are approximately uniformly distributed within the range of numerical values. The selection results, which are equal to the first number of user terminals, are determined as elements in a preset list of inherent offsets.

8. An apparatus for generating frequency hopping patterns based on m-sequences, characterized in that, The device includes: The terminal determination module is used to determine a first number of user terminals that transmit frequency hopping sequences in parallel and a second number of available frequency points for forming a frequency hopping pattern, wherein the second number is greater than the first number. The first frequency hopping pattern determination module is used to select multiple reference frequency points from the available frequency points to form a reference frequency hopping sequence in odd-numbered communication time frames, and to determine the reference frequency hopping sequence as the first frequency hopping pattern used by all the user terminals. The shared index value generation module is used to call the preset m-sequence generator to generate the shared index value corresponding to each time slot in the frame during even-numbered communication. The fixed offset value determination module is used to assign a serial number corresponding to its identity identifier to each user terminal, and determine a unique exclusive fixed offset value for each user terminal from a preset list of inherent offset values ​​based on the serial number. The frequency offset determination module is used to determine the frequency offset of each time slot in the even-numbered communication frame based on the shared index value of the user terminal and the dedicated fixed offset value. The second frequency hopping pattern generation module is used to combine the frequency offset of each time slot in the even-numbered communication time frame with the reference frequency of the first frequency hopping pattern in the corresponding time slot to generate the second frequency hopping pattern of each user terminal in the even-numbered communication time frame. The frequency hopping pattern combination module is used to combine the first frequency hopping pattern and the second frequency hopping pattern into a target frequency hopping pattern according to the communication time sequence of the odd-numbered communication time frames and the even-numbered communication time frames.

9. A computer storage medium, characterized in that, The computer storage medium stores a plurality of instructions, which are adapted to be loaded by a processor and executed as described in any one of claims 1 to 7.

10. An electronic device, characterized in that, The device includes a processor, a memory, and a transceiver, wherein the memory is used to store instructions, the transceiver is used to communicate with other devices, and the processor is used to execute the instructions stored in the memory to cause the electronic device to perform the method as described in any one of claims 1 to 7.

Images