Motor controller software high-voltage interlocking method and device

Abstract

The invention discloses a motor controller software high-voltage interlocking method and equipment. The method specifically comprises the following steps: waking up a controller and setting a default reported high-voltage interlocking initial state as interlocking success; the motor controller samples a bus voltage signal, a battery bus voltage signal, a high-voltage state signal and an interlocking detection fault signal; monitoring an interlocking detection fault in real time according to the interlocking detection fault signal, if the interlocking detection fault exists, judging that the high-voltage interlocking state is invalid and outputting a high-voltage interlocking state signal, otherwise, performing the next step; when the high-voltage state signal indicates that the high-voltage state signal is in a power-on state and an interlocking detection fault does not exist, judging a high-voltage interlocking state based on a voltage comparison strategy; and the high-voltage interlocking state signal output in the previous step is sent to a vehicle control unit through a communication bus. According to the method, a hard wire interlocking scheme can be replaced, the system structure is simplified while the system reliability is guaranteed, the hardware cost and the hardware fault risk are reduced, and high adaptability is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power electronic software, and in particular to a motor controller software high-voltage interlocking method and device. BACKGROUND

[0002] With the development of new energy vehicles towards high power and high safety, the safety protection of the high-voltage system becomes the core. As the power hub connecting the power battery and the drive motor, the motor controller needs to detect the connection state of the high-voltage DC port and the external connector in real time. Vehicle vibration, terminal wear, etc. can cause the connector to loosen, which may cause electric arc, equipment burning, and even battery thermal runaway.

[0003] Currently, the industry generally uses a hard-wire interlocking method: a hardware circuit containing a low-voltage power supply and a current limiting resistor is designed in the controller, an interlocking terminal is added in the high-voltage connector, and the interlocking nodes of the battery pack, OBC, etc. are connected in series to form a detection loop. The loop is on, indicating that the connection is normal, and the loop is interrupted, indicating that there is a fault and triggering protection. Patent CN111038265A adds an active high-voltage interlocking safety detection circuit in the motor controller of a new energy vehicle. When the motor controller fails in high-voltage interlocking, on the one hand, it can quickly cut off the torque output to ensure personnel safety, and on the other hand, it can report fault information to VCU, BMS, etc. for easy troubleshooting. However, the existing hard-wire interlocking method has the following problems: first, it requires additional hardware circuit design, increases low-voltage wiring and signal terminals, and increases system complexity and hardware cost; second, the hardware loop is easily affected by electromagnetic interference, which may cause false alarms, and troubleshooting requires checking physical lines, making maintenance difficult; third, multiple high-voltage interfaces require multiple hard-wire loops in parallel, further increasing wiring and connector design difficulty; and finally, the signal acquisition and processing of the hard-wire method depend on the external controller, the fault response is not real-time, and parameterized configuration is difficult to achieve to adapt to different platform requirements.

[0004] Therefore, there is an urgent need to design a software-based high-voltage interlocking method and device that does not require a hardware loop, has high reliability, and optimizes costs. SUMMARY

[0005] To solve the above technical problems, the present application provides a motor controller software high-voltage interlocking method and device for detecting the connection state of a high-voltage DC connector, which can replace the hard-wire interlocking method. By processing the bus voltage sampled by the motor controller and the battery bus voltage of the communication bus and the high-voltage state signal, the high-voltage interlocking state is obtained and fed back to the communication bus, achieving the purpose of detecting the high-voltage interlocking state of the controller, and effectively simplifying the system structure while ensuring system reliability.

[0006] A motor controller software high-voltage interlocking method, specifically comprising the following steps:

[0007] Step S1, wake up the controller and set the default reported high-voltage interlock initial state to interlock success;

[0008] Step S2, the motor controller samples the bus voltage signal SampBusU, the battery bus voltage signal HvBattBusU, the high-voltage state signal HvModSts, and the interlock detection fault signal ILDecFlt.

[0009] Step S3, according to the interlock detection fault signal ILDecFlt sampled in step S2, whether there is an interlock detection fault is monitored in real time, when there is an interlock detection fault, it is determined that the high-voltage interlock state is that the high-voltage interlock state signal is invalid, and the output high-voltage interlock state signal HVILSts is sent to the vehicle controller through the communication bus, otherwise step S4 is performed.

[0010] Step S4, when the high-voltage state signal indicates the power-on state and there is no interlock detection fault, the high-voltage interlock state is determined based on the voltage comparison strategy: if the bus voltage signal SampBusU continuously less than the product of the battery bus voltage signal HvBattBusU and the interlock failure proportion coefficient and the duration is greater than the interlock failure setting time, it is determined that the high-voltage interlock state is interlock failure; if the bus voltage signal SampBusU continuously greater than the product of the battery bus voltage signal HvBattBusU and the interlock success proportion coefficient and the duration is greater than the interlock success setting time, it is determined that the high-voltage interlock state is interlock success.

[0011] Step S5, the high-voltage interlock state signal HVILSts output in step S4 is sent to the vehicle controller through the communication bus.

[0012] Further, the bus voltage signal SampBusU in step S2 is collected in real time by the internal voltage sampling circuit of the motor controller.

[0013] Further, the battery bus voltage signal HvBattBusU in step S2 is an output voltage signal measured by the high-voltage battery pack, and the motor controller receives this signal through the communication bus.

[0014] Further, the high-voltage state signal HvModSts in step S2 is the working state signal of the high-voltage battery pack, and the motor controller receives this signal through the communication bus; when the main relay of the high-voltage battery pack is closed and supplies power to the high-voltage system, the high-voltage state signal indicates the power-on state.

[0015] Further, the interlock detection fault signal ILDecFlt in step S2 is set when there is an interlock detection fault, and the setting condition is: the motor controller has a bus voltage sampling fault or the high-voltage state signal E2E verification fails or the battery bus voltage signal E2E verification fails.

[0016] Further, the output high-voltage interlock state signal HVILSts defines three states: Lock, indicating interlock success; Unlock, indicating interlock failure; and Invalid, indicating that the high-voltage interlock state signal is invalid.

[0017] Further, in the step S4, the interlock failure proportion coefficient and the interlock success proportion coefficient are calibrated and adjusted online through a calibration interface of the motor controller to adapt to the characteristics of different high-voltage systems; the calibration of the interlock failure proportion coefficient and the interlock success proportion coefficient is affected by the voltage platform of the whole vehicle high-voltage electrical system, and when the platform voltage decreases, the interlock failure proportion coefficient and the interlock success proportion coefficient are increased, and when the platform voltage increases, the interlock failure proportion coefficient and the interlock success proportion coefficient are decreased; the motor controller dynamically adjusts the interlock failure proportion coefficient and the interlock success proportion coefficient according to the real-time battery SOC, and when the battery SOC is 100%, the corresponding interlock failure proportion coefficient and interlock success proportion coefficient are normal set values, and when the SOC decreases, the interlock failure proportion coefficient and the interlock success proportion coefficient are increased to compensate for the decrease of the battery bus voltage and the decrease of the comparison threshold, and when the SOC decreases to the minimum, the corresponding interlock failure proportion coefficient and interlock success proportion coefficient are maximum values, and the product of the maximum proportion coefficient and the battery bus voltage corresponding to the minimum SOC should be equal to the product of the normal set value of the proportion coefficient and the battery bus voltage corresponding to the maximum SOC.

[0018] Further, in the step S4, the interlock failure setting time and the interlock success setting time are calibrated online through a calibration interface of the motor controller, and the calibration of the interlock failure setting time and the interlock success setting time considers the real-time and accuracy requirements of the whole vehicle control system for the high-voltage interlock signal response, and the real-time requirement is high, and the interlock failure setting time and the interlock success setting time are reduced, and the accuracy requirement is high, and the interlock failure setting time and the interlock success setting time are increased.

[0019] Further, when the high-voltage state signal does not indicate the power-on state or neither the interlock success condition nor the interlock failure condition is met, the high-voltage interlock state remains the state of the previous moment; when the high-voltage interlock state signal fed back by the motor controller has a communication timeout fault, the high-voltage interlock state remains the state of the previous moment.

[0020] In addition, the application also provides a motor controller for controlling the torque or speed of a high-voltage motor, converting the direct-current power on the battery side into alternating-current power, of which a part of the power is input as a battery pack bus voltage, and realizing a high-voltage interlock function through a software high-voltage interlock scheme to monitor the integrity of a high-voltage loop, check whether the high-voltage loop is abnormally disconnected, and upload the high-voltage interlock state to a communication bus to ensure the high-voltage safety of the whole vehicle.

[0021] Compared with the prior art, the application can achieve the following beneficial effects:

[0022] (1) The motor controller software high-voltage interlocking method and device proposed by the application replaces the traditional hard-wire interlocking method, without the need to design additional high-voltage interlocking hardware detection circuits and signal terminals, simplifying the system structure and reducing hardware cost and hardware failure risk.

[0023] (2) The software logic of the motor controller software high-voltage interlocking method proposed by the application is easy to implement and debug, and parameters such as fault proportion coefficient and setting time can be flexibly calibrated according to actual application scenarios, with strong adaptability.

[0024] (3) The motor controller software high-voltage interlocking method proposed by the application guarantees the accuracy and reliability of high-voltage interlocking state detection through multi-signal cross-verification and fault judgment mechanism.

[0025] (4) The motor controller software high-voltage interlocking method proposed by the application further improves the stability of the system through state retention rules and communication timeout processing mechanism, avoiding misjudgment caused by signal fluctuation or communication abnormality. BRIEF DESCRIPTION OF DRAWINGS

[0026] Fig. 1 A flowchart of the motor controller software high-voltage interlocking method proposed by the application.

[0027] Fig. 2 A state machine diagram of the motor controller software high-voltage interlocking method proposed by the application.

[0028] Fig. 3 An input and output signal diagram of the motor controller software high-voltage interlocking method proposed by the application. DETAILED DESCRIPTION

[0029] The specific embodiments of the application will be further described below with reference to the accompanying drawings, and the technical methods in the embodiments of the application will be clearly and completely described. Obviously, the described embodiments are only part of the embodiments of the application, not all embodiments. Based on the embodiments in the application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of the application.

[0030] As shown in Figs. 1-3 , the application proposes a motor controller software high-voltage interlocking method, which specifically includes the following steps:

[0031] Step S1, wake up the controller and set the default reported high-voltage interlocking initial state as interlocking success;

[0032] Step S2, the motor controller samples the bus voltage signal SampBusU, the battery bus voltage signal HvBattBusU, the high-voltage state signal HvModSts, and the interlock detection fault signal ILDecFlt.

[0033] Step S3, the interlock detection fault signal ILDecFlt sampled in step S2 is monitored in real time to determine whether there is an interlock detection fault, and when there is an interlock detection fault, it is determined that the high-voltage interlock state is invalid, and the output high-voltage interlock state signal HVILSts is sent to the vehicle controller through the communication bus, otherwise step S4 is performed.

[0034] Step S4, when the high-voltage state signal indicates the power-on state and there is no interlock detection fault, the high-voltage interlock state is determined based on the voltage comparison strategy: if the bus voltage signal SampBusU is continuously less than the product of the battery bus voltage signal HvBattBusU and the interlock failure proportion coefficient and the duration is greater than the interlock failure setting time, it is determined that the high-voltage interlock state is interlock failure; if the bus voltage signal SampBusU is continuously greater than the product of the battery bus voltage signal HvBattBusU and the interlock success proportion coefficient and the duration is greater than the interlock success setting time, it is determined that the high-voltage interlock state is interlock success.

[0035] Step S5, the high-voltage interlock state signal HVILSts output in step S4 is sent to the vehicle controller through the communication bus.

[0036] Further, the bus voltage signal SampBusU in step S2 is collected in real time by the internal voltage sampling circuit of the motor controller.

[0037] Further, the battery bus voltage signal HvBattBusU in step S2 is an output voltage signal measured by the high-voltage battery pack, and the motor controller receives this signal through the communication bus.

[0038] Further, the high-voltage state signal HvModSts in step S2 is a working state signal of the high-voltage battery pack, and the motor controller receives this signal through the communication bus; when the main relay of the high-voltage battery pack is closed and supplies power to the high-voltage system, the high-voltage state signal indicates the power-on state.

[0039] Further, the interlock detection fault signal ILDecFlt in step S2 is set when there is an interlock detection fault, and the setting condition is: the motor controller has a bus voltage sampling fault or the high-voltage state signal E2E verification fails or the battery bus voltage signal E2E verification fails.

[0040] Further, the output high-voltage interlock state signal HVILSts defines three states: Lock, indicating interlock success; Unlock, indicating interlock failure; and Invalid, indicating that the high-voltage interlock state signal is invalid.

[0041] Further, in the step S4, the interlock failure proportion coefficient and the interlock success proportion coefficient are calibrated and adjusted online through a calibration interface of the motor controller, so as to adapt to the characteristics of different high-voltage systems. The calibration of the interlock failure proportion coefficient and the interlock success proportion coefficient is mainly affected by the voltage platform of the whole vehicle high-voltage electrical system. When the platform voltage is low, the sensitivity of the comparison threshold to the coefficient is low, and the coefficient can be appropriately increased. When the platform voltage is high, the sensitivity of the comparison threshold to the coefficient is high, and the coefficient can be appropriately reduced. The motor controller dynamically adjusts the interlock failure proportion coefficient and the interlock success proportion coefficient according to the real-time battery SOC. When the battery SOC is 100%, the corresponding interlock failure proportion coefficient and interlock success proportion coefficient are normal setting values. When the SOC decreases, the interlock failure proportion coefficient and the interlock success proportion coefficient are increased to compensate for the decrease of the comparison threshold caused by the decrease of the battery bus voltage. When the SOC decreases to the minimum, the interlock failure proportion coefficient and the interlock success proportion coefficient are maximum values. The product of the maximum proportion coefficient and the battery bus voltage corresponding to the minimum SOC should be equal to the product of the normal setting value of the proportion coefficient and the battery bus voltage corresponding to the maximum SOC.

[0042] Further, the interlock failure setting time and the interlock success setting time are calibrated online through the calibration interface of the motor controller. The setting of the interlock failure setting time and the interlock success setting time mainly considers the real-time and accuracy requirements of the system response to the high-voltage interlock signal. The longer the setting time, the stronger the anti-interference ability, but the greater the delay of fault judgment. The setting time needs to match the safety and control requirements of the system, and is usually defined by the vehicle manufacturer.

[0043] In the specific embodiments provided in the application, the condition for the high-voltage interlock state to jump to failure is that the high-voltage state is the power-on state and SampBusU < 0.5 (interlock failure proportion coefficient) * HvBattBusU and the duration is greater than 5s (interlock failure setting time). The condition for the high-voltage interlock state to jump to success is that the high-voltage state is the power-on state and SampBusU > 0.8 (interlock success proportion coefficient) * HvBattBusU and the duration is greater than 5s (interlock success setting time).

[0044] Further, when the high-voltage state signal does not indicate the power-on state or neither the interlock success condition nor the interlock failure condition is met, the high-voltage interlock state remains the state at the previous moment.

[0045] Further, when the high-voltage interlock state signal fed back by the motor controller has a communication timeout fault, the high-voltage interlock state remains the state at the last time.

[0046] In addition, the embodiment of the present application further provides a motor controller for controlling torque or rotating speed of a high-voltage motor, converting direct-current power at a battery side into alternating-current power, inputting a power part as a battery pack bus voltage, realizing high-voltage interlock function by a software high-voltage interlock scheme to monitor integrity of a high-voltage loop, checking whether the high-voltage loop is abnormally disconnected and uploading the high-voltage interlock state to a communication bus, and ensuring high-voltage safety of a whole vehicle. The high-voltage interlock detection function is completely realized by software, and does not involve interlock connectors and interlock detection circuits.

[0047] The above only describes the preferred embodiments of the present application, and the present application is not limited to the above embodiments. It can be understood that other improvements and changes directly derived or thought by those skilled in the art without departing from the spirit and concept of the present application should be considered to be included in the protection scope of the present application.

Claims

1. A motor controller software high-voltage interlock method, comprising the following steps in particular: Step S1, waking up the controller and setting the default reported high-voltage interlock initial state as interlock success; Step S2, the motor controller sampling a bus voltage signal SampBusU, a battery bus voltage signal HvBattBusU, a high-voltage state signal HvModSts, and an interlock detection fault signal ILDecFlt; Step S3, according to the interlock detection fault signal ILDecFlt sampled in step S2, monitoring in real time whether there is an interlock detection fault, when there is an interlock detection fault, determining that the high-voltage interlock state is that the high-voltage interlock state signal is invalid, and sending the output high-voltage interlock state signal HVILSts to the vehicle controller through the communication bus, otherwise, step S4 is performed; Step S4, when the high-voltage state signal indicates the power-on state and there is no interlock detection fault, determining the high-voltage interlock state based on a voltage comparison strategy: if the bus voltage signal SampBusU continuously less than the product of the battery bus voltage signal HvBattBusU and the interlock failure proportion coefficient and the duration is greater than the interlock failure setting time, it is determined that the high-voltage interlock state is interlock failure; if the bus voltage signal SampBusU continuously greater than the product of the battery bus voltage signal HvBattBusU and the interlock success proportion coefficient and the duration is greater than the interlock success setting time, it is determined that the high-voltage interlock state is interlock success; Step S5, sending the output high-voltage interlock state signal HVILSts of step S4 to the vehicle controller through the communication bus.

2. A motor controller software high voltage interlock method as claimed in claim 1, wherein, The bus voltage signal SampBusU in step S2 is collected in real time by the internal voltage sampling circuit of the motor controller.

3. A motor controller software high voltage interlock method as claimed in claim 1, wherein, The battery bus voltage signal HvBattBusU in step S2 is an output voltage signal measured by the high-voltage battery pack, and the motor controller receives this signal through the communication bus.

4. A motor controller software high voltage interlock method as claimed in claim 1, wherein, The high-voltage state signal HvModSts in step S2 is the working state signal of the high-voltage battery pack, and the motor controller receives this signal through the communication bus; when the main relay of the high-voltage battery pack is closed and supplies power to the high-voltage system, the high-voltage state signal indicates the power-on state.

5. A motor controller software high voltage interlock method as claimed in claim 1, wherein, When the interlock detection fault signal ILDecFlt is set, it indicates that there is an interlock detection fault, and the setting condition is: the motor controller has a bus voltage sampling fault or the high-voltage state signal E2E verification fails or the battery bus voltage signal E2E verification fails.

6. A motor controller software high voltage interlock method as claimed in claim 1, wherein, The output high-voltage interlock state signal HVILSts defines three states: Lock indicates interlock success, Unlock indicates interlock failure, and Invalid indicates that the high-voltage interlock state signal is invalid.

7. A motor controller software high voltage interlock method as claimed in claim 1, wherein, In the step S4, the interlocking failure proportion coefficient and the interlocking success proportion coefficient are calibrated and adjusted online through a calibration interface of the motor controller to adapt to the characteristics of different high-voltage systems; the calibration of the interlocking failure proportion coefficient and the interlocking success proportion coefficient is affected by the voltage platform of the whole vehicle high-voltage electrical system, and when the platform voltage decreases, the interlocking failure proportion coefficient and the interlocking success proportion coefficient are increased, and when the platform voltage increases, the interlocking failure proportion coefficient and the interlocking success proportion coefficient are decreased; the motor controller dynamically adjusts the interlocking failure proportion coefficient and the interlocking success proportion coefficient according to the real-time battery SOC, and when the battery SOC is 100%, the interlocking failure proportion coefficient and the interlocking success proportion coefficient correspond to the normal setting values, and when the SOC decreases, the interlocking failure proportion coefficient and the interlocking success proportion coefficient are increased to compensate for the decrease of the battery bus voltage and the decrease of the comparison threshold, and when the SOC decreases to the minimum, the interlocking failure proportion coefficient and the interlocking success proportion coefficient correspond to the maximum values, and the product of the maximum proportion coefficient and the battery bus voltage corresponding to the minimum SOC should be equal to the product of the normal setting value of the proportion coefficient and the battery bus voltage corresponding to the highest SOC.

8. A motor controller software high voltage interlock method as claimed in claim 1, wherein, In the step S4, the interlocking failure setting time and the interlocking success setting time are calibrated online through a calibration interface of the motor controller, and the calibration of the interlocking failure setting time and the interlocking success setting time considers the real-time and accuracy requirements of the whole vehicle control system on the high-voltage interlocking signal response, and the real-time requirement is high, and the interlocking failure setting time and the interlocking success setting time are reduced, and the accuracy requirement is high, and the interlocking failure setting time and the interlocking success setting time are increased.

9. A motor controller software high voltage interlock method as claimed in claim 1, wherein, When the high-voltage state signal does not indicate the power-on state or neither the interlocking success condition nor the interlocking failure condition is met, the high-voltage interlocking state remains the state of the previous moment; when the high-voltage interlocking state signal fed back by the motor controller has a communication timeout fault, the high-voltage interlocking state remains the state of the previous moment.

10. An electric machine controller characterized by The motor controller is suitable for the motor controller software high-voltage interlocking method of any one of claims 1-9, and the motor controller is used to control the torque or speed of a high-voltage motor, convert the direct-current power on the battery side into alternating-current power, and input the power part as the battery pack bus voltage; the software high-voltage interlocking scheme is used to realize the high-voltage interlocking function to monitor the integrity of the high-voltage loop, check whether the high-voltage loop is abnormally disconnected, upload the high-voltage interlocking state to the communication bus, and ensure the high-voltage safety of the whole vehicle.

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