Memory management optimization method based on resource environment limitation and related equipment

Abstract

The invention relates to the technical field of memory management, in particular to a memory management optimization method based on resource environment limitation and related equipment. The method comprises the following steps: acquiring high-precision metadata in a memory operation event by hijacking a memory allocator interface; performing statistical evaluation according to the historical event data in combination with the high-precision metadata to obtain a memory behavior pattern feature vector; predicting the memory behavior pattern feature vector through a lightweight prediction model to obtain prediction request data; comparing the predicted request data with the fluctuation amplitude of the historical request to obtain a memory management strategy; and the memory management operation is optimized by monitoring the delay improvement rate and the fragment rate. The memory demand can be dynamically predicted, the allocation strategy can be adaptively adjusted, fragment accumulation can be inhibited, and real-time performance, low fragment and high memory utilization rate can be realized.

Description

Technical Field

[0001] This application relates to the field of memory management technology, and in particular to a method and related device for optimizing memory management in resource-constrained environments. Background Technology

[0002] In related technologies, real-time power operating systems (RTOS) are widely used in various critical power equipment, such as smart meters and protection devices. These devices typically run in resource-constrained embedded environments with relatively low memory and computing power. As the real-time requirements for data processing and control in power systems continue to increase, RTOS needs to handle a large number of high real-time tasks simultaneously, such as fault detection and data acquisition. Against this backdrop, traditional dynamic memory management methods, such as malloc or free, have gradually revealed numerous problems due to their inherent limitations. Frequent memory allocation and deallocation operations lead to severe memory fragmentation, significantly reducing available memory and wasting resources. Furthermore, the latency of dynamic memory allocation is unpredictable, with large fluctuations in allocation time, which severely impacts the response speed of real-time tasks in power systems with extremely high real-time requirements. Simultaneously, manual memory management is prone to errors and carries the risk of memory leaks, posing a significant threat to the long-term stable operation of power systems.

[0003] In summary, the technical problems existing in the relevant technologies need to be improved. Summary of the Invention

[0004] The main objective of this application is to propose a method and related device for optimizing memory management in resource-constrained environments, which can dynamically predict memory requirements, adaptively adjust allocation strategies, and suppress fragmentation accumulation, thereby achieving real-time performance, low fragmentation, and high memory utilization.

[0005] To achieve the above objectives, one aspect of this application proposes a method for optimizing memory management under resource-constrained conditions, the method comprising the following steps: High-precision metadata in memory operation events can be obtained by hijacking the memory allocator interface; Statistical evaluation is performed based on historical event data and the high-precision metadata to obtain a memory behavior pattern feature vector. The memory behavior pattern feature vector is predicted using a lightweight prediction model to obtain prediction request data; The predicted request data is compared with the fluctuation range of historical requests to obtain a memory management strategy; The memory management operation is optimized by monitoring latency improvement rate and fragmentation rate.

[0006] In some embodiments, obtaining high-precision metadata from memory operation events through a hijacked memory allocator interface includes the following steps: Continuously monitor and acquire kernel allocation and release requests occurring in the power real-time operating system kernel; The key information for each event is recorded based on the kernel allocation and release requests; wherein, the key information includes the size of the allocated or released memory, the size of the requested or released memory, the task identifier that initiated the request, and the timestamp of the event. Get the distribution and fragmentation rate of currently free memory blocks; The obtained key information, distribution, and fragmentation rate are summarized to obtain the high-precision metadata; The high-precision metadata is stored in a low-overhead circular buffer.

[0007] In some embodiments, the step of performing statistical evaluation based on historical event data and the high-precision metadata to obtain a memory behavior pattern feature vector includes the following steps: The high-precision metadata is categorized using task identifiers in the historical event data to obtain the memory event set for each task. By performing a practical habit analysis and calculation on each task using the memory event set, the average allocation size and request frequency distribution are obtained. The average allocation size and request frequency distribution are smoothed using a sliding time window and exponential smoothing method; The event interval is calculated based on the high-precision metadata of each task to obtain the average time interval between adjacent events; Based on a comprehensive analysis of the average time interval between adjacent events and the system's free memory distribution information, the fragmentation rate is calculated and the fragmentation risk level characteristics are assessed. The fragmentation risk level characteristics, the task identifier, the average allocation size, the request frequency distribution, and the task call cycle are summarized to obtain the memory behavior pattern feature vector.

[0008] In some embodiments, the step of predicting the memory behavior pattern feature vector using a lightweight prediction model to obtain prediction request data includes the following steps: By using a simplified regression model to predict the feature vectors of the memory behavior patterns, the number of requests and the request size for the next time window can be obtained.

[0009] In some embodiments, comparing the predicted request data with the fluctuation range of historical requests to obtain a memory management strategy includes the following steps: The task pattern is obtained by comparing the number of requests and the size of requests in the next time window with the fluctuation range of historical requests. If the task mode is stable and the current fragmentation risk is low, the decision is to pre-allocate memory, where the pre-allocated memory size is equal to the predicted request size and the pre-allocated quantity is equal to the predicted number of requests. If the current fragmentation risk is high, then a fragmentation suppression operation is triggered.

[0010] In some embodiments, the pre-allocation includes the following steps: The memory-aligned block size is calculated based on the optimized instruction set, contiguous space is allocated in the contiguous memory reserved by the power real-time operating system, a memory pool with a singly linked list structure is constructed, and the memory pool is associated with a specified task; wherein, the optimized instruction set includes a task identifier, a pre-allocated block size, and a pre-allocated quantity; When a task requests memory, the task request is intercepted. If the size of the task request does not exceed the size of the pre-allocated block, a block is quickly allocated from the memory pool of the task request; otherwise, the process is transferred to the standard memory allocator.

[0011] In some embodiments, the fragmentation suppression operation includes the following steps: Real-time acquisition of the physical free block linked list data maintained by the memory allocator; Physical continuity analysis is performed on the obtained physical free block linked list data. The linked list is traversed according to address sorting to obtain a list of all mergeable free block pairs. By calculating revenue and monitoring task status, mergeable free block pairs are screened and the timing of merging is determined. When the task is idle, the merging operation is triggered to obtain a new free memory state. The memory state before and after merging is quantitatively evaluated by calculating and comparing the fragmentation rate, and the operational effect data is obtained. The operational effect data is fed back to the real-time power operating system for optimization. The physical free block linked list data includes the starting address, block size, and pointer relationships; the operation effect data includes fragmentation rate changes, maximum contiguous block increment, and operation time.

[0012] In some embodiments, optimizing the memory management operation by monitoring latency improvement rate and fragmentation rate includes the following steps: Real-time acquisition of memory allocation latency after optimization operations; The latency improvement rate before and after optimization is compared based on the obtained memory allocation latency. Periodically calculate the fragmentation rate and evaluate the fragmentation suppression effect; If the delay improvement rate is insufficient, increase the smoothing factor in the dynamic behavior analysis stage; if the prediction error is too high compared to the prediction threshold, reduce the autoregressive weight in the demand forecasting stage; if the fragmentation rate continues to exceed the standard, force the fragmentation suppression operation; if the prediction error continues to be lower than the prediction threshold, freeze the parameter adjustment.

[0013] To achieve the above objectives, another aspect of this application proposes an apparatus for optimizing memory management in resource-constrained environments, the apparatus comprising: The data acquisition module is used to obtain high-precision metadata from memory operation events by hijacking the memory allocator interface; The statistical evaluation module is used to perform statistical evaluation based on historical event data and the high-precision metadata to obtain memory behavior pattern feature vectors. The prediction module is used to predict the memory behavior pattern feature vector using a lightweight prediction model to obtain prediction request data. The strategy generation module is used to compare the predicted request data with the fluctuation range of historical requests to obtain a memory management strategy. An optimization module is used to optimize the memory management operations by monitoring latency improvement rate and fragmentation rate.

[0014] To achieve the above objectives, another aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0015] The embodiments of this application include at least the following beneficial effects: This application provides a method and related equipment for optimizing memory management based on resource-constrained environments. This solution obtains high-precision metadata, performs statistical evaluation based on historical event data and high-precision metadata to obtain memory behavior pattern feature vectors, and then obtains memory management strategies by predicting and comparing the memory behavior pattern feature vectors. By monitoring latency improvement rate and fragmentation rate, the operation of memory management is optimized to form a continuously optimized closed-loop control chain. Under the premise of ensuring real-time performance, it achieves long-term stable improvement in memory allocation efficiency and fragmentation suppression capability, thereby forming an adaptive closed loop of "collection-analysis-prediction / decision-execution-feedback", ultimately ensuring fast response and long-term stable execution of memory allocation. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating a method for optimizing memory management in resource-constrained environments, as provided in an embodiment of this application. Figure 2 This is a flowchart illustrating a method for optimizing memory management in resource-constrained environments. Figure 3 This is a schematic diagram of the structure of the device for optimizing memory management in resource-constrained environments provided in the embodiments of this application; Figure 4 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0018] It is understood that the terms “first,” “second,” etc., used in this application may be used herein to describe various concepts, but unless otherwise stated, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another. For example, without departing from the scope of the embodiments of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the words “if,” “when,” or “in response to a determination” as used herein may be interpreted as “when…” or “when…” or “in response to a determination.”

[0019] As used in this application, the terms "at least one", "multiple", "each", "any", etc., "at least one" includes one, two or more, "multiple" includes two or more, "each" refers to each of the corresponding multiples, and "any" refers to any one of the multiples.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0021] Before providing a detailed description of the embodiments of this application, some of the nouns and terms involved in the embodiments of this application will be explained first. The nouns and terms involved in the embodiments of this application are subject to the following interpretations.

[0022] Real-time power operating system: Designed specifically for power systems, this operating system is capable of responding to and processing tasks such as power dispatching and monitoring in real time under time constraints, ensuring the stable operation of the power grid.

[0023] Fragmentation Index: A metric that measures the degree of memory fragmentation. It is calculated by combining the number of free blocks, their size distribution, etc. A higher value indicates more severe fragmentation, which affects memory utilization.

[0024] Fragmentation rate: The proportion of fragments in free memory that cannot be effectively utilized, reflecting the degree of memory space waste. A high fragmentation rate means fewer large blocks of memory are available and low allocation efficiency.

[0025] Sliding time window: Dynamic time series analysis, which takes a continuous fixed-duration data window and updates the window as time goes by, for real-time monitoring and trend analysis.

[0026] Exponential smoothing: A time series forecasting method that assigns high weights to recent data and low weights to distant data, smoothing out fluctuations through weighted averaging to predict future values. It can be divided into single-stage, double-stage, etc.

[0027] Request frequency distribution: Statistics show the distribution of request frequency under different times or conditions, reflecting request patterns and providing a basis for resource allocation, etc.

[0028] Average allocation size: The average size of each memory allocation operation, reflecting the scale of memory demand and influencing the design of allocation strategies.

[0029] Task call cycle: The time interval between two calls to a periodic task is the basis for real-time system scheduling to ensure that tasks are executed at the expected pace.

[0030] Regression model: A statistical model that explores the relationship between variables and predicts the target variable using known variables, such as linear regression and nonlinear regression.

[0031] Request frequency (freq): The number of requests that occur per unit of time, reflecting the intensity of requests, and is an important indicator for system load assessment.

[0032] Autoregressive weights: In an autoregressive model, the weight of historical data on the current predicted value is given. Recent data usually has a higher weight, reflecting time-series correlation.

[0033] Singly linked list structure: A data structure in which each node contains data and a pointer to the next node. It can only be accessed sequentially from the head, and insertion and deletion are flexible.

[0034] Block size: In memory management, the number of bytes in an allocated or free memory block affects memory utilization and allocation efficiency, and needs to be adapted to task requirements.

[0035] Pointer relationships: The associative relationships between pointer variables in a program, such as the forward and backward pointers of nodes in a linked list, which determine how data structures are accessed and organized.

[0036] Figure 1This is an optional flowchart of a method for optimizing memory management in resource-constrained environments provided in this application embodiment. Figure 1 The method may include, but is not limited to, steps S110 to S150.

[0037] Step S110: Obtain high-precision metadata from memory operation events by hijacking the memory allocator interface; Step S120: Statistical evaluation is performed based on historical event data and high-precision metadata to obtain memory behavior pattern feature vectors. Step S130: Predict the memory behavior pattern feature vector using a lightweight prediction model to obtain the prediction request data; Step S140: Compare the predicted request data with the fluctuation range of historical requests to obtain the memory management strategy; Step S150: Optimize memory management operations by monitoring latency improvement rate and fragmentation rate.

[0038] Steps S110 to S150, as illustrated in this embodiment, involve obtaining high-precision metadata from memory operation events by hijacking the memory allocator interface, and statistically evaluating this metadata in conjunction with historical event data to obtain a memory behavior pattern feature vector. The obtained memory behavior pattern feature vector is then used for prediction and comparison to arrive at a memory management strategy. By monitoring latency improvement rate and fragmentation rate, the memory management operation is optimized, enabling each step in obtaining the memory management strategy to form a continuously optimized closed-loop control chain. This achieves a long-term, stable improvement in memory allocation efficiency and fragmentation suppression capability while ensuring real-time performance.

[0039] In some embodiments, in step S110, all kernel allocation and release requests occurring in the power real-time operating system kernel are continuously monitored and captured; key information of each event is recorded, wherein the time type includes allocation or release, size of memory requested or released, task ID that initiated the request, and timestamp of the event; the distribution and fragmentation rate of the current free memory blocks are collected, and the fragmentation index is calculated; the collected data is stored in a low-overhead circular buffer, the fixed size of which is preferably 512 bytes.

[0040] More specifically, all memory operation events are captured by hijacking the memory allocator interface and associated with high-precision metadata. High-precision metadata collection is performed by invoking context, timestamp, and size. In this embodiment, all kernel allocation and release requests occurring in the power real-time operating system kernel are continuously monitored and captured; the time type includes allocation or release, the size of the requested or released memory, the task identifier (task ID) initiating the request, and the timestamp of the event. For example, when a task requests 16 bytes of memory, the logger generates a log entry, such as: {Event: Allocation, Size: 16B, Task ID: T1, Time: t}. The distribution of currently free memory blocks is collected, and the fragmentation rate is calculated using the following formula: ; Where F represents the fragmentation rate, total represents the total number of free memory bytes, which is the sum of all free blocks currently in the power real-time operating system; max represents the maximum size of a contiguous free block (unit: bytes), which is the longest contiguous free region in memory.

[0041] For example, if the total free memory is 1000 bytes and the largest contiguous block is only 200 bytes, the fragmentation rate is 5. The collected data is stored in a low-overhead circular buffer, and the fixed size of the buffer is preferably set to 512 bytes.

[0042] In some embodiments, in step S120, high-precision metadata is categorized using task identifiers in historical event data to obtain memory event sets for each task; practical habit analysis is performed on each task using the memory event sets to obtain the average allocation size and request frequency distribution; the average allocation size and request frequency distribution are smoothed using a sliding time window and exponential smoothing method; the event interval is calculated based on the high-precision metadata of each task to obtain the average time interval between adjacent events; the fragmentation rate is calculated and the fragmentation risk level characteristics are assessed by comprehensively analyzing the average time interval between adjacent events and the system's free memory distribution information; the fragmentation risk level characteristics, task identifiers, average allocation size, request frequency distribution, and task call cycle are summarized to obtain a memory behavior pattern feature vector.

[0043] Specifically, lightweight statistical analysis is performed based on collected historical event data. The event data is categorized by task ID, and the memory usage habits of each task are analyzed to calculate the average allocation size of memory requests, request frequency distribution, and task call cycle. Combined with the current free memory distribution information of the power real-time operating system, i.e., the fragmentation rate, the current fragmentation degree and potential risk level of the power real-time operating system are assessed. If the fragmentation rate is less than or equal to a predetermined minimum score threshold, it is defined as low risk; if the fragmentation rate is between the minimum score threshold and the intermediate score threshold, it is defined as medium risk; if the fragmentation rate is greater than the maximum score threshold, it is defined as high risk. A memory behavior pattern feature vector is generated, which includes a structured data set of task ID, average allocation size, request frequency distribution, task call cycle, and fragmentation risk level features.

[0044] More specifically, a lightweight statistical model is used to analyze task-level memory access patterns in real time, while simultaneously calculating the physical page-level fragmentation index for dynamic behavior analysis and fragmentation risk assessment. One possible implementation in this application is as follows: Lightweight statistical analysis is performed based on collected historical event data. This analysis employs exponential smoothing, with the smoothing factor initially set to 0.2, a maximum of 0.9, and a minimum of 0.1. Event data is categorized by task ID, and the memory usage habits of each task are analyzed, calculating the average memory request allocation size, request frequency distribution, and task call cycle. A sliding time window (default 1000ms) is maintained for each task, and the average allocation size is calculated. The request size sequence is then processed using exponential smoothing, with the formula: ; in, This represents the average value at time t. Represents the smoothing factor. =0.2 indicates that the new data has a lower weight, reducing the impact of noise; This represents the current memory request size at time point t; This represents the historical average size (in bytes) at the previous time point, with the initial value set to the first observation.

[0045] For example, the average allocation size of task T1 may remain stable at around 32 bytes.

[0046] The average request interval is calculated based on the event timestamp, using the following formula: ; Where N represents the total number of events, i.e., the number of allocation requests for the current task within the analysis window; Represents the timestamp of the i-th event; This represents the timestamp of the previous event.

[0047] For example, task T1 has a request frequency of 0.1 times / millisecond, meaning it requests memory on average once every 10 milliseconds. Analyzing the timestamps of task memory allocation events, we calculate its call cycle: First, extract the task... All assigned event timestamps Then calculate the time interval between adjacent events. Finally, calculate the average: ; in, Indicates task The call cycle; This represents the j-th time interval. Combining the current free memory distribution information (fragmentation rate) of the power real-time operating system, we assess the current fragmentation level and potential risk level of the power real-time operating system. If the fragmentation rate is ≤1.0, it is defined as low risk; if 1.0 < fragmentation rate ≤2.0, it is defined as medium risk; if the fragmentation rate >2.0, it is defined as high risk. A memory behavior pattern feature vector is generated, which includes a structured dataset of task ID, average allocation size, request frequency distribution, task call cycle, and fragmentation risk level features.

[0048] In some embodiments, in steps S130 to S140, the memory behavior pattern feature vector is predicted by a simplified regression model to obtain the number of requests and the request size for the next time window; the number of requests and the request size for the next time window are compared with the fluctuation range of historical requests to obtain the task pattern; if the task pattern is stable and the current fragmentation risk is low, the decision is to pre-allocate, the pre-allocated memory size is equal to the predicted request size, and the pre-allocated quantity is equal to the predicted number of requests; if the current fragmentation risk is high, a fragmentation suppression operation is triggered. Specifically, based on the generated task memory behavior patterns and fragmentation risk information, a lightweight prediction model is used. For tasks with identified stable patterns, the number and size of memory requests that may occur within the next short time window are predicted. If the task pattern is stable (i.e., the prediction is reliable) and the current fragmentation risk is low, the decision is to pre-allocate memory, with the pre-allocated memory size equal to the predicted request size and the pre-allocated quantity equal to the predicted number of requests. If the current fragmentation risk is rated as high, regardless of the prediction, the decision is to trigger a fragmentation suppression operation. The decision engine dynamically adjusts the complexity of the prediction model according to the current load of the power real-time operating system, using a simpler model when the load is high to maintain low overhead.

[0049] More specifically, a lightweight time-series prediction algorithm is used to estimate short-term memory demand based on the behavioral model. Combined with fragmentation status, a decision tree is used to trigger pre-allocation or defragmentation strategies for demand prediction and strategy generation. The memory behavior pattern feature vector includes task ID, average request size, request frequency, and fragmentation risk level. Based on the generated memory behavior pattern feature vector, a lightweight prediction model is used to predict the number and size of memory requests that may occur within the next short time window (e.g., 100ms) for tasks with identified stable patterns.

[0050] For predicting the number of memory requests, a simplified regression model AR(1), a lightweight version of ARIMA, is used. The initial preferred value for the autoregressive weight is 0.7, with a maximum of 1.0 and a minimum of 0.1. The formula is as follows: ; in, Represents the autoregressive weights ( The weight of the latest observation is controlled. The initial value is set to 0.7, and it automatically decreases to (0.5) when the system load > 80% to reduce computational sensitivity. This indicates the actual number of requests made in the current window, calculated from the request frequency freq. For example, a frequency of 0.1 times / millisecond means 10 requests made within a 100ms window. This represents the historical average number of requests, which is maintained over a long period using the exponential smoothing method in Phase 2. The initial value is the average of the first N requests after the power real-time operating system is started. This indicates the predicted number of memory requests for a specific task within the next time window (e.g., 100ms).

[0051] To predict the size of a single memory request, a simplified regression model AR(1), a lightweight version of ARIMA, is used. The initial preferred value for the autoregressive weights is 0.7, with a maximum of 1.0 and a minimum of 0.1. The formula is as follows: ; in, This represents the autoregressive weights, which share weight parameters with the request count prediction to ensure model consistency. Indicates the size of the latest request (in bytes); The historical average request size (in bytes) is provided by the exponential smoothing results of Phase 2; This indicates the size of the request for the predicted task in the next window.

[0052] The stability of the task pattern is determined by comparing the predicted memory request size and frequency with the historical fluctuation range of memory requests. The specific expression is as follows: ; in, This indicates the predicted request size or number of requests for the task in the next window. This indicates the size of the latest request or the number of requests.

[0053] Set fluctuation threshold Preferred fluctuation threshold The default value is 0.15. Fluctuations below the fluctuation threshold indicate stability, while fluctuations above it indicate instability. If the task mode is stable and the current fragmentation risk is low, the decision is to pre-allocate memory. The size of the pre-allocated memory is equal to the predicted request size, and the number of pre-allocated memory is equal to the predicted number of requests. If the current fragmentation risk is rated as high, regardless of the prediction, the decision is to trigger a fragmentation suppression operation.

[0054] The pre-allocation process includes: calculating the memory-aligned block size based on the generated optimized instruction set containing the task ID, pre-allocated block size, and pre-allocation quantity; allocating contiguous space from the reserved contiguous memory of the power real-time operating system; constructing a memory pool with a singly linked list structure; and associating the memory pool with the specified task. When a task requests memory, the request is intercepted. If the requested size does not exceed the pre-allocated block size, a block is quickly allocated from the task's dedicated memory pool; otherwise, the process is transferred to the standard memory allocator. The fragmentation suppression operation includes: real-time acquisition of physical free block linked list data maintained by the memory allocator, which includes start address, block size, and pointer relationships; physical continuity analysis of the acquired physical free block linked list data, traversing the linked list according to address sorting, detecting the continuity relationship between the start and end addresses of adjacent blocks, and obtaining a list of all mergeable free block pairs; calculating the block size gain after merging, selecting the block pair with the maximum benefit, monitoring the task readiness status, and triggering the block pair merging operation when the task is idle, which includes updating the linked list and block size, updating the memory pool status after completion, and obtaining a new free memory status; after merging, recalculating the fragmentation rate and comparing it with the state before the operation, quantifying the operation effect including fragmentation rate change, maximum contiguous block increment, and operation time, and feeding this effect data back to the power real-time operating system module for monitoring and decision-making, so as to optimize the loop in subsequent operations.

[0055] The decision engine dynamically adjusts the complexity of the prediction model based on the current load of the power real-time operating system, using a simpler model when the load is high to maintain low overhead. A lightweight autoregressive model (AR(1)) is used to proactively predict short-term memory requirements (such as the number and size of requests), and combined with real-time fragmentation risk levels, dynamically generates optimization decisions such as pre-allocation or fragmentation suppression, significantly reducing memory allocation latency and suppressing fragmentation formation; the model parameters (such as autoregressive weights) are also used. It can dynamically adjust to adapt to system load, reduce computational complexity under high load, and fundamentally transform memory management from passive response to active optimization while ensuring real-time performance, thus solving the fragmentation bottleneck caused by the inability to predict task behavior in traditional methods.

[0056] In some embodiments, in step S150, the memory allocation latency after optimization is acquired in real time; the latency improvement rate before and after optimization is compared based on the acquired memory allocation latency; the fragmentation rate is periodically calculated and the fragmentation suppression effect is evaluated; if the latency improvement rate is insufficient, the smoothing factor in the dynamic behavior analysis stage is increased; if the prediction error is too high compared to the prediction threshold, the autoregressive weight in the demand forecasting stage is reduced; if the fragmentation rate continues to exceed the standard, the fragmentation suppression operation is forcibly triggered; if the prediction error continues to be lower than the prediction threshold, the parameter adjustment is frozen; the new parameters are synchronously injected into the dynamic behavior analysis stage and the demand forecasting stage, the real-time memory events are sent back to the monitoring queue for high-precision metadata acquisition, and the latest fragmentation rate is input into the identification module of the fragmentation risk assessment stage to form a closed-loop data flow.

[0057] More specifically, the thread-specific memory pool is dynamically reconstructed or lazy merging is performed. Online gradient descent optimization of the prediction model parameters is achieved by monitoring latency reduction rate and fragmentation improvement, thereby enabling policy execution and feedback tuning. During pre-allocation, based on the generated optimized instruction set containing task ID, pre-allocated block size, and pre-allocation quantity, the memory-aligned block size is calculated. Contiguous space is allocated from the reserved contiguous memory of the power real-time operating system, and a singly linked list memory pool is constructed, associated with the specified task. When a task requests memory, the request is intercepted. If the requested size does not exceed the pre-allocated block size, a block is quickly allocated from the task's dedicated memory pool; otherwise, processing is handled by the standard memory allocator. During fragmentation suppression, the physical free block list maintained by the memory allocator is acquired in real time. This list includes the starting address, block size, and pointer relationships. Physical continuity analysis is performed on the acquired list, traversing the address-sorted list to check the continuity of the start and end addresses of adjacent blocks, resulting in a list of all mergeable free block pairs. The block size gain after merging is calculated, and the block pair with the largest gain is selected. The task readiness status is monitored, and a block pair merging operation is triggered when the task is idle. This operation includes updating the linked list and block size, and updating the memory pool state to obtain a new free memory state. After merging, the fragmentation rate is recalculated and compared with the state before the operation. The quantified effect includes changes in fragmentation rate, the increase in the maximum contiguous block size, and operation time. This effect data is fed back to the monitoring and decision-making module of the power real-time operating system for subsequent optimization loops. The memory allocation latency after the optimization operation is collected in real time. The fragmentation rate is calculated periodically every 10 milliseconds using the following formula: ; Where F represents the fragmentation rate, This represents the total number of bytes of free memory, and max represents the maximum size of a contiguous free block.

[0058] If F > 2.0 for three consecutive cycles, a fragmentation suppression operation is forcibly triggered to prevent the fragmentation situation from worsening and to ensure the stability of the power real-time operating system. The delay improvement rate before and after optimization is calculated using the following formula: ; in, Indicates the delay improvement rate. This represents the average latency of 20 consecutive allocation operations before optimization. This represents the average latency of 20 consecutive allocation operations after optimization.

[0059] like <20%, increase the smoothing factor in the dynamic behavior analysis phase. This means assigning higher weights to the latest data to improve the model's response speed.

[0060] Simultaneously calculate the prediction error, using the following formula: ; In the formula: error represents the calculation error, predicted represents the predicted number of memory requests, and actual represents the actual number of memory requests. If error > 25%, reduce the autoregressive weight in the demand forecasting stage. This means reducing the impact of the current state, enhancing stability, and reducing noise interference. If the error is less than 5% for 5 consecutive times and... Freeze current parameters , To save computational resources, stop frequent adjustments. Adjust the new parameter smoothing factor. Autoregressive weights The system synchronously injects data into the dynamic behavior analysis and demand forecasting phases, transmits real-time memory events back to the monitoring queue for high-precision metadata acquisition, and inputs the latest fragmentation rate into the identification module of the fragmentation risk assessment phase, forming a closed-loop data flow.

[0061] Optimization instructions are executed with low overhead to directly reduce memory allocation latency and fragmentation rate, while a closed-loop feedback mechanism is introduced: the optimization effect is monitored in real time, and initial parameters are dynamically adjusted based on performance gains, such as increasing the smoothing factor. To improve responsiveness and reduce autoregressive parameters To reduce predictive sensitivity and ensure that the real-time power operating system can adapt to load changes; finally, the updated status data flows back to the data acquisition stage, forming a continuously optimized closed-loop control chain, achieving long-term stable improvement in memory allocation efficiency and fragmentation suppression capability while ensuring real-time performance.

[0062] In some embodiments, such as Figure 2 As shown, Figure 2This is a flowchart illustrating a method for optimizing memory management in resource-constrained environments. High-precision metadata, including event type, size, task ID, and timestamp, is acquired and subjected to dynamic behavior analysis and fragmentation risk assessment to obtain a task behavior model and fragmentation risk. This model and risk are then input into demand forecasting and strategy generation to generate an optimized instruction set, which is then fed into strategy execution and feedback tuning. Feedback tuning incorporates new events or states into the data acquisition step for optimization; it also adjusts parameters in the behavior analysis and risk assessment steps; and it calibrates the model in demand forecasting to optimize the forecasting model.

[0063] By acquiring all memory allocation / release events and their contexts in real time, a raw operation record is formed. Based on this high-precision metadata, memory usage patterns are analyzed by task, and the current fragmentation risk level of the power real-time operating system is assessed, generating task behavior characteristics and risk vectors. Then, based on the data, a lightweight prediction model is used to predict short-term memory requirements for tasks with stable patterns. Combined with the current fragmentation risk, a dynamic decision optimization strategy is adopted. If the risk is low and the prediction is reliable, pre-allocation is triggered; if the risk is high, global fragmentation suppression is triggered, and an optimized instruction set is output. Finally, the instructions are executed, and the allocation latency, fragmentation rate changes, and prediction accuracy are monitored in real time. These performance data are used as feedback signals to update the state of the power real-time operating system and dynamically adjust the analysis parameters and prediction model parameters, thus forming an adaptive closed loop of "acquisition-analysis-prediction / decision-execution-feedback", ultimately ensuring rapid response and long-term stability of memory allocation.

[0064] Please see Figure 3 This application also provides an apparatus for optimizing memory management in resource-constrained environments, which can implement the above-described method. The apparatus includes: The data acquisition module is used to obtain high-precision metadata from memory operation events by hijacking the memory allocator interface; The statistical evaluation module is used to perform statistical evaluation based on historical event data and high-precision metadata to obtain memory behavior pattern feature vectors. The prediction module is used to predict memory behavior pattern feature vectors using a lightweight prediction model to obtain prediction request data. The strategy generation module is used to compare the predicted request data with the fluctuation range of historical requests to obtain a memory management strategy. The optimization module is used to optimize memory management operations by monitoring latency improvement rate and fragmentation rate.

[0065] It is understood that the content of the above method embodiments is applicable to the present device embodiments. The specific functions implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0066] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described method. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0067] It is understood that the content of the above method embodiments is applicable to this device embodiment. The specific functions implemented by this device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0068] Please see Figure 4 , Figure 4 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 410 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 420 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 420 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 420 and is called and executed by the processor 410 using the methods described above in the embodiments of this application. Input / output interface 430 is used to realize information input and output; The communication interface 440 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 450 transmits information between various components of the device (e.g., processor 410, memory 420, input / output interface 430, and communication interface 440); The processor 410, memory 420, input / output interface 430 and communication interface 440 are connected to each other within the device via bus 450.

[0069] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0070] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0071] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0072] It is understood that the content of the above method embodiments is applicable to the embodiments of this program product. The specific functions implemented by the embodiments of this program product are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0073] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0074] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0075] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0076] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0077] It should be understood that the data used in this way can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in a sequence other than those illustrated or described herein. Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product, or apparatus.

[0078] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0079] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0080] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0081] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0082] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A method for optimizing memory management in resource-constrained environments, characterized in that, The method includes the following steps: High-precision metadata in memory operation events can be obtained by hijacking the memory allocator interface; Statistical evaluation is performed based on historical event data and the high-precision metadata to obtain a memory behavior pattern feature vector. The memory behavior pattern feature vector is predicted using a lightweight prediction model to obtain prediction request data; The predicted request data is compared with the fluctuation range of historical requests to obtain a memory management strategy; The memory management operation is optimized by monitoring latency improvement rate and fragmentation rate.

2. The method according to claim 1, characterized in that, The process of obtaining high-precision metadata from memory operation events by hijacking the memory allocator interface includes the following steps: Continuously monitor and acquire kernel allocation and release requests occurring in the power real-time operating system kernel; The key information for each event is recorded based on the kernel allocation and release requests; wherein, the key information includes the size of the allocated or released memory, the size of the requested or released memory, the task identifier that initiated the request, and the timestamp of the event. Get the distribution and fragmentation rate of currently free memory blocks; The obtained key information, distribution, and fragmentation rate are summarized to obtain the high-precision metadata; The high-precision metadata is stored in a low-overhead circular buffer.

3. The method according to claim 1, characterized in that, The step of performing statistical evaluation based on historical event data and high-precision metadata to obtain a memory behavior pattern feature vector includes the following steps: The high-precision metadata is categorized using task identifiers in the historical event data to obtain the memory event set for each task. By performing a practical habit analysis and calculation on each task using the memory event set, the average allocation size and request frequency distribution are obtained. The average allocation size and request frequency distribution are smoothed using a sliding time window and exponential smoothing method; The event interval is calculated based on the high-precision metadata of each task to obtain the average time interval between adjacent events; Based on a comprehensive analysis of the average time interval between adjacent events and the system's free memory distribution information, the fragmentation rate is calculated and the fragmentation risk level characteristics are assessed. The fragmentation risk level characteristics, the task identifier, the average allocation size, the request frequency distribution, and the task call cycle are summarized to obtain the memory behavior pattern feature vector.

4. The method according to claim 1, characterized in that, The step of predicting the memory behavior pattern feature vector using a lightweight prediction model to obtain prediction request data includes the following steps: By using a simplified regression model to predict the feature vectors of the memory behavior patterns, the number of requests and the request size for the next time window can be obtained.

5. The method according to claim 4, characterized in that, The step of comparing the predicted request data with the fluctuation range of historical requests to obtain a memory management strategy includes the following steps: The task pattern is obtained by comparing the number of requests and the size of requests in the next time window with the fluctuation range of historical requests. If the task mode is stable and the current fragmentation risk is low, the decision is to pre-allocate memory, where the pre-allocated memory size is equal to the predicted request size and the pre-allocated quantity is equal to the predicted number of requests. If the current fragmentation risk is high, then a fragmentation suppression operation is triggered.

6. The method according to claim 5, characterized in that, The pre-allocation includes the following steps: The memory-aligned block size is calculated based on the optimized instruction set, contiguous space is allocated in the contiguous memory reserved by the power real-time operating system, a memory pool with a singly linked list structure is constructed, and the memory pool is associated with a specified task; wherein, the optimized instruction set includes a task identifier, a pre-allocated block size, and a pre-allocated quantity; When a task requests memory, the task request is intercepted. If the size of the task request does not exceed the size of the pre-allocated block, a block is quickly allocated from the memory pool of the task request; otherwise, the process is transferred to the standard memory allocator.

7. The method according to claim 5, characterized in that, The fragmentation suppression operation includes the following steps: Real-time acquisition of the physical free block linked list data maintained by the memory allocator; Physical continuity analysis is performed on the obtained physical free block linked list data. The linked list is traversed according to address sorting to obtain a list of all mergeable free block pairs. By calculating revenue and monitoring task status, mergeable free block pairs are screened and the timing of merging is determined. When the task is idle, the merging operation is triggered to obtain a new free memory state. The memory state before and after merging is quantitatively evaluated by calculating and comparing the fragmentation rate, and the operational effect data is obtained. The operational effect data is fed back to the real-time power operating system for optimization. The physical free block linked list data includes the starting address, block size, and pointer relationships; the operation effect data includes fragmentation rate changes, maximum contiguous block increment, and operation time.

8. The method according to claim 1, characterized in that, The optimization of memory management operations by monitoring latency improvement rate and fragmentation rate includes the following steps: Real-time acquisition of memory allocation latency after optimization operations; The latency improvement rate before and after optimization is compared based on the obtained memory allocation latency. Periodically calculate the fragmentation rate and evaluate the fragmentation suppression effect; If the delay improvement rate is insufficient, increase the smoothing factor in the dynamic behavior analysis stage; if the prediction error is too high compared to the prediction threshold, reduce the autoregressive weight in the demand forecasting stage; if the fragmentation rate continues to exceed the standard, force the fragmentation suppression operation; if the prediction error continues to be lower than the prediction threshold, freeze the parameter adjustment.

9. A device for optimizing memory management in resource-constrained environments, characterized in that, The device includes: The data acquisition module is used to obtain high-precision metadata from memory operation events by hijacking the memory allocator interface; The statistical evaluation module is used to perform statistical evaluation based on historical event data and the high-precision metadata to obtain memory behavior pattern feature vectors. The prediction module is used to predict the memory behavior pattern feature vector using a lightweight prediction model to obtain prediction request data. The strategy generation module is used to compare the predicted request data with the fluctuation range of historical requests to obtain a memory management strategy. An optimization module is used to optimize the memory management operations by monitoring latency improvement rate and fragmentation rate.

10. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method according to any one of claims 1 to 8.

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