Method for detecting bonding wire defects of multi-layer stacked chip based on AI large model and related equipment

Abstract

The invention discloses a multi-layer stacked chip bonding wire defect detection method and related equipment based on an AI large model, and the method comprises the steps: obtaining an original image of a surface layer and a part of a visible internal structure of a to-be-detected chip, and carrying out the preprocessing of the original image, and obtaining a to-be-detected image; inputting a to-be-detected image into the image segmentation model for processing to obtain a mask image of a shielded area; inputting the to-be-detected image, the mask image and the bonding wire CAD information of the to-be-detected chip into the image generation large model, and reconstructing the shielded area to obtain a complemented image; and inputting the to-be-detected image and the complemented image into a defect detection model for processing to obtain a defect detection result. According to the embodiment of the invention, the large model can be generated through the AI image to complement the shielding area of the bonding wire, and meanwhile, the defect detection model is utilized to realize intelligent judgment of defects, so that the efficiency and precision of defect detection are effectively improved. The method can be widely applied to the technical field of machine vision.

Description

Technical Field

[0001] This application relates to the field of machine vision technology, and in particular to a method and related equipment for detecting bonding wire defects in multilayer stacked chips based on a large AI model. Background Technology

[0002] In the manufacturing process of multilayer stacked chip packaging, defect detection is a crucial step in controlling product yield, and the coverage of defect detection has a significant impact on packaging yield.

[0003] In existing defect detection technologies, traditional detection often requires multiple data acquisitions, angle switching, or physical disassembly verification, which is time-consuming. Furthermore, detection methods such as physical cutting or X-ray inspection are destructive and have high hardware costs. On the other hand, non-contact detection based on machine vision technology is difficult to image the blocked solder wire area, thus failing to accurately identify defects.

[0004] In summary, the technical problems existing in the relevant technologies need to be improved. Summary of the Invention

[0005] The main objective of this application is to propose a method and related equipment for detecting defects in bonding wires of multilayer stacked chips based on an AI large model. The method uses an AI image to generate a large model to fill in the occluded areas of the bonding wires, and at the same time uses a defect detection model to achieve intelligent identification of defects, effectively improving the detection efficiency and accuracy of defect detection.

[0006] To achieve the above objectives, one aspect of this application proposes a method for detecting bonding wire defects in multilayer stacked chips based on an AI large model, the method comprising: Acquire the original images of the surface layer and part of the visible internal structure of the chip to be tested, and preprocess the original images to obtain the image to be tested; The image to be detected is input into an image segmentation model for processing to obtain a mask image of the occluded area; The image to be detected, the mask image, and the bonding wire CAD information of the chip to be detected are input into the large image generation model to reconstruct the occluded area and obtain the complete image. The image to be detected and the completed image are input into the defect detection model for processing to obtain the defect detection result.

[0007] In some embodiments, acquiring the original images of the surface layer and part of the visible internal structure of the chip to be tested includes: Based on the surface structure characteristics of the chip to be tested, the positions of the industrial camera and the light source module are adjusted using a multi-axis adjustable imaging platform. The chip to be inspected is scanned using the industrial camera to obtain the original image.

[0008] In some embodiments, the preprocessing of the original image to obtain the image to be detected includes: The original image is subjected to noise reduction and image enhancement processing to obtain an enhanced image; The enhanced image is subjected to distortion correction processing to obtain a corrected image; The corrected image is automatically windowed and cropped to obtain several image blocks, and each image block is used as the image to be detected.

[0009] In some embodiments, inputting the image to be detected into an image segmentation model for processing to obtain a mask image of the occluded region includes: The occlusion detection result is obtained by detecting the occlusion region of the image to be detected using the image segmentation model. The image to be detected is binarized based on the occlusion detection result to obtain the mask image.

[0010] In some embodiments, the step of inputting the image to be detected, the mask image, and the bonding wire CAD information of the chip to be detected into an image generation model to reconstruct the occluded area and obtain a completed image includes: The mask image is used as structural constraint information and input into the large image generation model; The CAD information of the weld wires is used as prior structural guidance information and input into the image generation large model; The reconstruction area is limited to the occluded area based on the mask image, and the large model generated by the image is used to reconstruct the image to be detected based on the bonding wire CAD information to obtain the completed image.

[0011] In some embodiments, the step of inputting the image to be detected and the completed image into a defect detection model for processing to obtain a defect detection result includes: The image to be detected is input into the defect detection model for feature extraction and analysis to obtain a first detection result; The completed image is input into the defect detection model for feature extraction and analysis to obtain a second detection result; The defect detection result is obtained by comparing and analyzing the first detection result and the second detection result.

[0012] In some embodiments, the detection method further includes: The defect detection results are displayed using a display module.

[0013] To achieve the above objectives, another aspect of this application proposes a device for detecting bonding wire defects in multilayer stacked chips based on an AI large model, the device comprising: The image acquisition and preprocessing module is used to acquire original images of the surface and part of the visible internal structure of the chip to be detected, and to preprocess the original images to obtain the image to be detected. The image segmentation module is used to input the image to be detected into the image segmentation model for processing to obtain a mask image of the occluded area; The image generation module is used to input the image to be detected, the mask image, and the bonding wire CAD information of the chip to be detected into the image generation large model, and to reconstruct the occluded area to obtain the completed image; The defect detection module is used to input the image to be detected and the completed image into the defect detection model for processing to obtain the defect detection result.

[0014] To achieve the above objectives, another aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the methods described above.

[0015] To achieve the above objectives, another aspect of the embodiments of this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the methods described above.

[0016] To achieve the above objectives, another aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the methods described above. The embodiments of this application include at least the following beneficial effects: This application provides a method and related equipment for detecting bonding wire defects in multilayer stacked chips based on an AI large model. This solution, by acquiring the original image of the chip to be detected and preprocessing it, can ensure that the image specifications meet the input requirements of subsequent models, providing a foundation for subsequent image segmentation, image generation, and defect recognition. By detecting and labeling the occluded areas in the image to be detected through the image segmentation model, a mask image is generated, which helps to limit the range of subsequent image generation and avoid reconstructing non-occluded areas. By inputting the image to be detected, the mask image, and the bonding wire CAD information into the image generation model to reconstruct the occluded areas, it helps to provide complete imaging information for machine vision-based defect detection, improving detection efficiency. At the same time, combining the bonding wire CAD information ensures the structural rationality of the reconstructed image, which helps to improve detection accuracy. By inputting the image to be detected and the completed image into the defect discrimination model for defect detection, intelligent detection of occluded areas can be added while maintaining the original detection capabilities, which helps to improve the completeness and accuracy of defect recognition. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating the steps of a method for detecting bonding wire defects in multilayer stacked chips based on an AI large model, as provided in an embodiment of this application. Figure 2 This is a three-dimensional structural schematic diagram of the multi-axis adjustable imaging platform provided in the embodiments of this application; Figure 3 This is a schematic diagram of the triaxial structure of the multi-axis adjustable imaging platform provided in the embodiments of this application; Figure 4 This is a front view schematic diagram of the multi-axis adjustable imaging platform provided in the embodiments of this application; Figure 5 This is a schematic diagram of an industrial camera and its lens module that can move independently along the XYZ axes, as provided in an embodiment of this application. Figure 6 This is a schematic diagram of a light source module that can move independently along the XYZ axes, as provided in an embodiment of this application. Figure 7 This is a schematic diagram of the structure of a device for detecting bonding wire defects in multilayer stacked chips based on an AI large model, provided in an embodiment of this application. Figure 8 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application; Reference numerals in the attached figures: 1. Y-axis slide groove and bracket of the camera; 2. X-axis slide groove and bracket of the camera; 3. Z-axis slide groove and bracket of the camera; 4. Y-axis slide groove and bracket of the light source; 5. X-axis slide groove and bracket of the light source; 6. Combined light source; 7. First Y-axis slide groove; 8. Chip to be tested; 9. Second Y-axis slide groove; 10. Z-axis slide groove; 11. Cable; 12. Human-machine interaction platform; 13. Physical button; 14. Display module; 15. Rotatable suction cup; 16. Industrial camera; 17. Telecentric lens. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0020] CAD bonding wire information: Structured data generated by a computer-aided design (CAD) system that describes the layout and connection relationships of bonding wires inside a chip.

[0021] Stable Diffusion model: An image generation model based on a diffusion model that generates high-quality images by progressively denoising noisy images. It mainly includes variational autoencoders, U-Net, text encoders, and samplers.

[0022] In related technologies, due to the three-dimensional structure of multi-layer stacked chips, traditional machine vision systems have the following technical bottlenecks: 1) Geometric occlusion prevents some bonding wire areas from being directly optically imaged; 2) Physical cutting or X-ray inspection is destructive and inefficient; 3) Insufficient defect detection coverage affects packaging yield.

[0023] In view of this, this application provides a method for detecting bonding wire defects in multilayer stacked chips based on an AI large model. This method combines the image reconstruction capabilities of image generation large models such as Stable Diffusion, and utilizes the CAD structural prior of the bonding wires in multilayer stacked chips to achieve intelligent prediction and defect identification of the structural morphology of the obscured bonding wire area. This method breaks through the physical limitations of traditional optical inspection, reconstructs the bonding wire morphology of invisible areas through an AI model, and achieves high-precision defect analysis based on the reconstructed image, providing a non-destructive and highly efficient quality inspection solution for high-density stacked packaging.

[0024] This application provides a method for detecting bonding defects in multi-layer stacked chips based on an AI large-scale model, relating to the field of information technology. This method can be applied to terminals, servers, or software running on either a terminal or server. In some embodiments, the terminal can be a smartphone, tablet, laptop, desktop computer, smart speaker, smartwatch, or in-vehicle terminal, but is not limited to these. The server can be configured as an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms. The server can also be a node server in a blockchain network. The software can be an application implementing the method for detecting bonding defects in multi-layer stacked chips based on an AI large-scale model, but is not limited to the above forms.

[0025] This application can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0026] Figure 1This is an optional flowchart of a method for detecting bonding wire defects in multilayer stacked chips based on an AI large model, provided in an embodiment of this application. Figure 1 The method may include, but is not limited to, steps S101 to S104.

[0027] S101. Obtain the original image of the surface layer and part of the visible internal structure of the chip to be tested, and preprocess the original image to obtain the image to be tested. Specifically, in this embodiment, it is first necessary to obtain the original images of the surface layer and part of the visible internal structure of the chip to be detected, and to perform preprocessing such as noise reduction, sharpening, correction, and cropping to obtain a high-quality image to be detected that meets the requirements of subsequent model input.

[0028] In some optional embodiments, acquiring raw images of the surface layer and part of the visible internal structure of the chip under test includes: S1011. Based on the surface structure characteristics of the chip to be tested, adjust the positions of the industrial camera and the light source module through a multi-axis adjustable imaging platform. S1012. Scan the chip to be inspected using an industrial camera to obtain the original image.

[0029] Specifically, refer to Figures 2-6 In this embodiment, the raw image of the chip under test is acquired by an industrial camera and a light source module mounted on a multi-axis adjustable imaging platform.

[0030] For example, a high-resolution industrial camera can be selected, and the light source module can be a ring light source. The multi-axis adjustable imaging platform is equipped with slides and brackets for the xyz axes to control the position and direction of the camera and the light source. By adjusting the lens position and independently controlling the direction and distance of the light source, the optimal imaging pose can be selected according to the complexity of the chip surface structure. It is especially suitable for high-precision defect detection scenarios of three-dimensional stacked and non-planar chip structures. The imaging configuration can be dynamically adjusted to obtain the best imaging effect, providing more reliable basic data for subsequent image segmentation and defect recognition.

[0031] In some optional embodiments, the original image is preprocessed to obtain the image to be detected, including: S1013. Perform noise reduction and image enhancement processing on the original image to obtain an enhanced image; S1014. Perform distortion correction processing on the enhanced image to obtain the corrected image; S1015. Perform automatic windowing and cropping processing on the corrected image to obtain several image blocks, and use each image block as the image to be detected.

[0032] Specifically, in this embodiment, the original image can be denoised and enhanced using operations such as adaptive filtering, histogram equalization, and edge detection to obtain an enhanced image. Radial distortion that may occur with industrial camera lenses is corrected to ensure structural geometric accuracy, resulting in a corrected image. Because industrial cameras acquire extremely high-resolution images, to improve subsequent processing efficiency and adapt to the input size of deep learning models, the entire image needs to be automatically windowed and cropped to obtain several image blocks, which are then used as the images to be detected.

[0033] S102. Input the image to be detected into the image segmentation model for processing to obtain the mask image of the occluded area; Specifically, in this embodiment, it is necessary to detect and label the occluded areas in the image to be detected using an image segmentation model, and generate a mask image to limit the range of subsequent image generation, so as to avoid reconstructing the non-occluded areas and ensure the integrity of the effective information.

[0034] In some optional embodiments, the image to be detected is input into an image segmentation model for processing to obtain a mask image of the occluded region, including: S1021. The occluded region of the image to be detected is detected by the image segmentation model to obtain the occlusion detection result; S1022. Based on the occlusion detection results, the image to be detected is binarized to obtain a mask image.

[0035] Specifically, in this embodiment, an image segmentation model is used to detect occluded regions in the image to be detected. Based on the occluded regions marked in the detection results, the image to be detected is binarized to obtain a black and white mask image, thereby providing a basis for determining the reconstruction range of the generated image. The image segmentation model can be the SAM (Segment Anything Model) model or a CNN-based segmentation network, etc., and this invention does not impose any specific limitations on it.

[0036] S103. Input the image to be detected, the mask image, and the bonding wire CAD information of the chip to be detected into the large image generation model, reconstruct the occluded area, and obtain the completed image. Specifically, in this embodiment, the occluded area is reconstructed by generating a large model from the image, and the shape and structure of the weld wire in the occluded area are intelligently predicted by combining the CAD information of the weld wire. This enables indirect reasoning and identification of defects in the invisible area, effectively improving the completeness and accuracy of defect detection.

[0037] In some optional embodiments, the image to be detected, the mask image, and the bonding wire CAD information of the chip to be detected are input into a large image generation model to reconstruct the occluded area and obtain a complete image, including: S1031. Input the mask image as structural constraint information into the large image generation model; S1032. Input the CAD information of the welding wire as the structural prior guiding information into the image to generate a large model; S1033. Based on the mask image, the reconstruction area is limited to the occluded area. Based on the bonding wire CAD information, the image is guided to generate a large model to reconstruct the image to be detected, and the completed image is obtained.

[0038] Specifically, in this embodiment, the mask image serves as structural constraint information to limit the reconstructed region to the occluded area, preventing the loss of information from the effective region. The bonding wire CAD information serves as structural prior guidance information to ensure the structural rationality of the bonding wires in the reconstructed region. Finally, a complete image containing the shape and structure of the bonding wires in the occluded region is obtained, serving as the basis for subsequent defect identification. The image generation model can be the open-source Stable Diffusion model. After fine-tuning the model using bonding wire CAD information and the bonding wire image, or training a corresponding LoRa model, the model can be used to reconstruct the occluded region of the chip bonding wires.

[0039] For example, when the Stable Diffusion model is selected as the large-scale image generation model, after the image to be detected is input into the Stable Diffusion model, the variational autoencoder in the model encodes the image to be detected, compressing the high-dimensional image to be detected into a low-dimensional latent space embedding. At the same time, the text encoder encodes the bonding wire CAD information into an embedding representation in the same latent space, which is used to guide the generation of subsequent denoising results. After a certain number of steps of denoising processing on the latent space embedding corresponding to the occluded area of ​​the mask image in the image to be detected with a preset denoising intensity, the U-Net performs overall processing on the latent space embedding of the image to be detected, and predicts the denoising result at the current number of steps by combining the embedding representation encoded by the bonding wire CAD information. The sampler performs overall denoising (i.e., reconstruction) on the latent space embedding based on the denoising result, and then replaces the non-occluded area with the representation before denoising based on the mask image, retaining only the denoising result for the occluded area. After repeating the above denoising process for a certain number of steps, the variational autoencoder decodes the latent space embedding to obtain a complete image containing the shape structure of the bonding wire in the occluded area. It can be recognized that in the above process, the mask image limits the reconstruction range to the occluded area, the CAD information of the weld wire guides the model to obtain a reconstruction result that is closer to the actual weld wire structure, and the entire image to be detected is always treated as the processing object during the reconstruction process, which ensures the structural continuity of the occluded and unoccluded areas of the completed image, further improving the usability of the completed image as a basis for defect prediction, and indirectly improving the detection accuracy of defect prediction.

[0040] S104. Input the image to be detected and the completed image into the defect detection model for processing to obtain the defect detection result.

[0041] Specifically, in this embodiment, a defect detection model is used to jointly analyze the completed image and the image to be detected to obtain the defect detection result. The defect detection model can be a deep learning composite network for object detection using a ResNet50+Transformer structure or a YOLO-based object recognition network; this invention does not impose specific limitations on this. The defect detection result can include common structural defects such as short circuits, open circuits, bridging, and foreign objects.

[0042] In some optional embodiments, the image to be detected and the completed image are input into a defect detection model for processing to obtain defect detection results, including: S1041. Input the image to be detected into the defect detection model for feature extraction and analysis to obtain the first detection result; S1042. Input the completed image into the defect detection model for feature extraction and analysis to obtain the second detection result; S1043. Compare and analyze the first and second test results to obtain the defect detection results.

[0043] Specifically, in this embodiment, the image to be detected and the completed image are respectively input into the defect detection model for detection. At the same time, the original image and the image during the completion process are analyzed, and the detection results of the model are compared to determine whether there are any abnormalities in the completed area. This can improve the defect recognition ability of the occluded area while maintaining the original detection accuracy, and improve the accuracy of the final detection result.

[0044] In some optional embodiments, the detection method further includes: S105. Display the defect detection results through the display module; Specifically, in this embodiment, referring to Figure 2 Furthermore, the defect detection results can be displayed via a display module, including defect type, location, corresponding image, etc. Visualizing the defect detection results improves readability, helps operators quickly obtain relevant information, and enhances the practicality of the invention.

[0045] The present invention will be further described below with reference to a specific embodiment.

[0046] In this embodiment, image acquisition is performed using an industrial camera and an adjustable light source module mounted on a multi-axis motion platform. The industrial camera is 65 megapixels, supports global shutter and ultra-high resolution sampling, and can capture minute feature details in the chip structure for high-precision chip image capture. The lens is a high-resolution industrial telecentric lens, supporting large depth-of-field imaging. The light source module is a ring-shaped multispectral LED array, supporting combined white light and infrared illumination. The multi-axis motion platform can perform XYZ three-axis linear movement, achieving a positioning accuracy of [missing information]. .

[0047] During image preprocessing, histogram equalization, adaptive filtering, and edge detection are used to sharpen the original image and improve subsequent recognition accuracy. Because industrial cameras capture extremely high-resolution images, automatic windowing and cropping of the entire image is performed to improve processing efficiency and adapt to the input size of deep learning models. Within the cropped image patches, the SAM (Segment Anything Model) model or a CNN-based segmentation network is used to automatically label occluded regions, outputting a binary mask image. This mask serves as the structural constraint input for the large-scale image generation model.

[0048] In the reconstruction of the occluded area, the Stable Diffusion model is selected to implement a multi-step reverse diffusion process to gradually restore the real structure and texture of the occluded area. The DDIM sampler is used instead of the traditional diffusion sampler, which significantly reduces the number of iterations while maintaining the image generation quality. The model inference process is deployed on the high-performance NVIDIA RTX 4090DGPU platform with 24GB of video memory, supporting FP16 mixed precision acceleration and parallel computing to ensure generation efficiency and industrial-grade response speed. The module output is the reconstructed complete image block, keeping the non-occluded areas in the original image unchanged, only completing the mask annotation area, and retaining the spatial coordinate information for subsequent defect detection and localization.

[0049] During defect identification, a composite network with a ResNet50+Transformer structure or a YOLO-based target recognition network is used for feature extraction, classification prediction, and localization, supporting the identification of common structural defects such as short circuits, open circuits, bridging, and foreign objects. This module simultaneously analyzes the original image and the image during the completion process, and determines whether there are anomalies in the completed area by comparing the results of the inference model, obtaining the final defect detection result. The defect identification result is displayed through the human-machine interface of the display module and simultaneously written to the database for recording.

[0050] Please see Figure 7 This application also provides a device for detecting bonding wire defects in multilayer stacked chips based on an AI large model, which can implement the above-mentioned method. The device includes: The image acquisition and preprocessing module is used to acquire the original images of the surface and part of the visible internal structure of the chip to be inspected, and to preprocess the original images to obtain the image to be inspected. The image segmentation module is used to input the image to be detected into the image segmentation model for processing, and obtain the mask image of the occluded area; The image generation module is used to input the image to be detected, the mask image, and the bonding wire CAD information of the chip to be detected into the large image generation model, and to reconstruct the occluded area to obtain the complete image. The defect detection module is used to input the image to be detected and the completed image into the defect detection model for processing, and obtain the defect detection results.

[0051] It is understood that the content of the above method embodiments is applicable to the present device embodiments. The specific functions implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0052] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described method.

[0053] It is understood that the content of the above method embodiments is applicable to this device embodiment. The specific functions implemented by this device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0054] Please see Figure 8 , Figure 8 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 901 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 902 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 902 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 902 and is called and executed by the processor 901 using the methods described in the embodiments of this application. The input / output interface 903 is used to implement information input and output; The communication interface 904 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 905 transmits information between various components of the device (e.g., processor 901, memory 902, input / output interface 903, and communication interface 904); The processor 901, memory 902, input / output interface 903, and communication interface 904 are connected to each other within the device via bus 905.

[0055] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0056] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0057] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0058] It is understood that the content of the above method embodiments is applicable to the embodiments of this program product. The specific functions implemented by the embodiments of this program product are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0059] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0060] This application provides a method, apparatus, electronic device, storage medium, and program product for detecting bonding wire defects in multilayer stacked chips based on an AI large model. By combining industrial object type information to calculate the dynamic distortion of the perturbed point cloud, it can fully consider the geometric characteristics of different types of industrial objects, thereby achieving more accurate distortion estimation in industrial scenarios and providing a reasonable basis for subsequent diffusion time step matching. Through a diffusion step mapping table, the dynamic distortion and operation task type are mapped to the corresponding diffusion time step, enabling dynamic adjustment of the denoising steps of the diffusion model to meet different accuracy and efficiency requirements in various application scenarios, and achieving detection of different types of... Adaptive matching for operational tasks: By introducing geometric constraints, industrial feature matching terms, and robot operation accuracy constraints into the loss function of the denoising diffusion model, the practicality of the denoising results in humanoid robots and industrial scenarios is improved. Among them, the geometric constraint term can make the overall shape of the denoised point cloud data conform to the geometric features of the standard model, the industrial feature matching term can improve the matching degree between key industrial features and templates, meet the needs of high-precision operational tasks, and the robot operation accuracy constraint term optimizes the denoising results based on the positioning error of the robot end effector, making it more in line with the actual execution path, so that the processed point cloud can be directly used for robot operation, thus improving practicality.

[0061] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0062] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0063] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0064] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0065] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0066] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0067] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0068] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0069] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0070] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0071] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. An AI large model-based multi-layer stacked chip wire defect detection method, characterized in that, The method comprises the following steps: An original image of a surface layer and a part of visible internal structure of a chip to be detected is acquired, and the original image is preprocessed to obtain a detection image; The detection image is input into an image segmentation model for processing to obtain a mask image of an occluded area; The detection image, the mask image and wire CAD information of the chip to be detected are input into an image generation large model to reconstruct the occluded area and obtain a completed image; The detection image and the completed image are input into a defect detection model for processing to obtain a defect detection result.

2. The method of claim 1, wherein the method is based on an AI large model. The original image of the surface layer and the part of visible internal structure of the chip to be detected is acquired by the following steps: According to the surface structure characteristics of the chip to be detected, the positions of an industrial camera and a light source module are adjusted through a multi-axis adjustable imaging platform; The chip to be detected is scanned by the industrial camera to obtain the original image.

3. The method of claim 1, wherein the method is characterized by: The original image is preprocessed to obtain the detection image by the following steps: The original image is subjected to noise reduction processing and image enhancement processing to obtain an enhanced image; The enhanced image is subjected to distortion correction processing to obtain a corrected image; The corrected image is subjected to automatic windowing and cropping processing to obtain a plurality of image blocks, and each image block is taken as the detection image.

4. The method of claim 1, wherein the method is based on an AI large model. The detection image is input into the image segmentation model for processing to obtain the mask image of the occluded area by the following steps: The occluded area of the detection image is detected by the image segmentation model to obtain an occlusion detection result; The detection image is binarized according to the occlusion detection result to obtain the mask image.

5. The method of claim 1, wherein the method is based on an AI large model for detecting a wire bonding defect of a multi-layer stacked chip. The detection image, the mask image and the wire CAD information of the chip to be detected are input into the image generation large model to reconstruct the occluded area and obtain the completed image by the following steps: The mask image is input into the image generation large model as structure constraint information; The wire CAD information is input into the image generation large model as structure priori guide information; The reconstruction area is limited to the occluded area according to the mask image, and the image generation large model is guided to reconstruct the detection image according to the wire CAD information to obtain the completed image.

6. The method of claim 1, wherein the method is based on an AI large model for detecting a wire bonding defect of a multi-layer stacked chip. The detection image and the completed image are input into the defect detection model for processing to obtain the defect detection result by the following steps: The detection image is input into the defect detection model for feature extraction and analysis to obtain a first detection result; The completed image is input into the defect detection model for feature extraction and analysis to obtain a second detection result; The first detection result and the second detection result are compared and analyzed to obtain the defect detection result.

7. The method of claim 1, wherein the method is based on an AI large model. The method further comprises the following steps: The defect detection result is displayed through a display module.

8. An AI large model-based multi-layer stacked chip wire defect detection device, characterized in that, The device comprises: An image acquisition and preprocessing module is configured to acquire an original image of a surface layer and a part of visible internal structure of a chip to be detected, and to preprocess the original image to obtain a detection image; An image segmentation module is configured to input the to-be-detected image into an image segmentation model for processing to obtain a mask image of the occluded region. An image generation module is configured to input the to-be-detected image, the mask image, and wire CAD information of the to-be-detected chip into an image generation model to reconstruct the occluded region and obtain a completed image. A defect detection module is configured to input the to-be-detected image and the completed image into a defect detection model for processing to obtain a defect detection result.

9. An electronic device, comprising: The electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the method in any one of claims 1 to 7 when executing the computer program.

10. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the method in any one of claims 1 to 7.

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