Access control method and equipment of storage circuit and storage medium

Abstract

The invention provides an access control method and equipment of a storage circuit and a storage medium. The memory circuit is provided with a reading unit, also can be called a reading circuit, the reading unit is provided with an electric fuse, and the method comprises the following steps: setting a plurality of different reference resistance values for the reading unit; comparing the resistance value of the electric fuse with any reference resistance value; if the resistance value of the electric fuse is smaller than any reference resistance value, determining that the electric fuse is not burnt; and if the resistance value of the electric fuse is greater than any reference resistance value, determining that the electric fuse is burnt. On the basis, a plurality of reference resistance values used for reading the circuit are set, it is guaranteed that the reference resistance values cover the change range of the process corner, and therefore the product yield can be improved.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design and simulation verification technology, specifically to an access control method and device for a storage circuit, and a storage medium. Background Technology

[0002] In traditional memory circuits, for redundancy design, the industry typically uses only one reference resistor value to determine whether the fuse has burned out. Specifically, the read unit of the memory circuit uses only one reference resistor. The resistance value of this reference resistor, also known as the reference resistance value, is obtained and compared with the resistance value of the fuse in the corresponding pre-charge channel. If the reference resistance value is less than the fuse's resistance value, the fuse is considered intact, indicating no data has been written. If the reference resistance value is greater than the fuse's resistance value, the fuse is considered burned out, indicating data has been written. However, chip manufacturing is a physical process with process variations (including doping concentration, diffusion depth, etching degree, etc.). This results in differences between different batches, between different wafers within the same batch, and between different dies within the same wafer. These individual differences in manufacturing processes lead to a large range of process corner variations. The current access control method using only one reference resistor value cannot cover all process corner variations, resulting in low product yield. Summary of the Invention

[0003] In view of this, this application provides an access control method and device for a storage circuit, as well as a storage medium, which can at least improve the problem that the access control method that only sets a reference resistor value cannot cover the variation range of all process corners, and the resulting low product yield.

[0004] This application provides an access control method for a storage circuit, wherein the storage circuit is provided with a read unit, and the read unit is provided with an electric fuse. The method includes: Set multiple different reference resistor values ​​for the read unit; The resistance value of the electric fuse is compared with any reference resistance value; If the resistance value of the electric fuse is less than any reference resistance value, it is determined that the electric fuse has not been programmed. If the resistance value of the electric fuse is greater than any reference resistance value, then it is determined that the electric fuse has been programmed.

[0005] Optionally, the step of setting multiple different reference resistor values ​​for the reading unit includes: Determine all types of process corners included in the memory circuit; Multiple different reference resistance values ​​are set according to the type of process corner, wherein the multiple reference resistance values ​​cover the resistance values ​​corresponding to all types of process corners.

[0006] Optionally, the process angle type includes at least one of TT, FF, SS, FS, and SF, or at least one of TT, FF, and SS.

[0007] Optionally, the step of setting multiple different reference resistor values ​​for the reading unit includes: The reading unit is configured to include a first pre-charge channel and a second pre-charge channel. The first pre-charge channel is provided with the electric fuse, and the second pre-charge channel is provided with a plurality of reference resistor units connected in series. Each reference resistor unit includes a reference resistor and a control switch connected in parallel, and the resistance values ​​of the reference resistors of each reference resistor unit are different. By controlling the number of control switches that are turned on or off, the reference resistor units that are turned on in the second pre-charge channel are controlled, so as to set multiple reference resistor values ​​for the storage circuit.

[0008] Optionally, comparing the resistance value of the electric fuse with any reference resistance value includes: Obtain the first voltage of the first precharge channel at the first preset node, and the second voltage of the second precharge channel at the second preset node; Compare the first voltage and the second voltage; Wherein, when the first voltage is greater than the second voltage, it indicates that the resistance value of the electric fuse is greater than the reference resistance value; when the first voltage is less than the second voltage, it indicates that the resistance value of the electric fuse is less than the reference resistance value.

[0009] Optionally, the control switch is an N-type MOSFET.

[0010] This application provides a storage circuit for performing the method described in any of the preceding claims. The storage circuit is provided with a read unit, which includes a first pre-charge channel and a second pre-charge channel. The first pre-charge channel is provided with an electric fuse, and the second pre-charge channel is provided with a plurality of reference resistor units connected in series. Each reference resistor unit includes a reference resistor and a control switch connected in parallel, and the resistance values ​​of the reference resistors of each reference resistor unit are different.

[0011] Optionally, the first pre-charge channel includes a first P-type MOS transistor, a fuse, and a first N-type MOS transistor connected in sequence, and the first preset node is located between the first P-type MOS transistor and the fuse.

[0012] Optionally, the second pre-charge channel includes a second P-type MOS transistor, a base resistor, a plurality of the reference resistor units, and a second N-type MOS transistor connected in sequence, and the second preset node is located between the second P-type MOS transistor and the base resistor.

[0013] This application provides an access control device, including a processor and a memory, wherein the memory stores an access control program, and when the access control program is executed by the processor, it implements the steps of the access control method of the memory circuit as described in any of the preceding claims.

[0014] This application provides a storage medium storing a computer program, which, when executed by a processor, implements the steps of the access control method of any of the above storage circuits.

[0015] As described above, the storage circuit of this application includes a read unit, which can be considered a sub-circuit of the storage circuit, also referred to as the read circuit. The read unit includes an electric fuse. The access control method includes: setting multiple different reference resistance values ​​for the read unit; comparing the resistance value of the electric fuse with any one of the reference resistance values; if the resistance value of the electric fuse is less than any one of the reference resistance values, then determining that the electric fuse has not been programmed; if the resistance value of the electric fuse is greater than any one of the reference resistance values, then determining that the electric fuse has been programmed. Based on this, this application sets multiple reference resistance values ​​for the read circuit, ensuring that these reference resistance values ​​cover the variation range of the process corner, thereby improving product yield. Attached Figure Description

[0016] Figure 1 This is a schematic flowchart of an access control method for a storage circuit provided in an embodiment of this application; Figure 2 This is a schematic diagram of a process for setting multiple different reference resistor values ​​for a reading unit, provided in an embodiment of this application. Figure 3 This is a circuit equivalent schematic diagram of a reading unit provided in an embodiment of this application; Figure 4 This is a schematic diagram of the structure of an access control device provided in an embodiment of this application. Detailed Implementation

[0017] To address the aforementioned problems in the prior art, this application provides an access control method and apparatus for a storage circuit, as well as a storage medium. These protection subjects are based on the same concept, and the principles for solving the problems are basically the same or similar. The implementation methods of each protection subject can be referred to mutually, and repeated details will not be elaborated.

[0018] In this application, multiple different reference resistor values ​​are set for the reading unit. The resistance value of the electric fuse is compared with any of the reference resistor values. If the resistance value of the electric fuse is less than any of the reference resistor values, it is determined that the electric fuse has not been programmed; if the resistance value of the electric fuse is greater than any of the reference resistor values, it is determined that the electric fuse has been programmed. That is, this application sets multiple reference resistor values ​​for the reading circuit to ensure that these reference resistor values ​​cover the variation range of the process corner, which is beneficial to improving product yield.

[0019] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly described below in conjunction with specific embodiments and corresponding drawings. Obviously, the embodiments described below are only a part of the embodiments of this application, and not all of them. Unless otherwise specified, the following embodiments and their technical features can be combined with each other, and also belong to the technical solutions of this application.

[0020] Figure 1 This is a flowchart illustrating an access control method for a storage circuit provided in an embodiment of this application. The access control method for the storage circuit can also be referred to as a "method" or "access control," and is at least used for access control of a storage circuit. The execution entity of each step of the method can be a suitable storage circuit, or a storage medium, processor, controller, etc., with access control functionality. This application does not limit the type of storage circuit; for example, it can be any of the following: Programmable Read-Only Memory (PROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), One-Time Programmable (OTP), and eFuse (electronic fuse).

[0021] The storage circuit is equipped with a read unit, which can be considered a sub-circuit of the storage circuit, also called a read circuit. It can be connected to a single-channel storage array for storing data. The read unit is equipped with an electric fuse, see also [reference needed]. Figure 1 As shown, the method includes at least the following steps.

[0022] S1: Set multiple different reference resistor values ​​for the reading unit.

[0023] In one example, this application can set multiple different reference resistor values ​​depending on the type of process corner. (Process Corners) This model describes the performance fluctuation range of devices such as transistors in a memory circuit. By limiting the boundary conditions of the drive current of these devices, it ensures that the chip can still operate stably under different process deviations. In step S1, all types of process corners included in the memory circuit can be determined first. Then, multiple different reference resistor values ​​are set according to the type of process corner. These multiple reference resistor values ​​cover the resistance values ​​corresponding to all types of process corners. This can be understood as follows: the resistance value caused by each type of process corner in the read unit (i.e., the read circuit) is used as the reference resistor value set in step S1. For example, if the resistance value corresponding to a certain type of process corner is R1, then the set reference resistor values ​​must include at least R1. For n types of process corners, at most n corresponding resistance values ​​can be obtained, so the final number of set reference resistor values ​​can be at most n. Therefore, in the process corner simulation stage of the memory circuit, for any given process corner, any reference resistor can be used to ensure normal circuit function, thus guaranteeing that the multiple set reference resistor values ​​cover the variation range of the process corner.

[0024] Taking a memory circuit that includes a MOSFET as an example, the process corner types include TT (Typical-Typical), FF (Fast-Fast), and SS (Slow-Slow). , FS (Fast-Slow), and SF (Slow-Fast) At least one of the above, and for more comprehensive coverage, this application can consider all five types of process corners when setting multiple reference resistor values. The TT type indicates that both the N-type and P-type MOSFETs in the memory circuit are under typical process conditions, and the corresponding drive current is the average value. This TT type process corner can be used as a benchmark for memory circuit design and as a process deviation parameter for simulating nominal performance (such as clock frequency). The FF type indicates that both the N-type and P-type MOSFETs in the memory circuit are in their fastest state, with the corresponding drive current reaching its maximum and the switching speed being the fastest. This FF type process corner can be used as a process deviation parameter to verify the performance limits of the memory circuit chip under high temperature / high pressure (such as power consumption and heat dissipation). The SS type indicates that both the N-type and P-type MOSFETs in the memory circuit are in their slowest state, with the corresponding drive current at its minimum and the switching speed being the slowest. This SS type process corner can be used as a process deviation parameter to test the stability of the chip under low temperature / low pressure (such as electronic reliability). The FS type indicates that the N-type MOSFET in the memory circuit is in its fastest state and the P-type MOSFET is in its slowest state, resulting in an asymmetry in rise / fall times. This FS type process corner can be used as a process deviation parameter to expose timing path shortcomings (such as critical path delay exceeding the standard). The SF type indicates that the N-type MOSFET in the memory circuit is in its slowest state and the P-type MOSFET is in its fastest state, with the performance deviation direction being the opposite of the FS type. This SF type process corner can also be used as a process deviation parameter to expose timing path shortcomings (such as critical path delay exceeding the standard) and to optimize circuit robustness.

[0025] Taking a memory circuit that includes resistors as an example, the types of process corners include TT, FF, and SS. In order to provide more comprehensive coverage, this application can take into account all three types of process angles when setting multiple reference resistor values.

[0026] S2: Compare the resistance value of the electric fuse with any reference resistance value.

[0027] S3: If the resistance value of the electric fuse is less than any reference resistance value, then it is determined that the electric fuse has not been programmed.

[0028] S4: If the resistance value of the electric fuse is greater than any reference resistance value, then it is determined that the electric fuse has been programmed.

[0029] As described above, in the method of this application, multiple different reference resistor values ​​are set for the reading unit; the resistance value of the electric fuse is compared with any of the reference resistor values; if the resistance value of the electric fuse is less than any of the reference resistor values, it is determined that the electric fuse has not been burned or has not been burned out, and the state is 0, that is, no data has been written; if the resistance value of the electric fuse is greater than any of the reference resistor values, it is determined that the electric fuse has been burned or has been burned out, and the state is 1, that is, data has been written. Based on this, by setting multiple reference resistor values ​​for the reading circuit, this application can ensure that these reference resistor values ​​cover the range of process corner variations as much as possible, thereby improving product yield.

[0030] In one example of step S1, this application can be performed as follows: Figure 2The method shown allows setting multiple different reference resistor values ​​for the read unit, such as... Figure 2 As shown, it includes: S11: The reading unit is configured to include a first pre-charging channel and a second pre-charging channel. The first pre-charging channel is provided with the electric fuse, and the second pre-charging channel is provided with a plurality of reference resistor units connected in series. Each reference resistor unit includes a reference resistor and a control switch connected in parallel. The resistance values ​​of the reference resistors of each reference resistor unit are different. S12: By controlling the number of control switches that are turned on or off, the reference resistor unit that is turned on in the second pre-charge channel is controlled, so as to set multiple reference resistor values ​​for the storage circuit.

[0031] Based on this, in the aforementioned S2 step, the first voltage of the first pre-charge channel at the first preset node and the second voltage of the second pre-charge channel at the second preset node are first obtained; then the first voltage and the second voltage are compared; wherein, when the first voltage is greater than the second voltage, it indicates that the resistance value of the fuse is greater than the reference resistance value; when the first voltage is less than the second voltage, it indicates that the resistance value of the fuse is less than the reference resistance value.

[0032] Combination Figure 3 The circuit equivalent diagram of the read unit shown includes a first P-type MOS transistor MP0, a fuse FUSE, and a first N-type MOS transistor MN0 connected in sequence in the first pre-charge channel. The first N-type MOS transistor MN0 can be connected to the memory array of the memory circuit. The second pre-charge channel includes a second P-type MOS transistor MP1, a base resistor R0, multiple reference resistor units, and a second N-type MOS transistor MN1 connected in sequence. The second N-type MOS transistor MN1 can be connected to the memory array of the memory circuit. The first P-type MOS transistor MP0 and the second P-type MOS transistor MP1 are respectively connected to the power supply voltage VDD. Figure 3 The three reference resistor units shown are merely illustrative examples and do not constitute a limitation on the scope of protection of this application. These reference resistor units are connected in series, and each reference resistor unit includes a reference resistor and a control switch MN connected in parallel. For example, the first reference resistor unit includes a reference resistor R11 connected in parallel and a control switch MN, the second reference resistor unit includes a reference resistor R12 connected in parallel and a control switch MN, and the third reference resistor unit includes a reference resistor R13 connected in parallel and a control switch MN. The resistance values ​​of the reference resistors R11, R12 and R13 are different, and these three control switches can all be N-type MOSFETs.

[0033] In step S12, by controlling the number of times the control switch MN is turned on or off, the reference resistor units of the second pre-charge channel are controlled, thereby setting multiple reference resistor values ​​for the storage circuit. Figure 3 In the example, three reference resistor units form a weighted resistor network. The circuit structure composed of the base resistor R0 and the weighted resistor network covers the range of process corner variations. The resistance values ​​of the reference resistors R11, R12, and R13 are R, 2R, and 4R, respectively. The three control switches MN are controlled by three signals d0, d1, and d2, respectively. By changing the potential of the three signals d0, d1, and d2, the resistance value connected to the second pre-charge channel can be different. For example, when the levels of the three signals d0, d1, and d2 are all 1, the resistance connected to the second pre-charge channel (which can be regarded as the currently set reference resistance value) is the base resistance R0. When the levels of the three signals d0, d1, and d2 are all 0, the resistance connected to the second pre-charge channel (which can be regarded as the currently set reference resistance value) is the base resistance R0 + 7R.

[0034] During the comparison in step S2, the first preset node A is located between the first P-type MOSFET MP0 and the fuse FUSE, and the second preset node B is located between the second P-type MOSFET MP1 and the base resistor R0. This application determines the resistance value of the fuse FUSE and the values ​​of various reference resistors by comparing the voltages at these two nodes. Specifically, when the first voltage at the first preset node A is greater than the second voltage at the second preset node B, it indicates that the resistance value of the fuse FUSE is greater than the currently set reference resistor value; when the first voltage is less than the second voltage, it indicates that the resistance value of the fuse FUSE is less than the currently set reference resistor value.

[0035] This application embodiment also provides a storage circuit, and the circuit equivalent schematic diagram of the reading unit of the storage circuit can be referred to. Figure 3 As shown. This storage circuit is used to perform the methods of any of the above embodiments, and therefore can achieve the beneficial effects that the methods of any of the foregoing embodiments can achieve. The storage circuit is provided with a read unit, which includes a first pre-charge channel and a second pre-charge channel. The first pre-charge channel is provided with an electric fuse, and the second pre-charge channel is provided with a plurality of reference resistor units connected in series. Each reference resistor unit includes a reference resistor and a control switch connected in parallel, and the resistance values ​​of the reference resistors of each reference resistor unit are different.

[0036] In one example, the first pre-charge channel includes a first P-type MOSFET, a fuse, and a first N-type MOSFET connected in sequence, with the first preset node located between the first P-type MOSFET and the fuse; the second pre-charge channel includes a second P-type MOSFET, a base resistor, a plurality of reference resistor units, and a second N-type MOSFET connected in sequence, with the second preset node located between the second P-type MOSFET and the base resistor.

[0037] This application embodiment also provides a storage medium storing an access control program for a storage circuit, also known as an "access control program" or "program". This program is essentially a computer program, and when executed by a processor, it implements the steps of the access control method for the storage circuit as in any example.

[0038] The storage medium includes, but is not limited to, any one of read-only memory (ROM), random access memory (RAM), magnetic disk, and optical disk.

[0039] Since the program stored in the storage medium can execute the steps of the access control method of the storage circuit in any embodiment provided in this application, the beneficial effects that the method of any of the foregoing embodiments can achieve can be realized. For details, please refer to the foregoing embodiments, which will not be repeated here.

[0040] This application also provides an access control device (also known as a "memory circuit access control device") or chip, including a memory and a processor. The memory stores an access control program. When the access control program is executed by the processor, it can implement the corresponding steps of the memory circuit access control method of any of the foregoing embodiments. And / or, the access control device or chip is provided with a storage medium as shown in the above example, and the processor loads the storage medium to execute the corresponding steps of the memory circuit access control method, thereby achieving the beneficial effects that the memory circuit access control method of the corresponding embodiment can achieve.

[0041] Figure 4 This is a schematic diagram of the structure of an access control device provided in an embodiment of this application. Figure 4 As shown, the access control device 40 includes: Setting module 41 is used to set multiple different reference resistor values ​​for the reading unit; Comparison module 42 is used to compare the resistance value of the electric fuse with any reference resistance value; The processing module 43 is configured to determine that the electric fuse has not been programmed when the comparison module 42 determines that the resistance value of the electric fuse is less than any reference resistance value; and to determine that the electric fuse has been programmed when the comparison module 42 determines that the resistance value of the electric fuse is greater than any reference resistance value.

[0042] It should be understood that the above-mentioned modules of the access control device 40 can be represented as physical devices or virtual modules (i.e., logical modules) in actual scenarios. A certain module can be implemented by a single physical device or by two or more physical devices working together. Similarly, the function performed by a certain module can be implemented by a single physical device or by two or more physical devices working together.

[0043] Furthermore, the functions corresponding to each module can be implemented by the corresponding steps of the integrated circuit design and simulation verification method of any of the aforementioned embodiments. For example, the setting module 41 is used to determine all types of process corners included in the storage circuit, and set multiple different reference resistor values ​​according to the type of the process corner, wherein the multiple reference resistor values ​​cover the resistance values ​​corresponding to all types of process corners. The types of process corners include at least one of TT, FF, SS, FS, and SF, or at least one of TT, FF, and SS. As another example, the setting module 41 is used to set the read unit to include a first pre-charge channel and a second pre-charge channel. The first pre-charge channel is provided with the fuse, and the second pre-charge channel is provided with multiple reference resistor units connected in series. Each reference resistor unit includes a reference resistor and a control switch connected in parallel. The control switch can be an N-type MOS transistor. The resistance values ​​of the reference resistors of each reference resistor unit are different. Then, by controlling the number of times the control switch is turned on or off, the reference resistor units turned on in the second pre-charge channel are controlled to set multiple reference resistor values ​​for the storage circuit. For example, the comparison module 42 is used to obtain the first voltage of the first pre-charge channel at the first preset node and the second voltage of the second pre-charge channel at the second preset node, and then compare the first voltage and the second voltage; wherein, when the first voltage is greater than the second voltage, it indicates that the resistance value of the electric fuse is greater than the reference resistance value; when the first voltage is less than the second voltage, it indicates that the resistance value of the electric fuse is less than the reference resistance value.

[0044] The above are only some embodiments of this application and do not limit the patent scope of this application. For those skilled in the art, any equivalent structural transformations made using the content of this specification and drawings are similarly included within the patent protection scope of this application.

[0045] The use of step designations such as S1 and S2 in this document is intended to more clearly and concisely describe the corresponding content and does not constitute a substantial restriction on the order. In specific implementation, those skilled in the art may execute S2 first and then S1, etc., but these should all be within the protection scope of this application.

[0046] Although this document uses terms such as "first," "second," etc., to describe various types of information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. Furthermore, the singular forms "a," "an," and "the" are intended to also include the plural forms. The terms "or" and "and / or" are interpreted as inclusive, or meaning either one or any combination thereof. Exceptions to this definition only arise when combinations of elements, functions, steps, or operations are inherently mutually exclusive in some way.

Claims

1. An access control method for a storage circuit, characterized by, The storage circuit is provided with a reading unit, the reading unit is provided with an electric fuse, and the method comprises: a plurality of different reference resistance values are set for the reading unit; the resistance value of the electric fuse is compared with any reference resistance value; if the resistance value of the electric fuse is smaller than any reference resistance value, it is determined that the electric fuse is not burned; if the resistance value of the electric fuse is greater than any reference resistance value, it is determined that the electric fuse is burned.

2. The method of claim 1, wherein, The plurality of different reference resistance values set for the reading unit comprise: all types of process corners included in the storage circuit are determined; a plurality of different reference resistance values are set according to the types of the process corners, wherein the plurality of reference resistance values cover the resistance values corresponding to all types of process corners.

3. The method of claim 2, wherein, The types of the process corners comprise at least one of TT, FF, SS, FS and SF, or at least one of TT, FF and SS.

4. The method of claim 1, wherein, The plurality of different reference resistance values set for the reading unit comprise: the reading unit comprises a first pre-charge channel and a second pre-charge channel, the first pre-charge channel is provided with the electric fuse, the second pre-charge channel is provided with a plurality of reference resistance units connected in series, each reference resistance unit comprises a reference resistance and a control switch connected in parallel, and the resistance values of the reference resistances of the reference resistance units are different; by controlling the number of the control switches turned on or turned off, the reference resistance units turned on by the second pre-charge channel are controlled to set a plurality of reference resistance values for the storage circuit.

5. The method of claim 4, wherein, The comparison of the resistance value of the electric fuse with any reference resistance value comprises: a first voltage of the first pre-charge channel at a first preset node and a second voltage of the second pre-charge channel at a second preset node are obtained; the first voltage and the second voltage are compared; when the first voltage is greater than the second voltage, it indicates that the resistance value of the electric fuse is greater than the reference resistance value; when the first voltage is smaller than the second voltage, it indicates that the resistance value of the electric fuse is smaller than the reference resistance value.

6. The method of claim 4, wherein, The control switch is an N-type MOS tube.

7. A storage circuit, characterized by comprising: The storage circuit is provided with a reading unit, the reading unit comprises a first pre-charge channel and a second pre-charge channel, the first pre-charge channel is provided with an electric fuse, the second pre-charge channel is provided with a plurality of reference resistance units connected in series, each reference resistance unit comprises a reference resistance and a control switch connected in parallel, and the resistance values of the reference resistances of the reference resistance units are different.

8. The storage circuit of claim 7, wherein the first pre-charge channel comprises a first P-type MOS tube, the electric fuse and a first N-type MOS tube connected in sequence, and the first preset node is located between the first P-type MOS tube and the electric fuse; the second pre-charge channel comprises a second P-type MOS tube, a basic resistance, a plurality of reference resistance units and a second N-type MOS tube connected in sequence, and the second preset node is located between the second P-type MOS tube and the basic resistance.

9. An access control device, characterized in that The memory stores an access control program, and the access control program, when executed by the processor, implements the steps of the access control method of the storage circuit according to any one of claims 1 to 8.

10. A storage medium, characterized by The storage medium stores a computer program, and the computer program, when executed by the processor, implements the steps of the access control method of the storage circuit according to any one of claims 1 to 8.

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