A three-junction gallium arsenide solar cell epitaxial wafer and a preparation method thereof

By employing superlattice tunneling junctions and bandgap engineering in triple-junction gallium arsenide solar cells, the problem of insufficient spectral response and current matching was solved, thereby improving the photoelectric conversion efficiency and output power of the cells.

CN121358004BActive Publication Date: 2026-03-27NANCHANG KAIXUN PHOTOELECTRIC CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-18
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing triple-junction gallium arsenide solar cells have shortcomings in spectral response and current matching, which affect their photoelectric conversion efficiency.

Method used

By replacing the traditional tunneling junction with a superlattice tunneling junction, and combining quantum resonance tunneling effect and bandgap engineering design, the battery structure is optimized to improve tunneling current density and photon utilization efficiency.

Benefits of technology

It significantly improves the battery's fill factor and maximum output power, achieving better current matching and overall photoelectric conversion efficiency.

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Abstract

The present application relates to the technical field of solar cells, in particular to a kind of three-junction gallium arsenide solar cell epitaxial wafer and preparation method thereof, the three-junction gallium arsenide solar cell epitaxial wafer is from bottom to top Ge substrate, bottom cell, buffer layer, middle bottom superlattice tunnel junction, DBR, middle cell, middle top superlattice tunnel junction, top cell, ohmic contact layer, middle bottom superlattice tunnel junction and middle top superlattice tunnel junction all contain superlattice layer.The present application is optimized by structure, aims at traditional solar cell P-N-N + Structure is optimized on the basis of tunnel junction structure, so that the current matching between cells is more optimal, and the overall photoelectric conversion efficiency of the device can be improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a three-junction gallium arsenide solar cell epitaxial wafer and a preparation method thereof. BACKGROUND

[0002] As the most industrialized and efficient photovoltaic technology, three-junction gallium arsenide solar cells have been widely used in the main power systems of spacecraft such as satellites and deep space probes. Its core advantages are reflected in three aspects: first, high specific power, that is, a larger power provided per unit weight, which helps to reduce the launch load of the spacecraft; second, super-high conversion efficiency, which can generate more power on a limited solar panel area to support more complex scientific payloads; third, excellent radiation resistance, which ensures the long-term stable operation of the spacecraft in the extreme environment of space. With the development of space technology, the requirements for the performance of three-junction gallium arsenide solar cells, such as spectral response and current matching, photoelectric conversion efficiency, etc., are also getting higher and higher, therefore, it is of great significance to develop a solar cell epitaxial wafer that can improve the performance of solar cells. SUMMARY

[0003] In view of the deficiencies of the prior art, the present application provides a three-junction gallium arsenide solar cell epitaxial wafer and a preparation method thereof, which aims to optimize the tunnel junction structure on the basis of the traditional solar cell P-N-N + structure, so that the current matching between the cells is more optimal, and the overall photoelectric conversion efficiency of the device can be improved.

[0004] The present application aims to provide a three-junction gallium arsenide solar cell epitaxial wafer, which comprises, from bottom to top, a Ge substrate, a bottom cell, a buffer layer, a middle-bottom superlattice tunnel junction, a DBR, a middle cell, a middle-top superlattice tunnel junction, a top cell, and an ohmic contact layer.

[0005] The middle-bottom superlattice tunnel junction and the middle-top superlattice tunnel junction both contain a superlattice layer.

[0006] The material of the middle-bottom superlattice tunnel junction is N-AlGaAs / first superlattice layer / P-GaAs.

[0007] The material of the middle-top superlattice tunnel junction is N-Al x1 GaInP / second superlattice layer / P-Al y1 GaInP, wherein 0.3≤x1<0.9 and 0.1≤y1<0.3.

[0008] The application replaces the tunnel junction structure of the traditional solar cell with a superlattice tunnel junction, uses the quantum resonance tunneling effect of the superlattice tunnel junction, significantly improves the tunneling current density per unit area, ensures high-efficiency and low-loss carrier transport under high light intensity conditions, thereby improving the fill factor and maximum output power of the cell, and realizes current matching and overall photoelectric conversion efficiency.

[0009] Further, the material of the first superlattice layer is GaAs / AlGaAs alternately grown and periodically changed, the periodicity is 3 pairs to 5 pairs, the total thickness is 1nm to 10nm, the thickness of the N-AlGaAs is 20±2nm, and the thickness of the P-GaAs is 20±2nm.

[0010] Further, the material of the second superlattice layer is Al y1 GaInP / Al x1 GaInP alternately grown and periodically changed, the periodicity is 3 pairs to 5 pairs, the total thickness is 1nm to 10nm, the thickness of the N-Al x1 GaInP is 20±2nm, and the thickness of the P-Al y1 GaInP is 20±2nm, wherein 0.3≤x1<0.9 and 0.1≤y1<0.3.

[0011] The traditional tunnel junction uses an N-GaInP / P-AlGaAs heterojunction to reduce light absorption, and there are lattice mismatches and interface defects at the arsenide / phosphide interface, resulting in non-radiative recombination and photon loss. The application uses a homogeneous structure, the material lattice matching degree is high, the interface defects are significantly inhibited from being formed, the recombination current is reduced, and the photon utilization efficiency of the tunnel junction is improved; meanwhile, through energy band engineering design, the material and thickness of each layer of the superlattice are accurately controlled, so that the effective band gap is greater than the band gap of the top cell (Al) GaInP, so that the specific band of photons that would be absorbed by the tunnel junction can be transmitted to the middle cell without loss, thereby improving the photon capture capability of the middle cell and the bottom cell, improving the short-circuit current density, realizing better current matching and overall photoelectric conversion efficiency.

[0012] Further, the material of the buffer layer is InGaAs; the material of the DBR is periodic In x2 GaAs / In y2 AlGaAs, the periodicity is greater than 5 pairs, and 0.01≤x2≤0.10 and 0.01≤y2≤0.10.

[0013] Further, the middle cell includes a base region, an emission region and a window layer, the material of the base region is In x3GaAs, wherein 0.01<=x3<=0.10, the total thickness of the base region and the emission region is 1.2-2.5um, the material of the window layer is AlInP or GaInP, and the thickness of the window layer is 0.05-0.2um.

[0014] Further, the top cell is composed of a back electric field, a GaInP base region, a GaInP emission region and an AlInP window layer, the material of the back electric field is Al x4 GaInP, wherein 0.15<=x4<=0.4.

[0015] Further, the material of the ohmic contact layer is In x5 GaAs, the thickness is 0.4-0.6um, wherein 0<=x5<=0.10.

[0016] The application further provides a preparation method of the three-junction gallium arsenide solar cell epitaxial wafer, which specifically comprises the following steps:

[0017] S1. growing a bottom cell on a Ge substrate by epitaxy;

[0018] S2. growing a buffer layer on the bottom cell;

[0019] S3. growing a middle-bottom superlattice tunnel junction on the buffer layer;

[0020] S4. growing a DBR on the middle-bottom superlattice tunnel junction;

[0021] S5. growing a middle cell on the DBR;

[0022] S6. growing a middle-top superlattice tunnel junction on the middle cell;

[0023] S7. growing a top cell on the middle-top superlattice tunnel junction;

[0024] S8. growing an ohmic contact layer on the top cell.

[0025] Further, the lattice constant of the top cell matches the lattice constant of the middle cell.

[0026] Compared with the prior art, the application has the following beneficial effects:

[0027] The application optimizes the structure, and the traditional P-N-N +The tunnel junction of the structure is replaced by a superlattice tunnel junction, the superlattice tunnel junction has high tunnel current density, and the filling factor and maximum output power of the battery can be obviously improved; meanwhile, through band engineering regulation and control, the materials and thickness of each layer of the superlattice are accurately controlled, the parasitic light absorption is effectively reduced, and the photon capture efficiency of the middle and bottom cells is enhanced, so that the short-circuit current density is improved. The optimization of the structure of the present application realizes better current matching between the cells, and comprehensively improves the overall photoelectric conversion efficiency of the device. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 It is a structure schematic diagram of the epitaxial wafer of the three-junction gallium arsenide solar cell.

[0029] Label explanation in the schematic diagram:

[0030] 1, Ge substrate; 2, bottom cell; 3, buffer layer; 4, middle-bottom superlattice tunnel junction; 5, DBR; 6, middle cell; 7, middle-top superlattice tunnel junction; 8, top cell; 9, ohmic contact layer. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The description of the at least one exemplary embodiment is actually only illustrative, but not as any limitation on the present application and its application or use. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0032] In the description of the present application, it should be understood that the use of the words "first", "second" and the like to qualify elements is only for the convenience of distinguishing the corresponding elements, and the above words have no special meaning unless otherwise stated, and therefore cannot be understood as limiting the scope of protection of the present application.

[0033] In the description of the present application, it should be understood that the orientation words such as "front, back, up, down, left, right", "horizontal, vertical, perpendicular, horizontal" and "top, bottom" and the like indicate the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and in the absence of the opposite description, these orientation words do not indicate and imply that the indicated device or element must have a specific orientation or be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the scope of protection of the present application; the orientation words "inner, outer" refer to the inner and outer of the contour of each component itself.

[0034] Please refer to Figure 1It should be noted that the diagram provided in the embodiment only schematically illustrates the basic concept of the present application, and only the components related to the present application are shown in the diagram, rather than being drawn according to the number, shape and size of the components in actual implementation. The shape, number and proportion of each component in actual implementation can be arbitrarily changed, and the component layout form can be more complex.

[0035] An embodiment of the present application provides a triple-junction gallium arsenide solar cell epitaxial wafer, a structural schematic diagram of which is shown in the figure. Figure 1 The triple-junction gallium arsenide solar cell epitaxial wafer sequentially comprises a Ge substrate 1, a bottom cell 2, a buffer layer 3, a middle-bottom superlattice tunnel junction 4, a DBR 5, a middle cell 6, a middle-top superlattice tunnel junction 7, a top cell 8 and an ohmic contact layer 9 from bottom to top. By replacing the traditional tunnel junction with the superlattice tunnel junction, the quantum resonance tunneling effect is utilized, the tunneling current density is significantly improved, the series resistance under high light intensity conditions is effectively reduced, the carrier transport efficiency is improved, and thus the fill factor and the maximum output power of the cell are improved.

[0036] In some specific embodiments, the bottom cell comprises an emission region and a nucleation region, and the material of the nucleation region is GaInP or AlGaInP, and the nucleation region also serves as a window layer of the bottom cell.

[0037] In some specific embodiments, the material of the buffer layer is InGaAs.

[0038] In some specific embodiments, the material of the middle-bottom superlattice tunnel junction is N-AlGaAs / first superlattice layer / P-GaAs, the material of the first superlattice layer is GaAs / AlGaAs which is alternately grown and periodically changed, the period number is 3 pairs to 5 pairs, the total thickness is 1 nm to 10 nm, the thickness of the N-AlGaAs is 20±2 nm, and the thickness of the P-GaAs is 20±2 nm.

[0039] In some specific embodiments, the material of the DBR is periodic In x2 GaAs / In y2 AlGaAs with a period number greater than 5 pairs, wherein 0.01≤x2≤0.10 and 0.01≤y2≤0.10.

[0040] In some specific embodiments, the middle cell comprises a base region, an emission region and a window layer, the material of the base region is In x3 GaAs, wherein 0.01≤x3≤0.10, the total thickness of the base region and the emission region is 1.2 μm to 2.5 μm, and the material of the window layer is AlInP or GaInP, and the thickness of the window layer is 0.05 μm to 0.2 μm.

[0041] In some embodiments, the material of the middle top superlattice tunnel junction is N-Al x1 GaInP / second superlattice layer / P-Al y1 GaInP, the material of the second superlattice layer is Al y1 GaInP / Al x1 GaInP, the period number is 3 pairs to 5 pairs, the total thickness is 1 nm to 10 nm, wherein 0.3≤x1<0.9, 0.1≤y1<0.3, the N-Al x1 GaInP, the thickness of the P-Al y1 GaInP, the thickness of the P-Al By using AlGaInP homostructure superlattice, the material lattice matching degree is high, the interface defect formation is significantly inhibited, the recombination current is reduced, and the photon utilization efficiency of the tunnel junction is improved. Meanwhile, by adjusting the material and thickness of each layer of the superlattice, the effective band gap is greater than the band gap of the top cell, the photons transmitted from the top cell and having energy between the band gaps of the top cell and the middle cell can pass through the tunnel junction without loss and be absorbed by the middle cell with high efficiency, so that the short-circuit current density of the middle cell is improved, and the spectral response and current matching performance of the full cell are optimized.

[0042] In some embodiments, the top cell is composed of a back electric field, a GaInP base region, a GaInP emission region and an AlInP window layer, the material of the back electric field is Al x4 GaInP, wherein 0.15≤x4≤0.4.

[0043] In some embodiments, the material of the ohmic contact layer is In x5 GaAs, the thickness is 0.4 μm to 0.6 μm, wherein 0≤x5≤0.10.

[0044] Some embodiments of the application provide a preparation method of a three-junction gallium arsenide solar cell epitaxial wafer, specifically comprising the following steps:

[0045] S1. A bottom cell is epitaxially grown on a Ge substrate; specifically, a MOCVD process is used, a bottom cell emission region is formed by PH3 diffusion at high temperature on a Ge substrate, and then a GaInP or AlGaInP nucleation layer is grown, which simultaneously serves as a window layer of the bottom cell;

[0046] S2. A buffer layer is grown on the bottom cell; specifically, the material of the buffer layer is InGaAs;

[0047] S3. Growing a middle-bottom superlattice tunnel junction on the buffer layer; in particular, the middle-bottom superlattice tunnel junction is N-AlGaAs / first superlattice layer / P-GaAs, the first superlattice layer is GaAs / AlGaAs material alternately grown and periodically changed, the periodicity is 3 pairs to 5 pairs, the total thickness is 1 nm to 10 nm, the thickness of the N-AlGaAs is 20±2 nm, and the thickness of the P-GaAs is 20±2 nm;

[0048] S4. Growing a DBR on the middle-bottom superlattice tunnel junction; in particular, the DBR is periodic In x2 GaAs / In y2 AlGaAs material, the number of periods is greater than 5 pairs, wherein 0.01≤x2≤0.10, 0.01≤y2≤0.10;

[0049] S5. Growing a middle cell on the DBR; in particular, the middle cell comprises a base region, an emission region and a window layer, the material of the base region is In x3 GaAs, wherein 0.01≤x3≤0.10, the total thickness of the base region and the emission region is 1.2 μm to 2.5 μm, the material of the window layer is AlInP or GaInP, and the thickness of the window layer is 0.05 μm to 0.2 μm;

[0050] S6. Growing a middle-top superlattice tunnel junction on the middle cell; the middle-top superlattice tunnel junction is N-Al x1 GaInP / second superlattice layer / P-Al y1 GaInP, the second superlattice layer is Al y1 GaInP / Al x1 GaInP material, the periodicity is 3 pairs to 5 pairs, the total thickness is 1 nm to 10 nm, wherein 0.3≤x1<0.9, 0.1≤y1<0.3, the thickness of the N-Al x1 GaInP is 20±2 nm, and the thickness of the P-Al y1 GaInP is 20±2 nm;

[0051] S7. Growing a top cell on the middle-top superlattice tunnel junction; in particular, the lattice constant of the top cell matches the lattice constant of the middle cell, and the top cell is composed of an Al x4 GaInP back electric field, a GaInP base region, a GaInP emission region and an AlInP window layer, wherein 0.15≤x4≤0.4;

[0052] S8. Growing an ohmic contact layer on the top cell; in particular, the material of the ohmic contact layer is In x5GaAs, thickness is 0.4-0.6 μm, wherein 0≤x5≤0.10.

[0053] In order to further illustrate the present application, a preparation method of a three-junction gallium arsenide solar cell epitaxial wafer is described in detail below in combination with specific examples.

[0054] Example 1

[0055] A preparation method of a three-junction gallium arsenide solar cell epitaxial wafer, specifically comprising the following steps:

[0056] S1. Using MOCVD process, a bottom cell is epitaxially grown on a Ge substrate, a bottom cell emitter region is formed by PH3 diffusion at high temperature, and then a GaInP or AlGaInP nucleation layer is grown, which simultaneously serves as a window layer of the bottom cell;

[0057] S2. In 0.01 GaAs buffer layer is grown on the bottom cell;

[0058] S3. A middle-bottom superlattice tunnel junction is grown on the buffer layer, the middle-bottom superlattice tunnel junction is N-AlGaAs / first superlattice layer / P-GaAs, the first superlattice layer is 4 pairs of GaAs / AlGaAs materials alternately grown and periodically changed, the thickness of GaAs is 1 nm, the thickness of AlGaAs is 1 nm, the thickness of N-AlGaAs is 20 nm, and the thickness of P-GaAs is 20 nm;

[0059] S4. DBR is grown on the middle-bottom superlattice tunnel junction, the DBR is periodic In 0.01 GaAs / In 0.01 AlGaAs material, and the number of periods is greater than 5 pairs;

[0060] S5. A middle cell is grown on the DBR, the middle cell comprises In 0.01 GaAs base region, emitter region and window layer, the total thickness of the base region and the emitter region is 1.2 μm, the material of the window layer is AlInP, and the thickness of the window layer is 0.05 μm;

[0061] S6. A middle-top superlattice tunnel junction is grown on the middle cell, the middle-top superlattice tunnel junction is N-Al 0.3 GaInP / second superlattice layer / P-Al 0.1 GaInP, the second superlattice layer is 4 pairs of Al 0.1 GaInP / Al 0.3 GaInP alternately grown and periodically changed, and the thickness of Al 0.1 GaInP is 1 nm, and the thickness of Al 0.3GaInP is 1 nm, the N-Al 0.3 GaInP is 20 nm, the P-Al 0.1 GaInP is 20 nm;

[0062] S7. A top cell is grown on the middle-top superlattice tunnel junction, the lattice constant of the top cell matches the lattice constant of the middle cell, and the top cell includes an Al 0.15 GaInP back electric field, GaInP base region, GaInP emission region, and AlInP window layer;

[0063] S8. An ohmic contact layer is grown on the top cell, the material of the ohmic contact layer is GaAs, and the thickness is 0.4 μm.

[0064] Embodiment 2

[0065] A preparation method of a three-junction gallium arsenide solar cell epitaxial wafer, specifically including the following steps:

[0066] S1. A bottom cell is epitaxially grown on a Ge substrate by using a MOCVD process, the bottom cell emission region is formed by PH3 diffusion at high temperature, and then a GaInP or AlGaInP nucleation layer is grown, which simultaneously serves as a window layer of the bottom cell;

[0067] S2. In 0.01 GaAs buffer layer;

[0068] S3. The middle-bottom superlattice tunnel junction is N-AlGaAs / first superlattice layer / P-GaAs, the first superlattice layer is 3 pairs of alternately grown and periodically changed GaAs / AlGaAs materials, the thickness of GaAs is 1 nm, the thickness of AlGaAs is 1 nm, the thickness of the N-AlGaAs is 20 nm, and the thickness of the P-GaAs is 20 nm;

[0069] S4. A DBR is grown on the middle-bottom superlattice tunnel junction, the DBR is a periodic In 0.01 GaAs / In 0.01 AlGaAs material, and the period number is greater than 5 pairs;

[0070] S5. A middle cell is grown on the DBR, the middle cell includes an In 0.01 GaAs base region, emission region, and window layer, the total thickness of the base region and the emission region is 2.5 μm, the material of the window layer is GaInP, and the thickness of the window layer is 0.2 μm;

[0071] S6. A middle-top superlattice tunnel junction is grown on the middle cell, the middle-top superlattice tunnel junction is N-Al 0.35GaInP / second superlattice layer / P-Al 0.15 GaInP, the second superlattice layer is 3 pairs of alternately grown and periodically changed Al 0.15 GaInP / Al 0.35 GaInP, and Al 0.15 GaInP, the thickness of Al 0.35 GaInP, the thickness of N-Al 0.35 GaInP, the thickness of P-Al 0.15 GaInP, the thickness of P-Al

[0072] S7. Growing a top cell on the middle top superlattice tunnel junction, the lattice constant of the top cell matches the lattice constant of the middle cell, and the material of the top cell is Al 0.1 GaInP back electric field, GaInP base region, GaInP emission region and AlInP window layer;

[0073] S8. Growing an ohmic contact layer on the top cell, the material of the ohmic contact layer is In 0.01 GaAs, the thickness is 0.6 μm.

[0074] In summary, the present application optimizes the tunnel junction structure, and the prepared solar cell epitaxial wafer exhibits excellent electrical and optical performance, the designed superlattice tunnel junction has high tunneling current density, which can significantly improve the fill factor and maximum output power of the cell; at the same time, through the band engineering regulation, the structure can effectively reduce the absorption of parasitic light and enhance the photon capture efficiency of the middle and bottom cells, thereby improving the short-circuit current density; finally, the current matching between the cells is better, which can comprehensively improve the overall photoelectric conversion efficiency of the device.

[0075] Finally, it needs to be emphasized that the above only describes the preferred embodiments of the present application, and is not used to limit the present application. For those skilled in the art, the present application can have various changes and modifications, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A triple-junction gallium arsenide solar cell epitaxial wafer, characterized in that, The triple-junction gallium arsenide solar cell epitaxial wafer consists of, from bottom to top, a Ge substrate, a bottom cell, a buffer layer, a middle-bottom superlattice tunneling junction, a DBR, a middle cell, a middle-top superlattice tunneling junction, a top cell, and an ohmic contact layer. Both the bottom superlattice tunnel junction and the top superlattice tunnel junction contain a superlattice layer; The material of the mid-bottom superlattice tunnel junction is N-AlGaAs / first superlattice layer / P-GaAs; The material of the mid-top superlattice tunnel junction is N-Al. x1 GaInP / Second Superlattice Layer / P-Al y1 GaInP, where 0.3≤x1<0.9, 0.1≤y1<0.3; The material of the first superlattice layer is GaAs / AlGaAs that grows alternately and varies periodically, with 3 to 5 pairs of periodicity and a total thickness of 1 nm to 10 nm. The thickness of the N-AlGaAs is 20 ± 2 nm and the thickness of the P-GaAs is 20 ± 2 nm. The second superlattice layer is made of Al that is grown alternately and periodically. y1 GaInP / Al x1 GaInP, with 3 to 5 pairs of phase pairs and a total thickness of 1 nm to 10 nm, the N-Al x1 The thickness of GaInP is 20±2nm, and the P-Al y1 The thickness of GaInP is 20±2nm.

2. The triple-junction gallium arsenide solar cell epitaxial wafer according to claim 1, characterized in that, The buffer layer is made of InGaAs; the DBR is made of periodic In... x2 GaAs / In y2 AlGaAs, with more than 5 pairs of periods, where 0.01≤x2≤0.10 and 0.01≤y2≤0.

10.

3. The triple-junction gallium arsenide solar cell epitaxial wafer according to claim 1, characterized in that, The battery comprises a base region, an emitter region, and a window layer, wherein the base region is made of In. x3 The material is GaAs, where 0.01≤x3≤0.10, the total thickness of the base region and emitter region is 1.2μm~2.5μm, the material of the window layer is AlInP or GaInP, and the thickness of the window layer is 0.05μm~0.2μm.

4. The triple-junction gallium arsenide solar cell epitaxial wafer according to claim 1, characterized in that, The top-mounted solar cell consists of a back electric field, a GaInP base region, a GaInP emitter region, and an AlInP window layer. The material of the back electric field is Al. x4 GaInP, where 0.15≤x4≤0.

4.

5. The triple-junction gallium arsenide solar cell epitaxial wafer according to claim 1, characterized in that, The material of the ohmic contact layer is In. x5 GaAs with a thickness of 0.4μm to 0.6μm, where 0≤x5≤0.

10.

6. A method for preparing a triple-junction gallium arsenide solar cell epitaxial wafer according to any one of claims 1 to 5, characterized in that, The preparation method specifically includes the following steps: S1. Epitaxial growth of a bottom cell on a Ge substrate; S2. A buffer layer is grown on the bottom cell; S3. Growth of a mid-to-bottom superlattice tunnel junction on a buffer layer; S4. Growth of DBR on mid-bottom superlattice tunnel junction; S5. Cells are grown on DBR; S6. Growth of a mid-top superlattice tunnel junction on a mid-cell; S7. Growing a top cell on a mid-top superlattice tunnel junction; S8. An ohmic contact layer is grown on the top cell.

7. The method for preparing a triple-junction gallium arsenide solar cell epitaxial wafer according to claim 6, characterized in that, The lattice constant of the top cell matches the lattice constant of the middle cell.

Citation Information

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