Packaging structure and forming method thereof

By attaching metal blocks to a stainless steel carrier plate and forming a plastic seal, then removing the carrier plate and grinding to form pins, the problem of fixed pin positions in the prior art is solved, enabling free design of the number and position of pins, improving product adaptability and reducing material costs.

CN121358285APending Publication Date: 2026-01-16JCET GROUP CO LTD +1
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Patent Information

Application Number
CN202511801356.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-02
Publication Date
2026-01-16

AI Technical Summary

Technical Problem

In existing stainless steel substrate packaging processes, the pin positions are fixed, resulting in poor product compatibility and high material costs.

Method used

We provide a metal carrier plate, mount the metal block and form a plastic seal, then remove the carrier plate and form the pins by grinding, which simplifies the design and reduces the cost of incoming materials.

Benefits of technology

It allows for free design of the number and location of pins, improving product adaptability, reducing verification time, and lowering incoming material costs.

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Abstract

The invention discloses a packaging structure and a forming method thereof, and the forming method of the packaging structure comprises the steps: providing a metal carrier plate; providing at least two metal blocks, and mounting the metal blocks on the surface of the metal carrier plate; providing a semiconductor chip, and inversely mounting the semiconductor chip on the top surface of the metal block; forming a plastic package layer covering the metal block and the semiconductor chip on the metal carrier plate; removing the metal carrier plate to expose the bottom surface of the plastic package layer; and grinding the plastic package layer and the metal block along the bottom surface of the plastic package layer to form a pin. According to the method, the pins can be freely designed, the adaptability of products is improved, the incoming material cost is reduced, and the method can be used for verification of new products with frames.
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Description

Technical Field

[0001] This application relates to the field of semiconductor packaging, and more particularly to a packaging structure and a method for forming the same. Background Technology

[0002] Stainless steel substrate packaging technology, with its superior thermal management, mechanical stability, and designability, is becoming an important development direction in the field of advanced packaging. The technology has now moved from the laboratory to mass production, showing significant advantages, particularly in large-size panel-level packaging and high-power devices.

[0003] When using stainless steel substrates as temporary substrates, pins (such as Au, Ni, and Ag stacked pins) are pre-fabricated on the incoming stainless steel substrate. Then, the corresponding packaging process is performed on the substrate. Specifically, a semiconductor chip is flip-chip mounted onto the pins, followed by the formation of a molding compound covering the semiconductor chip and pins. Finally, the stainless steel substrate is removed, exposing the pins. In this packaging method, the pin positions are fixed, resulting in poor product compatibility. Furthermore, the pre-fabricated pins on the stainless steel substrate lead to higher raw material costs. Summary of the Invention

[0004] The purpose of this application is to provide a packaging structure and a method for forming the same, which allows for free design of pins, improves product adaptability, and reduces material costs. To achieve the above objectives, embodiments of this application provide a method for forming an encapsulation structure, including: Provide metal carrier plates; Provide at least two metal blocks and attach the metal blocks to the surface of the metal carrier plate; A semiconductor chip is provided, and the semiconductor chip is flip-chip mounted on the top surface of the metal block; A molding compound is formed on the metal substrate to encapsulate the metal block and the semiconductor chip; Remove the metal carrier plate to expose the bottom surface of the molding layer; Grinding is performed along the bottom surface of the molding layer and the metal block to form pins.

[0005] In some embodiments of this application, the metal block has a square cross-sectional shape along a direction perpendicular to the surface of the metal carrier plate.

[0006] In some embodiments of this application, the metal block has a "T"-shaped cross-section along a direction perpendicular to the surface of the metal carrier plate. The "T"-shaped metal block includes a first end and a second end opposite to each other, and the size of the first end is smaller than the size of the second end.

[0007] In some embodiments of this application, when the metal block is attached to the surface of the metal carrier plate, the first end of the "T"-shaped metal block contacts the metal carrier plate, and the second end contacts the semiconductor chip.

[0008] In some embodiments of this application, the process of preparing the "T"-shaped metal block includes: providing a metal sheet; A photosensitive thin film is attached to the surface of a metal sheet; The photosensitive film is exposed and developed to form several openings in the photosensitive film that expose the surface of the metal sheet. The metal sheet is etched along the opening to form a plurality of grooves in the metal sheet. The metal sheet is cut from the groove to form several separate "T"-shaped metal blocks.

[0009] In some embodiments of this application, the material of the metal sheet includes one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni.

[0010] In some embodiments of this application, when the metal sheet is cut from the groove, the size of the cut is smaller than the size of the groove.

[0011] In some embodiments of this application, the process of cutting the metal sheet from the groove is a blade cutting process.

[0012] In some embodiments of this application, etching the metal sheet along the opening can be performed using either dry etching or wet etching.

[0013] In some embodiments of this application, the material of the metal carrier plate includes stainless steel.

[0014] In some embodiments of this application, the metal block is attached to the surface of the metal carrier plate using an adhesive film.

[0015] In some embodiments of this application, when grinding the molding layer and the metal block along the bottom surface of the molding layer, the adhesive film is also removed by grinding.

[0016] In some embodiments of this application, the semiconductor chip includes an active side and a back side facing each other, the active side having a plurality of pads, and when the semiconductor chip is flip-chip mounted on the top surface of the metal block, the active side of the semiconductor chip faces the top surface of the metal block.

[0017] In some embodiments of this application, when the semiconductor chip is flip-mounted onto the top surface of the metal block, the pads on the active surface of the semiconductor chip are soldered to the top surface of the metal substrate through solder protrusions.

[0018] In some embodiments of this application, when grinding the molding layer and the metal block, the molding layer and the metal block are ground to a target thickness, and the remaining metal block after grinding is used as the pin; Grinding the plastic sealant and the metal block includes chemical mechanical polishing or grinding wheel grinding.

[0019] In some embodiments of this application, when the metal blocks are attached to the surface of the metal carrier plate, the number and position of the attached metal blocks may correspond to the number and position of the pins on the frame of the product to be verified.

[0020] This application also provides a packaging structure, including: Metal carrier plate; At least two metal blocks are attached to the surface of the metal carrier plate; A semiconductor chip, wherein the semiconductor chip is flip-mounted on the top surface of the metal block; A molding compound is formed on the metal substrate to encapsulate the metal block and the semiconductor chip.

[0021] In some embodiments of this application, the metal block has a square cross-sectional shape along a direction perpendicular to the surface of the metal carrier plate.

[0022] In some embodiments of this application, the metal block has a "T"-shaped cross-section along a direction perpendicular to the surface of the metal carrier plate. The "T"-shaped metal block includes a first end and a second end opposite to each other, and the size of the first end is smaller than the size of the second end.

[0023] In some embodiments of this application, when the metal block is attached to the surface of the metal carrier plate, the first end of the "T"-shaped metal block contacts the metal carrier plate, and the second end contacts the semiconductor chip.

[0024] In some embodiments of this application, the material of the metal block includes one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni.

[0025] In some embodiments of this application, the material of the metal carrier plate includes stainless steel.

[0026] In some embodiments of this application, an adhesive film is present between the surface of the metal block and the surface of the metal carrier plate.

[0027] In some embodiments of this application, the semiconductor chip includes an active surface and a back surface facing each other, the active surface having a plurality of pads, and the active surface of the semiconductor chip facing the top surface of the metal block.

[0028] In some embodiments of this application, the pads on the active surface of the semiconductor chip are soldered to the top surface of the metal substrate via solder bumps; The number and location of the mounted metal blocks can correspond to the number and location of pins on the frame of the product to be verified.

[0029] The beneficial effects of this application are: The packaging structure and its forming method disclosed in this application include: providing a metal substrate; providing at least two metal blocks and mounting the metal blocks onto the surface of the metal substrate; providing a semiconductor chip and flip-chip mounting the semiconductor chip onto the top surface of the metal blocks; forming a molding compound layer on the metal substrate covering the metal blocks and the semiconductor chip; removing the metal substrate to expose the bottom surface of the molding compound layer; and grinding the molding compound layer and the metal blocks along the bottom surface of the molding compound layer to form pins. In this application, since the metal substrate surface is not pre-prepared with pins, the pins are formed after mounting the metal blocks onto the metal substrate, forming the molding compound layer, removing the metal substrate, and grinding. That is, the step of mounting the metal blocks is performed at the packaging factory, rather than at the metal substrate fabrication stage, thereby simplifying the design of the metal substrate and reducing the cost of incoming materials. Therefore, in this application, after the metal substrate arrives at the packaging factory, the designer can design the number and mounting position of the metal blocks according to the needs of different products, thereby preparing pins that meet the needs of different products. The number and position of pins can be freely designed to improve the adaptability of the product, unlike the existing incoming metal substrates with pins, whose pin positions and numbers are fixed and cannot meet the application needs of different products at the packaging factory. Furthermore, the packaging structure prepared by the aforementioned steps in this application can be used for routine new product introduction verification. Since the procurement cycle of frames with pins is long and the cost is high, the method of this application allows the number and position of the metal blocks to correspond to the number and position of the pins on the frame of the product to be verified. After grinding, the number and position of the pins formed in this application correspond to (or are the same as) the number and position of the pins on the frame of the product to be verified. Therefore, the method of this application can directly produce a packaging structure corresponding to the product with a frame in the packaging factory for verification (including reliability verification, electrical performance verification, mechanical stability verification, etc.) and reduce verification time. Attached Figure Description

[0030] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In addition, in the following drawings, the components are not necessarily drawn to scale, and components with similar related characteristics or features may have the same or similar reference numerals.

[0031] Figure 1 This is a schematic diagram of the process for forming the encapsulation structure provided in some embodiments of this application; Figure 2 This is a schematic cross-sectional view of the packaging structure formed by providing a metal carrier plate and attaching a metal block in some embodiments of this application. Figure 3 This is a schematic cross-sectional view of the flip-chip semiconductor chip in the method for forming the packaging structure provided in some embodiments of this application; Figure 4 This is a schematic cross-sectional view of the encapsulation layer after it has been formed in the method for forming the encapsulation structure provided in some embodiments of this application; Figure 5 This is a schematic diagram of the structure after removing the metal carrier plate in the method of forming the packaging structure provided in some embodiments of this application; Figure 6 This is a schematic diagram of the structure after grinding in the method of forming the packaging structure provided in some embodiments of this application; Figure 7 This is a schematic diagram of the structure after a metal sheet is provided in the method for forming the packaging structure provided in some embodiments of this application; Figure 8 This is a schematic diagram of the structure of the photosensitive thin film after exposure and development in the method for forming the packaging structure provided in some embodiments of this application; Figure 9 This is a schematic diagram of the structure after etching the metal sheet along the opening in a method for forming the packaging structure provided in some embodiments of this application; Figure 10 This is a schematic diagram of the structure after cutting the metal sheet along the groove in a method for forming the packaging structure provided in some embodiments of this application; Figure 11 This is a schematic diagram of the structure after forming the molding layer in the method of forming the encapsulation structure provided in some embodiments of this application; Figure 12 This is a schematic diagram of the structure after grinding in the method of forming the packaging structure provided in some embodiments of this application. Detailed Implementation

[0032] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0033] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this application's specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0034] In the description of this application, it should be noted that the use of terms such as "first" and "second" to define objects (such as elements, components, regions, layers, doping types and / or parts) is merely for the purpose of distinguishing different objects and is not necessarily used to describe a specific order or sequence. Unless the context clearly indicates otherwise, it should be understood that such data can be used interchangeably where appropriate.

[0035] In the description of this application, it should be understood that the singular forms “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “compose” and / or “comprise” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0036] In the description of this application, it should also be noted that when a component is referred to as "on another component," "connected to another component," or "in contact with another component," it can mean not only that a component is directly on, directly connected to, or directly in contact with another component, but also that an intermediate component can be inserted between the two components. Furthermore, "connection" includes not only fixed connections but also detachable connections or integral connections. Similarly, when an element is referred to as "electrically connected," "electrically contacted," "electrically coupled," or "electrically coupled to" another element, the two elements can be in direct electrical contact or point coupling, or they can be in electrical contact or point coupling through an intermediate component.

[0037] In the description of this application, it should also be noted that the orientation or positional relationship indicated by directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" is usually based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this application and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this application; the directional terms "inner" and "outer" refer to the inner and outer contours relative to the outline of each component itself.

[0038] Furthermore, in the description of this application, spatial relation terms such as "below," "under," "below," "below," "below," "above," "on the upper surface of," "above," etc., can be used to describe the spatial positional relationship between one element or feature shown in the figures and other elements or features. It should be understood that spatial relation terms, in addition to the orientation shown in the figures, also include different orientations of elements or features in use and operation. For example, if an element or feature in the figures is flipped or inverted, an element or feature described as "below" or "below" other elements or features will be oriented "above" other elements or features. Furthermore, elements may also include other orientations (e.g., rotated by an angle or other orientations).

[0039] The structure of the embodiments of this application should not be limited to the specific shape shown in the accompanying drawings, but includes shape deviations due to, for example, manufacturing techniques.

[0040] It is understood that in some of the accompanying drawings of this application, adjacent films with the same processing material are drawn as connected to make them resemble the actual structure.

[0041] This application provides a method for forming an encapsulation structure. Figure 1 This is a flowchart illustrating the method for forming the encapsulation structure provided in some embodiments of this application. (Refer to...) Figure 1 The method for forming the encapsulation structure includes the following steps: Step S101: Provide a metal carrier plate 101; provide at least two metal blocks 102, and attach the metal blocks 102 to the surface of the metal carrier plate 101; Step S102: Provide a semiconductor chip 104 and flip-mount the semiconductor chip 104 onto the top surface of the metal block 102; Step S103: A molding layer 106 is formed on the metal carrier plate 101 to cover the metal block 102 and the semiconductor chip 104; Step S104: Remove the metal carrier plate 101 to expose the bottom surface of the molding layer 106; In step S105, the molding layer 106 and the metal block 102 are ground along the bottom surface of the molding layer 106 to form pin 102a.

[0042] The method for forming the packaging structure is described in detail below with reference to the accompanying drawings in some embodiments.

[0043] First, refer to Figure 1 In conjunction with references Figure 2 In step S101, a metal carrier plate 101 is provided; at least two metal blocks 102 are provided, and the metal blocks 102 are attached to the surface of the metal carrier plate 101.

[0044] The metal carrier plate 101 serves as a support carrier in subsequent processes. It is removed after the molding compound layer is formed for reuse. The metal carrier plate 101 possesses high thermal conductivity, high rigidity, high flatness, strong resistance to deformation, and peelability, offering significant advantages in large-size panel-level packaging. In one embodiment, the dimensions of the metal carrier plate 101 are greater than 300mm × 300mm.

[0045] In some embodiments, the metal carrier 101 is made of stainless steel. The stainless steel metal carrier 101 has many advantages, including high thermal conductivity (14-25 W / m·K), which is more than 100 times higher than that of organic substrates; high rigidity and strong resistance to deformation, making it suitable for ultra-thin packaging; high flatness, with surface roughness controllable to Ra<0.05μm; the use of a special coating to achieve separation from the product after packaging, improving material utilization; support for large sizes (maximum 700mm×700mm), which is 8 times the area of ​​traditional wafers; reusability, reducing production costs; and strong corrosion resistance, reducing the risk of thermal runaway.

[0046] The metal block 102 is subsequently used to form the pins of the package structure. The number of metal blocks 102 is at least two. Figure 2 Only two metal blocks 102 are shown in the image as examples for illustration.

[0047] After the metal block 102 is provided, it is mounted onto the surface of the metal carrier 101. The mounting of the metal block 102 is performed at the packaging factory; that is, in this application, the surface of the incoming metal carrier 101 does not have pre-prepared pins to simplify the design of the metal carrier 101 and reduce the cost of incoming materials. In this application, after the metal carrier 101 arrives at the packaging factory, designers can design the quantity and mounting position of the metal blocks 102 according to the needs of different products, thereby preparing pins that meet the needs of different products in subsequent processes. The number and position of pins can be freely designed, improving product adaptability, unlike existing incoming metal carriers with pre-prepared pins, where the position and number of pins are fixed and cannot meet the application needs of different products at the packaging factory.

[0048] In some embodiments, due to the long procurement cycle and high cost of the pin-containing frame, the method of this application, in which the number and position of the metal block 102 are mounted during the aforementioned process, can correspond to the number and position of the pins on the frame of the product to be verified. After subsequent grinding, the number and position of the pins 102a formed in this application correspond to (or are the same as) the number and position of the pins on the frame of the product to be verified. Therefore, the method of this application can directly produce a package structure corresponding to the product with the frame in the packaging factory according to the requirements for verification (including reliability verification, electrical performance verification, mechanical stability verification, etc. of the packaged product), reducing verification time.

[0049] In some embodiments, the metal block 102 is attached to the surface of the metal carrier plate 101 using an adhesive film 103. The adhesive film 103 is adhesive, and when the metal block 102 is attached to the surface of the metal carrier plate 101, the adhesive film 103 adheres the metal block 102 to the surface of the metal carrier plate 101. The adhesive film 103 may include a resin film.

[0050] The metal block 102 can have different shapes, such as in some embodiments. Figure 2 As shown, the cross-sectional shape of the metal block 102 along the direction perpendicular to the surface of the metal carrier plate 101 is square, and the square includes a square or a rectangle.

[0051] In other embodiments, such as Figure 11As shown, the metal block 102 has a "T"-shaped cross-section along the direction perpendicular to the surface of the metal carrier plate 101. The "T"-shaped metal block 102 includes a first end and a second end, the size of the first end being smaller than the size of the second end. When the metal block 102 is attached to the surface of the metal carrier plate 101, the first end of the "T"-shaped metal block 102 contacts the metal carrier plate 101, and the second end contacts the semiconductor chip 104. The contact area between the "T"-shaped metal block 102 and the subsequently formed molding compound 106 is increased, which locks the metal block 102 into the molding compound 106, thereby improving the bonding force between the metal block 102 and the molding compound 106 and increasing the firmness of the metal block 102. After removing the metal carrier plate 101 and grinding the molding compound 106 and the metal block 102, a pin 102a is formed (see reference). Figure 12 After that, the cross-sectional shape of the formed pin 102a is also "T" shaped, which improves the bonding force between the pin 102a and the plastic sealing layer 106 and improves the firmness of the pin 102a.

[0052] The preparation process of the “T”-shaped metal block 102 is described in detail below in some embodiments.

[0053] In some embodiments, the preparation process of the "T"-shaped metal block 102 includes: refer to Figure 7 A metal sheet 201 is provided, and in one example, the material of the metal sheet 201 includes one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni; Continue to refer to Figure 8 A photosensitive film 202 is attached to the surface of a metal sheet 201. The photosensitive film 202 is exposed and developed to form a plurality of openings 203 that expose the surface of the metal sheet 201 in the photosensitive film 202. In one example, the photosensitive film 202 can be attached by a film-attaching process. The photosensitive film 202 includes a photosensitive resin film. refer to Figure 9 The metal sheet 201 is etched along the opening 203, and a plurality of grooves 204 are formed in the metal sheet 201. In one example, the metal sheet 201 can be etched along the opening 203 by dry etching or wet etching. refer to Figure 10 The metal sheet 201 is cut from the groove 204 to form several discrete "T"-shaped metal blocks 102. Then the photosensitive film 202 is removed. In one example, the process of cutting the metal sheet 201 from the groove 204 is a blade cutting process. When cutting the metal sheet 201 from the groove 204, the size of the cut 205 is smaller than the size of the groove 204.

[0054] Next, refer to Figure 1 In conjunction with references Figure 3 In step S102, a semiconductor chip 104 is provided and flip-mounted onto the top surface of the metal block 102.

[0055] The semiconductor chip 104 may include an active side and a back side, the active side having a plurality of pads (not shown in the figure). When the semiconductor chip 104 is flip-chip mounted on the top surface of the metal block 102, the active side of the semiconductor chip 104 faces the top surface of the metal block 102. In one example, the material of the pads is one or more of aluminum, copper, titanium, nickel, tin, tungsten, platinum, chromium, tantalum, gold, and silver.

[0056] In some embodiments, when the semiconductor chip 104 is flip-chip mounted on the top surface of the metal block 102, the pads on the active surface of the semiconductor chip 104 are soldered to the top surface of the metal carrier 101 via solder bumps 105. In one example, the material of the solder bumps 105 is one or more of tin, tin-silver, tin-lead, tin-silver-copper, tin-silver-zinc, tin-zinc, tin-bismuth-indium, tin-indium, tin-gold, tin-copper, tin-zinc-indium, or tin-silver-antimony.

[0057] The number of semiconductor chips 104 flip-chips on the top surface of the metal block 102 can be one or more. Figure 3 The following description uses only one semiconductor chip 104 as an example.

[0058] The semiconductor chip 104 may include logic chips and / or memory chips. In some embodiments, the logic chip may include, but is not limited to, gate arrays, cell substrate arrays, embedded arrays, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), graphics processing units (GPUs), central processing units (CPUs), microprocessor units (MPUs), microcontroller units (MCUs), logic integrated circuits (ICs), application processors (APs), display driver ICs (DDIs), radio frequency (RF) chips, power supply chips, or complementary metal-oxide-semiconductor (CMOS) image sensors. In some embodiments, the memory chip may include, but is not limited to, dynamic random access memory (DRAM), static random access memory (SRAM), magnetoresistive random access memory (MRAM), phase-change memory (PRAM), resistive random access memory (RRAM), or non-volatile memory chips (such as flash memory). In a specific embodiment, the memory chip may include high-bandwidth memory (HBM) containing DRAM chips.

[0059] Next, refer to Figure 1 In conjunction with references Figure 4 or in conjunction with references Figure 11 In step S103, a molding layer 106 is formed on the metal carrier plate 101 to cover the metal block 102 and the semiconductor chip 104.

[0060] The molding compound 106 is used to protect the semiconductor chip 104 and the subsequently formed pins (formed after grinding the metal block 102). In some embodiments, the material of the molding compound 106 can be epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin with or without fillers; or it can be polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyimide, ethylene-vinyl acetate copolymer, or polyvinyl alcohol with fillers. The filler can be inorganic or organic filler. The process for forming the molding compound 106 includes compression molding or transfer molding.

[0061] In some embodiments, an underfill (UF) layer may be formed before the semiconductor chip 104 and the metal substrate 101 before the molding compound 106 is formed.

[0062] Next, refer to Figure 1 In conjunction with references Figure 5 or in conjunction with references Figure 11 Proceed to step S104, remove the metal carrier plate 101 (see reference). Figure 4 This exposes the bottom surface of the molding layer 106.

[0063] The metal carrier plate 101 can be removed by a peeling process, which separates the metal carrier plate 101 from the adhesive film 103 and the molding layer 106.

[0064] Finally, refer to Figure 1 In conjunction with references Figure 6 In step S105, the molding layer 106 and the metal block 102 are ground along the bottom surface of the molding layer 106 to form pin 102a.

[0065] The purpose of grinding is twofold: firstly, to remove excess molding layer 106 and metal block 102 to form pin 102a; and secondly, to planarize the bottom surface of the encapsulation structure and remove the previously formed adhesive film 103 (see reference). Figure 5 ).

[0066] In some embodiments, when grinding the molding layer 106 and the metal block 102 along the bottom surface of the molding layer 106, the adhesive film 103 is simultaneously ground away (see reference). Figure 5 ).

[0067] In some embodiments, grinding the molding layer 106 and the metal block 102 includes chemical mechanical polishing or grinding wheel polishing.

[0068] In some embodiments, when grinding the molding layer 106 and the metal block 102, the molding layer 106 and the metal block 102 are ground to a target thickness, and the remaining metal block 102 after grinding is used as the pin 102a.

[0069] This application uses the aforementioned steps to prepare the packaging structure, achieving the following technical effects: When providing the metal carrier 101, the surface of the metal carrier 101 is not pre-prepared with pins. The pins are formed by mounting metal blocks 102 on the metal carrier 101, forming the molding layer 106, removing the metal carrier 101, and grinding. That is, the step of mounting the metal blocks 102 is performed at the packaging factory, rather than at the preparation end of the metal carrier 101, simplifying the design of the metal carrier 101 and reducing the cost of incoming materials. Therefore, in this application, after the metal carrier 101 arrives at the packaging factory, designers can design the number and mounting position of the metal blocks 102 according to the needs of different products, thereby preparing pins 102a that meet the needs of different products. The number and position of the pins 102a can be freely designed, improving product adaptability, unlike existing incoming metal carriers with pre-prepared pins, where the position and number of pins are fixed and cannot meet the application needs of different products at the packaging factory. This application uses the aforementioned steps to prepare a packaging structure, which can be used for routine new product introduction verification. Since the procurement cycle of frames with pins is long and the cost is high, in the method of this application, when mounting the metal block 102, the number and position of the mounted metal block 102 can correspond to the number and position of the pins on the frame of the product to be verified. After grinding, the number and position of the pins 102a formed in this application correspond to (or are the same as) the number and position of the pins on the frame of the product to be verified. Therefore, using the method of this application, a packaging structure corresponding to the product with a frame can be directly manufactured in the packaging factory according to the requirements for verification (including reliability verification, electrical performance verification, mechanical stability verification, etc. of the packaged product), reducing verification time.

[0070] This application also provides a packaging structure, see reference. Figure 4 Or refer to Figure 11 ,include: Metal carrier plate 101; At least two metal blocks 102 are attached to the surface of the metal carrier plate 101; Semiconductor chip 104, wherein the semiconductor chip 104 is flip-mounted on the top surface of the metal block 102; A molding layer 106 is formed on the metal carrier plate 101 to cover the metal block 102 and the semiconductor chip 104.

[0071] In some embodiments, reference Figure 4 The metal block 102 has a square cross-sectional shape along the direction perpendicular to the surface of the metal carrier plate 101.

[0072] In some embodiments, reference Figure 11The metal block 102 has a "T" shaped cross-section along the direction perpendicular to the surface of the metal carrier plate 101. The "T" shaped metal block 102 includes a first end and a second end opposite to each other, and the size of the first end is smaller than the size of the second end.

[0073] In some embodiments, when the metal block 102 is attached to the surface of the metal carrier plate 101, the first end of the "T"-shaped metal block 102 contacts the metal carrier plate 101, and the second end contacts the semiconductor chip 104. The increased contact area between the "T"-shaped metal block 102 and the molding compound 106 allows the metal block 102 to be locked in the molding compound 106, thereby improving the bonding force between the metal block 102 and the molding compound 106 and increasing the firmness of the metal block 102. Subsequently, after removing the metal carrier plate 101 and grinding the molding compound 106 and the metal block 102 to form the pin 102a, the cross-sectional shape of the formed pin 102a is also "T"-shaped, further improving the bonding force between the pin 102a and the molding compound 106 and increasing the firmness of the pin 102a.

[0074] In some embodiments, the material of the metal block 102 includes one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni.

[0075] In some embodiments, the material of the metal carrier plate 101 includes stainless steel.

[0076] In some embodiments, an adhesive film 103 is provided between the surfaces of the metal block 102 and the metal carrier plate 101.

[0077] In some embodiments, the active surface has a plurality of pads, and the active surface of the semiconductor chip 104 faces the top surface of the metal block 102.

[0078] In some embodiments, the pads on the active surface of the semiconductor chip 104 are soldered to the top surface of the metal carrier 101 via solder protrusions.

[0079] In some embodiments, the number and position of the mounting metal blocks 102 can correspond to the number and position of the pins on the frame of the product to be verified. After grinding, the number and position of the pins 102a formed in this application correspond to (or are the same as) the number and position of the pins on the frame of the product to be verified. Therefore, the method of this application can be used to directly manufacture a package structure corresponding to the product with a frame in the packaging factory for verification (including reliability verification, electrical performance verification, mechanical stability verification, etc. of the packaged product), reducing verification time.

[0080] In the description of this specification, the references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0081] It should be noted that, where there is no conflict, the features in the different embodiments of this application described above can be combined with each other. Furthermore, in each of the above embodiments, the focus is on describing the differences from other embodiments; other specific descriptions of the same / similar parts between the embodiments can be referred to (or referenced) interchangeably. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this application.

[0082] Although this application has been disclosed above with reference to preferred embodiments, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications to the technical solutions of this application by utilizing the methods and techniques disclosed above without departing from the spirit and scope of this application. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall fall within the protection scope of the technical solutions of this application.

Claims

1. A method for forming a package structure, the method comprising: The method comprises: providing a metal carrier plate; providing at least two metal blocks, and attaching the metal blocks to the surface of the metal carrier plate; providing a semiconductor chip, and flip-chip mounting the semiconductor chip on the top surface of the metal blocks; forming a plastic encapsulation layer on the metal carrier plate, and covering the metal blocks and the semiconductor chip; removing the metal carrier plate, and exposing the bottom surface of the plastic encapsulation layer; grinding the plastic encapsulation layer and the metal blocks along the bottom surface of the plastic encapsulation layer, and forming the pins.

2. The method of claim 1, wherein The cross-sectional shape of the metal blocks along the direction perpendicular to the surface of the metal carrier plate is square.

3. The method of claim 1, wherein The cross-sectional shape of the metal blocks along the direction perpendicular to the surface of the metal carrier plate is "T" shape, and the "T" shaped metal blocks comprise opposite first end and second end, and the size of the first end is smaller than the size of the second end.

4. The method of claim 3, wherein When the metal blocks are attached to the surface of the metal carrier plate, the first end of the "T" shaped metal blocks is in contact with the metal carrier plate, and the second end is in contact with the semiconductor chip.

5. The method of claim 3, wherein The preparation process of the "T" shaped metal blocks comprises: providing a metal sheet; attaching a photosensitive film to the surface of the metal sheet; exposing and developing the photosensitive film, and forming a plurality of openings exposing the surface of the metal sheet in the photosensitive film; etching the metal sheet along the openings, and correspondingly forming a plurality of grooves in the metal sheet; 6. The method of claim 5, wherein cutting the metal sheet from the grooves, and forming a plurality of separate "T" shaped metal blocks.

7. The method of claim 5, wherein The material of the metal sheet comprises one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni.

8. The method of claim 7, wherein When the metal sheet is cut from the grooves, the size of the cut is smaller than the size of the groove.

9. The method of claim 5, wherein The process of cutting the metal sheet from the grooves adopts blade cutting process.

10. The method of claim 1, wherein The etching of the metal sheet along the openings can adopt dry etching or wet etching.

11. The method of claim 1, wherein The material of the metal carrier plate comprises stainless steel.

12. The method of claim 11, wherein The metal blocks are attached to the surface of the metal carrier plate through adhesive film.

13. The method of claim 1, wherein When the plastic encapsulation layer and the metal blocks are ground along the bottom surface of the plastic encapsulation layer, the adhesive film is simultaneously removed by grinding.

14. The method of claim 13, wherein The semiconductor chip comprises opposite active surface and back surface, and a plurality of pads are arranged on the active surface, and when the semiconductor chip is flip-chip mounted on the top surface of the metal blocks, the active surface of the semiconductor chip faces the top surface of the metal blocks.

15. The method of claim 1, wherein When the semiconductor chip is flip-chip mounted on the top surface of the metal blocks, the pads on the active surface of the semiconductor chip are welded to the top surface of the metal carrier plate through solder bumps. When the plastic encapsulation layer and the metal blocks are ground, the plastic encapsulation layer and the metal blocks are ground to a target thickness, and the remaining metal blocks after grinding are used as the pins. The grinding of the plastic encapsulation layer and the metal blocks comprises chemical mechanical polishing process or grinding wheel grinding process.

16. The forming method of the package structure according to claim 1, wherein 17. A package structure, comprising: when the metal blocks are attached to the surface of the metal carrier plate, the number and position of the attached metal blocks correspond to the number and position of the pins on the frame in the product to be verified. The method comprises: a metal carrier plate; at least two metal blocks, and the metal blocks are attached to the surface of the metal carrier plate; a semiconductor chip flip-chip mounted on a top surface of the metal block; a plastic encapsulation layer formed on the metal carrier to encapsulate the metal block and the semiconductor chip.

18. The package structure of claim 17, wherein, The metal block has a square shape in a cross section perpendicular to a surface of the metal carrier.

19. The package structure of claim 17, wherein, The metal block has a "T" shape in a cross section perpendicular to a surface of the metal carrier, the "T" shaped metal block includes opposite first and second ends, the first end has a smaller size than the second end.

20. The package structure of claim 19, wherein, When the metal block is mounted on the surface of the metal carrier, the first end of the "T" shaped metal block contacts the metal carrier, and the second end contacts the semiconductor chip.

21. The package structure of claim 17, wherein, The metal block is made of one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni.

22. The package structure of claim 17, wherein, The metal carrier is made of stainless steel.

23. The package structure of claim 17, wherein, An adhesive film is provided between the metal block and the surface of the metal carrier.

24. The package structure of claim 17, wherein, The semiconductor chip includes opposite active and back surfaces, the active surface has a plurality of pads, and the active surface of the semiconductor chip faces the top surface of the metal block.

25. The package structure of claim 24, wherein, The pads on the active surface of the semiconductor chip are soldered to the top surface of the metal carrier by solder bumps. The number and position of the metal blocks correspond to the number and position of the pins on the frame of the product to be verified.