A back contact battery with a specific front structure and its battery assembly

Abstract

This invention belongs to the field of back-contact battery technology, specifically relating to a back-contact battery and its battery assembly with a specific front-side structure. This specific front-side structure includes a tunneling oxide layer and a specifically doped amorphous silicon layer sequentially disposed on the front side of a silicon substrate. Within the specifically doped amorphous silicon layer, a low-doped amorphous silicon layer, a high-doped amorphous silicon layer, and an oxygen-doped amorphous silicon layer are sequentially disposed along the direction away from the tunneling oxide layer. The specifically doped amorphous silicon layer is doped with phosphorus (P) and contains hydrogen (H). The P doping concentration C1 in the low-doped amorphous silicon layer and the P doping concentration C3 in the oxygen-doped amorphous silicon layer are both lower than the P doping concentration C2 in the high-doped amorphous silicon layer. This specific front-side structure enables the back-contact battery to achieve an absorption rate exceeding 85% for incident light within 400 nm. The back-contact battery of this invention maintains good performance even after long-term exposure to ultraviolet light, improving the battery's UV reliability while achieving high transmittance and high battery efficiency.

Description

Technical Field

[0001] This invention belongs to the field of back contact battery technology, specifically relating to a back contact battery with a specific front structure and its battery assembly. Background Technology

[0002] In the field of solar cells, back-contact cells are valued for their high photoelectric conversion efficiency and good UV reliability. With increasing demands on solar cell performance, designing a front-side structure that maintains both high photoelectric conversion efficiency and improved UV reliability has become a key technological challenge. In existing technologies, the front-side structure of back-contact cells often fails to simultaneously meet these two requirements, thus limiting cell performance.

[0003] Currently, to improve the photoelectric conversion efficiency and UV reliability of back-contact batteries, the main measures taken include optimizing the texture design of the front side of the battery, adjusting the passivation layer material, and changing the configuration of the high-absorption layer. For example, by designing specific surface textures, light scattering and absorption can be increased, thereby improving photoelectric conversion efficiency; by selecting specific passivation layer materials, the UV reliability of the battery can be improved; and by configuring a high-absorption layer to block light of specific wavelengths, light loss can be reduced. However, these measures often require compromises between photoelectric conversion efficiency and UV reliability. For example, CN105679843B discloses a front-side structure of a back-contact battery, including a textured surface on the front side of a solar cell

[300] ; a passivation layer

[312] formed on the textured surface on the front side; and a high-absorption layer

[313] formed on the passivation layer

[312] , wherein the high-absorption layer

[313] is configured to block at least 10% of incident light with wavelengths of 400 nm and shorter. This structure is considered to improve the UV reliability of the battery, but because it blocks more than 10% of the incident light, this structure reduces the photoelectric conversion efficiency. Therefore, there is an urgent need in this field to solve how to improve photoelectric conversion efficiency while simultaneously improving UV reliability.

[0004] It should be noted that this part of the present invention only provides background technology related to the present invention, and does not necessarily constitute prior art or known technology. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of existing back-contact battery structures that cannot simultaneously improve photoelectric conversion efficiency and UV reliability. This invention provides a back-contact battery and its battery assembly with a specific front structure. The back-contact battery of this invention can maintain good performance even after long-term exposure to ultraviolet light, improve the UV reliability of the battery, achieve high light transmittance, and also achieve high battery efficiency.

[0006] To achieve the above objectives, in a first aspect, the present invention provides a back contact battery with a specific front structure. The back contact battery includes a silicon substrate. The specific front structure includes a tunneling oxide layer, a specifically doped amorphous silicon layer, and an antireflection layer (with or without a tunneling oxide layer) sequentially disposed on the front side of the silicon substrate. The specifically doped amorphous silicon layer contains a low-doped amorphous silicon layer, a high-doped amorphous silicon layer, and an oxygen-doped amorphous silicon layer sequentially disposed along a direction away from the tunneling oxide layer. The specifically doped amorphous silicon layer is doped with P and contains H. The P doping concentration C1 of the low-doped amorphous silicon layer and the P doping concentration C3 of the oxygen-doped amorphous silicon layer are respectively less than the P doping concentration C2 of the high-doped amorphous silicon layer. This specific front structure enables the back contact battery to achieve a maximum absorption rate of over 85% for incident light within 400 nm.

[0007] In some preferred embodiments of the present invention, in a specific doped amorphous silicon layer, the thickness of the low-doped amorphous silicon layer, the high-doped amorphous silicon layer and the oxygen-doped amorphous silicon layer are each independently 1-5 nm, and / or the thickness of the low-doped amorphous silicon layer is less than the thickness of the high-doped amorphous silicon layer or the oxygen-doped amorphous silicon layer.

[0008] In some preferred embodiments of the present invention, C1 and C3 are each independently 0-2e19cm. -3 C2 is greater than 2e18cm -3 .

[0009] Preferably, in this invention, the content of H element in the specific doped amorphous silicon layer is independently 2-40 at% by atomic percentage, and / or the content of O element in the oxygen-doped amorphous silicon layer is 5-80 at% by atomic percentage.

[0010] Preferably, the H element content in the low-doped amorphous silicon layer, the high-doped amorphous silicon layer, and the oxygen-doped amorphous silicon layer is set in a gradient increasing manner.

[0011] Preferably, the total thickness of the specifically doped amorphous silicon layer is 3-15 nm.

[0012] In some preferred embodiments of the present invention, a specific front structure of the back contact battery also has at least one of the following features:

[0013] Feature 1: C1 and C3 are each independently 2e18cm -3 -2e19cm -3 ;

[0014] Feature 2: The thickness ratio of the specifically doped amorphous silicon layer to the tunneling oxide layer is (2-20):1;

[0015] Feature 3: The thickness of the tunneling oxide layer is 0.2-5 nm;

[0016] Feature 4: The antireflection layer includes at least one of silicon nitride, silicon oxynitride, and silicon oxide layers;

[0017] Feature 5: The thickness of the antireflection layer is 50-250nm.

[0018] In some preferred embodiments of the present invention, the back contact battery further includes a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of a silicon substrate.

[0019] In some preferred embodiments of the present invention, the back side of the back contact battery further includes at least one of the following structures:

[0020] Structure 1: The first semiconductor layer includes a first passivation layer and a first doped silicon layer sequentially disposed on the back side; the second semiconductor layer includes a second passivation layer and a second doped silicon layer sequentially disposed on the back side; the first passivation layer and the second passivation layer are each independently a tunneling oxide layer or an intrinsic silicon layer; the first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0021] Structure 2: The two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is opened on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the area between them is a gap region. In the gap region, a mask layer is provided between the first semiconductor layer and the second semiconductor layer or no mask layer is provided.

[0022] Structure 3: The back contact battery further includes a metal electrode and a conductive film layer laid on the outer surface of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on the conductive film layer to isolate the first semiconductor layer and the second semiconductor layer. The metal electrode is disposed on the outer surface of the conductive film layer corresponding to the semiconductor region of the first semiconductor layer and the second semiconductor layer.

[0023] In a second aspect, the present invention provides a battery assembly comprising a back contact battery having a specific front-side structure as described in the first aspect.

[0024] Beneficial effects:

[0025] This invention, through the above-mentioned technical solution, particularly by using a tunneling oxide layer as a passivation layer material in conjunction with a specifically doped amorphous silicon layer doped with H and P elements, and by coordinating the composition and doping concentration gradient of the specifically doped amorphous silicon layer (i.e., controlling the sequential arrangement of a low-doped amorphous silicon layer, a high-doped amorphous silicon layer, and an oxygen-doped amorphous silicon layer in the specific doped amorphous silicon layer along the direction away from the tunneling oxide layer, and ensuring that the P doping concentration C1 of the low-doped amorphous silicon layer and the P doping concentration C3 of the oxygen-doped amorphous silicon layer are less than the P doping concentration C2 of the high-doped amorphous silicon layer), and the overall front-side structure of the back contact battery with an optional antireflection layer, achieves an absorption rate exceeding 90% for incident light within 400nm. This allows the back contact battery to maintain good performance even after long-term exposure to ultraviolet light, improving the UV reliability of the battery, while simultaneously achieving high transmittance and improving battery efficiency. One possible hypothesis for achieving both high transmittance and UV stability is as follows: In a specifically doped amorphous silicon layer, H and P co-doping can optimize the optical properties of amorphous silicon to improve transmittance. This is because P doping can slightly widen the bandgap of amorphous silicon, reducing the absorption of visible light. H atoms can combine with dangling bonds in amorphous silicon, eliminating defect energy levels and preventing additional light absorption by defects, allowing more light to penetrate to the silicon substrate. At the same time, H doping can also ensure UV stability through "dynamic passivation." Since UV light irradiation will generate new defects in amorphous silicon, the diffusive H atoms can quickly diffuse and combine with the new defects, achieving a dynamic balance of "damage-repair," preventing defect accumulation, and avoiding the continuous degradation of battery performance caused by UV light. In addition, by setting an oxygen-doped amorphous silicon layer outside the highly doped amorphous silicon layer, the reflectivity and absorption rate of the battery front facing sunlight can be reduced, which is more conducive to increasing the short-circuit current of the battery, thereby improving battery efficiency.

[0026] Furthermore, this invention also employs a specific doping concentration gradient in the amorphous silicon layer (i.e., controlling the P doping concentration C1 in the low-doped amorphous silicon layer and the P doping concentration C3 in the oxygen-doped amorphous silicon layer to be less than the P doping concentration C2 in the high-doped amorphous silicon layer), which can accurately match the damage difference between the inner and outer layers of the back contact battery caused by UV, effectively reducing UV decay; at the same time, the built-in electric field formed by the P concentration gradient can also guide H atoms to migrate directionally to the surface layer, making passivation more precise, ultimately improving UV stability, while also ensuring high battery efficiency. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of a specific embodiment of the present invention.

[0029] Figure 2 The graph shows the external quantum efficiency (EQE) curves of the two solar cells obtained in Example 1 of this invention.

[0030] Explanation of reference numerals in the attached figures

[0031] 1. Silicon substrate, 2. Tunneling oxide layer, 3. Specific doped amorphous silicon layer, 4. Anti-reflection layer, 5. First tunneling oxide layer, 6. First doped polycrystalline silicon layer, 7. Second intrinsic amorphous silicon layer, 8. Second doped amorphous silicon layer, 9. Conductive film layer, 10. Metal electrode. Detailed Implementation

[0032] In this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0033] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0034] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges. For numerical ranges, the endpoint values ​​of the ranges, the endpoint values ​​of the ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein. The terms "optional" and "optional" mean that they may or may not be included (or may or may not be present).

[0035] In this invention, the area closer to the silicon substrate is considered the inside, and the area farther from the silicon substrate is considered the outside.

[0036] The highest absorption rate of the back contact battery for incident light within 400nm in this invention was obtained by testing according to the national standard GB / T 6495.8.

[0037] In a first aspect, the present invention provides a back-contact battery with a specific front-side structure. The back-contact battery includes a silicon substrate. The specific front-side structure includes a tunneling oxide layer, a specifically doped amorphous silicon layer, and an antireflection layer (with or without a tunneling oxide layer) sequentially disposed on the front side of the silicon substrate. The specifically doped amorphous silicon layer comprises a low-doped amorphous silicon layer, a high-doped amorphous silicon layer, and an oxygen-doped amorphous silicon layer sequentially disposed along a direction away from the tunneling oxide layer. This specific front-side structure enables the back-contact battery to achieve an absorption rate of over 85%, more preferably over 90%, and most preferably over 92% for incident light within 400 nm. The high-doped amorphous silicon layer refers to a layer with a relatively lower doping concentration than the low-doped amorphous silicon layer.

[0038] Preferably, the specific doped amorphous silicon layer is doped with P element and contains H element, and the P doping concentration C1 of the low-doped amorphous silicon layer and the P doping concentration C3 of the oxygen-doped amorphous silicon layer are respectively less than the P doping concentration C2 of the high-doped amorphous silicon layer.

[0039] The antireflection layer of this invention may or may not be provided, as long as the maximum absorption rate of incident light within 400nm of the back contact cell exceeds 85%. It is preferred to provide an antireflection layer.

[0040] In some preferred embodiments of the present invention, the thicknesses of the low-doped amorphous silicon layer, the high-doped amorphous silicon layer, and the oxygen-doped amorphous silicon layer are each independently 1-5 nm, and each can be, for example, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, or 5 nm, or any range between any two values. The present invention employs a specific doped amorphous silicon layer structure with this suitable thickness, which is more conducive to effectively reducing UV decay and improving UV reliability while ensuring high battery efficiency.

[0041] More preferably, the thickness of the low-doped amorphous silicon layer is less than that of the high-doped amorphous silicon layer or the oxygen-doped amorphous silicon layer, which is more conducive to further effectively reducing UV attenuation and improving UV reliability.

[0042] In some preferred embodiments of the present invention, C1 and C3 are each independently 0-2e19cm. -3 , Preferred 2e18cm -3 -2e19cm -3 .

[0043] Preferably, in this invention, C2 is greater than 2e18cm. -3 .

[0044] In some preferred embodiments of the present invention, the content of H element in a specific doped amorphous silicon layer is independently 2-40at% in atomic percentage, for example, it can be 2at%, 3at%, 5at%, 7at%, 10at%, 11at%, 12at%, 13at%, 14at%, 15at%, 16at%, 17at%, 18at%, 19at%, 20at%, 21at%, 22at%, 23at%, 24at%, 25at%, 26at%, 27at%, 28at%, 29at%, 30at%, 32at%, 34at%, 35at%, 36at%, 38at%, 39at%, or 40at%, as well as the range between any two point values.

[0045] More preferably, the hydrogen (H) content in the low-doped amorphous silicon layer, the high-doped amorphous silicon layer, and the oxygen-doped amorphous silicon layer increases in a gradient. Specifically, the H content in the low-doped or high-doped amorphous silicon layer can be less than that in the oxygen-doped amorphous silicon layer, or the H content in the low-doped amorphous silicon layer can be less than that in the high-doped amorphous silicon layer, which in turn can be less than that in the oxygen-doped amorphous silicon layer. A gradient increase in the appropriate H content in the specific doped amorphous silicon layer is more beneficial for improving the passivation effect and UV reliability of the battery.

[0046] Preferably, the content of O element in the oxygen-doped amorphous silicon layer, by atomic percentage, is 5-80 at%, for example, it can be 5at%, 7at%, 10at%, 11at%, 12at%, 13at%, 14at%, 15at%, 16at%, 17at%, 18at%, 19at%, 20at%, 21at%, 22at%, 23at%, 24at%, 25at%, 26at%, 27at%, 28at%, 29at%, 30at%, 32at%, 34at%, 35at%, 36at%, 38at%, 39at%, 40at%, 42at%, 45at%, 47at%, 50at%, 52at%, 55at%, 57at%, 60at%, 63at%, 65at%, 68at%, 70at%, 72at%, 75at%, 78at%, or 80at%, as well as any range between any two point values. Oxygen-doped amorphous silicon layers with an appropriate oxygen content are more conducive to improving transmittance and cell efficiency.

[0047] The H element content and P element doping concentration in the specific doped amorphous silicon layer of this invention can be achieved by controlling the flow rate of the corresponding doped gas source in the prior art, which is prior art and will not be described in detail here.

[0048] In some preferred embodiments of the present invention, the total thickness of the specifically doped amorphous silicon layer is 3-15 nm, specifically, it can be 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, 7.5 nm, 8 nm, 8.5 nm, 9 nm, 9.5 nm, 10 nm, 10.5 nm, 11 nm, 11.5 nm, 12 nm, 12.5 nm, 13 nm, 13.5 nm, 14 nm, 14.5 nm, or 15 nm, or any range between any two values. This preferred embodiment of the present invention is more conducive to effectively reducing UV decay and improving UV reliability while ensuring high battery efficiency.

[0049] In some preferred embodiments of the present invention, the thickness ratio of the specific doped amorphous silicon layer to the tunneling oxide layer is (2-20):1, specifically 2:1, 3:1, 4:1, 5:1, 6:1, 7:1, 8:1, 9:1, 10:1, 11:1, 12:1, 13:1, 14:1, 15:1, 16:1, 17:1, 18:1, 19:1, or 20:1, or any range between two values. This preferred embodiment of the present invention is more conducive to effectively reducing UV decay and improving UV reliability while ensuring high battery efficiency.

[0050] In some preferred embodiments of the present invention, the thickness of the tunneling oxide layer is 0.2-2 nm.

[0051] In some preferred embodiments of the present invention, the antireflection layer includes at least one of silicon nitride, silicon oxynitride, and silicon oxide.

[0052] In some preferred embodiments of the present invention, the thickness of the antireflection layer is 50-250 nm.

[0053] In some preferred embodiments of the present invention, the back contact battery further includes a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of a silicon substrate. The first and second semiconductor layers can be additional films deposited outside the silicon substrate, or they can be doped regions obtained by doping different areas on the silicon substrate. The first and second semiconductor layers may or may not overlap. One of the first and second semiconductor layers is N-type, and the other is P-type.

[0054] In some preferred embodiments of the present invention, the first semiconductor layer includes a first passivation layer and a first doped silicon layer sequentially disposed on the back side, and the second semiconductor layer includes a second passivation layer and a second doped silicon layer sequentially disposed on the back side. More preferably, the first passivation layer and the second passivation layer are each independently a tunneling oxide layer or an intrinsic silicon layer; the first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon, or microcrystalline silicon. The intrinsic silicon layer is preferably intrinsic amorphous silicon.

[0055] In a preferred embodiment, the first semiconductor layer includes a first tunneling oxide layer and a first doped polycrystalline silicon layer sequentially disposed on the back side, and the second semiconductor layer includes a second intrinsic silicon layer and a second doped silicon layer sequentially disposed on the back side. The second doped silicon layer is doped amorphous silicon or microcrystalline silicon. This invention employs a combined passivation structure, which is more conducive to improving both UV reliability and battery efficiency. Furthermore, the thicknesses and corresponding doping concentrations of the first tunneling oxide layer, the second intrinsic silicon layer, the first doped polycrystalline silicon layer, and the second doped silicon layer can all refer to the ranges of existing technologies and can all be used in this invention. For example, the thickness of each of the first tunneling oxide layers is independently 1-2 nm, the thickness of the first doped polycrystalline silicon layer is 70-120 nm, and the effective doping concentration is greater than 5e18 cm⁻¹. -3 The thickness of the second intrinsic silicon layer is 5-15 nm, and the thickness of the second doped silicon layer is 7-45 nm, with each having an independent effective doping concentration of 1e18 cm⁻¹. -3 -9e19cm -3 .

[0056] In some preferred embodiments of the present invention, the two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers, and the second semiconductor opening regions and the first semiconductor opening regions are spaced apart, with the area between them forming a gap region. More preferably, a mask layer is disposed between the first semiconductor layer and the second semiconductor layer within the gap region, or no mask layer is disposed therein.

[0057] The back contact battery of the present invention also includes other conventional structures. In some preferred embodiments of the present invention, the back contact battery further includes a metal electrode and a conductive film layer deposited on the outer surfaces of the first semiconductor layer and the second semiconductor layer, wherein an isolation groove is formed in the conductive film layer to isolate the first semiconductor layer and the second semiconductor layer; the metal electrode is disposed on the outer surface of the conductive film layer corresponding to the respective semiconductor region of the first semiconductor layer and the second semiconductor layer.

[0058] The front and back sides of the silicon substrate of this invention can be independently textured or polished surfaces, as long as they are conducive to improving UV reliability and battery efficiency.

[0059] In a second aspect, the present invention provides a battery assembly comprising a back contact battery having a specific front-side structure as described in the first aspect.

[0060] The embodiments of the present invention described below are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0061] Example 1

[0062] A back-contact battery with a specific front structure, such as Figure 1 As shown, the back contact battery includes a silicon substrate 1, and a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of the silicon substrate 1. The specific front structure includes a tunneling oxide layer 2 (tunneling silicon oxide) with a thickness of 1 nm, a specifically doped amorphous silicon layer 3 with a total thickness of 5 nm, and an antireflection layer 4 with a thickness of 100 nm (specifically, a stack of silicon nitride with a thickness of 60 nm, silicon oxynitride with a thickness of 25 nm, and silicon oxide with a thickness of 15 nm, disposed sequentially on the front side of the silicon substrate 1. The specifically doped amorphous silicon layer 3 is a stack of a low-doped amorphous silicon layer (thickness of 1.5 nm), a high-doped amorphous silicon layer (thickness of 1.5 nm), and an oxygen-doped amorphous silicon layer (thickness of 2 nm, oxygen content of 50 at%) disposed sequentially along the direction away from the tunneling oxide layer 2. The specifically doped amorphous silicon layer 3 is doped with H and P elements, and the P doping concentration C1 of the low-doped amorphous silicon layer and the P doping concentration C3 of the oxygen-doped amorphous silicon layer are respectively less than the P doping concentration C2 of the high-doped amorphous silicon layer. C1 is 2e18cm. -3 C2 is 2e19cm -3 C3 is 2e18cm -3 The H content in the low-doped amorphous silicon layer, the high-doped amorphous silicon layer, and the oxygen-doped amorphous silicon layer is 10at%, 15at%, and 20at, respectively. The calculated thickness ratio of the specifically doped amorphous silicon layer 3 to the tunneling oxide layer 2 is 5:1. This specific front-side structure results in a maximum absorption rate of 92% for incident light within 400nm of the back-contact battery.

[0063] The first semiconductor layer includes a first tunneling oxide layer 5 with a thickness of 1.5 nm and an N-type first doped polysilicon layer 6 (with a thickness of 100 nm and a phosphorus doping concentration of 5e19cm) sequentially disposed on the back side. -3 The second semiconductor layer includes a second intrinsic amorphous silicon layer 7 with a thickness of 10 nm and a second doped amorphous silicon layer 8 of P-type (with a thickness of 15 nm and a boron doping concentration of 2e19cm) sequentially disposed on the back side. -3The second semiconductor layer extends outward from both ends to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers, and the second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, with the area between them being a gap region. The back contact battery also includes a metal electrode 10 and a conductive film layer 9 (ITO) deposited on the outer surfaces of the first and second semiconductor layers. An isolation groove is formed on the conductive film layer 9 to isolate the first and second semiconductor layers. The metal electrode 10 is disposed on the outer surface of the conductive film layer 9 corresponding to the respective semiconductor regions of the first and second semiconductor layers.

[0064] The two solar cells obtained in Example 1 were subjected to external quantum efficiency (EQE) testing, and the test curves are shown in the figure below. Figure 2 As shown. From Figure 2 The results show that the battery's effective absorption in the wavelength range of 300-400nm is between 80% and 92%, which greatly improves the battery's absorption and utilization rate of ultraviolet light.

[0065] Example 2

[0066] The procedure was carried out in accordance with Example 1, except that the P-doping concentration C1 of the low-doped amorphous silicon layer was adjusted to 6e18cm. -3 .

[0067] Example 3

[0068] The procedure was carried out in accordance with Example 1, except that the P-doping concentration C2 of the highly doped amorphous silicon layer was adjusted to 5e19cm. -3 .

[0069] Example 4

[0070] The procedure was carried out in accordance with Example 1, except that the P-doping concentration C3 of the oxygen-doped amorphous silicon layer was adjusted to 5e18cm. -3 .

[0071] Example 5

[0072] The experiment was conducted in accordance with Example 1, except that the thickness of the highly doped amorphous silicon layer was adjusted to 3 nm. The total thickness of the specifically doped amorphous silicon layer 3 was calculated to be 6.5 nm, and the thickness ratio of the specifically doped amorphous silicon layer 3 to the tunneling oxide layer 2 was 6.5:1.

[0073] Example 6

[0074] The procedure was carried out in accordance with Example 1, except that the oxygen doping concentration of the oxygen-doped amorphous silicon layer was adjusted to 75 at.

[0075] Comparative Example 1

[0076] The same procedure was followed as in Example 1, except that no oxygen-doped amorphous silicon layer was formed in the specific doped amorphous silicon layer 3.

[0077] Comparative Example 2

[0078] The same procedure was followed as in Example 1, except that no low-doped amorphous silicon layer was formed in the specifically doped amorphous silicon layer 3.

[0079] Comparative Example 3

[0080] The same procedure was followed as in Example 1, except that no highly doped amorphous silicon layer was formed in the specifically doped amorphous silicon layer 3.

[0081] Comparative Example 4

[0082] The process was carried out in accordance with Example 1, except that the oxygen-doped amorphous silicon layer in the specific doped amorphous silicon layer 3 was replaced with non-oxygen-doped amorphous silicon, that is, only oxygen was not doped, while other conditions such as hydrogen doping and P doping remained unchanged.

[0083] Test case

[0084] The back-contact batteries obtained in the above embodiments and comparative examples were subjected to performance tests, and the results are shown in Table 1. The highest absorption rate of the back-contact battery within 400 nm of incident light in this invention was obtained by testing according to the national standard GB / T 6495.8-2002 Photovoltaic Devices Part 8: Measurement of Spectral Response of Photovoltaic Devices. The UV attenuation ratio was tested according to the IEC 61215:2021 test standard.

[0085] Table 1

[0086] Performance indicators The highest absorption rate (%) for incident light within 400nm. Minority birth lifetime (µs) Battery efficiency (%) UV attenuation rate (%) Example 1 92 4000 27 1 Example 2 91 3600 26.9 0.9 Example 3 90 3700 26.7 0.8 Example 4 91 3800 26.8 0.85 Example 5 88 4200 26.75 0.8 Example 6 92.5 4000 26.95 1 Comparative Example 1 84 3600 26.6 1.5 Comparative Example 2 84 2800 26.5 2 Comparative Example 3 85 3000 26.7 2.5 Comparative Example 4 83 4000 26.5 1.5

[0087] The results above show that, compared with the comparative example, the back contact battery using the embodiment of the present invention can still maintain good performance under long-term exposure to ultraviolet light, improve the UV reliability of the battery, achieve high light transmittance, and maintain high battery efficiency.

[0088] Furthermore, as can be seen from Examples 1 and 2-6, the preferred scheme of the present invention is more conducive to improving the UV reliability of the battery while maintaining a high battery efficiency.

[0089] The preferred embodiments of the present invention have been described in detail above; however, the present invention is not limited thereto. Within the scope of the inventive concept, various simple modifications can be made to the technical solutions of the present invention, including combinations of various technical features in any other suitable manner. These simple modifications and combinations should also be considered as the content disclosed in the present invention and are all within the protection scope of the present invention.

Claims

1. A back-contact battery having a specific front-side structure, the back-contact battery comprising a silicon substrate, characterized in that, This specific front-side structure includes a tunneling oxide layer, a specifically doped amorphous silicon layer, and an antireflection layer (with or without) sequentially disposed on the front side of a silicon substrate. The specifically doped amorphous silicon layer contains a low-doped amorphous silicon layer, a high-doped amorphous silicon layer, and an oxygen-doped amorphous silicon layer sequentially disposed in the direction away from the tunneling oxide layer. The specifically doped amorphous silicon layer is doped with P and contains H. The P doping concentration C1 of the low-doped amorphous silicon layer and the P doping concentration C3 of the oxygen-doped amorphous silicon layer are respectively less than the P doping concentration C2 of the high-doped amorphous silicon layer. This specific front-side structure enables the back-contact battery to achieve an absorption rate of over 85% for incident light within 400 nm.

2. The back contact battery with a specific front structure according to claim 1, characterized in that, The thicknesses of the low-doped amorphous silicon layer, the high-doped amorphous silicon layer, and the oxygen-doped amorphous silicon layer are each independently 1-5 nm, and / or the thickness of the low-doped amorphous silicon layer is less than the thickness of the high-doped amorphous silicon layer or the oxygen-doped amorphous silicon layer.

3. The back contact battery with a specific front-side structure according to claim 1 or 2, characterized in that, C1 and C3 are each independently 0-2e19cm -3 C2 is greater than 2e18cm -3 .

4. The back contact battery with a specific front structure according to claim 1, characterized in that, The H element content in the specific doped amorphous silicon layer is 2-40 at% on an atomic percentage basis, and / or the O element content in the oxygen-doped amorphous silicon layer is 5-80 at% on an atomic percentage basis.

5. The back contact battery with a specific front-side structure according to claim 1 or 4, characterized in that, The H element content in the low-doped amorphous silicon layer, the high-doped amorphous silicon layer, and the oxygen-doped amorphous silicon layer is set in a gradient increasing manner.

6. The back contact battery with a specific front-side structure according to claim 1 or 2, characterized in that, The total thickness of the specifically doped amorphous silicon layer is 3-15 nm.

7. The back contact battery with a specific front structure according to claim 1, characterized in that, The specific front structure of the back contact battery also has at least one of the following characteristics: Feature 1: C1 and C3 are each independently 2e18cm -3 -2e19cm -3 ; Feature 2: The thickness ratio of the specifically doped amorphous silicon layer to the tunneling oxide layer is (2-20):1; Feature 3: The thickness of the tunneling oxide layer is 0.2-2 nm; Feature 4: The antireflection layer includes at least one of silicon nitride, silicon oxynitride, and silicon oxide layers; Feature 5: The thickness of the antireflection layer is 50-250nm.

8. The back contact battery with a specific front structure according to claim 1, characterized in that, The back contact battery also includes a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of a silicon substrate.

9. The back contact battery with a specific front structure according to claim 8, characterized in that, The back side of the back contact battery also includes at least one of the following structures: Structure 1: The first semiconductor layer includes a first passivation layer and a first doped silicon layer sequentially disposed on the back side; the second semiconductor layer includes a second passivation layer and a second doped silicon layer sequentially disposed on the back side; the first passivation layer and the second passivation layer are each independently a tunneling oxide layer or an intrinsic silicon layer; the first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon, or microcrystalline silicon. Structure 2: The two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is opened on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the area between them is a gap region. In the gap region, a mask layer is provided between the first semiconductor layer and the second semiconductor layer or no mask layer is provided. Structure 3: The back contact battery also includes a metal electrode and a conductive film layer laid on the outer surface of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on the conductive film layer to isolate the first semiconductor layer and the second semiconductor layer. The metal electrode is disposed on the outer surface of the conductive film layer corresponding to the semiconductor region of the first semiconductor layer and the second semiconductor layer.

10. A battery assembly, characterized in that, It includes a back contact battery having a specific front-side structure as described in any one of claims 1-9.

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