Semiconductor optical amplifier and method of manufacturing the same

Abstract

The application relates to the technical field of optical amplifiers, in particular to a semiconductor optical amplifier and a preparation method thereof. The semiconductor optical amplifier comprises a stacked structure, the stacked structure comprises an N-face metal electrode, a substrate, an N-cladding layer, an N-waveguide layer, an active region, a P-waveguide layer, a P-cladding layer and an electrode contact layer which are sequentially stacked; two deep grooves arranged in the stacked structure, the two deep grooves are arranged at intervals along a first direction, and each deep groove penetrates the electrode contact layer, the P-cladding layer, the P-waveguide layer and the active region along the thickness direction of the stacked structure in sequence and extends into the N-waveguide layer, and the stacked structure between the two deep grooves serves as a ridge waveguide; and a P-face metal electrode, the P-face metal electrode comprises a plurality of sub-electrodes, and the plurality of sub-electrodes are arranged at intervals along a second direction on the top surface of the ridge waveguide, and the second direction intersects the first direction. The application is at least beneficial to improving the saturated output power of the device and reducing the cascade noise.

Description

Technical Field

[0001] This invention belongs to the field of optical amplifier technology, and particularly relates to a semiconductor optical amplifier and its fabrication method. Background Technology

[0002] Semiconductor optical amplifiers have wide applications in optical computing, optical communication, optical sensing, and microwave photonics integration due to their advantages such as small size, light weight, low cost, and ease of integration with other optoelectronic devices. High-power, low-noise semiconductor optical amplifiers can be used in advanced lidar systems or optical access networks, such as as power amplifiers at the transmitting end, or as repeater amplifiers to overcome transmission losses during line transmission. Their low-noise characteristics also make them suitable as preamplifiers at the receiving end.

[0003] However, the small mode size and large optical confinement factor of traditional ridge waveguide semiconductor optical amplifiers limit further improvement in saturated output power. Moreover, optical lenses are required to match the spot size, which further increases packaging difficulty and cost. Conical or horn-shaped waveguide structures improve saturated output power by increasing the cross-sectional area of ​​the active region, but they are usually difficult to couple into optical fibers due to the instability of beam quality related to gain dynamics and complex optics, which also limits their application scenarios. Summary of the Invention

[0004] In view of this, the present invention aims to provide a semiconductor optical amplifier and a method for fabricating the same, which at least helps to improve the saturated output power of the device and reduce cascade noise.

[0005] To achieve the above objectives, the technical solution created by this invention is implemented as follows:

[0006] This invention provides a semiconductor optical amplifier, comprising: a stacked structure, the stacked structure including an N-plane metal electrode, a substrate, an N-cladding layer, an N-waveguide layer, an active region, a P-waveguide layer, a P-cladding layer, and an electrode contact layer stacked sequentially; two deep trenches disposed within the stacked structure, the two deep trenches being spaced apart along a first direction, and each deep trench sequentially penetrating the electrode contact layer, the P-cladding layer, the P-waveguide layer, and the active region along the thickness direction of the stacked structure and extending into the N-waveguide layer, the stacked structure between the two deep trenches serving as a ridge waveguide; a P-plane metal electrode, the P-plane metal electrode including a plurality of sub-electrodes, the plurality of sub-electrodes being spaced apart along a second direction on the top surface of the ridge waveguide, the second direction intersecting the first direction.

[0007] Furthermore, the semiconductor optical amplifier also includes an insulating layer located on the remaining stacked structure outside the top surface of the ridge waveguide.

[0008] Furthermore, both the deep trench and the ridge waveguide extend along the second direction, and the minimum angle between the second direction and the first direction is in the range of 80° to 86°.

[0009] Furthermore, the minimum angle between the second direction and the first direction is 83°.

[0010] Furthermore, the number of sub-electrodes is greater than 2.

[0011] Furthermore, the two sub-electrodes located at both ends of the P-plane metal electrode in the second direction serve as the input and output terminals, respectively, with the current density at the output terminal being greater than that at the input terminal.

[0012] Another aspect of this invention provides a method for fabricating a semiconductor optical amplifier, comprising: forming a stacked structure, the stacked structure including an N-plane metal electrode, a substrate, an N-cladding layer, an N-waveguide layer, an active region, a P-waveguide layer, a P-cladding layer, and an electrode contact layer stacked sequentially; forming two deep trenches within the stacked structure, the two deep trenches being spaced apart along a first direction, and each deep trench sequentially penetrating the electrode contact layer, the P-cladding layer, the P-waveguide layer, and the active region along the thickness direction of the stacked structure and extending into the N-waveguide layer, the stacked structure between the two deep trenches serving as a ridge waveguide; forming a P-plane metal electrode, the P-plane metal electrode including a plurality of sub-electrodes, the plurality of sub-electrodes being spaced apart along a second direction on the top surface of the ridge waveguide, the second direction intersecting the first direction.

[0013] Compared with existing technologies, this invention achieves the following beneficial effects: The semiconductor optical amplifier provided by this invention, based on deep-etched waveguides and multi-segment electrode injection, can simultaneously improve the saturated output power of the device and reduce noise, thereby further enhancing overall performance. Specifically, unlike the shallow-etched structure of traditional ridge waveguides, the trenches on both sides of the ridge waveguide in this invention are deeply etched, avoiding confining most optical field modes within the active layer, thus expanding the range of optical field modes and facilitating a larger optical field cross-sectional area, making it easier to achieve high saturated output power. Simultaneously, the design of multiple independent sub-electrodes allows for independent power supply to multiple segments, enabling flexible adjustment of the injection current ratio to meet different application requirements. The structure of the semiconductor optical amplifier provided by this invention fundamentally solves the contradiction between the saturated output power and noise figure of the optical amplifier, preventing increased cascade noise while improving saturated output power. Attached Figure Description

[0014] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments and descriptions of the invention are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0015] Figure 1This is a schematic diagram of the structure of the semiconductor optical amplifier described in an embodiment of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not constitute a limitation thereof.

[0017] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0018] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0019] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0020] The invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0021] refer to Figure 1This invention provides a semiconductor optical amplifier, comprising: a stacked structure including an N-side metal electrode 10, a substrate 11, an N-cladding layer 12, an N-waveguide layer 13, an active region 14, a P-waveguide layer 15, a P-cladding layer 16, and an electrode contact layer 17 stacked sequentially; two deep trenches disposed within the stacked structure, the two deep trenches being spaced apart along a first direction X, and each deep trench sequentially penetrating the electrode contact layer 17, the P-cladding layer 16, the P-waveguide layer 15, and the active region 14 along the thickness direction of the stacked structure and extending into the N-waveguide layer 13, the stacked structure between the two deep trenches serving as a ridge waveguide; a P-side metal electrode 19, the P-side metal electrode 19 including a plurality of sub-electrodes 20, the plurality of sub-electrodes 20 being spaced apart along a second direction Y on the top surface of the ridge waveguide, the second direction Y intersecting the first direction X.

[0022] The trenches on both sides of the ridge waveguide of the present invention are deeply etched, which avoids confining most of the optical field modes within the active layer, thereby expanding the optical field mode range 30, which is beneficial to obtaining a larger optical field cross-sectional area and making it easier to achieve high saturation output power.

[0023] In some embodiments, the substrate 11 is an InP-based substrate. It is understood that the choice of material for the substrate 11 determines the lasing wavelength. In other embodiments, the material of the substrate 11 may also be a heavily doped GaAs. The active region 14 may be composed of an InGaAsP multiple quantum well and a barrier layer. In this way, it is easier to achieve the population inversion distribution condition and obtain high gain amplification. The electrode contact layer 17 is a P-type heavily doped InGaAs material.

[0024] In some embodiments, in the stacked structure, the N-cladding 12 is an N-type highly doped material grown on the substrate 11, typically using the same material as the substrate 11, used to confine the optical field and transport electrons; the N-waveguide layer 13 is an N-type doped material grown on the N-cladding 12, which can be a single N-type doped material or a diluted waveguide with alternating growth of two materials; the active region 14 can be composed of alternating 5 InGaAsP quantum wells and 6 InGaAsP barriers, serving as the gain region of the amplifier and providing sufficient optical gain during electrical injection; P Waveguide layer 15 is grown on active region 14 and can be a single P-type doped material or a diluted waveguide with alternating growth of two materials; P-cladding layer 16 is grown on P-waveguide layer 15 and can be the same highly doped P-type material as N-cladding layer 12, used to confine the optical field and transport holes; electrode contact layer 17 is grown on P-cladding layer 16, which is beneficial for forming P-plane ohmic contact; the material of N-plane metal electrode 10 can be a mixed metal including Au, Ge and Ni, and the material of P-plane metal electrode 19 can be a mixed metal including Ti, Pt and Au.

[0025] The multiple sub-electrodes 20 in this invention can achieve independent power supply in multiple segments, thereby allowing the device to adjust the proportion of injected current as needed.

[0026] It should be noted that a semiconductor optical amplifier is an optical element that amplifies the input optical signal by injecting current. According to its working principle, referring to Formulas 1 and 2 below, the saturated output power is inversely proportional to the carrier lifetime, and the carrier lifetime is inversely proportional to the carrier concentration. Therefore, the greater the carrier concentration at the output end, the greater the saturated output power of the semiconductor optical amplifier. In the semiconductor optical amplifier provided by this invention, multiple sub-electrodes 20 achieve independent power supply for multiple segments. Therefore, the output power of the device can be increased by increasing the injection current at the output end, and a low-noise amplification process can also be obtained by adjusting the injection current distribution ratio of different sub-electrodes 20.

[0027] The principle of obtaining a low-noise amplification process is as follows: The semiconductor optical amplifier with multiple sub-electrodes 20 can be regarded as multiple independent optical amplifiers cascaded. According to the noise characteristics of the cascaded optical amplifier, referring to Formula 3, the total noise figure mainly depends on the noise level of the optical amplifier at the input end. This is because as the small signal gain increases, the denominator value in Formula 3 increases. Therefore, a smaller injection current at the input end makes it easier to obtain lower cascade noise.

[0028] Formula 1 mentioned above is as follows: ;

[0029] Formula 2 is as follows: ;

[0030] Formula 3 is as follows: ;

[0031] in, For saturated output power, G1 is the small-signal gain of the first optical amplifier, G2 is the small-signal gain of the second optical amplifier, and G... m Let w be the small-signal gain of the m-th optical amplifier, m be the amplifier number, w be the active region width, d be the active region thickness, and h be Planck's constant. v The incident light frequency, The optical confinement factor within the active region. For differential gain, For the effective lifetime of charge carriers, The injected carrier concentration, Let be the noise figure of the m-th optical amplifier. The total noise figure is... The noise figure for the first optical amplifier is given. This is the noise figure for the second optical amplifier.

[0032] Understandably, traditional waveguide structures formed by shallow etched trenches suffer from the problem of carrier lateral diffusion outside the active region 14, reducing the utilization efficiency of stimulated emission and limiting further improvement in saturated output power. The design of etching deep trenches into the N-waveguide layer 13 in this invention significantly reduces carrier lateral diffusion, maintaining a higher carrier concentration within the active region 14 under the same injection current, thus delaying gain saturation. Furthermore, the deep trenches act as a high-order mode filter, filtering out higher-order modes and strongly confining the optical field. For the same input optical power, the power density of the ridge waveguide provided by this invention is much greater than that of the shallow trench ridge waveguide structure. The ridge waveguide can interact more fully with the carriers, achieving high saturated output power and high beam quality. The deep trench design also results in a larger sidewall contact area for the ridge waveguide, which improves the device's heat dissipation capacity, allowing for higher injection current to increase saturated output power.

[0033] Furthermore, the semiconductor optical amplifier also includes an insulating layer 18, which is located on the remaining stacked structure outside the top surface of the ridge waveguide. In some examples, the insulating layer 18 may be made of silicon dioxide.

[0034] Furthermore, both the deep trench and the ridge waveguide extend along the second direction Y, and the minimum angle between the second direction Y and the first direction X is in the range of 80° to 86°.

[0035] Furthermore, the minimum angle between the second direction Y and the first direction X is 83°. This helps to prevent end-face reflection.

[0036] Furthermore, the number of sub-electrodes 20 is greater than 2.

[0037] Furthermore, the two sub-electrodes 20 located at both ends of the P-plane metal electrode 19 in the second direction Y serve as the input and output terminals, respectively, with the current density at the output terminal being greater than that at the input terminal. This is beneficial for improving the saturated output power and reducing cascade noise.

[0038] Another aspect of this invention provides a method for fabricating a semiconductor optical amplifier. The method includes: forming a stacked structure comprising, in which N-plane metal electrodes 10, a substrate 11, an N-cladding layer 12, an N-waveguide layer 13, an active region 14, a P-waveguide layer 15, a P-cladding layer 16, and an electrode contact layer 17 are stacked sequentially; forming two deep trenches within the stacked structure, the two deep trenches being spaced apart along a first direction X, and each deep trench sequentially penetrating the electrode contact layer 17, the P-cladding layer 16, the P-waveguide layer 15, and the active region 14 along the thickness direction of the stacked structure and extending into the N-waveguide layer 13, the stacked structure between the two deep trenches serving as a ridge waveguide; forming a P-plane metal electrode 19, the P-plane metal electrode 19 comprising a plurality of sub-electrodes 20, the plurality of sub-electrodes 20 being spaced apart along a second direction Y on the top surface of the ridge waveguide, the second direction Y intersecting the first direction X.

[0039] In some embodiments, forming a stacked structure includes: first forming an initial stacked structure, the initial stacked structure including a substrate 11, an N-cladding layer 12, an N-waveguide layer 13, an active region 14, a P-waveguide layer 15, a P-cladding layer 16 and an electrode contact layer 17 stacked sequentially; forming two deep trenches within the stacked structure includes: forming two deep trenches within the initial stacked structure.

[0040] In some embodiments, after forming two deep trenches within the initial stacked structure, an insulating layer 18 is further formed on the remaining initial stacked structure outside the top surface of the ridge waveguide.

[0041] In some examples, forming two deep trenches within the initial stacked structure to create a ridge waveguide involves: rinsing the surface of the initial stacked structure with acetone and isopropanol solution to remove impurities, then washing with deionized water, drying with N2, and baking at 120°C for 5 minutes to completely remove surface moisture and ensure a more robust subsequent mask layer growth; growing a 400nm thick silicon oxide layer on the initial stacked structure as a mask layer using plasma-enhanced chemical vapor deposition; placing it in an adhesion enhancer at approximately 130°C for 20 minutes to enhance the adhesion of the photoresist to the mask layer; spin-coating a layer of positive photoresist approximately 1μm thick, heating it on a 100°C hot plate for 1 minute and 30 seconds to remove the solvent from the photoresist; and then performing photolithography using an I-line lithography machine with a precision of 1μm. The final ridge waveguide is determined based on the photoresist thickness and the theoretical ridge waveguide... The pattern size was set, the exposure time was set to 7.5s, and the development time was set to 35s. The pattern on the photomask was accurately transferred to the photoresist, and then it was placed on a hot plate at 110℃ and heated for 1 minute to complete the hardening process, which improved the process stability of the photoresist in the subsequent etching process. Then, the photoresist morphology of the sidewalls was optimized by using a plasma stripper. A thin layer of silicone oil was applied to the back of the initial stacked structure, and it was adhered to a clean silicon wafer and placed in the chamber of an inductively coupled plasma etching equipment for etching of the mask layer, with an over-etching amount of 20%. After etching, the residual photoresist and silicone oil and other impurities were removed by repeated ultrasonic cleaning with acetone and isopropanol solution. The etching continued to the N waveguide layer 13, and the mask layer on the surface was removed by wet etching with a mixed solution of ammonium fluoride and hydrofluoric acid to obtain the initial stacked structure with two deep trenches.

[0042] In some examples, forming the insulating layer 18 includes: after obtaining the initial stacked structure forming two deep trenches, baking the initial stacked structure forming two deep trenches at 120°C for 5 minutes to ensure that the subsequent insulating layer 18 grows more firmly, and growing a silicon oxide layer with a thickness of 300 nm as the insulating layer 18 using a plasma-enhanced chemical vapor deposition process.

[0043] In some examples, the formation of a current injection window is included before forming the P-side metal electrode 19. Specifically, a layer of positive photoresist with a thickness of about 1 μm is spin-coated on the top surface of the insulating layer 18 and baked at 100°C for 1 min 30 s. The current injection window pattern on the photomask is projected onto the photoresist using a standard I-line lithography machine with an exposure time of 7.5 s and a development time of 35 s. The photoresist is then heated on a hot plate at 110°C for 1 min to complete the hardening process, which improves the process stability of the photoresist in the subsequent etching process. The photoresist morphology of the sidewalls is optimized using a plasma resist remover. A thin layer of silicone oil is coated on the back side of the initial stacked structure and attached to a clean silicon wafer. The wafer is then placed in the chamber of an inductively coupled plasma etching equipment for etching with an over-etching amount of 15% to ensure complete etching through the insulating layer 18 and exposure of the metal contact layer to facilitate the formation of a uniform, low-resistance ohmic contact with the P-side metal electrode 19, i.e., the formation of the current injection window. After etching, the residual photoresist and silicone oil are removed by repeated ultrasonic cleaning with acetone and isopropanol solutions.

[0044] In some examples, forming the P-side metal electrode 19 includes: first forming an initial P-side metal electrode layer, and then removing part of the initial P-side metal electrode layer using a photolithography process to form a P-side metal electrode 19 comprising multiple sub-electrodes 20. A mixed metal layer with a thickness of approximately 300 nm and a composition including Ti, Pt, and Au can be grown using a standard magnetron sputtering apparatus as the initial P-side metal electrode layer.

[0045] In some examples, after forming the P-side metal electrode 19, the process further includes: thermal annealing at 380°C for 90 seconds to obtain a robust metal deposition, thereby enabling the P-side metal electrode 19 to form a good ohmic contact with the electrode contact layer.

[0046] In some examples, forming the N-side metal electrode 10 includes: thinning and polishing the substrate 11, and growing a mixed metal with a thickness of about 300 nm and a composition including Au, Ge and Ni on the back side of the thinned substrate 11 using a standard magnetron sputtering device as the N-side metal electrode 10.

[0047] It should be understood that the various forms of processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this invention disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this invention can be achieved, and this is not limited herein.

[0048] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A semiconductor optical amplifier, characterized in that, include: A stacked structure comprising, in sequence, an N-plane metal electrode, a substrate, an N-cladding, an N-waveguide layer, an active region, a P-waveguide layer, a P-cladding, and an electrode contact layer. Two deep trenches are disposed within the stacked structure, the two deep trenches are arranged at intervals along a first direction, and each deep trench sequentially penetrates the electrode contact layer, the P cladding layer, the P waveguide layer and the active region along the thickness direction of the stacked structure and extends into the N waveguide layer. The stacked structure between the two deep trenches serves as a ridge waveguide. The P-plane metal electrode includes a plurality of sub-electrodes, which are spaced apart along a second direction on the top surface of the ridge waveguide, and the second direction intersects the first direction. Both the deep trench and the ridge waveguide extend along the second direction, and the minimum angle between the second direction and the first direction is in the range of 80° to 86°.

2. The semiconductor optical amplifier according to claim 1, characterized in that, The semiconductor optical amplifier further includes an insulating layer located on the remaining stacked structure outside the top surface of the ridge waveguide.

3. The semiconductor optical amplifier according to claim 1, characterized in that, The minimum angle between the second direction and the first direction is 83°.

4. The semiconductor optical amplifier according to claim 1, characterized in that, The number of sub-electrodes is greater than 2.

5. The semiconductor optical amplifier according to claim 1, characterized in that, The two sub-electrodes located at both ends of the P-plane metal electrode in the second direction serve as the input terminal and the output terminal, respectively, and the current density of the output terminal is greater than the current density of the input terminal.

6. A method for fabricating a semiconductor optical amplifier, characterized in that, The semiconductor optical amplifier is used to form any one of claims 1 to 5, and the method for fabricating the semiconductor optical amplifier includes: A stacked structure is formed, the stacked structure comprising an N-plane metal electrode, a substrate, an N-cladding, an N-waveguide layer, an active region, a P-waveguide layer, a P-cladding, and an electrode contact layer stacked sequentially. Two deep trenches are formed within the stacked structure. The two deep trenches are arranged at intervals along a first direction. Each deep trench passes through the electrode contact layer, P-cladding layer, P-waveguide layer and active region in sequence along the thickness direction of the stacked structure and extends into the N-waveguide layer. The stacked structure between the two deep trenches serves as a ridge waveguide. A P-plane metal electrode is formed, the P-plane metal electrode comprising a plurality of sub-electrodes, the plurality of sub-electrodes being arranged at intervals along a second direction on the top surface of the ridge waveguide, the second direction intersecting the first direction.

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