Instruction execution method and system based on arbitration mechanism

By adopting an instruction execution method based on an arbitration mechanism, the problem of the lack of layered isolation between the user interaction layer and the data module in the pick-and-place machine is solved, enabling secure instruction issuance and feedback, and improving the system's scalability and maintainability.

CN121433080BActive Publication Date: 2026-03-03HEFEI ANXIN PRECISION TECH CO LTD
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Patent Information

Application Number
CN202512008578.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-29
Publication Date
2026-03-03
Estimated Expiration
2045-12-29

AI Technical Summary

Technical Problem

The existing pick-and-place machine's user interaction layer and data module are not strictly separated, resulting in high code coupling, data interaction errors, and inconvenience in expansion and maintenance.

Method used

An arbitration-based instruction execution method is adopted, which achieves secure and reliable instruction issuance and feedback by verifying instruction parameters, judging lock status, and managing instruction IDs.

Benefits of technology

It improves the system's scalability and maintainability, ensures the security of instruction execution, and avoids unexpected software operation caused by abnormal issuance or feedback.

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Abstract

This invention relates to the field of chip mounter instruction execution technology, specifically to an instruction execution method and system based on an arbitration mechanism. The method includes: verifying instruction parameters from upper-level instruction information; determining the executor for each instruction; the corresponding executor deciding whether to issue an instruction based on its current locked state; and executing the instruction issuance process when unlocked. The method also involves indexing the specified executor based on the upper-level instruction ID, and the corresponding executor determining which instruction has been completed based on the lower-level instruction ID, thereby releasing the binding of the corresponding instruction ID and the current executor's locked state. Based on the execution status, the method determines whether to feed back the execution result to the upper level or issue other instructions to the lower level. This solution, based on an arbitration mechanism combined with executor design, fully ensures that abnormal issuance or feedback will not cause unexpected software operation, resulting in higher instruction execution security.
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Description

Technical Field

[0001] This invention relates to the field of chip mounter instruction execution technology, and more specifically to an instruction execution method and system based on an arbitration mechanism. Background Technology

[0002] The interaction between the host computer and hardware boards of a pick-and-place machine involves many functions. To implement various action flows of the pick-and-place machine, it is necessary to combine and control various functions. Typically, various instructions or process action signals are issued by the user interaction layer or user interaction panel. In existing control methods, the user interaction layer, various data modules, and process execution modules are not strictly separated, resulting in high code coupling, error-prone data interaction, and inconvenient expansion and maintenance. Summary of the Invention

[0003] To address the problems in the prior art, the present invention aims to provide an instruction execution method and system based on an arbitration mechanism.

[0004] To achieve the above objectives, the first aspect of the present invention provides an instruction execution method based on an arbitration mechanism, comprising the following steps:

[0005] The instruction parameters of the instruction information from the upper layer are verified. After the verification is passed, the admission executor of each instruction is determined one by one.

[0006] After an instruction is admitted to the designated executor, the corresponding executor decides whether to issue the instruction based on whether it is currently in a locked state. When it is in an unlocked state, the instruction issuance process is executed.

[0007] After receiving execution feedback from the lower layer, the upper layer instruction ID that executed the instruction is indexed to the specified executor. The corresponding executor determines which instruction has been completed based on the lower layer instruction ID, thereby releasing the binding of the corresponding instruction ID and the current executor's locked state. Based on the execution status, it determines whether to feed back the execution result to the upper layer or send other instructions to the lower layer.

[0008] Preferably, the locking state is a two-layer locking, wherein the first layer of locking is: each executor sets its sub-executors that need to be locked. When the instruction executed by the current executor has not been completed and feedback is not received, the sub-executors set by the executor are all in a locked state, and these sub-executors cannot execute any instructions.

[0009] The second layer of locking is as follows: Each executor determines whether to lock itself based on the conversion status of the instruction to be executed. This includes: if the instruction is broken down into multiple executable instructions at the hardware interpretation layer, it does not lock itself, but blocks the executor from executing subsequent received instructions by using the run flag; if the instruction is converted into a single instruction and sent to the hardware interpretation layer, it determines whether to allow the execution of the next executable instruction of the executor during the execution of the current instruction based on the actual instruction type.

[0010] Preferably, each upper-level instruction has a unique ID. Before executing the method, the instruction ID is registered first. If an instruction with a duplicate upper-level instruction ID is being executed, the current instruction is not allowed to be issued.

[0011] Preferably, the admission executor for each instruction is specifically defined as: determining whether the instruction type meets the executability conditions of the executor, and whether the current global state meets the specified requirements.

[0012] Preferably, the actuator includes instruction translation, instruction interaction, and instruction arbitration functions.

[0013] The instruction translation function is to convert the acquired upper-level instructions into lower-level executable instructions through decomposition, calculation, or mapping.

[0014] The instruction interaction function is as follows: instructions are sent to shared memory by registering callback functions, the instruction execution results are obtained, and interactions are performed with the upper and lower layers.

[0015] The instruction arbitration function includes: instruction admission, clearing, locking, unlocking, and control of the actuator.

[0016] Preferably, the actuator includes a component motion actuator, a process actuator, and a combined process actuator, wherein,

[0017] One of the component motion actuators only executes the current component motion, and the executable instructions include: movement of a certain axis, image acquisition of a certain camera, and action of a certain gripper;

[0018] One of the process actuators can execute multiple different processes, and component motion actuators can be added as members. The executable instructions include: multi-axis homing and various types of teaching.

[0019] The combined process executor executes instructions that are completed by a combination of multiple process or component actions. Component action executors and process executors can be added as members. Executable instructions include: warm-up and production process.

[0020] Preferably, the executor includes a timeout detection function, which provides timeout feedback when the actual execution time of the instruction exceeds the upper limit time, and unbinds the upper-level instruction ID and the current locked state of the executor.

[0021] A second aspect of the present invention provides an instruction execution system based on an arbitration mechanism, comprising:

[0022] The admission executor determination module is configured to perform instruction parameter verification on instruction information from the upper layer. After the verification is passed, the admission executor of each instruction is determined one by one and the instruction is admitted to the specified executor.

[0023] The executor is configured to, upon receiving an instruction from the upper layer, determine whether to issue an instruction based on whether it is currently in a locked state. When in an unlocked state, it executes the instruction issuance process. Upon receiving execution feedback from the lower layer, it determines which instruction has been completed based on the lower layer instruction ID, thereby releasing the binding of the corresponding instruction ID and the current executor's locked state. Based on the execution status, it determines whether to feed back the execution result to the upper layer or issue other instructions to the lower layer.

[0024] Preferably, the system further includes an executor registration and creation module, configured to register corresponding creation methods according to different types of executors, so as to unify the creation interface of all executors.

[0025] Preferably, the executor includes an execution method management module and an instruction ID management module. The execution method management module is used to manage the execution method interface of the instruction. The executor registers the method for executing the instruction and transmits the upper-level instruction ID and the lower-level instruction ID to be sent to the instruction ID management module through the execution method interface. The instruction ID management module is used to receive and manage the upper-level instruction ID and the instruction ID to be sent to the lower level.

[0026] The above technical solution allows for modification or addition of instruction functionality simply by adding an executor or modifying its internal logic. The modified or added instruction functionality is decoupled from other modules in the upper or lower layers or within the same layer, eliminating the need to modify the code logic of other modules or processes, thus greatly improving the system's scalability and maintainability. Furthermore, the arbitration mechanism combined with the executor design ensures that abnormal issuance or feedback will not cause unexpected software performance, resulting in higher instruction execution security.

[0027] Other features and advantages of the embodiments of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0028] The accompanying drawings are provided to further illustrate embodiments of the present invention and form part of the specification. They are used together with the following detailed description to explain the embodiments of the present invention, but do not constitute a limitation thereof. In the drawings:

[0029] Figure 1This is a schematic diagram of the instruction execution flow based on the arbitration mechanism in an embodiment of the present invention;

[0030] Figure 2 This is a flowchart illustrating step S3 in an embodiment of the present invention;

[0031] Figure 3 This is a schematic diagram of the actuator in an embodiment of the present invention. Detailed Implementation

[0032] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the scope of the present invention.

[0033] The first aspect of this invention provides an instruction execution method based on an arbitration mechanism, characterized in that, as Figure 1 As shown, it includes the following steps:

[0034] S1. Perform instruction parameter verification on the instruction information from the upper layer. After the verification is passed, determine the admission executor of each instruction one by one.

[0035] When this layer receives an instruction from the upper layer (e.g., the user interaction layer or user interaction panel), it performs instruction parameter validation. If the validation passes, it checks each executor in the executor list to determine which executor is allowed. Specifically, the determination method is: whether the instruction type meets the executability conditions of the executor, and whether the current global state meets the specified requirements.

[0036] S2. After the instruction is admitted to the specified executor, the corresponding executor decides whether to issue the instruction based on whether it is currently in a locked state. When it is in an unlocked state, the instruction issuance process is executed.

[0037] After an instruction is admitted to a designated executor, the executor needs to determine whether to issue the instruction based on its current locked state. If it is unlocked, the instruction issuance process can proceed; otherwise, it will not execute and will report an error. Specifically, locking is divided into two layers. The first layer of locking: Each executor sets its own sub-executors to be locked. When the instruction being executed by the current executor has not been completed and feedback is received, all sub-executors set by that executor are locked, and these sub-executors cannot execute any instructions. The second layer of locking: Each executor determines whether to lock itself based on the conversion status of the instruction to be executed. When the instruction is broken down into multiple hardware interpretation layer executable instructions, it does not lock itself, but blocks the executor from executing subsequent received instructions through a run flag. When converted into a single instruction and issued to the hardware interpretation layer, it determines whether to allow the execution of the next executable instruction of that executor during the current instruction's execution based on the actual instruction type.

[0038] S3. Upon receiving execution feedback from the lower layer, the system indexes the specified executor based on the upper-layer instruction ID that executed the instruction. The corresponding executor then determines which instruction has been completed based on the lower-layer instruction ID, thereby releasing the binding of the corresponding instruction ID and the current executor's locked state. Based on the execution status (failure or success), it determines whether to send the execution result back to the upper layer or send other instructions to the lower layer. Whenever an upper-layer instruction is finally completed, the binding of the user interaction layer instruction ID must be released, and the current executor's locked state must be lifted. Figure 2 As shown.

[0039] In this embodiment of the invention, the ID of each received upper-level instruction is, in principle, unique and non-repeating, and the ID of each instruction sent to the lower level is also, in principle, unique and non-repeating. Therefore, before executing an instruction, the instruction ID is registered first. If an instruction with a duplicate upper-level instruction ID is being executed, the current instruction is not allowed to be sent. If the instruction is successfully sent, the current executor is locked.

[0040] In this embodiment of the invention, the actuators are currently classified into three types: component action actuators, process actuators, and combined process actuators. A user-level instruction may be converted into a single instruction executable by the hardware interpretation layer, or into multiple hardware interpretation layer executable instructions.

[0041] Component motion actuator: An actuator only executes the actions of the current component. Executable instructions include: movement of a certain axis, image acquisition by a certain camera, and action of a certain gripper. Therefore, there may be multiple actuators of the same type, for example, each axis may be configured with an independent actuator, and these actuators have completely identical functions.

[0042] Process executor: An executor that executes a specified process. One executor can execute multiple different processes, and component motion executors can be added as its members. Executable instructions include: multi-axis homing, various types of teaching, etc.

[0043] Combined process executor: Executes instructions that are completed by a combination of multiple process or component actions. Component action executors and process executors can be added as its members. Executable instructions include: warm-up, production process, etc.

[0044] The actuator has the following general functions, including instruction translation, instruction interaction, and instruction arbitration.

[0045] Instruction translation: Converting the acquired upper-level instructions into lower-level executable instructions through methods such as decomposition, calculation, and mapping;

[0046] Command interaction: Commands are issued to shared memory by registering callback functions, the execution results of the commands are obtained, and interactions are performed with the user interaction layer and the data management layer.

[0047] Command arbitration: The execution of actuator commands, including access, clearing, locking, unlocking, and special controls (such as cancellation, pause, step execution, etc.).

[0048] In addition, the executor also has a timeout detection function. Specifically, for each type of upper-level instruction, its theoretical calculation time is obtained from the theoretical calculation module, and its execution time limit is set according to different proportional coefficients. When the actual execution time of the instruction exceeds its corresponding upper limit time, a timeout feedback is given, the binding of the upper-level instruction ID is released, and the current executor's locked state is released.

[0049] Taking the production process as an example, the production process executor adds necessary process executors and component action executors, and registers callback functions for the execution feedback of these executors to obtain execution result information. It also registers callback functions for each state machine to respond to state transitions and subscribes to various production stage execution events. After the production start instruction enters the execution process of the production executor through the technical solution of this invention, the production executor first updates the production process state machine context information according to the instruction information and current configuration parameters, sends necessary preparation instructions for production, sends a production start event, and drives the state machine to operate. Based on the state changes in the state machine callback functions, the production executor sends corresponding instructions to execute the production process. According to the callback functions fed back by the registered process executors and component action executors, it processes the execution result information and sends the corresponding state machine transition event to the state machine. By subscribing to data from various production stage execution events, it executes various adsorption, mounting, identification, material discarding, return, and feeding instructions. In the corresponding executor feedback callback function, it pushes the execution result to the event bus for the state machine to use and sends the corresponding state transition event.

[0050] A second aspect of this invention provides an instruction execution system based on an arbitration mechanism, comprising:

[0051] The admission executor determination module is configured to perform instruction parameter verification on instruction information from the upper layer. After the verification is passed, the admission executor of each instruction is determined one by one and the instruction is admitted to the specified executor.

[0052] The executor is configured to, upon receiving an instruction from the upper layer, determine whether to issue an instruction based on whether it is currently in a locked state. When in an unlocked state, it executes the instruction issuance process. Upon receiving execution feedback from the lower layer, it determines which instruction has been completed based on the lower layer instruction ID, thereby releasing the binding of the corresponding instruction ID and the current executor's locked state, and determining whether to feed back the execution result to the upper layer or issue other instructions to the lower layer based on the execution status.

[0053] The executor registration and creation module is configured to register corresponding creation methods based on different types of executors, thus unifying the creation interface for all executors. The execution method interface maintains consistency with the upper layers for ease of maintenance and debugging. In the execution method management module, the upper-layer ID and the lower-layer ID to be sent are transmitted to the instruction ID management module. When lower-layer feedback is received, the ID in the feedback information is compared with the ID in the instruction ID management module to determine whether the specified instruction has been executed.

[0054] Furthermore, such as Figure 3 As shown, the executor includes an execution method management module and an instruction ID management module. The execution method management module manages the execution method interface for instructions. The executor registers the method for executing instructions and transmits the upper-level instruction ID and the lower-level instruction ID to be issued to the instruction ID management module through the execution method interface. The instruction ID management module receives and manages the upper-level instruction ID and the instruction ID to be issued to the lower level. Both the upper-level instruction ID and the instruction ID to be issued to the lower level originate from the execution method management module. ID registration is performed before the instruction is issued. Upon receiving the instruction from the lower level, a corresponding judgment is made. After the upper-level instruction is executed, the ID is deregistered.

[0055] In summary, the instruction execution method based on the technical solution of this invention allows for modification or addition of instruction functions simply by adding an executor or modifying the internal logic of the executor. The modified or added instruction functions are decoupled from other modules in the upper or lower layers or within the same layer, eliminating the need to modify the code logic of other modules or processes, thus greatly improving the system's scalability and maintainability. Furthermore, the arbitration mechanism combined with the executor design fully ensures that abnormal instruction delivery or feedback will not cause unexpected software performance, resulting in higher instruction execution security.

[0056] It should also be noted that the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0057] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A method for executing instructions based on an arbitration mechanism, characterized in that, Includes the following steps: The instruction parameters of the instruction information from the upper layer are verified. After the verification is passed, the admission executor of each instruction is determined one by one. After an instruction is admitted to the designated executor, the corresponding executor decides whether to issue the instruction based on whether it is currently in a locked state. When it is in an unlocked state, the instruction issuance process is executed. After receiving the execution feedback from the lower layer, the upper layer instruction ID that executed the instruction is indexed to the specified executor. The corresponding executor determines which instruction has been executed based on the lower layer instruction ID, so as to release the binding of the corresponding instruction ID and the current executor's locked state. Based on the execution status, it is determined whether to feed back the execution result to the upper layer or send other instructions to the lower layer. The locking state is a two-layer locking. The first layer of locking is as follows: each executor sets its own sub-executors to be locked. When the instruction being executed by the current executor has not been completed and feedback is received, all the sub-executors set by that executor are in a locked state, and these sub-executors cannot execute any instructions. The second layer of locking is as follows: each executor determines whether to lock itself based on the conversion of the instruction to be executed. This includes: if it is broken down into multiple hardware interpretation layer executable instructions, it does not lock itself, but blocks the executor from executing subsequent received instructions by using a running flag; if it is converted into a single instruction and sent to the hardware interpretation layer, it determines whether to allow the execution of the next executable instruction of the executor during the execution of the current instruction based on the actual instruction type.

2. The method according to claim 1, characterized in that, Each upper-level instruction has a unique ID. Before executing the method, the instruction ID is registered. If an instruction with a duplicate upper-level instruction ID is being executed, the current instruction is not allowed to be issued.

3. The method according to claim 1, characterized in that, The admission executor that judges each instruction individually specifically judges whether the instruction type meets the executor's executable conditions and whether the current global state meets the specified requirements.

4. The method according to claim 1, characterized in that, The actuator includes instruction translation, instruction interaction, and instruction arbitration functions. The instruction translation function is to convert the acquired upper-level instructions into lower-level executable instructions through decomposition, calculation, or mapping. The instruction interaction function is as follows: instructions are sent to shared memory by registering callback functions, the instruction execution results are obtained, and interactions are performed with the upper and lower layers. The instruction arbitration function includes: instruction admission, clearing, locking, unlocking, and control of the actuator.

5. The method according to any one of claims 1-4, characterized in that, The actuators include component motion actuators, process actuators, and combined process actuators, wherein, One of the component motion actuators only executes the current component motion, and the executable instructions include: movement of a certain axis, image acquisition of a certain camera, and action of a certain gripper; One of the process actuators can execute multiple different processes, and component motion actuators can be added as members. The executable instructions include: multi-axis homing and various types of teaching. The combined process executor executes instructions that are completed by a combination of multiple process or component actions. Component action executors and process executors can be added as members. Executable instructions include: warm-up and production process.

6. The method according to claim 5, characterized in that, The executor includes a timeout detection function. When the actual execution time of the instruction exceeds the upper limit, it provides timeout feedback, unbinds the upper-level instruction ID, and displays the current locked state of the executor.

7. An instruction execution system based on an arbitration mechanism, characterized in that, include: The admission executor determination module is configured to perform instruction parameter verification on instruction information from the upper layer. After the verification is passed, the admission executor of each instruction is determined one by one and the instruction is admitted to the specified executor. The executor is configured to receive instructions from the upper layer and decide whether to issue instructions based on whether it is currently in a locked state. When it is in an unlocked state, it executes the instruction issuance process. In addition, after receiving the execution feedback from the lower layer, it determines which instruction has been completed based on the lower layer instruction ID, so as to release the binding of the corresponding instruction ID and the current executor's locked state, and determines whether to feed back the execution result to the upper layer or send other instructions to the lower layer based on the execution status; The locking state is a two-layer locking. The first layer of locking is as follows: each executor sets its own sub-executors to be locked. When the instruction being executed by the current executor has not been completed and feedback is received, all the sub-executors set by that executor are in a locked state, and these sub-executors cannot execute any instructions. The second layer of locking is as follows: each executor determines whether to lock itself based on the conversion of the instruction to be executed. This includes: if it is broken down into multiple hardware interpretation layer executable instructions, it does not lock itself, but blocks the executor from executing subsequent received instructions by using a running flag; if it is converted into a single instruction and sent to the hardware interpretation layer, it determines whether to allow the execution of the next executable instruction of the executor during the execution of the current instruction based on the actual instruction type.

8. The system according to claim 7, characterized in that, The system also includes an executor registration and creation module, which is configured to register corresponding creation methods according to different types of executors, so as to unify the creation interface of all executors.

9. The system according to claim 7 or 8, characterized in that, The executor includes an execution method management module and an instruction ID management module. The execution method management module is used to manage the execution method interface of instructions. The executor registers the method for executing instructions and transmits the upper-level instruction ID and the lower-level instruction ID to be sent to the instruction ID management module through the execution method interface. The instruction ID management module is used to receive and manage upper-level instruction IDs and instruction IDs sent to lower levels.

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