Gateway processing method and device based on heterogeneous computing and dynamic energy efficiency

Abstract

The application relates to the technical field of data processing, and discloses a gateway processing method and device based on heterogeneous computing and dynamic energy efficiency, which comprises the following steps: performing a data analysis operation on real-time data of a target gateway to obtain data analysis information, determining a processing acceleration component according to a random forest decision tree model and task type information, generating a gateway model based on task modeling parameters, determining parallel segmentation points in the gateway model through a critical path analysis algorithm, and determining at least one sub-task set of the target gateway; determining a corresponding heterogeneous computing unit for each sub-task set based on the processing acceleration component and the calculation processing parameters, and further generating gateway processing parameters corresponding to the target gateway. It can be seen that the application can intelligently process industrial gateway data, is favorable for improving the intelligence and efficiency of industrial gateway data processing, and is favorable for improving the accuracy and reliability of industrial gateway data processing.

Description

Technical Field

[0001] This invention relates to the field of gateway intelligent processing technology, and in particular to gateway processing methods and apparatus based on heterogeneous computing and dynamic energy efficiency. Background Technology

[0002] Industrial gateways are key devices in the fields of industrial automation and the Internet of Things (IoT). They are mainly used to efficiently collect, process, and transmit various data from industrial field equipment. By connecting to devices such as sensors, controllers, and PLCs, they collect data such as temperature, pressure, and vibration from the underlying equipment and upload them to the cloud or control center. At the same time, they receive control commands and provide real-time feedback on the execution status, ensuring the stability and efficiency of the production process. The system also has strong real-time capabilities, enabling it to quickly respond to changes in equipment status, promptly handle fault warnings and production process adjustment tasks, and meet the stringent real-time requirements of industrial production.

[0003] In existing technologies, industrial gateway systems have significant problems in real-time processing and energy efficiency optimization. First, most traditional industrial gateways adopt a single computing architecture, such as relying solely on the CPU for data processing. This can easily lead to processing delays when faced with complex tasks, making it difficult to meet the stringent real-time requirements of industrial production. For example, in high-precision manufacturing or automated production lines, equipment status monitoring and fault early warning require rapid response, but existing systems suffer from response delays due to insufficient processing speed, affecting production efficiency and equipment safety. Second, there are also shortcomings in energy efficiency optimization. Existing gateways consume a lot of energy when running under high load, while they cannot effectively reduce energy consumption under low load, lacking a dynamic adjustment mechanism. This fixed energy consumption mode not only increases operating costs but also has an adverse impact on the long-term stable operation of the equipment.

[0004] Therefore, it is particularly important to provide a new industrial gateway processing method to improve the intelligence and reliability of gateway data processing. Summary of the Invention

[0005] This invention provides a gateway processing method and apparatus based on heterogeneous computing and dynamic energy efficiency, which can realize intelligent processing of industrial gateway data, thereby improving the intelligence and efficiency of industrial gateway data processing, as well as the accuracy and reliability of industrial gateway data processing.

[0006] The first aspect of this invention discloses a gateway processing method based on heterogeneous computing and dynamic energy efficiency, the method comprising:

[0007] Real-time data from the target gateway is collected, and data analysis operations are performed on the real-time data to obtain data analysis information. The data analysis information includes task type information, data quantity information, and data time information corresponding to the real-time data. The task type information includes at least one of Modbus protocol parsing information, OPC UA data encryption information, and AI anomaly detection information.

[0008] Based on the pre-determined random forest decision tree model and the task type information, the processing acceleration component corresponding to the target gateway is determined;

[0009] Based on the predetermined task modeling parameters, a gateway model corresponding to the target gateway is generated. Through a preset critical path analysis algorithm, parallel split points in the gateway model are determined, and based on the parallel split points, at least one sub-task set corresponding to the target gateway is determined.

[0010] Based on the processing acceleration component and each of the subtask sets, the heterogeneous computing unit corresponding to each of the subtask sets is determined, and the computing processing parameters corresponding to each of the heterogeneous computing units are determined.

[0011] Based on each of the heterogeneous computing units and the corresponding computing parameters of each heterogeneous computing unit, gateway processing parameters corresponding to the target gateway are generated.

[0012] As an optional implementation, in a first aspect of the present invention, the method further includes:

[0013] Based on the predetermined target energy efficiency function and the predetermined predictive control model, the gateway operating parameters of the target gateway within a predetermined future time period are determined;

[0014] Based on the gateway's operating parameters and the pre-determined deep deterministic policy gradient reinforcement learning model, energy efficiency optimization parameters corresponding to the gateway's processing parameters are generated.

[0015] Based on the energy efficiency optimization parameters, the gateway processing parameters are updated, and the target gateway is controlled to perform gateway processing operations that match the updated gateway processing parameters.

[0016] As an optional implementation, in the first aspect of the invention, after collecting the real-time data of the target gateway, the method further includes:

[0017] Based on the predetermined real-time message verification parameters, a data extraction operation is performed on the real-time data to obtain the verification data extraction result, and data verification parameters are generated based on the predetermined real-time message verification parameters; wherein, the verification data extraction result includes the industrial Modbus field to the MQTT message body;

[0018] According to the data verification parameters, a data verification operation is performed on the extracted verification data to obtain a data verification result, wherein the data verification result includes a protocol mapping verification result and an encrypted message verification result.

[0019] Determine whether the data verification result meets the preset data verification conditions;

[0020] When it is determined that the data verification result meets the preset data verification conditions, the operation of performing data analysis on the real-time data to obtain data analysis information is triggered.

[0021] As an optional implementation, in the first aspect of the present invention, after determining the heterogeneous computing unit corresponding to each of the sub-task sets based on the processing acceleration component and each of the sub-task sets, and determining the computing processing parameters corresponding to each of the heterogeneous computing units, the method further includes:

[0022] Based on the real-time data, determine the real-time time series data corresponding to the real-time data, and determine the target feature data corresponding to the real-time time series data, wherein the target feature data includes one or more of the abnormal feature vector data and compressed alarm message data corresponding to the real-time time series data;

[0023] Based on the pre-determined time window polling parameters, the task queue depth information corresponding to the target gateway is determined, and based on the target feature data and the task queue depth information, the activation status corresponding to each heterogeneous computing unit is determined.

[0024] Update the computational processing parameters corresponding to each heterogeneous computing unit according to the activation state of each heterogeneous computing unit.

[0025] As an optional implementation, in a first aspect of the present invention, determining the heterogeneous computing unit corresponding to each of the sub-task sets based on the processing acceleration component and each of the sub-task sets, and determining the computing processing parameters corresponding to each of the heterogeneous computing units, includes:

[0026] For each subtask set, based on the processing acceleration component and the subtask set, the task type parameter corresponding to the subtask set is determined, and the heterogeneous computing unit corresponding to the subtask set is determined according to the task type parameter corresponding to the subtask set and the subtask and the corresponding task type parameter.

[0027] For each subtask set, the processing requirement parameters of the subtask set are determined according to the heterogeneous computing unit corresponding to the subtask set and the task type parameters corresponding to the subtask set, and the computing processing parameters corresponding to the heterogeneous computing unit are determined based on the processing requirement parameters of the subtask set.

[0028] Wherein, when the task type parameters corresponding to the subtask set include one or more of encryption task type parameters, decryption task type parameters, and protocol conversion parameters, the heterogeneous computing unit corresponding to the subtask set includes an FPGA hardware acceleration unit; when the task type parameters corresponding to the subtask set include a time-series data inference task type parameter, the heterogeneous computing unit corresponding to the subtask set includes an NPU neural network computing unit.

[0029] As an optional implementation, in a first aspect of the present invention, determining whether the data verification result meets preset data verification conditions includes:

[0030] Based on the data verification result, determine the data environment parameters corresponding to the data verification result, and based on the data environment parameters, determine the data key information of the data verification result, and based on the data environment parameters, determine the security data verification parameters; wherein, the security data verification parameters include security start chain verification parameters and communication data encryption subkey parameters;

[0031] Based on the data key information and the security data verification parameters, generate the data verification parameters corresponding to the data verification result;

[0032] Determine whether the data security level corresponding to the data verification parameter is greater than or equal to the data security level threshold corresponding to the preset data verification condition;

[0033] When it is determined that the data security level corresponding to the data verification parameter is greater than or equal to the preset data security level threshold corresponding to the data verification condition, the data verification result is determined to meet the preset data verification condition.

[0034] When it is determined that the data security level corresponding to the data verification parameter is less than the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

[0035] As an optional implementation, in a first aspect of the present invention, the step of updating the gateway processing parameters according to the energy efficiency optimization parameters includes:

[0036] Obtain the real-time gateway information of the target gateway, and based on the real-time gateway information and the energy efficiency optimization parameters, combine the predetermined deep learning model to generate the dynamically adjusted energy efficiency parameters of the energy efficiency optimization parameters;

[0037] When the real-time gateway information indicates that the target gateway is in an abnormal gateway state, the abnormal gateway information corresponding to the target gateway is determined, and based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, abnormal processing parameters are generated, and an update operation is performed on the gateway processing parameters based on the abnormal processing parameters.

[0038] A second aspect of this invention discloses a gateway processing device based on heterogeneous computing and dynamic energy efficiency, the device comprising:

[0039] The acquisition module is used to collect real-time data from the target gateway;

[0040] The analysis module is used to perform data analysis operations on the real-time data to obtain data analysis information, wherein the data analysis information includes task type information, data quantity information, and data time information corresponding to the real-time data; wherein the task type information includes at least one of Modbus protocol parsing information, OPC UA data encryption information, and AI anomaly detection information.

[0041] The determination module is used to determine the processing acceleration component corresponding to the target gateway based on the pre-determined random forest decision tree model and the task type information;

[0042] The generation module is used to generate a gateway model corresponding to the target gateway based on the pre-determined task modeling parameters;

[0043] The determining module is further configured to determine the parallel segmentation point in the gateway model through a preset critical path analysis algorithm, and based on the parallel segmentation point, determine at least one sub-task set corresponding to the target gateway; based on the processing acceleration component and each sub-task set, determine the heterogeneous computing unit corresponding to each sub-task set, and determine the computing processing parameters corresponding to each heterogeneous computing unit.

[0044] The generation module is further configured to generate gateway processing parameters corresponding to the target gateway based on each of the heterogeneous computing units and the computing processing parameters corresponding to each of the heterogeneous computing units.

[0045] As an optional implementation, in a second aspect of the present invention, the determining module is further configured to determine the gateway operating parameters of the target gateway within a preset future time period based on a predetermined target energy efficiency function and a predetermined predictive control model;

[0046] The generation module is also used to generate energy efficiency optimization parameters corresponding to the gateway processing parameters based on the gateway operating parameters and the pre-determined deep deterministic policy gradient reinforcement learning model.

[0047] The device further includes:

[0048] The update module is used to perform an update operation on the gateway processing parameters based on the energy efficiency optimization parameters;

[0049] The control module is used to control the target gateway to perform gateway processing operations that match the updated gateway processing parameters.

[0050] As an optional implementation, in a second aspect of the invention, the apparatus further includes:

[0051] The extraction module is used to perform a data extraction operation on the real-time data of the target gateway after the acquisition module acquires the real-time data, based on the predetermined real-time message verification parameters, to obtain the verification data extraction result.

[0052] The generation module is further configured to generate data verification parameters based on the pre-determined real-time message verification parameters; wherein the verification data extraction result includes industrial Modbus fields to MQTT message body;

[0053] The verification module is used to perform a data verification operation on the verification data extraction result according to the data verification parameters to obtain a data verification result, wherein the data verification result includes a protocol mapping verification result and an encrypted message verification result.

[0054] The judgment module is used to determine whether the data verification result meets the preset data verification conditions; when it is determined that the data verification result meets the preset data verification conditions, the analysis module is triggered to perform the data analysis operation on the real-time data to obtain data analysis information.

[0055] As an optional implementation, in a second aspect of the invention, the determining module is further configured to: determine the heterogeneous computing unit corresponding to each of the subtask sets based on the processing acceleration component and each of the subtask sets; and after determining the computing processing parameters corresponding to each of the heterogeneous computing units, determine the real-time time-series data corresponding to the real-time data based on the real-time data, and determine the target feature data corresponding to the real-time time-series data, wherein the target feature data includes one or more of the abnormal feature vector data and compressed alarm message data corresponding to the real-time time-series data; determine the task queue depth information corresponding to the target gateway based on a pre-determined time window polling parameter, and determine the activation state corresponding to each of the heterogeneous computing units based on the target feature data and the task queue depth information;

[0056] The update module is further configured to update the computational processing parameters corresponding to each heterogeneous computing unit according to the activation state of each heterogeneous computing unit.

[0057] As an optional implementation, in a second aspect of the invention, the determining module determines the heterogeneous computing unit corresponding to each of the sub-task sets based on the processing acceleration component and each of the sub-task sets, and the specific method for determining the computing processing parameters corresponding to each of the heterogeneous computing units includes:

[0058] For each subtask set, based on the processing acceleration component and the subtask set, the task type parameter corresponding to the subtask set is determined, and the heterogeneous computing unit corresponding to the subtask set is determined according to the task type parameter corresponding to the subtask set and the subtask and the corresponding task type parameter.

[0059] For each subtask set, the processing requirement parameters of the subtask set are determined according to the heterogeneous computing unit corresponding to the subtask set and the task type parameters corresponding to the subtask set, and the computing processing parameters corresponding to the heterogeneous computing unit are determined based on the processing requirement parameters of the subtask set.

[0060] Wherein, when the task type parameters corresponding to the subtask set include one or more of encryption task type parameters, decryption task type parameters, and protocol conversion parameters, the heterogeneous computing unit corresponding to the subtask set includes an FPGA hardware acceleration unit; when the task type parameters corresponding to the subtask set include a time-series data inference task type parameter, the heterogeneous computing unit corresponding to the subtask set includes an NPU neural network computing unit.

[0061] As an optional implementation, in a second aspect of the present invention, the specific method by which the judging module judges whether the data verification result meets the preset data verification conditions includes:

[0062] Based on the data verification result, determine the data environment parameters corresponding to the data verification result, and based on the data environment parameters, determine the data key information of the data verification result, and based on the data environment parameters, determine the security data verification parameters; wherein, the security data verification parameters include security start chain verification parameters and communication data encryption subkey parameters;

[0063] Based on the data key information and the security data verification parameters, generate the data verification parameters corresponding to the data verification result;

[0064] Determine whether the data security level corresponding to the data verification parameter is greater than or equal to the data security level threshold corresponding to the preset data verification condition;

[0065] When it is determined that the data security level corresponding to the data verification parameter is greater than or equal to the preset data security level threshold corresponding to the data verification condition, the data verification result is determined to meet the preset data verification condition.

[0066] When it is determined that the data security level corresponding to the data verification parameter is less than the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

[0067] As an optional implementation, in a second aspect of the present invention, the specific manner in which the updating module performs an update operation on the gateway processing parameters based on the energy efficiency optimization parameters includes:

[0068] Obtain the real-time gateway information of the target gateway, and based on the real-time gateway information and the energy efficiency optimization parameters, combine the predetermined deep learning model to generate the dynamically adjusted energy efficiency parameters of the energy efficiency optimization parameters;

[0069] When the real-time gateway information indicates that the target gateway is in an abnormal gateway state, the abnormal gateway information corresponding to the target gateway is determined, and based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, abnormal processing parameters are generated, and an update operation is performed on the gateway processing parameters based on the abnormal processing parameters.

[0070] A third aspect of the present invention discloses another gateway processing device based on heterogeneous computing and dynamic energy efficiency, the device comprising:

[0071] Memory containing executable program code;

[0072] A processor coupled to the memory;

[0073] The processor calls the executable program code stored in the memory to execute some or all of the steps in the gateway processing method based on heterogeneous computing and dynamic energy efficiency according to any of the first aspects of the present invention.

[0074] The fourth aspect of the present invention discloses a computer storage medium storing computer instructions, which, when invoked, are used to execute some or all of the steps in the gateway processing method based on heterogeneous computing and dynamic energy efficiency described in any of the first aspects of the present invention.

[0075] Compared with the prior art, the present invention has the following beneficial effects:

[0076] This invention discloses a gateway processing method and apparatus based on heterogeneous computing and dynamic energy efficiency, comprising: performing data analysis operations on real-time data of a target gateway to obtain data analysis information; determining processing acceleration components based on a random forest decision tree model and task type information; generating a gateway model based on task modeling parameters; determining parallel partitioning points in the gateway model through a critical path analysis algorithm; and determining at least one sub-task set of the target gateway; determining corresponding heterogeneous computing units and computational processing parameters based on the processing acceleration components and each sub-task set, thereby generating gateway processing parameters corresponding to the target gateway. This enables intelligent processing of industrial gateway data, which is beneficial for improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing. Attached Figure Description

[0077] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0078] Figure 1 This is a flowchart illustrating a gateway processing method based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention.

[0079] Figure 2 This is a flowchart illustrating another gateway processing method based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention.

[0080] Figure 3 This is a schematic diagram of the structure of a gateway processing device based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention.

[0081] Figure 4 This is a schematic diagram of another gateway processing device based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention.

[0082] Figure 5 This is a schematic diagram of the structure of another gateway processing device based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention. Detailed Implementation

[0083] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0084] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, apparatus, product, or end that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or ends.

[0085] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0086] This invention discloses a gateway processing method and apparatus based on heterogeneous computing and dynamic energy efficiency, which enables intelligent processing of industrial gateway data, thereby improving the intelligence and efficiency of industrial gateway data processing, as well as its accuracy and reliability. These will be described in detail below.

[0087] Example 1

[0088] Please see Figure 1 This is a flowchart illustrating a gateway processing method based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention. Wherein, Figure 1The described gateway processing method based on heterogeneous computing and dynamic energy efficiency can be applied to gateway processing devices based on heterogeneous computing and dynamic energy efficiency. These devices can be integrated into local servers or cloud servers; this embodiment of the invention does not impose limitations. Figure 1 As shown, the gateway processing method based on heterogeneous computing and dynamic energy efficiency may include the following operations:

[0089] 101. Collect real-time data from the target gateway, perform data analysis operations on the real-time data, and obtain data analysis information.

[0090] In this embodiment of the invention, the data analysis information includes task type information, data quantity information, and data time information corresponding to the real-time data; wherein, the task type information includes at least one of Modbus protocol parsing information, OPC UA data encryption information, and AI anomaly detection information.

[0091] In this embodiment of the invention, optionally, the real-time data of the target gateway includes multi-source heterogeneous data streams received from the industrial site via the main control CPU, including Modbus TCP messages, OPC UA telemetry data, and sensor timing data.

[0092] In this embodiment of the invention, optionally, data analysis operations are performed on real-time data to obtain data analysis information. This information can be obtained by a feature analyzer parsing the type, priority, and computational requirements of the input data stream in real time. The computational requirements include prediction of CPU, FPGA, or NPU resource usage and the generation of metadata containing task type, data volume, and deadline. Further, the input data stream is processed by a feature analyzer to extract task type, data volume, and deadline parameters in real time. The task type includes at least one of Modbus protocol parsing, OPC UA data encryption, and AI anomaly detection.

[0093] In this embodiment of the invention, optionally, the Modbus protocol is one of the most commonly used serial communication protocols in the industrial field, mainly used for data interaction between field devices such as PLCs, sensors, and frequency converters and gateways / monitoring systems. Modbus protocol parsing information defines the characteristics of the task of "converting Modbus protocol data into a universal format that the gateway can process," and its core includes three key types of information: "protocol type, data structure, and parsing requirements." OPC UA (Open Platform Unified Communication Architecture) is a universal protocol for realizing cross-platform data interaction between "field devices - gateway - cloud" in the Industrial Internet of Things, and one of its core advantages is its built-in security mechanism. OPC UA data encryption information defines the characteristics of the task of "ensuring the confidentiality, integrity, and legitimacy of OPC UA protocol data transmission," and its core includes three key types of information: "encryption object, encryption algorithm, and security verification." AI anomaly detection is a core function of industrial gateways to achieve "edge intelligence," analyzing industrial time-series data (temperature, vibration, current, etc.) through deep learning models (such as LSTM and CNN) to identify abnormal states that deviate from normal patterns. AI anomaly detection information is a feature definition of "the input data, model requirements, and detection targets of this type of intelligent analysis task".

[0094] 102. Based on the pre-determined random forest decision tree model and task type information, determine the processing acceleration component corresponding to the target gateway.

[0095] In this embodiment of the invention, optionally, the pre-determined random forest decision tree model is a machine learning model composed of multiple independent decision trees, which is pre-trained using industrial scenario task data and can quickly output the optimal hardware allocation result based on the input task characteristics.

[0096] In this embodiment of the invention, optionally, the task type information includes whether the task is data encryption / decryption or protocol conversion, or whether the task is time-series data AI inference; the processing acceleration component corresponding to the target gateway includes a dedicated pipeline of an FPGA hardware acceleration unit or an LSTM computing core of an NPU neural network unit; wherein, if the task is data encryption / decryption or protocol conversion, it is routed to the dedicated pipeline of the FPGA hardware acceleration unit; if the task is time-series data AI inference, it is routed to the LSTM computing core of the NPU neural network unit;

[0097] 103. Based on the pre-determined task modeling parameters, generate a gateway model corresponding to the target gateway. Through a pre-defined critical path analysis algorithm, determine the parallel split points in the gateway model, and based on the parallel split points, determine at least one sub-task set corresponding to the target gateway.

[0098] In this embodiment of the invention, optionally, the pre-determined task modeling parameters include task modeling parameters corresponding to the Directed Acyclic Graph (DAG) modeling of complex tasks. The DAG modeling of complex tasks is a core technical means to achieve parallel decomposition and efficient scheduling of complex tasks. Essentially, it uses a graphical mathematical model to decompose multi-step, multi-dependent tasks in industrial scenarios, providing a structured basis for subsequent parallel computing and resource allocation. A DAG is a mathematical graph composed of "nodes" and "directed edges." Nodes represent "sub-task units" in complex tasks (such as single steps in industrial scenarios like "Modbus protocol parsing," "data encryption," "AI anomaly detection," and "CRC check"); directed edges represent "dependencies" between sub-tasks (e.g., "Modbus protocol parsing must be completed before data encryption can be performed," with the edge direction pointing from the "preceding sub-task" to the "subsequent sub-task"); and the acyclic property means there is no path from a node back to itself via a directed edge. The loop path (to avoid task logic deadlock and ensure that tasks can be executed in order).

[0099] In this embodiment of the invention, the optional preset Critical Path Method (CPM) is a core algorithm tool that further optimizes task execution efficiency and ensures real-time performance after decomposing complex tasks using a Directed Acyclic Graph (DAG). Essentially, it analyzes the dependencies and execution times of each subtask in the DAG to find the "longest subtask chain that determines the total time of the entire complex task" (i.e., the critical path), and prioritizes allocating hardware resources to this path to avoid overall processing delays caused by critical task blocking, ultimately meeting the stringent real-time requirements of industrial scenarios. The critical path is the path with the longest total execution time among all subtask chains from the "task start point" to the "task end point" in the DAG-modeled subtask network. The time of this path directly determines the final completion time of the entire complex task—if any subtask on the critical path is delayed, the entire task will be delayed; conversely, even if a subtask on a non-critical path has a small amount of free time, it will not affect the overall time.

[0100] In this embodiment of the invention, optionally, the parallel partitioning point is a key node or task boundary identified by a critical path analysis algorithm after modeling a complex task using a directed acyclic graph (DAG). This node or boundary can split the task into a set of "independent subtasks". Its core function is to break the serial execution logic of complex tasks, allowing multiple subtasks to be processed in parallel on heterogeneous computing units (CPU / FPGA / NPU), thereby significantly reducing the overall task latency. This is a key technical link in achieving "high real-time performance and high throughput" of the system.

[0101] In this embodiment of the invention, optionally, determining at least one sub-task set corresponding to the target gateway based on the parallel split point can be achieved by modeling the complex task using a directed acyclic graph, determining the parallel split point through a critical path analysis algorithm, and splitting the task into a set of sub-tasks {T1,T2,…,Tn} that can be executed in parallel.

[0102] 104. Based on the processing acceleration components and each subtask set, determine the heterogeneous computing unit corresponding to each subtask set, and determine the computing processing parameters corresponding to each heterogeneous computing unit.

[0103] In this embodiment of the invention, optionally, the heterogeneous computing unit corresponding to each subtask set can be determined based on the processing acceleration component and each subtask set by dynamically allocating the subtask set to the heterogeneous computing unit through a preemptive scheduler, wherein high-priority tasks preempt FPGA and NPU resources, and low-priority tasks are downgraded to coprocessor execution.

[0104] In this embodiment of the invention, optionally, the computational processing parameters corresponding to each heterogeneous computing unit can be one or more of the following: interrupt priority, core clock frequency, task scheduling time, cache enable, cache size, and low-power mode enable.

[0105] 105. Generate gateway processing parameters corresponding to the target gateway based on each heterogeneous computing unit and the corresponding computing processing parameters of each heterogeneous computing unit.

[0106] In this embodiment of the invention, optionally, the system has a built-in "basic parameter template library" for different heterogeneous computing units. The template library predefines parameter ranges based on typical task requirements in industrial scenarios. After the subtask set is matched with the heterogeneous computing unit, the system automatically calls the corresponding template according to the subtask type to generate initial parameters. Based on the initial parameters, the system collects three types of data in real time through the energy efficiency management module: "task load rate, hardware temperature, and real-time power consumption," and optimizes the parameters by combining the ARIMA prediction model and the DDPG reinforcement learning algorithm. The system then generates gateway processing parameters corresponding to the target gateway based on the above parameters.

[0107] In this embodiment of the invention, optional, for example, optimization based on task load: if the data volume of T3 protocol conversion is monitored to increase from 1.5GB / s to 1.9GB / s (load rate increases from 75% to 95%), and the ARIMA model predicts that the load rate will remain above 90% within the next 5 seconds, the system triggers FPGA parameter adjustment: increasing the logic block activation rate from 80% to 100%, increasing the DMA channel bandwidth from 2Gbps to 2.5Gbps, and enabling FPGA overclocking (base frequency 115%) to ensure that T3 time is still ≤1ms; optimization based on hardware temperature: if the core temperature of the NPU increases from 65℃ to 72℃ (exceeding the 70℃ threshold) when processing T5, the energy efficiency management module triggers DVFS control: reducing the NPU inference frequency from 1.2GHz to 1.0GHz, while maintaining the quantization accuracy INT8 (at this time, the inference latency increases to 1.2ms, still meeting the T5 ≤ 2ms cutoff time), to prevent the temperature from continuing to rise.

[0108] In this embodiment of the invention, optionally, a heterogeneous computing and dynamic energy efficiency collaborative optimization architecture design is adopted. Through the division of labor and cooperation of the main control CPU, FPGA hardware acceleration unit, NPU neural network unit and coprocessor, real-time data processing and intelligent energy efficiency control in industrial scenarios are realized. Among them, the main control CPU dynamically schedules the FPGA's DMA engine through the hardware abstraction layer to complete end-to-end data encryption and decryption and industrial protocol conversion. The NPU generates abnormal feature vectors based on time-series data analysis and triggers the coprocessor to generate low-power alarm logs. The dynamic task scheduling module uses a dual-channel DMA controller to realize high-priority task preemption. The energy efficiency management module dynamically adjusts the NPU frequency and shuts down redundant logic blocks of the FPGA through the linkage of temperature sensor and ARIMA prediction model. The security execution module realizes encrypted instruction injection and TSN time slot hard binding based on the AES-256 root key stored in eFuse. Finally, the real-time response module uses bit-Banding technology to realize 50ns-level alarm signal triggering. The system deeply integrates computing acceleration, security verification, and energy efficiency closed-loop control, meeting the high real-time and high reliability requirements of intelligent manufacturing scenarios with technical indicators of 20Gbps encrypted throughput, 1ms instruction response, and 40% dynamic power consumption optimization.

[0109] It is evident that implementation Figure 1The described gateway processing method based on heterogeneous computing and dynamic energy efficiency can collect real-time data from the target gateway and perform analysis operations to obtain data analysis information. It determines processing acceleration components based on a random forest decision tree model and task type information, generates a gateway model corresponding to the target gateway by combining task modeling parameters, and determines parallel partitioning points and subtask sets by combining critical path analysis algorithms. Based on the processing acceleration components and subtask sets, it determines heterogeneous computing units and computational processing parameters to generate gateway processing parameters. This method, centered on real-time data, accurately matches task requirements and significantly improves real-time processing performance. By collecting real-time data from the target gateway, it extracts "task type, data quantity, and data time." Three-dimensional information ensures accurate identification of task requirements from the source, and maximizes the utilization of heterogeneous resources based on critical paths and parallel partitioning points, reducing overall processing time and improving data processing efficiency and intelligence. Through multi-dimensional verification and adaptation, it enhances the reliability of gateway operation and compatibility with industrial scenarios. The reliability of gateway operation is guaranteed through multiple links: in the task type identification stage, dual verification of data time information and task type information avoids detection misjudgment caused by data loss, thereby enabling intelligent processing of industrial gateway data, which is conducive to improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0110] Example 2

[0111] Please see Figure 2 This is a flowchart illustrating a gateway processing method based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention. Wherein, Figure 2 The described gateway processing method based on heterogeneous computing and dynamic energy efficiency can be applied to gateway processing devices based on heterogeneous computing and dynamic energy efficiency. These devices can be integrated into local servers or cloud servers; this embodiment of the invention does not impose limitations. Figure 2 As shown, the gateway processing method based on heterogeneous computing and dynamic energy efficiency may include the following operations:

[0112] 201. Collect real-time data from the target gateway, perform data analysis operations on the real-time data, and obtain data analysis information.

[0113] 202. Based on the pre-determined random forest decision tree model and task type information, determine the processing acceleration component corresponding to the target gateway.

[0114] 203. Based on the pre-determined task modeling parameters, generate a gateway model corresponding to the target gateway. Through a pre-defined critical path analysis algorithm, determine the parallel split points in the gateway model, and based on the parallel split points, determine at least one sub-task set corresponding to the target gateway.

[0115] 204. Based on the processing acceleration components and each subtask set, determine the heterogeneous computing unit corresponding to each subtask set, and determine the computing processing parameters corresponding to each heterogeneous computing unit.

[0116] 205. Generate gateway processing parameters corresponding to the target gateway based on each heterogeneous computing unit and the corresponding computing processing parameters of each heterogeneous computing unit.

[0117] In this embodiment of the invention, for a detailed description of steps 201-205, please refer to the other descriptions of steps 101-105 in Embodiment 1. This embodiment of the invention will not repeat them.

[0118] 206. Based on the predetermined target energy efficiency function and the predetermined predictive control model, determine the gateway operating parameters of the target gateway within a preset future time period.

[0119] 207. Based on the gateway's operating parameters and the pre-determined deep deterministic policy gradient reinforcement learning model, generate energy efficiency optimization parameters corresponding to the gateway's processing parameters.

[0120] In this embodiment of the invention, the predetermined target energy efficiency function may optionally include:

[0121] ,

[0122] Where η is the unit power consumption performance, the core indicator for evaluating computing efficiency. The higher the value, the better the energy efficiency. Throughput (TOPS) is trillions of operations per second, which measures the computing performance of the hardware acceleration unit. Power (W) is the real-time power consumption, which represents the energy consumption of the system or a specified hardware module. The load, temperature and voltage data of each computing unit are collected in real time to generate an energy efficiency status matrix.

[0123] In this embodiment of the invention, optionally, based on the model predictive control algorithm, the control parameters within the future time window [t, t+Δt] are continuously optimized. When the temperature is <70℃ and the load is >80%, the frequency is overclocked to 115% of the base frequency, the power supply MOSFET of the idle programmable logic block is turned off, the demand of low-priority tasks in the next 5 seconds is predicted, and the wake-up time is at least 50ms in advance.

[0124] In this embodiment of the invention, the optional, pre-determined Deep Deterministic Policy Gradient (DDPG) model is a core intelligent algorithm model used to dynamically optimize the parameters of heterogeneous computing units and achieve a synergistic balance between energy efficiency, performance, and real-time performance. Essentially, it autonomously explores the optimal hardware parameter configuration strategy through interactive learning between the agent and the environment, solving the problem of poor adaptability of static parameter configuration caused by fluctuating task loads and changing hardware states in industrial scenarios.

[0125] In this embodiment of the invention, optionally, the energy efficiency optimization parameters corresponding to the gateway processing parameters can be dynamically adjusted through online learning; further, the energy efficiency optimization parameters corresponding to the gateway processing parameters are a set of core parameters designed around "reducing ineffective energy consumption, balancing performance and power consumption, and adapting to dynamic loads," directly serving to maximize the energy efficiency ratio objective function η=Throughput(TOPS) / Power(W). These parameters do not exist independently, but are deeply bound to the hardware characteristics and task load characteristics of heterogeneous computing units (CPU / FPGA / NPU / coprocessor), and can be specifically divided into three categories: "hardware power consumption control parameters," "dynamic load adaptation parameters," and "energy efficiency target constraint parameters."

[0126] In this embodiment of the invention, the optional, pre-determined Deep Deterministic Policy Gradient (DDPG) model is a core intelligent algorithm model used to dynamically optimize the parameters of heterogeneous computing units and achieve a synergistic balance between energy efficiency, performance, and real-time performance. Essentially, it autonomously explores the optimal hardware parameter configuration strategy through interactive learning between the agent and the environment, solving the problem of poor adaptability of static parameter configuration caused by fluctuating task loads and changing hardware states in industrial scenarios.

[0127] 208. Based on the energy efficiency optimization parameters, perform an update operation on the gateway processing parameters, and control the target gateway to perform gateway processing operations that match the updated gateway processing parameters.

[0128] In this embodiment of the invention, optionally, a mapping table between energy efficiency optimization parameters and gateway processing parameters is established to clarify the direction and range of hardware parameter adjustment corresponding to each energy efficiency target. Data is collected through a real-time status monitoring module to verify whether the new parameters meet the requirements of task real-time performance, hardware security, and overall power consumption. Through the collaboration of the energy efficiency monitoring module and the task execution control module, it is ensured that the gateway stably executes processing operations according to the new parameters and continuously optimizes them.

[0129] In this embodiment of the invention, optionally, for example, the optimization effect of the dual-channel DMA controller and interrupt priority configuration in the dynamic task scheduling module on the system's real-time performance is verified. The design is based on a comparison of the performance differences between a traditional single-channel DMA architecture (no priority distinction) and a novel dual-channel DMA architecture (supporting priority preemption). In the hardware configuration, the traditional architecture uses a single-channel DMA (4MB buffer capacity, no priority distinction) and an ARM Cortex-M7 CPU (no NVIC interrupt priority configuration), while the designed architecture deploys a dual-channel DMA (2MB high-priority buffer, 4MB ordinary-priority buffer), an ARM Cortex-M7 main control CPU with an integrated NVIC priority configuration unit, and an Ethernet MAC controller (directly connected to the DMA input). Testing tools include a TREX v2.93 traffic generator (simulating 1,500 instructions / second Modbus TCP high-concurrency traffic, 64-byte instruction length), a Tektronix MSO64 oscilloscope (measuring delay using Modbus instruction sending to DMA receive completion signal as the trigger mode), a Lauterbach Trace32 (capturing IRQn_0 channel interrupt response time), and a Keysight... The N6705C monitors CPU and DMA dynamic power consumption. Test scenarios cover basic load (500 instructions / second of ordinary data), high-priority burst (1,000 instructions / second, including 20% ​​high-priority Modbus control instructions), and mixed load (1,200 instructions / second of high-priority instructions and ordinary telemetry data concurrently) to comprehensively evaluate the system's performance in hierarchical task scheduling, interrupt preemption, and resource isolation.

[0130] In this embodiment of the invention, optionally, for example, the optimization effect of temperature-sensing dynamic frequency regulation (DVFS) and FPGA power gating on system energy efficiency and stability of the energy efficiency management module is verified by comparing the performance differences between a traditional fixed-frequency architecture (without temperature feedback and power gating) and a design architecture (temperature-driven DVFS + FPGA dynamic shutdown). The traditional architecture uses a Hailo-8 NPU (fixed frequency 1.8GHz, no temperature sensor feedback) and a Xilinx Zynq UltraScale + FPGA (fully logic block powered, no dynamic shutdown), while the design architecture deploys a Hailo-8 NPU (frequency range 0.5-1.8GHz) with integrated temperature sensors and DVFS control, and a Xilinx FPGA with a power gating unit (dynamically shutting down unused logic blocks). The testing tools included a FLIR T1030sc infrared thermal imager (spatial resolution ≤20μm, temperature measurement accuracy ±1℃), a Keysight N6705C DC power analyzer (synchronously acquiring NPU or FPGA power rail current), the MLPerf Tiny v3.0 benchmark tool (LSTM timing inference task, 1,000 samples / second input), and a custom Python script (simulating industrial burst loads). Test scenarios covered continuous high load (NPU running LSTM inference at full speed and FPGA full logic block activation), intermittent load (switching between high and low loads every 5 seconds to simulate production line start-up and shutdown), and temperature limit testing (forced DVFS frequency reduction and FPGA shutdown at 45℃ ambient temperature) to comprehensively evaluate the system's performance in temperature control, power consumption optimization, and dynamic load adaptability.

[0131] In this embodiment of the invention, optionally, for example, the main control CPU receives multi-source heterogeneous data streams from the industrial site, including Modbus TCP messages, OPC UA telemetry data and sensor timing data, and the feature analyzer parses the type, priority and computing requirements of the input data streams in real time. The computing requirements include prediction of CPU, FPGA or NPU resource usage, and generate metadata containing task type, data volume and deadline.

[0132] It is evident that implementation Figure 2The described gateway processing method based on heterogeneous computing and dynamic energy efficiency can determine gateway operating parameters according to the target energy efficiency function and predictive control model. Based on the gateway operating parameters and deep deterministic policy gradient reinforcement learning model, it generates energy efficiency optimization parameters and updates the gateway processing parameters, thereby controlling the target gateway to perform corresponding operations. It can optimize gateway parameters based on the target energy efficiency function, predictive control model and deep deterministic policy gradient model. In addition, the combination of deep deterministic policy gradient model can realize multi-objective collaborative energy efficiency optimization parameters. It can also reduce energy consumption while ensuring the accuracy of detection and data processing, thereby realizing intelligent processing of industrial gateway data, which is conducive to improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0133] In an optional embodiment, after collecting real-time data from the target gateway, the method further includes:

[0134] Based on the predetermined real-time message verification parameters, a data extraction operation is performed on the real-time data to obtain the verification data extraction result, and data verification parameters are generated based on the predetermined real-time message verification parameters; wherein, the verification data extraction result includes the industrial Modbus field to the MQTT message body;

[0135] Based on the data verification parameters, perform data verification operations on the extracted verification data to obtain the data verification results, which include protocol mapping verification results and encrypted message verification results.

[0136] Determine whether the data validation results meet the preset data validation conditions;

[0137] When it is determined that the data verification result meets the preset data verification conditions, the operation of performing data analysis on real-time data is triggered to obtain data analysis information.

[0138] In this optional embodiment, the pre-determined real-time message verification parameters may include verification parameters obtained through a real-time message-level hardware pipeline.

[0139] In this optional embodiment, a heterogeneous protocol stack conversion is performed between the serial communication protocol of the industrial interface layer and the IP packets of the network layer. The FPGA hardware acceleration unit has a built-in hardware accelerator core, which completes the protocol mapping from industrial Modbus fields to MQTT message bodies and the CRC verification of encrypted messages based on a real-time message-level hardware pipeline.

[0140] In this optional embodiment, the NPU neural network unit may further optionally write abnormal feature vectors and edge inference confidence of real-time time-series data to the shared memory area of ​​the coprocessor via the on-chip bus, triggering the coprocessor to dynamically generate low-power event logs or compressed alarm messages based on the feature vectors. The main control CPU monitors the task queue depth of the coprocessor based on time window polling and controls the activation state of each computing unit synchronously in combination with dynamic voltage and frequency adjustment strategies to match the energy efficiency constraints of the real-time task flow.

[0141] In this optional embodiment, it is further possible to terminate the process when it is determined that the data verification result does not meet the preset data verification conditions.

[0142] In this optional embodiment, further optionally, hardware acceleration is achieved through a heterogeneous computing module. The main control CPU is directly connected to the DMA engine of the FPGA hardware acceleration unit via a PCIe x4 bus to handle Modbus protocol parsing and OPC UA protocol conversion tasks. The FPGA hardware acceleration unit integrates an SM4-GCM encryption pipeline with a throughput of no less than 20 gigabits per second, and maps Modbus register addresses to OPC UA standard NodeID identifiers through a protocol conversion unit, while retaining the original data timestamps. The NPU neural network unit is interconnected with the shared memory area of ​​the coprocessor through an AXI-Stream direct memory access channel, and is dedicated to performing time-series data inference for long short-term memory network models. The dynamic task scheduling module adopts a dual-channel DMA controller, with its high-priority buffer and ordinary-priority buffer configured with capacities of 2MB and 4MB respectively. It receives data streams through the RGMII bus of the Ethernet MAC controller and is integrated into the ARM... The Cortex-M7 core's NVIC priority configuration unit binds the Modbus interrupt signal to the highest priority IRQn_0 channel. The energy efficiency management module monitors the chip temperature in real time through a temperature sensor built into the NPU computing core. When the temperature exceeds 70 degrees Celsius or falls below the 80-degree Celsius threshold, the dynamic voltage and frequency regulation controller automatically switches the NPU operating frequency and shuts down the power supply of inactive programmable logic blocks through the FPGA power gating unit. Combined with a load prediction mechanism based on an autoregressive integral moving average model, the system can predict the computing needs of the NPU and FPGA within the next 5 seconds in advance by 50 milliseconds and trigger a hierarchical sleep strategy that includes shallow sleep cache retention and deep sleep power-off. The security execution module stores the AES-256 encryption root key in physically tamper-proof eFuse memory and is deployed at the end of the encryption pipeline. The system incorporates a triple verification unit, including cyclic redundancy check, data length verification, and instruction whitelist filtering, to ensure data transmission integrity. The real-time response module reserves millisecond-level fixed time slots through the 802.1Qbv scheduling protocol of Time-Sensitive Networking (TSN) and uses bit-band binding technology to map alarm signals to the microcontroller's fast input / output area, achieving an abnormal linkage response with a delay of no more than 50 nanoseconds. When the Long Short-Term Memory (LSTM) network model detects an abnormal temperature surge, the system triggers an emergency shutdown command to the programmable logic controller (PLC) via a structured JSON alarm message through the TSN channel, while simultaneously activating an audible and visual alarm. The system constructs an energy efficiency ratio optimization model with unit power consumption performance as the core indicator, and dynamically adjusts hardware parameters by combining a deep deterministic policy gradient reinforcement learning algorithm. In the event of sudden load or temperature exceeding limits, the frequency is automatically reduced to a safe frequency, and non-critical tasks are migrated to the cloud for processing.

[0143] As can be seen, implementing this optional embodiment can perform data extraction operations on real-time data based on real-time message verification parameters to obtain verification data extraction results, generate data verification parameters based on real-time message verification parameters, and perform data verification operations on the verification data extraction results to obtain data verification results. If the data verification results meet the data verification conditions, analysis operations are performed on the real-time data to obtain data analysis information. This can ensure the integrity, accuracy, and security of industrial data from the source, prevent invalid or abnormal data from entering subsequent analysis and parameter optimization processes, ensure the consistency of industrial protocol mapping based on accurate data extraction of real-time message verification parameters, comprehensively intercept invalid and tampered data through multi-dimensional data verification, ensure data security and integrity, and avoid resource consumption from invalid data analysis by judging the verification results in advance, thereby improving gateway processing efficiency and ensuring the reliability of subsequent gateway parameter optimization and processing operations. In this way, it can realize intelligent processing of industrial gateway data, which is conducive to improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0144] In another optional embodiment, after determining the heterogeneous computing unit corresponding to each sub-task set based on the processing acceleration component and each sub-task set, and determining the computing processing parameters corresponding to each heterogeneous computing unit, the method further includes:

[0145] Based on the real-time data, determine the real-time time series data corresponding to the real-time data, and determine the target feature data corresponding to the real-time time series data. The target feature data includes one or more of the following: anomaly feature vector data and compressed alarm text data corresponding to the real-time time series data.

[0146] Based on the pre-determined time window polling parameters, the task queue depth information corresponding to the target gateway is determined, and based on the target feature data and the task queue depth information, the activation status corresponding to each heterogeneous computing unit is determined.

[0147] Update the computational processing parameters for each heterogeneous computing unit based on its activation state.

[0148] In this optional embodiment, the main control CPU may poll the task queue depth of the coprocessor based on a time window and combine it with a dynamic voltage and frequency adjustment strategy to synchronously control the activation state of each computing unit in order to match the energy efficiency constraints of the real-time task flow.

[0149] In this optional embodiment, the NPU neural network unit may write abnormal feature vectors and edge inference confidence of real-time time-series data to the shared memory area of ​​the coprocessor via the on-chip bus, triggering the coprocessor to dynamically generate low-power event logs or compressed alarm messages based on the feature vectors. The main control CPU monitors the task queue depth of the coprocessor based on time window polling and controls the activation state of each computing unit in conjunction with a dynamic voltage and frequency adjustment strategy to match the energy efficiency constraints of the real-time task flow.

[0150] In this optional embodiment, the abnormal feature vector data is a high-dimensional numerical vector generated by the NPU after extracting features from time-series data using deep learning models such as LSTM, which can accurately distinguish between normal and abnormal states; the compressed alarm message data is an alarm message dynamically generated based on the abnormal feature vector output by the NPU, which has undergone data compression and format optimization.

[0151] In this optional embodiment, the main control CPU may, optionally, monitor the task queue depth of the coprocessor based on a time window polling mechanism, and synchronously control the activation state of each computing unit in conjunction with a dynamic voltage and frequency adjustment strategy to match the energy efficiency constraints of the real-time task flow. By adopting an industrial gateway real-time processing system based on heterogeneous computing and dynamic energy efficiency scheduling, the shortcomings of existing industrial gateways in real-time processing and energy efficiency optimization can be effectively addressed. This system utilizes a heterogeneous computing module to integrate the main control CPU, FPGA hardware acceleration unit, NPU neural network unit, and coprocessor, giving full play to the advantages of different computing units, significantly improving the processing speed and real-time performance of complex tasks, and meeting the needs of high-precision manufacturing and automated production lines for rapid response. At the same time, the dynamic task scheduling module, combined with the energy efficiency management module, can dynamically adjust computing resources and power consumption according to the task load, optimize energy consumption mode, reduce operating costs, and improve the long-term stability of equipment operation. In addition, the collaborative work of the safety execution module and the real-time response module further enhances the reliability and security of the system, enabling the industrial gateway to have higher performance and adaptability in complex industrial environments.

[0152] As can be seen, implementing this optional embodiment can determine the corresponding real-time time-series data and target feature data based on real-time data, determine the task queue depth information of the target gateway based on time window polling parameters, and determine the computing processing parameters of each heterogeneous computing unit in combination with the target feature data, thereby updating the computing processing parameters of each heterogeneous computing unit. It can dynamically match task flow and activation status, significantly reduce ineffective energy consumption, and improve energy efficiency. Real-time management based on task queue depth avoids hardware overload or idleness, ensures the real-time performance of critical tasks, avoids long-term overload of a single hardware by balancing the load of heterogeneous units, extends the service life of hardware, and also helps to improve the intelligence and efficiency of data processing. Combining the abnormal linkage between time-series features and queue depth, it can prevent hardware failure risks in advance, which helps to improve the security and reliability of data processing. In this way, it can realize intelligent processing of industrial gateway data, which helps to improve the intelligence and efficiency of industrial gateway data processing, as well as the accuracy and reliability of industrial gateway data processing.

[0153] In another optional embodiment, based on the processing acceleration component and each subtask set, the heterogeneous computing unit corresponding to each subtask set is determined, and the computing processing parameters corresponding to each heterogeneous computing unit are determined, including:

[0154] For each subtask set, based on the processing acceleration component and the subtask set, determine the task type parameter corresponding to the subtask set, and determine the heterogeneous computing unit corresponding to the subtask set based on the task type parameter corresponding to the subtask set and the subtask and the corresponding task type parameter.

[0155] For each subtask set, the processing requirement parameters of the subtask set are determined based on the heterogeneous computing unit and the task type parameters of the subtask set, and the computing processing parameters of the heterogeneous computing unit are determined based on the processing requirement parameters of the subtask set.

[0156] Specifically, when the task type parameters corresponding to the subtask set include one or more of encryption task type parameters, decryption task type parameters, and protocol conversion parameters, the heterogeneous computing unit corresponding to the subtask set includes an FPGA hardware acceleration unit; when the task type parameters corresponding to the subtask set include a time-series data inference task type parameter, the heterogeneous computing unit corresponding to the subtask set includes an NPU neural network computing unit.

[0157] In this optional embodiment, the FPGA hardware acceleration unit may integrate an SM4-GCM encryption module. This encryption module has a throughput of at least 20Gbps. The output of the encryption module is connected to a protocol conversion unit. This conversion unit maps Modbus register addresses to OPC UA NodeIDs while retaining the original timestamps. The protocol conversion unit is terminated by a triple verification unit, which performs CRC-32 verification, length verification, and instruction whitelist filtering. By integrating the SM4-GCM encryption module into the FPGA hardware acceleration unit, combined with the protocol conversion unit and the triple verification unit, the data security and protocol compatibility of the industrial gateway are significantly improved. The SM4-GCM encryption module provides a high throughput encryption capability of at least 20Gbps, ensuring the confidentiality and integrity of data during transmission. The protocol conversion unit efficiently maps Modbus register addresses to OPC UA NodeIDs while retaining the original timestamps, achieving seamless conversion and data synchronization between different industrial protocols. The triple verification unit enhances the accuracy and reliability of data through CRC-32 verification, length verification, and instruction whitelist filtering, effectively preventing data transmission errors and illegal instruction injection.

[0158] As can be seen, implementing this optional embodiment can determine the task type parameters and corresponding heterogeneous computing units based on the processing acceleration components of each subtask set. Based on the heterogeneous computing units and task type parameters of the subtask set, the processing requirement parameters of the subtask set are determined, and the computational processing parameters corresponding to the heterogeneous computing units are determined based on these parameters. This allows for precise anchoring of task type parameters, avoiding task-hardware mismatches, improving resource allocation efficiency, enhancing the intelligence and efficiency of data processing, and improving the accuracy and reliability of data processing. The processing requirement parameters drive the generation of computational processing parameters, balancing performance and energy efficiency, maximizing the inherent hardware advantages of FPGA and NPU, improving core task processing efficiency, and ultimately enabling intelligent processing of industrial gateway data. This improves the intelligence and efficiency of industrial gateway data processing, as well as its accuracy and reliability.

[0159] In another optional embodiment, determining whether the data verification result meets the preset data verification conditions includes:

[0160] Based on the data verification results, determine the data environment parameters corresponding to the data verification results, and based on the data environment parameters, determine the data key information of the data verification results, as well as the security data verification parameters; among which, the security data verification parameters include the security start chain verification parameters and the communication data encryption subkey parameters;

[0161] Based on the data key information and security data verification parameters, generate the data verification parameters corresponding to the data verification result;

[0162] Determine whether the data security level corresponding to the data verification parameter is greater than or equal to the preset data security level threshold corresponding to the data verification condition;

[0163] When it is determined that the data security level corresponding to the data verification parameter is greater than or equal to the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

[0164] When it is determined that the data security level corresponding to the data verification parameter is less than the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

[0165] In this optional embodiment, the security of the industrial gateway system is significantly improved by introducing a Trusted Execution Environment (TEE) unit and an integrated physically tamper-proof eFuse memory into the secure execution module to store the AES-256 root key. The physical tamper-proof feature of the eFuse memory ensures the secure storage of the root key, preventing it from being illegally read or tampered with. The high-strength encryption capability of the AES-256 root key provides strong data protection for the system, effectively resisting external attacks and ensuring the confidentiality, integrity, and availability of industrial data. The TEE unit provides a secure execution environment for the system, ensuring that critical tasks and sensitive operations run in an isolated environment, further enhancing the security and trustworthiness of the system.

[0166] In this optional embodiment, specifically, the secure execution module includes a trusted execution environment unit (TEU). The TEU integrates a physically tamper-proof eFuse memory, which stores an AES-256 root key. The AES-256 root key is used for secure boot chain verification and deriving communication data encryption subkeys. In a smart manufacturing production line scenario, when the production line robot controller receives a new firmware version via the TSN network, the TEU first calls the AES-256 root key in the eFuse memory to verify the firmware digital signature. If the signature matches, a secure boot chain is initiated, sequentially verifying the hash values ​​of the Bootloader, RTOS, and application. During equipment operation, when the MES system sends process parameter adjustment instructions, a temporary session key is derived from the root key to encrypt the transmitted PLC control instructions in real time. After receiving the instructions, the production line robot arm decrypts and executes them via a coprocessor. When physical tampering is detected, the eFuse memory automatically erases the root key and triggers a security chip reset, simultaneously sending a hardware tampering alarm event log to the edge server through the secure execution module.

[0167] In this optional embodiment, optionally, data environment parameters are the "scenario-based basis" for judging whether the data verification result is compliant, and data key information and data key parameters are the "core encryption carrier" for ensuring data security verification. The three together support the logic of "scenario-based dynamic adaptation of security verification rules" to ensure that industrial data can meet security requirements in different environments.

[0168] In this optional embodiment, optionally, the data environment parameters refer to "contextualized information related to data generation, transmission, and processing," the core function of which is to provide dynamic adaptation basis for data verification; the data key information is "a set of encrypted information bound to the current data" generated based on the data environment parameters, the core function of which is to provide exclusive key basis for data verification; the data key parameters are "quantifiable and executable security control parameters" generated based on the data key information and security verification requirements, the core function of which is to transform abstract key information into specific verification rules.

[0169] In this optional embodiment, the data environment parameters anchor the scenario (such as public network transmission, control data) to determine the strength requirements of security verification; the data key information provides encryption credentials adapted to the scenario (such as 256-bit SM4 keys, cloud-derived keys) to ensure the security basis of verification; the data key parameters transform the credentials into quantitative rules (such as iteration count, verification algorithm) to achieve standardization and assessability of verification.

[0170] In this optional embodiment, the FPGA hardware acceleration unit further optionally integrates an SM4-GCM encryption module with a throughput of at least 20Gbps. The output of the encryption module is connected to a protocol conversion unit, which maps the Modbus register address to the NodeID of the OPC UA and retains the original timestamp. The end of the protocol conversion unit is equipped with a triple verification unit, which is used to perform CRC-32 verification, length verification, and instruction whitelist filtering. In smart manufacturing production line scenarios, when the PLC sends sensor control commands via the Modbus protocol, the SM4-GCM encryption module of the FPGA hardware acceleration unit encrypts the original commands in real time with a throughput of 22Gbps. The protocol conversion unit synchronously maps the Modbus register address to the NodeID of the OPC UA and retains a millisecond-level timestamp. The triple verification unit performs CRC-32 verification on the encrypted data packet, verifies that the data length conforms to the 32-byte specification, and filters unauthorized function codes through the command whitelist (such as only allowing 0x03 to read the holding register). The verified data is transmitted to the MES system via the TSN network in a fixed 1ms time slot. When an illegal register write command is detected, the message is immediately discarded and the key rotation mechanism of the security execution module is triggered to ensure the integrity and real-time performance of the production line control commands.

[0171] As can be seen, implementing this optional embodiment can determine data environment parameters and data key information based on the data verification results, thereby determining security data verification parameters. It then generates data verification parameters corresponding to the data verification results based on the data key information and security data verification parameters. If the data security level corresponding to the data verification parameters is greater than or equal to the data security level threshold corresponding to the preset data verification conditions, the data verification result is determined to meet the preset data verification conditions; otherwise, it is not met. This approach can improve the security and reliability of data processing and the target gateway based on data environment parameters. Furthermore, by combining data key information and security verification parameters, it can achieve quantitative security judgment, improve verification accuracy, enhance data security, and reduce risk. Ultimately, it enables intelligent processing of industrial gateway data, which is beneficial for improving the intelligence and efficiency of industrial gateway data processing, as well as its accuracy and reliability.

[0172] In yet another optional embodiment, an update operation is performed on the gateway processing parameters based on energy efficiency optimization parameters, including:

[0173] Obtain real-time gateway information of the target gateway, and based on the real-time gateway information and energy efficiency optimization parameters, combine with a pre-determined deep learning model to generate dynamically adjusted energy efficiency parameters.

[0174] When real-time gateway information is used to indicate that the target gateway is in an abnormal gateway state, the abnormal gateway information corresponding to the target gateway is determined. Based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, abnormal handling parameters are generated, and the gateway handling parameters are updated based on the abnormal handling parameters.

[0175] In this optional embodiment, the abnormal gateway status can be detected by an abnormal linkage control module, which includes an NPU abnormal detection unit. The NPU abnormal detection unit generates a JSON alarm after identifying a sudden temperature rise using an LSTM model. The end of the abnormal detection unit is connected to an emergency stop command unit, which sends a control signal to the PLC through the TSN channel and triggers an audible and visual alarm.

[0176] In this optional embodiment, optionally, based on the model predictive control algorithm, the control parameters within the future time window [t, t+Δt] are continuously optimized. When the temperature is <70℃ and the load is >80%, the frequency is overclocked to 115% of the base frequency, the power supply MOSFET of the idle programmable logic block is turned off, the demand of low-priority tasks in the next 5 seconds is predicted, and the wake-up is performed at least 50ms in advance. A deep deterministic policy gradient reinforcement learning model is introduced to dynamically adjust the energy efficiency parameters through online learning. When a sudden load or temperature greater than 70℃ is detected, the energy efficiency protection mode is triggered, the frequency is forcibly reduced, non-critical tasks are suspended and migrated to the cloud, and an abnormal signal is output through the GPIO alarm port.

[0177] In this optional embodiment, the energy efficiency management module further optionally includes a temperature sensor, which is built into the computing core package of the NPU neural network unit. The output of the temperature sensor is connected to a DVFS controller. The DVFS controller dynamically adjusts the NPU frequency through a preset temperature threshold. The control terminal of the DVFS controller integrates an FPGA power gating unit, which is used to dynamically shut down unused hardware resources according to the idle state of the programmable logic block. By embedding a temperature sensor within the NPU neural network unit's core package, the core temperature can be monitored in real time, and the data is fed back to the DVFS controller. When the temperature exceeds 70 degrees Celsius, the DVFS controller dynamically reduces the NPU frequency to lower power consumption and heat generation, ensuring stable system operation in high-temperature environments. When the temperature is below 80 degrees Celsius, the system can flexibly adjust the frequency according to actual needs, avoiding excessive frequency reduction that could impact performance. Simultaneously, the FPGA power gating unit can shut down unused programmable logic blocks, further reducing ineffective energy consumption. This energy efficiency management mechanism, combining temperature sensing and dynamic frequency adjustment, not only optimizes the system's energy consumption and reduces operating costs but also extends the equipment's lifespan and enhances the industrial gateway's adaptability and reliability in complex industrial environments.

[0178] In this optional embodiment, the energy efficiency management module further optionally includes a temperature sensor, which is built into the computing core package of the NPU neural network unit. The output of the temperature sensor is connected to a DVFS controller. The DVFS controller dynamically adjusts the NPU frequency according to a temperature threshold, which is 70 degrees Celsius and 80 degrees Celsius. The control terminal of the DVFS controller is equipped with an FPGA power gating unit, which is used to shut down unused programmable logic blocks. In a smart manufacturing production line scenario, when the NPU neural network unit continuously runs a high-precision visual inspection AI model, the temperature sensor inside its core package detects that the temperature has risen to 73 degrees Celsius in real time. The DVFS controller immediately triggers dynamic frequency adjustment, reducing the NPU main frequency from 1.8GHz to 1.5GHz to control the temperature rise. When the ambient temperature is abnormal and the core temperature rises rapidly to 83 degrees Celsius, the DVFS controller further forces the frequency down to 1.2GHz. At the same time, it links the FPGA power gating unit to shut down redundant logic circuits that are not involved in image preprocessing, causing the NPU temperature to drop back to 68 degrees Celsius within 5 seconds. During this period, the visual inspection system maintains a defect recognition rate of 99.2% by dynamically switching lightweight models, and the production line throughput only decreases by 3%. After the temperature stabilizes, it automatically resumes full-speed operation.

[0179] In this optional embodiment, the real-time response module further optionally includes a TSN interface. The transmission channel of the TSN interface is configured with an 802.1Qbv scheduler and reserves a fixed time slot with a 1ms period. The end of the TSN interface is connected to a fast GPIO unit. The fast GPIO unit maps the alarm signal to the fast I / O area of ​​the STM32 through bit-banding technology. In a smart manufacturing production line scenario, when the vision inspection system detects that the weld joint offset exceeds the tolerance, the TSN interface immediately sends an emergency stop command to the main control unit within a fixed 1ms time slot reserved in the 802.1Qbv scheduler. The command is transmitted via a time-sensitive network with a delay of less than 200μs. The fast GPIO unit uses bit-banding technology to directly map the alarm signal to address 0x60000000 of the STM32H7, triggering the hard-wire cut-off action of the welding robot's power relay. The response time is 50ns. At the same time, the coprocessor records the event timestamp accurate to the microsecond level and links with the safety execution module to encrypt and store abnormal data, ensuring that the production line completes a closed-loop response from fault identification to equipment shutdown within 2ms. During this period, the dynamic energy efficiency module synchronously reduces the power supply voltage of the NPU and FPGA to maintain the system's safe state. Specifically, the output of the DVFS controller is connected to a dynamic frequency switching unit, and the end of the dynamic frequency switching unit is equipped with an ARIMA prediction model unit. The ARIMA prediction model unit predicts the NPU or FPGA demand within the next 5 seconds based on historical load data and triggers hierarchical sleep instructions, which include shallow sleep and deep sleep. In intelligent manufacturing production line scenarios, when the production line enters a batch changeover interval, the ARIMA prediction model unit determines that there will be no inspection tasks within the next 5 seconds based on historical load data, and immediately triggers a hierarchical sleep command: the DVFS controller first reduces the NPU inference frequency from 1.6GHz to 0.8GHz (shallow sleep) and shuts down the unused image preprocessing pipeline in the FPGA. If no new tasks arrive for 3 seconds, it enters a deep sleep mode, the NPU core voltage drops to 0.7V and the model weight cache is frozen, and the FPGA power gating unit disconnects the power supply to 90% of the programmable logic blocks. When a new batch of workpieces arrives and triggers the photoelectric sensor signal, the sleep wake-up circuit restores the NPU to the 1.2GHz base frequency within 200ms, ensuring that visual inspection achieves a defect recognition accuracy of 99.5% within 500ms. The entire process reduces dynamic power consumption by 62% and eliminates production line cycle delay. Specifically, the system also includes an abnormal linkage control module, which includes an NPU abnormal detection unit. The NPU abnormal detection unit generates a JSON alarm after identifying a sudden temperature rise through an LSTM model. The end of the abnormal detection unit is connected to an emergency stop command unit, which sends a control signal to the PLC through the TSN channel and triggers an audible and visual alarm.In a smart manufacturing production line scenario, when the NPU neural network unit detects an abnormal rise in the temperature of the drive motor bearing at a rate of 1.5℃ / second using an LSTM model, it immediately generates a JSON alarm message containing a timestamp, temperature data, and equipment number. Within 200μs, the emergency stop command unit sends an E-stop command to the PLC through the reserved time slot of the 802.1Qbv scheduling table of the TSN network, simultaneously triggering an audible and visual alarm. The coprocessor encrypts and records the temperature anomaly event log in real time and uploads it to the MES system. At the same time, the energy efficiency management module initiates an emergency frequency reduction strategy, forcibly reducing the NPU inference frequency from 1.8GHz to 0.9GHz. The FPGA power gating unit shuts down non-critical data filtering circuits, ensuring that the system completes the entire closed-loop control process from anomaly detection to safe equipment shutdown within 500ms.

[0180] As can be seen, implementing this optional embodiment can dynamically adjust energy efficiency parameters based on the acquired real-time gateway information and energy efficiency optimization parameters, combined with a deep learning model to generate energy efficiency optimization parameters. When the real-time gateway information indicates that the target gateway is in an abnormal gateway state, the abnormal gateway information corresponding to the target gateway is determined. Based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, abnormal handling parameters are generated, and the gateway handling parameters are updated based on the abnormal handling parameters. It can achieve "precise dynamic energy efficiency optimization" by relying on real-time gateway information and a deep learning model, improve the energy efficiency ratio, accurately identify abnormal gateway states, ensure gateway operation stability, avoid processing interruptions caused by sudden parameter changes, adapt to multiple types of industrial scenarios, improve system scalability and maintenance convenience, and thus achieve intelligent processing of industrial gateway data. This is beneficial to improving the intelligence and efficiency of industrial gateway data processing, as well as the accuracy and reliability of industrial gateway data processing.

[0181] Example 3

[0182] Please see Figure 3 , Figure 3 This is a schematic diagram of a gateway processing device based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention. As shown in Figure 3, the gateway processing device based on heterogeneous computing and dynamic energy efficiency may include:

[0183] The acquisition module 301 is used to acquire real-time data from the target gateway;

[0184] The analysis module 302 is used to perform data analysis operations on real-time data to obtain data analysis information, wherein the data analysis information includes task type information, data quantity information, and data time information corresponding to the real-time data; wherein the task type information includes at least one of Modbus protocol parsing information, OPC UA data encryption information, and AI anomaly detection information.

[0185] The determination module 303 is used to determine the processing acceleration component corresponding to the target gateway based on the pre-determined random forest decision tree model and task type information.

[0186] The generation module 304 is used to generate a gateway model corresponding to the target gateway based on the pre-determined task modeling parameters;

[0187] The determination module 303 is also used to determine the parallel partitioning point in the gateway model through a preset critical path analysis algorithm, and based on the parallel partitioning point, determine at least one sub-task set corresponding to the target gateway; based on the processing acceleration component and each sub-task set, determine the heterogeneous computing unit corresponding to each sub-task set, and determine the computing processing parameters corresponding to each heterogeneous computing unit.

[0188] The generation module 304 is also used to generate gateway processing parameters corresponding to the target gateway based on each heterogeneous computing unit and the computing processing parameters corresponding to each heterogeneous computing unit.

[0189] It is evident that implementation Figure 3 The described device can collect real-time data from a target gateway and perform analysis to obtain data analysis information. Based on a random forest decision tree model and task type information, it determines processing acceleration components, generates a gateway model corresponding to the target gateway by combining task modeling parameters, and determines parallel partitioning points using a critical path analysis algorithm to identify subtask sets. Based on the processing acceleration components and subtask sets, it determines heterogeneous computing units and computational parameters to generate gateway processing parameters. It can accurately match task requirements with real-time data as the core, significantly improving processing real-time performance. By collecting real-time data from the target gateway, it extracts "task type, data quantity, and data time." Three-dimensional information ensures accurate identification of task requirements from the source, and maximizes the utilization of heterogeneous resources based on critical paths and parallel partitioning points, reducing overall processing time and improving data processing efficiency and intelligence. Through multi-dimensional verification and adaptation, it enhances the reliability of gateway operation and compatibility with industrial scenarios. The reliability of gateway operation is guaranteed through multiple links: in the task type identification stage, dual verification of data time information and task type information avoids detection misjudgment caused by data loss, thereby enabling intelligent processing of industrial gateway data, which is conducive to improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0190] In an optional embodiment, such as Figure 4 As shown, the determining module 303 is also used to determine the gateway operating parameters of the target gateway in a preset future time period based on the predetermined target energy efficiency function and the predetermined predictive control model;

[0191] The generation module 304 is also used to generate energy efficiency optimization parameters corresponding to the gateway processing parameters based on the gateway running parameters and the pre-determined deep deterministic policy gradient reinforcement learning model.

[0192] The device also includes:

[0193] The update module 305 is used to perform update operations on the gateway processing parameters based on the energy efficiency optimization parameters;

[0194] The control module 306 is used to control the target gateway to perform gateway processing operations that match the updated gateway processing parameters.

[0195] It is evident that implementation Figure 4 The described device can determine gateway operating parameters based on the target energy efficiency function and predictive control model. Based on the gateway operating parameters and a deep deterministic policy gradient reinforcement learning model, it generates energy efficiency optimization parameters and updates the gateway processing parameters, thereby controlling the target gateway to perform corresponding operations. It can optimize gateway parameters based on the target energy efficiency function, predictive control model, and deep deterministic policy gradient model. Furthermore, by combining the deep deterministic policy gradient model, it can achieve multi-objective collaborative energy efficiency optimization parameters. It can also reduce energy consumption while ensuring detection and data processing accuracy, thereby enabling intelligent processing of industrial gateway data. This is beneficial for improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0196] In another alternative embodiment, such as Figure 4 As shown, the device also includes:

[0197] The extraction module 307 is used to perform data extraction operations on the real-time data after the acquisition module 301 acquires the real-time data of the target gateway, based on the predetermined real-time message verification parameters, to obtain the verification data extraction result.

[0198] The generation module 304 is also used to generate data verification parameters based on the pre-determined real-time message verification parameters; wherein, the verification data extraction result includes the industrial Modbus field to the MQTT message body;

[0199] The verification module 308 is used to perform data verification operations on the data extraction results according to the data verification parameters to obtain data verification results, including protocol mapping verification results and encrypted message verification results.

[0200] The judgment module 309 is used to determine whether the data verification result meets the preset data verification conditions. When it is determined that the data verification result meets the preset data verification conditions, the analysis module 302 is triggered to perform data analysis operations on the real-time data to obtain data analysis information.

[0201] It is evident that implementation Figure 4 The described device can perform data extraction operations on real-time data based on real-time message verification parameters to obtain verification data extraction results, generate data verification parameters based on real-time message verification parameters, and perform data verification operations on the verification data extraction results to obtain data verification results. If the data verification results meet the data verification conditions, analysis operations are performed on the real-time data to obtain data analysis information. This can ensure the integrity, accuracy, and security of industrial data from the source, preventing invalid or abnormal data from entering subsequent analysis and parameter optimization processes. Accurate data extraction based on real-time message verification parameters ensures the consistency of industrial protocol mapping. Through multi-dimensional data verification, invalid and tampered data are comprehensively intercepted, ensuring data security and integrity. By judging the verification results in advance, invalid data analysis is avoided from consuming resources, improving gateway processing efficiency and ensuring the reliability of subsequent gateway parameter optimization and processing operations. In this way, intelligent processing of industrial gateway data can be achieved, which is conducive to improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0202] In yet another alternative embodiment, such as Figure 4 As shown, the determining module 303 is further configured to determine the heterogeneous computing unit corresponding to each subtask set based on the processing acceleration component and each subtask set, and after determining the computing processing parameters corresponding to each heterogeneous computing unit, determine the real-time time series data corresponding to the real-time data based on the real-time data, and determine the target feature data corresponding to the real-time time series data, wherein the target feature data includes one or more of the abnormal feature vector data and compressed alarm message data corresponding to the real-time time series data; determine the task queue depth information corresponding to the target gateway based on the predetermined time window polling parameters, and determine the activation state corresponding to each heterogeneous computing unit based on the target feature data and the task queue depth information;

[0203] The update module 305 is also used to update the computational processing parameters corresponding to each heterogeneous computing unit according to the activation status of each heterogeneous computing unit.

[0204] It is evident that implementation Figure 4The described device can determine corresponding real-time time-series data and target feature data based on real-time data. It determines the task queue depth information of the target gateway based on time window polling parameters and combines this with the target feature data to determine the computational processing parameters of each heterogeneous computing unit, thereby updating the computational processing parameters of each heterogeneous computing unit. This dynamically matches task flows and activation states, significantly reducing ineffective energy consumption and improving energy efficiency. Real-time management based on task queue depth avoids hardware overload or idleness, ensuring the real-time performance of critical tasks. By balancing the load of heterogeneous units, it avoids long-term overload of a single hardware component, extending hardware lifespan and improving the intelligence and efficiency of data processing. Combined with the abnormal linkage between time-series features and queue depth, it proactively prevents hardware failure risks, improving data processing security and reliability. Ultimately, it enables intelligent processing of industrial gateway data, improving the intelligence, efficiency, accuracy, and reliability of industrial gateway data processing.

[0205] In yet another alternative embodiment, such as Figure 4 As shown, the specific methods by which module 303 determines the heterogeneous computing unit corresponding to each subtask set based on the processing acceleration component and each subtask set, and determines the computing processing parameters corresponding to each heterogeneous computing unit, include:

[0206] For each subtask set, based on the processing acceleration component and the subtask set, determine the task type parameter corresponding to the subtask set, and determine the heterogeneous computing unit corresponding to the subtask set based on the task type parameter corresponding to the subtask set and the subtask and the corresponding task type parameter.

[0207] For each subtask set, the processing requirement parameters of the subtask set are determined based on the heterogeneous computing unit and the task type parameters of the subtask set, and the computing processing parameters of the heterogeneous computing unit are determined based on the processing requirement parameters of the subtask set.

[0208] Specifically, when the task type parameters corresponding to the subtask set include one or more of encryption task type parameters, decryption task type parameters, and protocol conversion parameters, the heterogeneous computing unit corresponding to the subtask set includes an FPGA hardware acceleration unit; when the task type parameters corresponding to the subtask set include a time-series data inference task type parameter, the heterogeneous computing unit corresponding to the subtask set includes an NPU neural network computing unit.

[0209] It is evident that implementation Figure 4The described device can determine task type parameters and corresponding heterogeneous computing units based on the processing acceleration components of each sub-task set. Based on the heterogeneous computing units and task type parameters of the sub-task set, it determines the processing requirement parameters for that sub-task set. Furthermore, based on these processing requirement parameters, it determines the computational processing parameters corresponding to the heterogeneous computing units. This allows for precise anchoring of task type parameters, avoiding task-hardware mismatches, improving resource allocation efficiency, enhancing the intelligence and efficiency of data processing, and improving the accuracy and reliability of data processing. The processing requirement parameters drive the generation of computational processing parameters, balancing performance and energy efficiency, maximizing the inherent hardware advantages of FPGAs and NPUs, and improving the efficiency of core task processing. Ultimately, this enables intelligent processing of industrial gateway data, improving the intelligence and efficiency of industrial gateway data processing, as well as its accuracy and reliability.

[0210] In yet another alternative embodiment, such as Figure 4 As shown, the specific methods by which the judgment module 309 determines whether the data verification result meets the preset data verification conditions include:

[0211] Based on the data verification results, determine the data environment parameters corresponding to the data verification results, and based on the data environment parameters, determine the data key information of the data verification results, as well as the security data verification parameters; among which, the security data verification parameters include the security start chain verification parameters and the communication data encryption subkey parameters;

[0212] Based on the data key information and security data verification parameters, generate the data verification parameters corresponding to the data verification result;

[0213] Determine whether the data security level corresponding to the data verification parameter is greater than or equal to the preset data security level threshold corresponding to the data verification condition;

[0214] When it is determined that the data security level corresponding to the data verification parameter is greater than or equal to the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

[0215] When it is determined that the data security level corresponding to the data verification parameter is less than the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

[0216] It is evident that implementation Figure 4The described device can determine data environment parameters and data key information based on data verification results, and then determine security data verification parameters. It generates data verification parameters corresponding to the data verification results based on the data key information and security data verification parameters. If the data security level corresponding to the data verification parameters is greater than or equal to the data security level threshold corresponding to the preset data verification conditions, the data verification result is determined to meet the preset data verification conditions; otherwise, it is not met. This device can improve the security and reliability of data processing and the target gateway based on data environment parameters. It can also combine data key information and security verification parameters to achieve quantitative security judgment, improve verification accuracy, enhance data security, and reduce risk. Furthermore, it enables intelligent processing of industrial gateway data, which is beneficial for improving the intelligence and efficiency of industrial gateway data processing, as well as its accuracy and reliability.

[0217] In yet another alternative embodiment, such as Figure 4 As shown, the specific methods by which the update module 305 performs update operations on the gateway processing parameters based on the energy efficiency optimization parameters include:

[0218] Obtain real-time gateway information of the target gateway, and based on the real-time gateway information and energy efficiency optimization parameters, combine with a pre-determined deep learning model to generate dynamically adjusted energy efficiency parameters.

[0219] When real-time gateway information is used to indicate that the target gateway is in an abnormal gateway state, the abnormal gateway information corresponding to the target gateway is determined. Based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, abnormal handling parameters are generated, and the gateway handling parameters are updated based on the abnormal handling parameters.

[0220] It is evident that implementation Figure 4 The described device can dynamically adjust energy efficiency parameters based on real-time gateway information and energy efficiency optimization parameters, combined with a deep learning model. When real-time gateway information indicates that the target gateway is in an abnormal gateway state, it determines the abnormal gateway information corresponding to the target gateway. Based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, it generates abnormal handling parameters and performs update operations on the gateway handling parameters based on the abnormal handling parameters. It can achieve "precise dynamic energy efficiency optimization" by relying on real-time gateway information and deep learning models, improve the energy efficiency ratio, accurately identify abnormal gateway states, ensure gateway operation stability, avoid processing interruptions caused by sudden parameter changes, and adapt to multiple types of industrial scenarios, improving system scalability and maintenance convenience. In turn, it can achieve intelligent processing of industrial gateway data, which is conducive to improving the intelligence and efficiency of industrial gateway data processing, as well as improving the accuracy and reliability of industrial gateway data processing.

[0221] Example 4

[0222] Please see Figure 5 , Figure 5 This is a schematic diagram of another gateway processing device based on heterogeneous computing and dynamic energy efficiency disclosed in an embodiment of the present invention. As shown in Figure 5, the gateway processing device based on heterogeneous computing and dynamic energy efficiency may include:

[0223] Memory 401 storing executable program code;

[0224] Processor 402 coupled to memory 401;

[0225] The processor 402 calls the executable program code stored in the memory 401 to execute some or all of the steps in any of the gateway processing based on heterogeneous computing and dynamic energy efficiency in Embodiment 1 of the present invention.

[0226] Example 5

[0227] This invention discloses a computer storage medium storing computer instructions. When these computer instructions are invoked, they are used to execute some or all of the steps in any of the gateway processing methods based on heterogeneous computing and dynamic energy efficiency disclosed in Embodiment 1 of this invention.

[0228] The device embodiments described above are merely illustrative. The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0229] Through the detailed description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, including read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically-Erasable Programmable Read-Only Memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0230] Finally, it should be noted that the above embodiments are merely preferred embodiments of the present invention and are only used to illustrate the technical solutions of the present invention, not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A gateway processing method based on heterogeneous computing and dynamic energy efficiency, characterized in that, The method includes: Real-time data from the target gateway is collected, and data analysis operations are performed on the real-time data to obtain data analysis information. The data analysis information includes task type information, data quantity information, and data time information corresponding to the real-time data. The task type information includes at least one of Modbus protocol parsing information, OPC UA data encryption information, and AI anomaly detection information. Based on the predetermined random forest decision tree model and the task type information, the processing acceleration component corresponding to the target gateway is determined; wherein, the processing acceleration component includes hardware components for accelerating the processing of specific types of tasks; Based on the pre-determined task modeling parameters, a gateway model corresponding to the target gateway is generated. A pre-defined critical path analysis algorithm is used to determine the parallel split points in the gateway model. Based on these parallel split points, the processing task corresponding to the target gateway is split into at least one set of subtasks that can be executed in parallel. According to the task type of each subtask set, a matching heterogeneous computing unit is selected from the processing acceleration components. The heterogeneous computing unit corresponding to each subtask set is determined, as are the computational processing parameters corresponding to each heterogeneous computing unit. The heterogeneous computing unit includes at least one of a CPU, FPGA, and NPU. Based on each of the heterogeneous computing units and the corresponding computing parameters of each heterogeneous computing unit, gateway processing parameters corresponding to the target gateway are generated.

2. The gateway processing method based on heterogeneous computing and dynamic energy efficiency according to claim 1, characterized in that, The method further includes: Based on the predetermined target energy efficiency function and the predetermined predictive control model, the gateway operating parameters of the target gateway within a predetermined future time period are determined; Based on the gateway's operating parameters and the pre-determined deep deterministic policy gradient reinforcement learning model, energy efficiency optimization parameters corresponding to the gateway's processing parameters are generated. Based on the energy efficiency optimization parameters, the gateway processing parameters are updated, and the target gateway is controlled to perform gateway processing operations that match the updated gateway processing parameters.

3. The gateway processing method based on heterogeneous computing and dynamic energy efficiency according to claim 2, characterized in that, After collecting the real-time data from the target gateway, the method further includes: Based on the predetermined real-time message verification parameters, a data extraction operation is performed on the real-time data to obtain the verification data extraction result, and data verification parameters are generated based on the predetermined real-time message verification parameters; wherein, the verification data extraction result includes the industrial Modbus field to the MQTT message body; According to the data verification parameters, a data verification operation is performed on the extracted verification data to obtain a data verification result, wherein the data verification result includes a protocol mapping verification result and an encrypted message verification result. Determine whether the data verification result meets the preset data verification conditions; When it is determined that the data verification result meets the preset data verification conditions, the operation of performing data analysis on the real-time data to obtain data analysis information is triggered.

4. The gateway processing method based on heterogeneous computing and dynamic energy efficiency according to claim 3, characterized in that, After determining the heterogeneous computing unit corresponding to each subtask set based on the processing acceleration component and each subtask set, and determining the computing processing parameters corresponding to each heterogeneous computing unit, the method further includes: Based on the real-time data, determine the real-time time series data corresponding to the real-time data, and determine the target feature data corresponding to the real-time time series data, wherein the target feature data includes one or more of the abnormal feature vector data and compressed alarm message data corresponding to the real-time time series data; Based on the pre-determined time window polling parameters, the task queue depth information corresponding to the target gateway is determined, and based on the target feature data and the task queue depth information, the activation status corresponding to each heterogeneous computing unit is determined. Update the computational processing parameters corresponding to each heterogeneous computing unit according to the activation state of each heterogeneous computing unit.

5. The gateway processing method based on heterogeneous computing and dynamic energy efficiency according to claim 1, characterized in that, The step of determining the heterogeneous computing unit corresponding to each subtask set based on the processing acceleration component and each subtask set, and determining the computing processing parameters corresponding to each heterogeneous computing unit, includes: For each subtask set, based on the processing acceleration component and the subtask set, the task type parameter corresponding to the subtask set is determined, and the heterogeneous computing unit corresponding to the subtask set is determined according to the task type parameter corresponding to the subtask set and the subtask and the corresponding task type parameter. For each subtask set, the processing requirement parameters of the subtask set are determined according to the heterogeneous computing unit corresponding to the subtask set and the task type parameters corresponding to the subtask set, and the computing processing parameters corresponding to the heterogeneous computing unit are determined based on the processing requirement parameters of the subtask set. Wherein, when the task type parameters corresponding to the subtask set include one or more of encryption task type parameters, decryption task type parameters, and protocol conversion parameters, the heterogeneous computing unit corresponding to the subtask set includes an FPGA hardware acceleration unit; when the task type parameters corresponding to the subtask set include a time-series data inference task type parameter, the heterogeneous computing unit corresponding to the subtask set includes an NPU neural network computing unit.

6. The gateway processing method based on heterogeneous computing and dynamic energy efficiency according to claim 3, characterized in that, The step of determining whether the data verification result meets the preset data verification conditions includes: Based on the data verification result, determine the data environment parameters corresponding to the data verification result, and based on the data environment parameters, determine the data key information of the data verification result, and based on the data environment parameters, determine the security data verification parameters; wherein, the security data verification parameters include security start chain verification parameters and communication data encryption subkey parameters; Based on the data key information and the security data verification parameters, generate the data verification parameters corresponding to the data verification result; Determine whether the data security level corresponding to the data verification parameter is greater than or equal to the data security level threshold corresponding to the preset data verification condition; When it is determined that the data security level corresponding to the data verification parameter is greater than or equal to the preset data security level threshold corresponding to the data verification condition, the data verification result is determined to meet the preset data verification condition. When it is determined that the data security level corresponding to the data verification parameter is less than the data security level threshold corresponding to the preset data verification condition, the data verification result is determined to meet the preset data verification condition.

7. The gateway processing method based on heterogeneous computing and dynamic energy efficiency according to claim 2, characterized in that, The step of updating the gateway processing parameters according to the energy efficiency optimization parameters includes: Obtain the real-time gateway information of the target gateway, and based on the real-time gateway information and the energy efficiency optimization parameters, combine the predetermined deep learning model to generate the dynamically adjusted energy efficiency parameters of the energy efficiency optimization parameters; When the real-time gateway information indicates that the target gateway is in an abnormal gateway state, the abnormal gateway information corresponding to the target gateway is determined, and based on the dynamically adjusted energy efficiency parameters and the abnormal gateway information, abnormal processing parameters are generated, and an update operation is performed on the gateway processing parameters based on the abnormal processing parameters.

8. A gateway processing device based on heterogeneous computing and dynamic energy efficiency, characterized in that, The device includes: The acquisition module is used to collect real-time data from the target gateway; The analysis module is used to perform data analysis operations on the real-time data to obtain data analysis information, wherein the data analysis information includes task type information, data quantity information, and data time information corresponding to the real-time data; wherein the task type information includes at least one of Modbus protocol parsing information, OPC UA data encryption information, and AI anomaly detection information. The determination module is used to determine the processing acceleration component corresponding to the target gateway based on the pre-determined random forest decision tree model and the task type information; wherein, the processing acceleration component includes hardware components for accelerating the processing of specific types of tasks; The generation module is used to generate a gateway model corresponding to the target gateway based on the pre-determined task modeling parameters; The determining module is further configured to determine the parallel split point in the gateway model through a preset critical path analysis algorithm, and split the processing task corresponding to the target gateway into at least one set of subtasks that can be executed in parallel based on the parallel split point; select a matching heterogeneous computing unit from the processing acceleration component according to the task type of each subtask set, determine the heterogeneous computing unit corresponding to each subtask set, and determine the computing processing parameters corresponding to each heterogeneous computing unit, wherein the heterogeneous computing unit includes at least one of CPU, FPGA and NPU; The generation module is further configured to generate gateway processing parameters corresponding to the target gateway based on each of the heterogeneous computing units and the computing processing parameters corresponding to each of the heterogeneous computing units.

9. A gateway processing device based on heterogeneous computing and dynamic energy efficiency, characterized in that, The device includes: Memory containing executable program code; A processor coupled to the memory; The processor calls the executable program code stored in the memory to execute the gateway processing method based on heterogeneous computing and dynamic energy efficiency as described in any one of claims 1-7.

10. A computer storage medium, characterized in that, It stores computer instructions, which, when executed by a processor, implement the gateway processing method based on heterogeneous computing and dynamic energy efficiency as described in any one of claims 1-7.

Images